GreenChipTM III.V
TEA1755 product training
ALAN TANG
November,13, 2012
COMPANY CONFIDENTIAL
Subject / Department / Author - November 13, 2012
Agenda
IIntroduction
t d ti
-Application field
-Regulations
-Topology
- Key features and Introduction of IC
- Achievement
PFC
-topology
-on time control
-IC block diagram
g
-functions
-design
Flyback
ybac
-topology
-multi-operation mode
-IC block diagram
-functions
-design
COMPANY CONFIDENTIAL
2
TEA1755 / ADC / ALAN TANG November 13, 2012
-Application fields

Consumer products(消费性电子产品)

Notebook adapter(笔记本电脑)

Networking power(网通电源)

Game console(游戏机)

Printer(打印机)

Industrial application(工业应用)

IPC(工业计算机)

Car charger(车用充电器)

E-bike
E
bike charger(电动脚踏车充电器)

Street light(路灯)

Home appliance(家用设备)

TV(电视机)

Sewing machine (缝纫机)
COMPANY CONFIDENTIAL
3
TEA1755 / ADC / ALAN TANG November 13, 2012
Cont.
COMPANY CONFIDENTIAL
4
TEA1755 / ADC / ALAN TANG November 13, 2012
-Regulations:
1 Department
1.D
t
t Of Energy
COMPANY CONFIDENTIAL
5
TEA1755 / ADC / ALAN TANG November 13, 2012
Cont.
C
Comparison
i
off min.
i efficiency
ffi i
requirement
i
t
COMPANY CONFIDENTIAL
6
TEA1755 / ADC / ALAN TANG November 13, 2012
2.ErP Lot6 Tier 2
Stndby Power
currently covered by Lot 6 Standby/off mode Standard; Tier 2 (effective Jan
2013) Off Mode ≤ 0.5W, Standby Mode ≤ 0.5W, Standby mode with status
display ≤ 1W.
1.standby mode: equipment is connected to mains power source, depends on
mains power to work as intended, and provides only a reactivation(i.e. remote
control) function and/or a display(i.e. information or status)
2.off mode: equipment is connected to mains power source and is not providing
and function.
Active Mode(external)
EPS Standard Effective April 2011
≥[0 0626*Ln(Pno)]+0 622
>1 W to ≤ 51 W; ≥[0.0626*Ln(Pno)]+0.622
>51 W: ≥ 0.870
COMPANY CONFIDENTIAL
7
TEA1755 / ADC / ALAN TANG November 13, 2012
3.EC code of conduct
•Table 1.1: No-load Power Consumption
Rated Output Power (Pno)
> 0.3
0 3 W and < 49 W
> 49 W and < 250 W
Mobile handheld battery driven
and < 8 W
No-load power consumption
2014,Jan.,1
2016,Jan.,1
0 150 W
0.150
0 075 W
0.075
0.250 W
0.150 W
0.075 W
0.075 W
•Table 2.1: Energy-Efficiency
gy
y Criteria for Active Mode
(excluding Low Voltage external power supplies)
Minimum Four Point Average Efficiency in
Active Mode
Rated Output Power
((Pno)
0<W<1
1 < W < 49
49 < W < 250
•Table 2.2:
2014,Jan.,1
,
,
≥ 0.50 * Pno + 0.145
≥ 0.0626*ln(Pno) +
0.645
≥ 0.890
2016,Jan.,1
,
,
≥ 0.50 * Pno + 0.160
≥ 0.071*ln(Pno)
– 0.0014 * Pno + 0.670
≥ 0.890
Minimum Average Efficiency in Active
Mode at 10 % load of full rated output
current
2014,Jan.,1
,
,
2016,Jan.,1
,
,
≥ 0.50 * Pno + 0.045 ≥ 0.50 * Pno + 0.060
≥ 0.071*ln(Pno)
≥ 0.0626*ln(Pno) +
0.545
– 0.0014 * Pno + 0.570
≥ 0.790
≥ 0.790
Energy-Efficiency Criteria for Active Mode for Low Voltage external power supplies
Minimum Four Point Average Efficiency in
Active Mode
Rated Output Power
(Pno)
0<W<1
1 < W < 49
49 < W < 250
2014,Jan.,1
≥ 0.50 * Pno + 0.085
≥ 0.0755*ln(Pno) +
0.585
≥ 0.880
2016,Jan.,1
≥ 0.517 * Pno + 0.087
≥ 0.0834*ln(Pno)
– 0.0014 * Pno + 0.609
≥ 0.880
Minimum Average Efficiency in Active
Mode at 10 % load of full rated output
current
2014,Jan.,1
2016,Jan.,1
≥ 0.50 * Pno
≥ 0.517 * Pno
≥ 0.0834*ln(Pno)
≥ 0.0755*ln(Pno) +
0.485
– 0.0014 * Pno + 0.509
≥ 0.780
≥ 0.780
COMPANY CONFIDENTIAL
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TEA1755 / ADC / ALAN TANG November 13, 2012
Summary of regulations
2008
EC code of
conduct
EC ErP
2009
2010
2011
2012
Lot 6 Standby and
Off-mode EC
1275/2008
2014
2015
Pno<0.25w
Avg.Eff.>89%
Eff,10%>79%
Pno<0.5w
Avg.Eff.>87%
Lot 7 - External
Power Supplies
EC 278/2009
2016
Pno<0.15w
Avg.Eff.>89%
Eff,10%>79%
Pno<0.5w
Avg.Eff.>87%
Department
of Energy
Pno<0.21w
Avg.Eff.>88%
California
Energy
Commission
US Energy
Independence and
Security Act 2007
replaced all US state
external power
supply standards
ENERGY
STAR(US)
Energy Star 5.0
Pno<0.5w
Avg.Eff.>87%
Bureau of
Energy
Efficiency
China
Standard
Certification
Center
2013
The ENERGY STAR
specification for EPS
and End-Use
Products Using
External Power
Supplies (EUP) were
sunset on December
31, 2010.
follow Energy
Star 5.0
Pno<0.5w
Avg.Eff.>87%
follow Energy
Star 5.0
Pno<0.5w
Avg.Eff.>87%
2008
Energy star 5.0
Avg.Eff.>87%
Pno<0.5w
2013
DoE
Avg.Eff.>88%
Pno<0.21w
2014
CoC
Avg.Eff.>89%
Pno<0.25w
2016
CoC
Avg.Eff.>89%
Pno<0.15w
COMPANY CONFIDENTIAL
9
TEA1755 / ADC / ALAN TANG November 13, 2012
-Topology
GreenChip SR
TEA1792TS
Controller
GreenChip 3.5
TEA1755
Controller
GreenChip SC
TEA1703TS
Controller
Key Components:

Primary Side
- GreenChip 3.5 SMPS Control IC (TEA1755T)
- PFC Diode (NUR360, NUR460, BYV29X-500, BYV29X-600…)

Secondary Side
- GreenChip Synchronous Rectifier Controller (TEA1792TS)
- GreenChip Standby Controller (TEA1703TS)
- MOSFETs (PSMN7R0-100PS, PSMN7R8-120XS…)
COMPANY CONFIDENTIAL 10
TEA1755 / ADC / ALAN TANG November 13, 2012
- Key features & Introduction of IC
t
TEA1755 K
Key F
Features
General features
Integrated PFC and flyback controller
Dual boost PFC with accurate maximum output voltage (NXP patented)
Adjustable PFC switch-off delay
External overrule of PFC turn on and turn off
Mains voltage independent OverPower Protection (OPP)
Accurate OverVoltage Protection (OVP) for both converters
(adjustable for flyback converter)
General purpose input for latched protection, e.g. to be used for system Over
Temperature Protection (OTP)
PFC green features
Valley/zero voltage switching for minimum switching losses (NXP patented)
Frequency
F
limitation
li it ti tto reduce
d
switching
it hi llosses
PFC is switched off when a low load is detected at the flyback output
Flyback green features
Valley
V ll switching
i hi ffor minimum
i i
switching
i hi losses
l
(NXP patented)
d)
Frequency reduction with adjustable minimum peak current at low power operation to
maintain high efficiency at low output power levels
Burst mode operation at low power levels for high efficiency operation
COMPANY CONFIDENTIAL 11
TEA1755 / ADC / ALAN TANG November 13, 2012
Pin assignment
(Multi--Chip Module Technology)
(Multi
BCD800:
PFCTIMER
High voltage start-up
and valley detection
ABCD3:
Low voltage
control part
FBSENSE
TEA1755
COMPANY CONFIDENTIAL 12
TEA1755 / ADC / ALAN TANG November 13, 2012
GreenChipTM III.V Block Diagram
PFC part
Control & Protection
System part
Flyback part
COMPANY CONFIDENTIAL 13
TEA1755 / ADC / ALAN TANG November 13, 2012
CEC Efficiency Measurements:
-Achievement
115v/60Hz
Efficiency
Vo
Io
Po
Pi
Eff
U.U.T: 19.5V/90W demo adaptor with following critical parts
19.59
1.16
22.62
24.69
91.63%
Primary:
19.57
2.33
45.50
49.51
91.91%
- TEA1755/NXP, GreenChip 3.5
19 55
19.55
3 48
3.48
68 05
68.05
73 95
73.95
92 02%
92.02%
19.54
4.65
90.86
99.64
91.18%
- Flyback Transformer: PQ-3220, Np:Ns:Npa:Nsa=32:6:7:5, Lp=450μH,
Avg.
-PFC Choke: RM-10, Np:Ns=40:2, Lp=250μH
- Flyback Mosfet: TK10A60D/Toshiba
91.69%
230v/50Hz
- PFC Mosfet: TK12A50D/Toshiba
Vo
Io
Po
Pi
Eff
- Bridge diode: GBU806
19.58
1.16
22.61
24.63
91.82%
- Bulk el-cap: 100μF/400V
19.56
2.33
45.48
50.11
90.75%
Secondary:
19.55
3.48
68.03
74.00
91.94%
- TEA1792TS/NXP GreenChip S.R (at high side)
19.53
4.65
90.81
98.57
92.13%
Avg.
- TEA1703TS/NXP GreenChip S.C
91.66%
- Mosfet: PSMN013
PSMN013-100PS/NXP
100PS/NXP
efficiency
No Load Power & ErPLot6 Measurement:
100.00%
90.00%
80.00%
70.00%
60.00%
50.00%
Po(w)
115vac/60Hz
230vac/50Hz
0
5
10
15
output power(w)
0
0.255
0.286
Pin
115v/60Hz
230v/50Hz
18.17mw
36.23mw
18 17
36 23
0.31w(Eff:82.25%) 0.38w(Eff:67.1%)
0.35w(Eff:81.71%) 0.41w(Eff:69.75%)
20
COMPANY CONFIDENTIAL 14
TEA1755 / ADC / ALAN TANG November 13, 2012
Cont.
A dibl noise
Audible
i
-Flyback switching within the audible range, the
right side video shows an audio signal at 7kHz
7kHz.
p
from TEA1755 in 75w open
p
frame p
power supply
pp y application
pp
.
-The improvement
TEA1751: 220Vac 19.5V/0.25A 31dB(A)
TEA1755: 220Vac 19.5V/0.27A 15dB(A)
COMPANY CONFIDENTIAL 15
TEA1755 / ADC / ALAN TANG November 13, 2012
PFC
-topology
-on
on time control
-IC block diagram
-functions
functions
-design
COMPANY CONFIDENTIAL 16
TEA1755 / ADC / ALAN TANG November 13, 2012
-Topology
Boost converter with QR/DCM operation
I COIL
Vin
I DIODE
LP
I DRAIN
Gate
Vbus
Gate
VDRAIN
CP
Ipk
Idrain
Ipk
Icoil
When on time is fixed, the Ipeak
is proportional to the Vin.
Vin
The average current of Ipeak will
follow the waveform of Vin.
When Vin is sinusoidal,
sinusoidal so will
be the current.
Ipk
Idiode
Vbus
Vin
Drain
Ton
Tsec
Tdead
Ton
COMPANY CONFIDENTIAL 17
TEA1755 / ADC / ALAN TANG November 13, 2012
-ON-Time Control
A controlled on-time technique can be utilized in addition to the zero current detection to program the PFC converters current
demand from the AC line. The "fixed" on-time is determined by a error amplifier which monitors the pre-regulators output
voltage and compares it to a precision reference. The amplifier loop response is rolled off at a frequency well below 20 Hertz,
so the on-time can be considered "fixed" for one AC line cycle. Therefore, as the AC line voltage traverses sinusoidally from
zero to
t its
it peak,
k so does
d
the
th peak
k inductor
i d t current.
t With a fixed
fi d inductance
i d t
and
d on-time,
ti
tON
O , the
th peak
k switch
it h (h
(hence iinductor)
d t )
current is automatically forced to track the input voltage. This technique can be envisioned as hysteretic current control with
the lower current level set at zero. The control algorithm, cost and complexity of the control circuit are greatly simplified in
comparison to other techniques.
COMPANY CONFIDENTIAL 18
TEA1755 / ADC / ALAN TANG November 13, 2012
-IC Block Diagram
COMPANY CONFIDENTIAL 19
TEA1755 / ADC / ALAN TANG November 13, 2012
-VINSENSE

Power-down: For low standby power applications.

Brown in/out: The PFC is enabled/disabled by the Vstart(VINSENSE) &
Vstop(VINSENSE).

Dual boost: The lower/higher PFC output voltage is controlled by the VINSENSE.

Mains
M
i compensation:
ti
T
To keep
k
the
th regulation
l ti loop
l
b
bandwidth
d idth constant
t t over th
the
mains input range.

The voltage
g at the VINSENSE p
pin must be an averaged
g DC value,, representing
p
g the
AC line voltage.
Power down
VINSENSE
+
-
Brown in/out
+
-
*It is not advised to move the connection
of pin VINSENSE to a position in front of
the diode bridge.
Latch reset
Dual boost
Mains
compensation
COMPANY CONFIDENTIAL 20
TEA1755 / ADC / ALAN TANG November 13, 2012
-Power down mode control
The power-down mode can be activated for very low standby power
applications by pulling the VINSENSE < Vth(pd) level.
HV
VCC charge control
&
VINSENSE
HV VCC
charging current
+
-
Vth(pd)
VCC
C1
SAFE
RESTART
PROTECTION
COMPANY CONFIDENTIAL 21
TEA1755 / ADC / ALAN TANG November 13, 2012
Cont.
R100:100KΩ
R101:200KΩ
R103: 1KΩ
R104:n.m
Q100:2N7002
U10:LTV 817B
U10:LTV-817B
COMPANY CONFIDENTIAL 22
TEA1755 / ADC / ALAN TANG November 13, 2012
-VOSENSE

Open-loop protection:
Both of PFC&Flyback switching will be stopped while open loop protection is
activated.

Dual boost:
The internal current source is controlled by the VINSENSE to set the lower/higher
PFC output voltage.
voltage

Response improvement:
Operating near the PFC OVP level causes the PFC stage on-time to decrease
rapidly to zero.
COMPANY CONFIDENTIAL 23
TEA1755 / ADC / ALAN TANG November 13, 2012
Dual boost implementation
Transfer of voltage controlled current source
I(VoSense)
8.1µA
Vout
Vin
0µA
VinSense
2.18V
2 08V
2.08V
+
VinSense
2 28V
2.28V
+
Output voltage vs input voltage
PfcComp
Vout
VoSense
-
Vin
COMPANY CONFIDENTIAL 24
TEA1755 / ADC / ALAN TANG November 13, 2012
-PFCCOMP

ON time control:
The on time is determined by PFCCOMP voltage. Operating near the PFC OVP
level causes the PFC stage on-time to decrease rapidly to zero.

Clamping:
-To reduce the response time during load transient.
PFC off
PFCCOMP
+
2V
-
2.3 V
H = 3.35V
L = 2V
clamp
PFCCOMP clamp
VOSENSE
2.1 V
2.2V
8 uA
&
dual
boost
2.5v
1.92v
3.32v
3.75v
COMPANY CONFIDENTIAL 25
TEA1755 / ADC / ALAN TANG November 13, 2012
-PFCSENSE

OCP:
The maximum peak current is cycle-by-cycle limited.

Soft Start/Stop:
To prevent audible noise during start-up or dynamic load, the soft-start function
slowly increases the transformer peak current.
tsoft–start=3*RSS1*CSS1
COMPANY CONFIDENTIAL 26
TEA1755 / ADC / ALAN TANG November 13, 2012
-PFCAUX

Valley switching and demagnetization.
Vbulk
Vac(rect.)
Drain
Vbulk
Vac(rect.)
VDRAIN
Aux
Aux
0V
-90mV
D
Demag
dV/dt=0
dV/dt
0
Valley
COMPANY CONFIDENTIAL 27
TEA1755 / ADC / ALAN TANG November 13, 2012
PFC demag time-out (48s)
PFCdriver
PFCaux
0
-90mV
Demagnetization
Comparator
Demag timer
Demag
Demag is detected 
No demag detected 
Next stroke is started by demag
next stroke is started by demag timer
(and valley)
COMPANY CONFIDENTIAL 28
TEA1755 / ADC / ALAN TANG November 13, 2012
PFC valley detection time-out (4.2 s)
PFCdriver
PFCaux
0
-90mV
Valley detector
Valley timer
Valley is detected 
No valley detected 
Next stroke is started by valley
next stroke is started by valley timer
COMPANY CONFIDENTIAL 29
TEA1755 / ADC / ALAN TANG November 13, 2012
-PFCTIMER

PFC switch-off delay:
The switch-off delay mechanism is intend for resolving the EMI problem during
output dynamic.

Improved PFC dynamic behavior by synchronization with transient load.

Override control:
VPFCTIMER<1.03 V, PFC stage is ‘‘on’’.
VPFCTIMER>4.4 V, PFC stage is ‘’off’'.
CH1:PFCTIMER CH2:PFCSENSE CH3:FBDrv CH4:FBCTRL
COMPANY CONFIDENTIAL 30
TEA1755 / ADC / ALAN TANG November 13, 2012
-Design

PFC choke calculation.

Output voltage calculation.

VINSENSE calculation.

Ton,max calculation.
TEA1755
calculation tool_1
COMPANY CONFIDENTIAL 31
TEA1755 / ADC / ALAN TANG November 13, 2012
Flyback
-topology
topology
-multi-operation mode
-IC
IC block diagram
-functions
-design
COMPANY CONFIDENTIAL 32
TEA1755 / ADC / ALAN TANG November 13, 2012
-Topology
Flyback converter with multi-mode operation
Np:Ns
Idi d
Idiode
Vin
Vout
LP
Gate
Vout Ipk-prim
Idrain
Drain
Gate
Ipk sec
Ipk-sec
Idiode
Vin
Drain
COMPANY CONFIDENTIAL 33
TEA1755 / ADC / ALAN TANG November 13, 2012
-Multi-operation mode
Fixed Frequency
(Valley Skipping)
Frequency
Reduction
(VCO)
Q.R
Burst mode
COMPANY CONFIDENTIAL 34
TEA1755 / ADC / ALAN TANG November 13, 2012
Cont.
Oscillator fmax and frequency reduction mode
VDS
VBulk
fS
130 kHz
130 kHz
80 kHz
Valley
signal
Gate
Driver
Full Load
Medium Load
Oscillator fixed at fmax
Low Load
Oscillator in FR mode
COMPANY CONFIDENTIAL 35
TEA1755 / ADC / ALAN TANG November 13, 2012
-IC Block Diagram
COMPANY CONFIDENTIAL 36
TEA1755 / ADC / ALAN TANG November 13, 2012
-FBCTRL

Flyback output power control.

Burst mode:
The flyback controller enters the burst mode when the output power is very low and
the switching frequency is < 25 kHz. The burst mode is exited and normal operation
resumes when the VFBCTRL > 2.8 V .

Open loop protection:
A time-out function is created which protects against open control loop situations.
COMPANY CONFIDENTIAL 37
TEA1755 / ADC / ALAN TANG November 13, 2012
-FBCTRL
output power control
COMPANY CONFIDENTIAL 38
TEA1755 / ADC / ALAN TANG November 13, 2012
-FBCTRL
Flyback burst mode implementation
Burst mode is entered when the flyback switching frequency drops
b l
below
24kH
24kHz (i
(in FR mode
d nott iin QR mode)
d )
In burst mode flyback fsw = 35kHz with a 225mV FBSENSE level
A UVLO +1V protection is added to prevent unwanted UVLO in no-load
burst mode.
– this protection is only active in burst mode not in FR and QR mode
In burst mode most IC circuits are switched off to reduce the IC current
consumption
– Icc TEA1751, 1752 en 1753: 2.8 mA
– Icc_burst mode TEA1755: x.x mA
COMPANY CONFIDENTIAL 39
TEA1755 / ADC / ALAN TANG November 13, 2012
Cont.
flyback burst mode operation
Output
p p
power
Vout
FBCTRL
Flyback active
2.8 V
2.4 V
24 kHz (1.2 V)
0.8 V
Burst mode
• When the output power is reduced, the switching frequency goes down. At 24kHz the IC
enters burst mode and switching
g is stopped.
pp
Now VFBCTRL will g
go up.
p
• At FBCTRL = 2.4V the flyback starts to switch at 35kHz and VFBCTRL will go down.
• At FBCTRL = 0.8V the flyback stops switching and VFBCTRL will go up again.
• When the load is increased such that it can no longer be delivered in burst mode, then
th control
the
t l lloop will
ill cause an overshoot
h t and
d att 2
2.8V
8V th
the b
burstt mode
d iis lleft.
ft
COMPANY CONFIDENTIAL 40
TEA1755 / ADC / ALAN TANG November 13, 2012
Cont.
Enter and leaving burst mode
24 kHz
35 kHz
35 kHz
46 kHz
COMPANY CONFIDENTIAL 41
TEA1755 / ADC / ALAN TANG November 13, 2012
Cont. burst mode signals
CH1: VCC
19.5V/0A
19.5V/0.1A
CH2: FBDRIVER
CH3: FBCTRL
CH4: Vo(ripple)
19.5V/0.4A
19.5V/0.75A
COMPANY CONFIDENTIAL 42
TEA1755 / ADC / ALAN TANG November 13, 2012
Cont.
UVLO prevention
CH1: FB drain
CH2: FBCTRL
CH3: VCC (offset 12V)
CH4: VOSENSE (offset 2V)
CH5: PFC drain
Ch6: PFCCOMP
Ch6: PFCCOMP
CH7: PFCTIMER
CH8: Vo (AC coupled)
To prevent triggering of UVLO at low flyback burst mode
repetition frequencies. (protection is only active in burst mode)
COMPANY CONFIDENTIAL 43
TEA1755 / ADC / ALAN TANG November 13, 2012
Key parameters for burst repetition rate
t i
tuning
Lm
Cout
Vin
Vout
TEA1755
Rss
Ropto
COMPANY CONFIDENTIAL 44
TEA1755 / ADC / ALAN TANG November 13, 2012
Burst repetition rateOutput capacitor
1400
1200
1000
800
600
400
200
0
500,90vac
1k,90vac
Fb
bst(Hz)
Fb
bst(Hz)
Ropto
2k,90vac
0
0.2
0.4
Io(A)
( )
0.6
1800
1600
1400
1200
1000
800
600
400
200
0
470uF,90vac
470uF+470uF 90vac
470uF+470uF,90vac
470uF+470uF+470u
F,90vac
0
0.8
0.2
0.6
0.8
Lm
1200
1200
1000
1000
800
800
600
20k,90vac
400
36k,90vac
200
51k 90
51k,90vac
0
Fbst(Hz)
Fbst(Hz)
Rss2
0.4
Io(A)
( )
600
640uH,90vac
400
452uH,90vac
200
288 H 90
288uH,90vac
0
0
0.2
0.4
Io(A)
0.6
0.8
0
0.2
0.4
Io(A)
0.6
0.8
COMPANY CONFIDENTIAL 45
TEA1755 / ADC / ALAN TANG November 13, 2012
Tuning of burst repetition rate
-Increasing burst repetition rate
Fbst
Ropto
or
Output cap
Fbst
Rss2
or
Lm
Po
Po
-Decreasing
D
i b
burstt repetition
titi rate
t
Fbst
Ropto
or
Output cap
Po
Fbst
Rss2
or
Lm
Po
Remark: In order to minimize the acoustic noise from PSU, the max. burst repetition rate has to be lower
than 1kHz
1kHz.
COMPANY CONFIDENTIAL 46
TEA1755 / ADC / ALAN TANG November 13, 2012
FBCTRL
open loop protection(time-out)
Time-Out
Ctrl
29uA
C1
7V75
Open loop
5V5
Time-out
+
7V75
33 msec @ 47k + 330nF
A1
+
7V
-
7V75
+
C2
5V5
13.2k
disable
Normal operation
No time-out.
FBctrl
5V5
39k
220pF
130k
220pF
330nF
Time-out
Loop-filter
Disable
time-out
Loop-filter
COMPANY CONFIDENTIAL 47
TEA1755 / ADC / ALAN TANG November 13, 2012
-FBAUX

Demagnetization.

Over Voltage Protection:
By sensing the current flowing into the FBAUX pin during the secondary stroke
stroke.

Over Power Protection:
By sensing the current flowing out the FBAUX pin during the primary stroke. The
maximum peak current can be changed with Flyback input voltage. The output
power is almost independent with input voltage.
COMPANY CONFIDENTIAL 48
TEA1755 / ADC / ALAN TANG November 13, 2012
-FBAUX
Demagnetization
Vbulk
Vo
Vbulk
MOS Drain
FBAUX
Drain
HV
90mv
0
FBAUX
Demag
Demag
+
90mV
-
FBAUX
&
Drain / HV
Valley
dV/dt=0
dV/dt=0
+
Valley
COMPANY CONFIDENTIAL 49
TEA1755 / ADC / ALAN TANG November 13, 2012
-FBAUX
Over Voltage Protection
VGATE
Demagnetization
N
Na A ×V
 OUT
VO  VF(D1) 
NNS S
VAUX
AUX-WINDING
WINDING
0V
NaN A×
V dcV
NNP P Bulk

I(OVP)(DEM)
Vdemag
0V
R OVP
NA
 VO(OVP)  VF(D1)  - VF(D2)  Vclamp(FBAUX / DEM)(pos)
NS

I(OVP)(FBAUX / DEM)
Magnetization
Comparator
0.7V threshold
Vdemag
-0.25V
Take the tolerances of the IC and
components into account to avoid
false triggering of the OVP during
normal opreration.
Measure VF(D2) it is << 0.6V due to
the low I(OVP)(DEM) current
COMPANY CONFIDENTIAL 50
TEA1755 / ADC / ALAN TANG November 13, 2012
Cont.
application tricks
COMPANY CONFIDENTIAL 51
TEA1755 / ADC / ALAN TANG November 13, 2012
Cont.
Accuracy OVP application tricks
243k
I_dem
Vout=15.2014.82V
+/-1.3%
OVP Greenchip
-25...125deg.C.
Trafo Vout:Vaux=1:1
I_dem
17.5k
47k
0%
I_dem
5.6k
+/-4.4%
33k
Vout=15.6614.35V
34k
I_dem
+/-8%
/ 8%
Vout=15V
Vout=16.2413.83V
10k
COMPANY CONFIDENTIAL 52
TEA1755 / ADC / ALAN TANG November 13, 2012
-FBAUX
O
Over
Power
P
Protection
P t ti
-Maximum output power is independent with input voltage by compensation implement.
VGATE
Demagnetization
N
Na A ×V
 OUT
VO  VF(D1) 
NNS S
VAUX-WINDING
0V
NaN A×
V dcV
NNP P Bulk

I(OPP)(DEM)
VFBAUX
Magnetization
Comparator
0.92V threshold
90mV
-0.7V
R OPP
NA
 VBulk(min) - Vclamp(FBAUX)(neg)
NP

I(OPP)(DEM)
ROPP = R1 + R4
R1 is the OVP resistor and has
to be set or calculated first,
before ROPP can be calculated
COMPANY CONFIDENTIAL 53
TEA1755 / ADC / ALAN TANG November 13, 2012
Cont.
According to the datasheet, the OPP formula can be derived by Muller's method.
V(FBSENSE)max=(1.74E-06)*I(FBAUX)^2+0.001417*I(FBAUX)+0.685
This formula can be used for OPP calculation.
V(FBSENSE)
V(FBSENSE)max
V(FBSENS
SE) [V]
0.600
0.550
0.500
0.450
0.400
0.350
0.300
0 300
‐400
‐350
‐300
‐250 ‐200 ‐150
I(FBAUX) [uA]
U(FBSENSE)max
‐100
‐50
0
I(FBAUX) V(FBSENSE)
0
0.545
-80
0.545
-120
0.540
-160
0.503
-200
0.471
-240
0.445
-280
280
0 424
0.424
-320
0.409
-360
0.400
-400
0.396
COMPANY CONFIDENTIAL 54
TEA1755 / ADC / ALAN TANG November 13, 2012
Cont.
The maximum output power of the adaptor is:

I  VB lk 
N  VO

P O(max)  V O  IOCP  η  P Bulk
 
2
N

V

V
O
Bulk 

Ip can be expressed as:
IP 
IOCP 
IP  η
 V
n 
2   O  S 
 VBulk nP 
VFBSENSE VBulk  t delay

RSENSE
LP
The maximum flyback sense voltage is then:
VFBSENSE  1.74 10 6  Iopp ( red )( FBAUX ) 2  1.417 10 3  Iopp ( red )( FBAUX )  0.685
The reduced over-power protection current on pin FBAUX is calculated
I opp(red)(FBAUX) 
n A /n P   VBulk  Vclamp(FBAUX)
R OPP
Start with the calculation of Po-Max
Po Max at high mains with the PFC on
Sequence: Po_max, Ip, Vfbsense, Iopp(red), Ropp
COMPANY CONFIDENTIAL 55
TEA1755 / ADC / ALAN TANG November 13, 2012
-FBSENSE

OCP:
The maximum peak current is cycle-by-cycle limited.

Soft Start:
To prevent audible noise during start-up, the soft-start function slowly increases the
transformer peak current.

Minimum Flyback peak current adjustment:
The frequency reduction slope can be adjusted by minimum Flyback peak current
tuning.
tsoft–start=3*RSS1*CSS1
COMPANY CONFIDENTIAL 56
TEA1755 / ADC / ALAN TANG November 13, 2012
-Latch
OTP (with external NTC)
Rntc 470k (calculated from 100k)
Rntc [ohm
m]
1.00E+06
1.00E+05
30.5uA
. u
(6.55%)
1.00E+04
20
30
40
50
60
70
80
90
100
110
120
temp [deg.C]
Shutdown
Latch
+
C1
494mV
(5.06%)
Clamp
transistor
494mV/30.5uA=16.2 kOhm => Temp=110deg.C
Adjustment with series R or parallel R possible.
Clamp added for open pin situation (current
source should not saturate)) and to protect
p
input
p
of comparator.
470kohm NTC
Optional opto for secondary side protection
COMPANY CONFIDENTIAL 57
TEA1755 / ADC / ALAN TANG November 13, 2012
-Design

Flyback transformer calculation.

OVP calculation.

OPP calculation.
Flyback
transformer
OVP,OPP
calculation
COMPANY CONFIDENTIAL 58
TEA1755 / ADC / ALAN TANG November 13, 2012
Thank You !
COMPANY CONFIDENTIAL 59
TEA1755 / ADC / ALAN TANG November 13, 2012