NGD18N45CLB
Ignition IGBT
18 Amps, 450 Volts
N−Channel DPAK
This Logic Level Insulated Gate Bipolar Transistor (IGBT) features
monolithic circuitry integrating ESD and Over−Voltage clamped
protection for use in inductive coil drivers applications. Primary uses
include Ignition, Direct Fuel Injection, or wherever high voltage and
high current switching is required.
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18 AMPS
450 VOLTS
VCE(on) 3 2.1 V @
IC = 10 A, VGE . 4.5 V
Features
•
•
•
•
•
•
•
•
•
Ideal for Coil−on−Plug Applications
DPAK Package Offers Smaller Footprint for Increased Board Space
Gate−Emitter ESD Protection
Temperature Compensated Gate−Collector Voltage Clamp Limits
Stress Applied to Load
Low Threshold Voltage Interfaces Power Loads to Logic or
Microprocessor Devices
Low Saturation Voltage
High Pulsed Current Capability
Emitter Ballasting for Short−Circuit Capability
This is a Pb−Free Device
C
G
RGE
E
4
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Symbol
Value
Unit
Collector−Emitter Voltage
VCES
500
VDC
Collector−Gate Voltage
VCER
500
VDC
Gate−Emitter Voltage
VGE
18
VDC
IC
18
50
ADC
AAC
Rating
Collector Current−Continuous
@ TC = 25°C − Pulsed
ESD (Human Body Model)
R = 1500 Ω, C = 100 pF
ESD
ESD (Machine Model) R = 0 Ω, C = 200 pF
ESD
400
V
PD
115
0.77
Watts
W/°C
TJ, Tstg
−55 to
+175
°C
Total Power Dissipation @ TC = 25°C
Derate above 25°C
Operating and Storage Temperature Range
kV
8.0
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1 2
3
DPAK
CASE 369C
STYLE 7
MARKING DIAGRAM
1
Gate
2
Collector
YWW
G18
N45BG
4
Collector
3
Emitter
G18N45B
Y
WW
G
= Device Code
= Year
= Work Week
= Pb−Free Device
ORDERING INFORMATION
Device
NGD18N45CLBT4G
Package
Shipping†
DPAK
2500/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2016
June, 2016 − Rev. 1
1
Publication Order Number:
NGD18N45CLB/D
NGD18N45CLB
UNCLAMPED COLLECTOR−TO−EMITTER AVALANCHE CHARACTERISTICS (Note 2)
Characteristic
Symbol
Single Pulse Collector−to−Emitter Avalanche Energy
VCC = 50 V, VGE = 5.0 V, Pk IL = 26.0 A, RG = 1000 W, L = 1.0 mH, Starting TJ = 25°C
VCC = 50 V, VGE = 5.0 V, Pk IL = 10.0 A, RG = 1000 W, L = 8.4 mH, Starting TJ = 25°C
VCC = 50 V, VGE = 5.0 V, Pk IL = 15.4 A, RG = 1000 W, L = 2.0 mH, Starting TJ = 150°C
VCC = 50 V, VGE = 5.0 V, Pk IL = 5.7 A, RG = 1000 W, L = 15.2 mH, Starting TJ = 150°C
EAS
Value
Unit
mJ
338
420
237
247
MAXIMUM SHORT−CIRCUIT TIMES
Short Circuit Withstand Time – Test 1
(See Figure 17, 3 Pulses with 10 ms Period, Ta = 105°C)
tsc1−1
1000
mS
Short Circuit Withstand Time – Test 1
(See Figure 17, 3 Pulses with 10 ms Period, Ta = 150°C)
tsc1−2
800
mS
Short Circuit Withstand Time – Test 2
(See Figure 18, 3 Pulses with 10 ms Period, Ta = 105°C)
tsc2−1
5
ms
Short Circuit Withstand Time – Test 2
(See Figure 18, 3 Pulses with 10 ms Period, Ta = 150°C)
tsc2-2
1
ms
RθJC
1.3
°C/W
RθJA
95
°C/W
TL
275
°C
THERMAL CHARACTERISTICS
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
DPAK (Note 1)
Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 5 seconds
ELECTRICAL CHARACTERISTICS
Characteristic
Symbol
Test Conditions
Temperature
Min
Typ
Max
Unit
IC = 2.0 mA
TJ = −40°C to
150°C
430
455
470
VDC
IC = 10 mA
TJ = −40°C to
150°C
440
475
500
TJ = 25°C
−
0.5
20
TJ = 150°C
−
75
250
TJ = −40°C
−
0.2
10
TJ = 25°C
−
−
2.0
TJ = 25°C
−
0.7
1.0
TJ = 150°C
−
12
25
TJ = −40°C
−
0.1
1.0
TJ = 25°C
24
27
30
TJ = 150°C
26
29
33
TJ = −40°C
23
26
29
IG = 5.0 mA
TJ = −40°C to
150°C
11
13
15
VDC
VGE = 10 V
TJ = −40°C to
150°C
384
590
700
mADC
−
TJ = −40°C to
150°C
10
16
26
kW
OFF CHARACTERISTICS (Note 2)
Collector−Emitter Clamp Voltage
Zero Gate Voltage Collector Current
BVCES
ICES
VCE = 350 V,
VGE = 0 V
VCE = 15 V,
VGE = 0 V
Reverse Collector−Emitter Leakage Current
IECS
VCE = −24 V
Reverse Collector−Emitter Clamp Voltage
BVCES(R)
IC = −75 mA
Gate−Emitter Clamp Voltage
BVGES
Gate−Emitter Leakage Current
IGES
Gate Emitter Resistor
RGE
1. When surface mounted to an FR4 board using the minimum recommended pad size.
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2
mADC
mA
VDC
NGD18N45CLB
ELECTRICAL CHARACTERISTICS (continued)
Characteristic
Symbol
Test Conditions
Temperature
Min
Typ
Max
Unit
TJ = 25°C
1.1
1.56
1.9
VDC
TJ = 150°C
0.75
1.08
1.4
TJ = −40°C
1.2
1.75
2.1
IC = 7 A,
VGE = 4.5 V
TJ = −40°C
to 150°C
1.10
1.84
2.30
IC = 7 A,
VGE = 4.0 V
TJ = −40°C
to 150°C
1.15
1.89
2.35
IC = 7 A,
VGE = 3.7 V
TJ = −40°C
to 150°C
1.20
1.93
2.50
IC = 10 A,
VGE = 4.5 V
TJ = −40°C
to 150°C
1.45
2.07
2.65
IC = 10 A,
VGE = 4.0 V
TJ = −40°C
to 150°C
1.50
2.13
2.80
IC = 10 A,
VGE = 3.7 V
TJ = −40°C
to 150°C
1.55
2.19
2.85
IC = 10 mA,
VGE = 4.5 V
TJ = −40°C
to 150°C
−
0.65
1.00
−
−
−
−
3.5
−
mV/°C
gfs
VCE = 5.0 V, IC = 6.0 A
TJ = −40°C to
150°C
6.0
14
25
Mhos
400
780
1000
pF
VCC = 25 V, VGE = 0 V
f = 1.0 MHz
TJ = −40°C to
150°C
50
72
100
4.0
6
10
ON CHARACTERISTICS (Note 2)
Gate Threshold Voltage
VGE(th)
IC = 1.0 mA,
VGE = VCE
Collector−to−Emitter On−Voltage
Threshold Temperature Coefficient
(Negative)
Forward Transconductance
VCE(on)
V
DYNAMIC CHARACTERISTICS (Note 2)
Input Capacitance
CISS
Output Capacitance
COSS
Transfer Capacitance
CRSS
SWITCHING CHARACTERISTICS (Note 2)
Turn−Off Delay Time
Fall Time
Turn−On Delay Time
Rise Time
td(off)
VCC = 300 V, VGE = 5 V
RG = 1.0 kΩ, RL = 46 Ω,
TJ = 25°C
1.0
2.9
12
tf
VCC = 300 V, VGE = 5 V
RG = 1.0 kΩ, RL = 46 Ω,
TJ = 25°C
1.0
2.5
7.0
td(on)
VCC = 14 V, VGE = 5 V
RG = 1.0 kΩ, RL = 1 Ω
TJ = 25°C
0.1
0.42
1.4
tr
VCC = 14 V, VGE = 5 V
RG = 1.0 kΩ, RL = 1 Ω
TJ = 25°C
1.0
2.5
9.0
mSec
mSec
2. Electrical Characteristics at temperature other than 25°C, Dynamic and Switching characteristics are not subject to production testing.
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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3
NGD18N45CLB
TYPICAL ELECTRICAL CHARACTERISTICS (unless otherwise noted)
60
60
VGE = 10 V
IC, COLLECTOR CURRENT (A)
IC, COLLECTOR CURRENT (A)
VGE = 10 V
50
5V
40
4.5 V
TJ = 25°C
30
4V
3.5 V
20
3V
10
2.5 V
0
5V
4.5 V
40
TJ = −40°C
1
2
3
4
5
7
6
3.5 V
20
3V
10
2.5 V
0
8
2
1
3
4
6
5
7
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
Figure 1. Output Characteristics
Figure 2. Output Characteristics
8
55
60
IC, COLLECTOR CURRENT (A)
VGE = 10 V
50
40
5V
TJ = 150°C
30
4.5 V
4V
20
3.5 V
3V
10
2.5 V
0
1
2
4
3
5
6
7
50
VCE = 10 V
45
TJ = −40°C
TJ = 150°C
40
35
30
TJ = 25°C
25
20
15
10
5
0
0
0
8
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
IC = 20 A
IC = 25 A
3.5
3.0
IC = 15 A
2.5
IC = 10 A
2.0
IC = 5 A
1.5
1.0
0.5
0
−50
VGE = 5 V
−25
0
25
50
75
100
2
3
4
5
6
7
8
Figure 4. Transfer Characteristics
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
4.0
1
VGE, GATE TO EMITTER VOLTAGE (V)
Figure 3. Output Characteristics
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
4V
30
0
0
IC, COLLECTOR CURRENT (A)
50
125
150
3.5
TJ = 25°C
3.0
IC = 15 A
2.5
IC = 10 A
2.0
IC = 5 A
1.5
1.0
0.5
0
4
TJ, JUNCTION TEMPERATURE (°C)
5
6
7
8
9
VGE, GATE TO EMITTER VOLTAGE (V)
Figure 5. Collector−to−Emitter Saturation
Voltage vs. Junction Temperature
Figure 6. Collector−to−Emitter Voltage vs.
Gate−to−Emitter Voltage
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4
10
10000
3.5
IC = 15 A
2.5
IC = 10 A
2.0
C, CAPACITANCE (pF)
3.0
TJ = 150°C
IC = 5 A
1.5
1.0
1000
Ciss
100
Coss
10
Crss
0
0
4
5
6
7
8
9
0
10
20
40
60
80
140 160 180 200
100 120
VGE, GATE TO EMITTER VOLTAGE (V)
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
Figure 7. Collector−to−Emitter Voltage vs.
Gate−to−Emitter Voltage
Figure 8. Capacitance Variation
100
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
25°C
150°C
10
0.2
0
−50 −30 −10
1
10
30
50
70
90
110 130 150
10
1
TJ, JUNCTION TEMPERATURE (°C)
L, INDUCTANCE (mH)
Figure 9. Gate Threshold Voltage vs. Junction
Temperature
Figure 10. Minimum Open Secondary Latch
Current vs. Inductance
12
100
10
SWITCHING TIME (ms)
IL, LATCH CURRENT (A)
1
0.5
IL, LATCH CURRENT (A)
VGE(th), GATE THRESHOLD VOLTAGE (V)
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
NGD18N45CLB
25°C
150°C
10
8
VCC = 300 V
VGE = 5.0 V
RG = 1000 Ω
IC = 10 A
L = 300 mH
tf
6
td(off)
4
2
1
1
0
−50 −30 −10
10
10
30
50
70
90
110 130 150
L, INDUCTANCE (mH)
TEMPERATURE (°C)
Figure 11. Typical Open Secondary Latch
Current vs. Inductance
Figure 12. Inductive Switching Fall Time vs.
Temperature
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5
NGD18N45CLB
100
DC
COLLECTOR CURRENT (A)
COLLECTOR CURRENT (A)
100
10
100 ms
1 ms
1
10 ms
100 ms
0.1
0.01
10 DC
1
100 ms
0.1
100 ms
0.01
1
10
100
1000
1
10
100
1000
COLLECTOR−EMITTER VOLTAGE (V)
COLLECTOR−EMITTER VOLTAGE (V)
Figure 13. Single Pulse Safe Operating Area
(Mounted on an Infinite Heatsink at TA = 255C)
Figure 14. Single Pulse Safe Operating Area
(Mounted on an Infinite Heatsink at TA = 1255C)
100
100
COLLECTOR CURRENT (A)
t1 = 1 ms, D = 0.05
COLLECTOR CURRENT (A)
1 ms
10 ms
t1 = 2 ms, D = 0.10
10
t1 = 3 ms, D = 0.30
1
0.1
0.01
t1 = 1 ms, D = 0.05
t1 = 2 ms, D = 0.10
10
t1 = 3 ms, D = 0.30
1
0.1
0.01
1
10
100
1000
1
10
100
1000
COLLECTOR−EMITTER VOLTAGE (V)
COLLECTOR−EMITTER VOLTAGE (V)
Figure 15. Pulse Train Safe Operating Area
(Mounted on an Infinite Heatsink at TC = 255C)
Figure 16. Pulse Train Safe Operating Area
(Mounted on an Infinite Heatsink at TC = 1255C)
VBATT = 16 V
VBATT = 16 V
RL = 0.1 W
RL = 0.1 W
L = 10 mH
L = 10 mH
5.0 V
0V
5.0 V
0V
VIN
RG = 1 kW
tsc1
VIN
RG = 1 kW
tsc2
RS = 33 mW
Figure 17. Circuit Configuration for
Short Circuit Test #1
Figure 18. Circuit Configuration for
Short Circuit Test #2
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6
NGD18N45CLB
100
R(t), TRANSIENT THERMAL RESISTANCE (°C/W)
Duty Cycle = 0.5
0.2
10
0.1
0.05
0.02
1
0.01
0.1
0.01
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
P(pk)
Single Pulse
t1
0.001
t2
DUTY CYCLE, D = t1/t2
TJ(pk) − TA = P(pk) RqJA(t)
RqJC X R(t) for t ≤ 0.2 s
0.0001
0.00001
0.0001
0.001
0.01
0.1
t,TIME (S)
Figure 19. Transient Thermal Resistance
(Non−normalized Junction−to−Ambient mounted on minimum pad area)
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7
1
NGD18N45CLB
PACKAGE DIMENSIONS
DPAK (SINGLE GAUGE)
CASE 369C
ISSUE F
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY.
6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.
7. OPTIONAL MOLD FEATURE.
A
E
C
A
b3
B
c2
4
L3
Z
D
1
2
H
DETAIL A
3
L4
NOTE 7
c
SIDE VIEW
b2
e
b
TOP VIEW
0.005 (0.13)
M
C
Z
H
L2
GAUGE
PLANE
C
L
L1
DETAIL A
DIM
A
A1
b
b2
b3
c
c2
D
E
e
H
L
L1
L2
L3
L4
Z
BOTTOM VIEW
Z
SEATING
PLANE
BOTTOM VIEW
A1
ALTERNATE
CONSTRUCTIONS
SOLDERING FOOTPRINT*
2.58
0.102
5.80
0.228
MILLIMETERS
MIN
MAX
2.18
2.38
0.00
0.13
0.63
0.89
0.72
1.14
4.57
5.46
0.46
0.61
0.46
0.61
5.97
6.22
6.35
6.73
2.29 BSC
9.40 10.41
1.40
1.78
2.90 REF
0.51 BSC
0.89
1.27
−−−
1.01
3.93
−−−
STYLE 7:
PIN 1. GATE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
ROTATED 905 CW
6.20
0.244
INCHES
MIN
MAX
0.086 0.094
0.000 0.005
0.025 0.035
0.028 0.045
0.180 0.215
0.018 0.024
0.018 0.024
0.235 0.245
0.250 0.265
0.090 BSC
0.370 0.410
0.055 0.070
0.114 REF
0.020 BSC
0.035 0.050
−−− 0.040
0.155
−−−
3.00
0.118
1.60
0.063
6.17
0.243
SCALE 3:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
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NGD18N45CLB/D