CCE 5220 – RF and Microwave System Design
Tutorial 4: Phase Locked Loops
Question 1:
An integer-N PLL uses a frequency reference oscillator running at 25 MHz, and a
divide-by-100 reference divider. The output frequency band is 100-800 MHz.
(a)
Determine:
(i)
(ii)
The range of the feedback frequency divider N.
The minimum channel spacing
(b) The VCO has a tuning coefficient of 100 MHz V-1 and the phase detector gain is 1 V per
radian error. The first order active loop filter shown in Fig. 1 is to be used.
Fig. 1 – First order active filter [H(s) = (sτ2+1)/sτ1]
Determine:
(i)
(ii)
(iii)
the output voltage swing requirement of the loop filter.
the active loop filter component values given that the resonant frequency of
oscillation of the loop has to be 100 kHz and the loop is to be critically damped
when the output frequency is 450 MHz.
the worst case switching time required by the PLL to hop from one channel to an
adjacent in order to guarantee an output frequency error of not more than 0.1 kHz.
[Ans: (a) 400 - 3200, 250 kHz (b) 7 V, τ1 = 0.884 µs, τ2 = 3.18 µs, 21.2 µs]
Question 2:
The Reference Oscillator and the VCO used in the PLL in Question 1, exhibit the following
noise and output power characteristics:
Reference Oscillator: -165 dBC/Hz measured at 0.1 MHz offset from the carrier; output
power 5 mW.
The VCO uses low noise bipolar transistor having a noise factor of 1.8 dB with an output
power of 10 mW and uses a tank circuit with an effective Q factor of 50.
Determine the total output phase noise in dBmW/Hz, due to the reference oscillator and the
VCO, measured at a frequency offset of 0.1 MHz from the carrier, when the output frequency
CCE 5220 – RF and Microwave System Design
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is 450 MHz. (Take T = 27 °C and Boltzmann’s constant to be 1.38 x 10-23 J K-1). Also
determine the total output phase noise in dBmW/Hz, measured at an offset of 0.2 MHz from
the carrier.
[Ans: -133 dBmW/Hz, -141 dBmW/Hz ]
Question 3:
Suppose a fractional–N divider is used in the feedback loop of the PLL of Question 1,
performing a division of the form (N+K/16), where N and K are integers. Determine the total
output phase noise in dBc/Hz at an offset of 0.1 MHz at 450 MHz operation, assuming the
same minimum channel spacing, loop damping and resonant frequency to be kept constant.
Comment on the result obtained. Indicate any assumptions made.
[Ans: -148 dBmW/Hz]
Question 4:
The PLL in Question 1 is to be used as a frequency modulator by applying a modulating
signal in front of the VCO, operating at 450 MHz.
(i)
(ii)
[Ans: (i)
determine the transfer function in the s-domain relating the output frequency
deviation with modulating voltage. Hence also determine the -3 dB baseband
frequency range. Comment on the result obtained.
The baseband frequency range is to be improved by introducing appropriate precompensation in the modulating signal. Determine the transfer function of the precompensating filter and hence sketch its frequency response. Hence draw the
circuit diagram of a simple filter which can be used if the modulating signal is an
audio signal limited to 5 kHz.
108 s 2
s 2 + 1.257 x106 s + 3.29 x1011 ]
,
155.4
kHz
upwards,
(ii)
s 2 + 1.257 x106 s + 3.95 x1011
s2
Question 5:
An integer-N PLL uses a 1 MHz reference TXCO with no reference frequency dividers. The
output frequency range from the PLL is 100 to 900 MHz. A charge-pump is used as a phase
detector which outputs 10 µA per radian phase error. Its output can be increased to 50 µA per
radian phase error for speed-up purposes. A first order passive R-C loop filter is used. The
VCO has a tuning coefficient of 20 MHz V-1. The PLL must be capable of hopping from one
channel to an adjacent one in not more than 1 ms, with a frequency error of less than 100 Hz.
(a) Given that the PLL should remain at least critically damped during its entire range of
operation, determine suitable values for the loop filter components.
(b) Determine the natural frequency of oscillation and the damping factor of the PLL when it
is operating in (i) locked mode and (ii) locking mode at an output frequency of 900 MHz.
Hence comment on the use of the speed-up mechanism use in the PLL.
CCE 5220 – RF and Microwave System Design
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(c) The reference crystal oscillator has a temperature coefficient of 5 ppm °C-1. If the output
frequency has to be kept within 10 kHz accuracy during locked mode operation, determine
the accuracy in °C of the temperature control circuit used for the TXCO.
[Ans: (a) 2.64 kΩ, 410 nF, (b) (i) ωn = 1845 s-1, ξ = 1 (ii) ωn = 4125 s-1, ξ = 2.236, 5x
speedup (c) ∆T = 2.2 °C ]
CCE 5220 – RF and Microwave System Design
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