High-Gain and High-Bandwidth Rail-to-Rail Operational Amplifier
with Slew Rate Boost Circuit
Hong-Yi Huang
Bo-Ruei Wang
Jen-Chieh Liu
Department of Electronic Engineering
Department of Electronic Engineering
Department of Electronic Engineering
Fu Jen Catholic University
Fu Jen Catholic University
Fu Jen Catholic University
Taiwan, R.O.C.
Taiwan, R.O.C.
Taiwan, R.O.C.
hyhuang@mails.fju.edu.tw
a9250623@st2.fju.edu.tw
493506247@webmail.fju.edu.tw
Abstract - In this work, a high gain and high bandwidth
rail-to-rail operational amplifier with slew rate boost
circuit is presented. The constant gm is enhanced
through a source-to-bulk bias control of an input pair.
A source degeneration scheme is applied to realize an
input common-mode range insensitive output stage.
Several compensation schemes are applied to maintain
the stability. A slew rate boost circuit can improve the
output slewing. The op amp performs 100-dB dc gain,
100-MHz bandwidth and 22.5-V/us slew rate at 15-pF
output load. The layout area is 593×519 um2 in a
0.18-um CMOS process. It consumes 3.2-mW at 1.8V
supply voltage.
I. INTORDUCTION
The operational amplifier is a fundamental circuit
commonly used in mixed-signal IC. The specifications
of operational amplifier limit the performance of a
sub-system. For low-voltage video application, the
rail-to-rail input and output operational amplifier is
used to maintain the dynamic range and obtain an
acceptable signal-to-noise ratio [1]. Besides, the speed
and the accuracy are two of the most important
properties of the analog circuits. The settling behavior
of an op amp determines the bandwidth and resolution
in an analog-to-digital converter and a sample and hold
circuitry. Fast settling requires high unity-gain
bandwidth and accurate settling requires high dc gain
[1], [2].
To allow maximum signal amplitudes, the input
common mode range (ICMR) and output swing should
range from its power supply to ground level. Many
schemes for achieving rail-to-rail ICMR and constant
transconductance were introduced, such as parallel
n-channel and p-channel differential pairs, level shift
dual p-channel input pairs and multiple-input floating
gate transistors [1], [3]-[7]. A class-AB output stage
was applied to drive the output load and obtain
rail-to-rail output signal swing [4], [7]. It has a
drawback that the output voltage is strongly dependent
on its input dc level [8], [9].
There is an intrinsic trade-off problem between
gain and bandwidth of an op amp. Designing an op amp
with high gain and high bandwidth requires
combination of multiple schemes. A high gain op amp
is usually combined by multistage amps with
long-channel devices biased at low current. A high
bandwidth op amp is implemented by single stage amp
with short-channel devices biased at high current [2].
An output stage is necessary to drive a large capacitive
load and/or a small resistive load. A multiage stage amp
suffers from the stability resulting from the presence of
multiple poles. A frequency compensation technique
which can not obviously extend the bandwidth is
required to ensure the stability of a multistage amplifier
[10]. Furthermore, inserting the compensation
capacitors would decay the slew rate and increase the
settling time.
The proposed high gain and high bandwidth
rail-to-rail operational amplifier will be discussed in
section II. It contains an input stage, a current
summation circuit with gain boost, an output stage with
source degeneration, compensation schemes and a slew
rate boost circuit. Section III describes simulations and
comparisons of the amplifiers. Conclusions are given
in section IV.
II. CIRCUIT DESCRIPTIONS
Fig. 1 shows the block diagram of the proposed
operational amplifier. It contains a rail-to-rail and
constant gm input stage, a current summation circuit
with gain boost, an input insensitive class AB output
stage with source degeneration, compensation schemes
and a slew rate boost circuit. Fig. 2 shows the complete
circuits of the proposed amplifier.
Fig. 1. Block diagram of the proposed amplifier.
As illustrated in Fig.2., when the input dc level
Vin is 0 ≤ Vin < Vtn , only the PMOS input pairs, P1,
P2, P3 and P4, are turned on. The total transconductance (GM) is described as following equation,
(1)
GM=gmp1+gmp3
When the input dc is VDD - Vtp < Vin ≤ VDD ,
only the NMOS input pairs, N1, N2, N3 and N4, are
turned on. The total trans-conductance (GM) is
described as following equation,
(2)
GM=gmn1+gmn3
When the input dc is Vtn ≤ Vin ≤ VDD − Vtp ,
both the PMOS and NMOS input pairs are turned on.
In this region, the current IBP in P5 and P6 supplies the
tail current of the pair N3-N4. The differential pair
Fig. 2. Completed circuit of the op amp.
N3-N4 is switched off. On the other side, the current
IBN in N5 and N6 sinks the tail current of the pair
P3-P4. The differential pair P3-P4 is switched off.
Hence, only four devices, P1, P2, N1 and N2 are turned
on.The total gm is as following,
GM=gmp1+gmn1
(3)
If gmn=gmp=gm, then GM is equal to 2gm at all
input dc level. The bulk terminals of P1-P4 and N1-N4
are connected to VDD and GND, respectively. The bulk
terminals of P5, P6, N5 and N6 are connected to their
source terminals (VSB=0). The device threshold
voltages of the control differential pairs P5-P6 and
N5-N6 are smaller than the other input pairs P1-P4 and
N1-N4. The control pair can be switched on earlier
than the other input pairs. Therefore, the deviation of
the total transconductance (GM) can be reduced. Fig. 3
shows the simulation of GM versus VICM. Comparing
VSB for P5-P6 and N5-N6, the case VSB=0 obtains 4%
of gm deviation which is smaller than that of the case
VSB≠0.
Fig. 3. P5-P6 and N5-N6 on VSB=0 and VSB≠0.
Fig. 4 plots the analysis of frequency response of
gain boosted scheme. The gain stage uses the floating
bias technique to prevent the cascode device operating
in triode region. The boosted amplifiers are used to
achieve 100-dB dc gain.
The bandwidth (ω) of boost amp must be larger
than the -3dB frequency (ω1) of the original op. It can
be smaller than the second pole frequency (ω2) of the
original op. The following equation satisfied the
stability of the op [2].
ω1＜ω＜ω2
(4)
Fig. 4. Analysis of gain boosted scheme.
The quiescent current control class-AB output
stage provides high output swing and high output
current. Fig. 5(a) shows that the dc gain is sensitive to
VICM. This work improves the drawback by inserting a
source degenerated resistor Rs. Fig. 5(b) demonstrates
that the output stage provide a constant response at full
range of input common mode voltage. Accordingly, the
output stage is insensitive to VICM.
With an additional output stage, the phase margin
is decreased. The op amp requires compensations to
increase the stability. The pole and zero cancellation
and active compensation are provided to achieve
45∘phase margin. Inserting a zero, the phase margin
can be calculated as following equations,
⎛ G.B. ⎞
−1 ⎛ G.B. ⎞
− 1 ⎛ G.B. ⎞
− 1 ⎛ G.B. ⎞
−1 ⎛ G.B. ⎞
P.M . = 180° − tan −1 ⎜
⎟ − tan ⎜
⎟ − tan ⎜
⎟ + tan ⎜
⎟ + tan ⎜
⎟
⎝ P1 ⎠
⎝ P2 ⎠
⎝ P3 ⎠
⎝ Z1 ⎠
⎝ Z2 ⎠
Z1 =
1
1
1
, Z2 =
, P1 =
,
Rcb × Ccb
Rc × Cc
RVo × (Cc + CVo)
P2 =
1
, P 3 = gmx and G.B.=100MHz. (5)
RVout × CL
Ccb
After the insertion of the compensation circuits,
the slew rate is degraded by the compensation
capacitors. The slew rate is defined as,
Ich arg e
(10)
CTotal
where CTotal is total capacitance at the output node
SR + =
(6)
⎛ G.B. ⎞
−1 ⎛ G.B. ⎞
−1 ⎛ G.B. ⎞
−1 ⎛ G.B. ⎞
90° − tan −1 ⎜
⎟ − tan ⎜
⎟ + tan ⎜
⎟ + tan ⎜
⎟ ≥ 45°
⎝ P2 ⎠
⎝ P3 ⎠
⎝ Z1 ⎠
⎝ Z2 ⎠
For a target G.B.=100-MHz, Z2=P3 is designed,
Rcb =
Z1 ≤
1
gmx
(7)
P2
P2
=
P2
P2
1−
1−
G.B.
100 M
(8)
Fig. 7. Small signal model of the active compensation.
A LHP zero induced by gma and Ca cancels the
non-dominant high-frequency pole beyond 100MHz.
For a fixed charging current, the slew rate is
inverse proportional to the total capacitance. The slew
rate boost circuit uses a differential amplifier to sense
the difference between VIN+ and VIN-. When VIN+
exceeds VIN-, the currents of MP1 and MPB play a
current mirror providing Iboost to enhance the positive
slewing. When VIN+ is smaller than VIN-, Iboost provides
no output current. The simulation is shown in Fig. 8.
The op amp has specifications to provide 0.8mA source
current and 6mA sink current for VOH=1.62V and
VOL=0.1mV, respectively. The 6mA sink current
results in poor positive slewing. Only the positive
slewing requires to be enhanced, the boost current is
turned off as VIN- larger than VIN+ to reduce extra
power dissipation.
The cascade current source of the slew rate boost
circuit is provided to maintain high output impedance
for driving a low output resistance and avoiding the
effects on the output stage. Moreover, the boost circuit
also provides current to keep VOH at high level.
(a)
(b)
Fig. 5. Output stage versus VICM, (a) without Rs, (b)
with Rs.
Fig. 8. Transient analysis of slew rate boost circuit.
As illustrated in Fig. 6, the slope of the curve
without active compensation approaches 60-dB/dec
identifying three poles which decays the phase margin.
To compensate the phase margin without affecting the
original frequency response, Mn, Ma and Mp perform
the active compensation circuit to cancel the nondominant poles [10].
Fig. 7 depicts the small signal model of the active
compensation. The transfer function is following,
1
gma
Va
=
1
1
Vout
+
gma sCa
(9)
III. SIMULATION AND COMPARISONS
Table I compares the rail-to-rail op-amps [1]-[9].
To make a quantitative evaluation of the op amps, the
following two figures of merits (FOM) are applied,
Fig. 6. Bodes plot of the compensated schemes.
FOMS =
GBW × CL
Power
(11)
FOML =
SR × CL
Power
(12)
TABLE I Comparisons of the rail-to-rail amplifiers
The proposed op amp provides both high
gain and high bandwidth. Considering the FOM on
gain bandwidth and load product, this work has the
best FOM. This work has a specification to provide
6mA output sinking current, leading to difficulty of
output stage design and lower FOM on the slew rate.
With the output stage and slew rate boost circuit, the
total harmonic distortion (T.H.D.) of this work still
maintains very good linearity. Fig. 9 displays the chip
photograph of the op amp. The active area of the op
amp is 181.52×173.53 um2.
Fig. 9 Chip microphotograph.
IV. CONSLUSION
A high-gain high-bandwidth op amp with slew
rate boost circuit is presented. It provides 4% gm
deviation. The output stage is insensitive to input
common-mode range. A slew rate boost circuit can
improve the output slewing. The op amp performs
100-dB dc gain, 100-MHz bandwidth and 22.5-V/us
slew rate at 15-pF output load. Comparing with the
other rail-to-rail op amps, it has the best figures of
merits on gain bandwidth and load product. It can be
applied to high resolution high bandwidth analogto-digital converter and video applications.
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