What are pads and what do they do? HBM (human body model) for

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Lec 6, Pads, Chip IO, ESD
What are pads and what do they do?
Peripheral IO:
Pads, ESD, IO circuits
• Interface circuits to outside world
• Provide opening in overglass and metal area for
attaching bonding wires
• Protect against ESD (electro static discharge)
Design of Neuromorphic Electronic
Systems
HBM (human body model) for ESD
ESD
• Your body has a capacitance of a few hundred pF
• You can become charged with static electricity to ~10kV
• What is body stored energy?
E=CV2=100pF*(10kV)2=e-10+8J=e-2J=10mJ.
• SiO2 has a breakdown field of ~600V/m; a 10nm gate
oxide (0.5m process) will pop with a voltage of more
than 6V
• ESD protection structures dissipate the ESD and prevent
gate overvoltage
• The ESD protection structure must be able to dissipate
an energy of CV2=10mJ without exceeding breakdown
voltage.
~10kV
Hand-held ESD tester
The bond pad
Top view
Side view
OG
OG
M2
M1
N-well
P-substrate
OG=overglass
Neuromorphic Engineering 2,
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Lec 6, Pads, Chip IO, ESD
Protection transistor layout
Simplest Protection:
ESD grounded-gate
structure
~100 um
PN junctions forward bias for
over- or under-voltages.
Energy is dissipated in
junctions.
Series resistor dissipates energy
Wide LDD
and thick gate
oxide
Pad frame
Strain relief
Types of pads
•
•
•
•
•
Isolating Analog and Digital
Power pads (padGND, padVDD)
Analog input pads (padIn, padInOr)
Analog output pads (padWide)
Digital IO pads (padDigIn, padDigOut)
Special pads (padBias)
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Lec 6, Pads, Chip IO, ESD
Shielding from substrate noise
Never connect digital ground to the substrate
• V=LdI/dt noise on digital ground yanks around local
substrate. This can move backgate on analog FETs, severely
affecting them.
Digital circuit
Analog circuit
Using deep N-well to isolate digital ground from substrate
Example of split pad frame
http://chipdesignmag.com/images/articles/4/analogFigure4.gif
GndD
Gnd
Vdd
Currents cancel, good for L*dI/dt
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Lec 6, Pads, Chip IO, ESD
GndA
VddA18 and VddD18
Digital IO
Wide range analog output pad
-
N
+
-
P
+
Summary
• Pads are chip IO points
• They protect CMOS from ESD and drive large
off-chip loads at high speed
• Pad type depends on requirements (Power,
analog input or output, digital input or output)
• Think hard about split frame and using digital
isolation
• It is best to start with a qualified set of pads and
make changes very conservatively
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