UNIT 1 PART-B 1.a.Briefly explain the various types of IC packages. Mention the criteria for selecting an IC package. (Nov/Dec 2010) (8 marks) Ans: Integrated Circuits: - An integrated circuit (IC) is a miniature, low cost electronic circuit consisting of active and passive components fabricated together on a single crystal of silicon. The active components are transistors and diodes and passive components are resistors and capacitors. - Miniaturization and hence increased equipment density. - Cost reduction due to batch processing. - Increased system reliability due to the elimination of soldered joints. - Improved functional performance. - Matched devices. - Increased operating speeds. - Reduction in power consumption 1.b.Write short notes on classification of Integrated circuits. . (Nov/Dec 2010) (8 marks) Ans: Classification: - Integrated circuits can be classified into analog, digital and mixed signal (both analog and digital on the same chip). - IC technology - Monolithic Technology and Hybrid Technology . - In monolithic IC ,all circuit components ,both active and passive elements and their interconnections are manufactured into or on top of a single chip of silicon. - In hybrid circuits, separate component parts are attached to a ceramic substrate and interconnected by means of either metallization pattern or wire bounds. - Analog ICs, such as sensors, power management circuits, and operational amplifiers, work by processing continuous signals. They perform functions like amplification, active filtering, demodulation, mixing, etc.. - ICs can also combine analog and digital circuits on a single chip to create functions such as A/D converters and D/A converters. Such circuits offer smaller size and lower cost, but must carefully account for signal interference Classification of ICs: Integrated Circuits Monolithic Circuits Hybrid Circuits Bipolar Unipolar p-n junction Dielectric Isolation Isolation MOSFET JFET 2.With respect to the BJT based circuit given below,explain the various steps to implement the circuit into a monolithic IC.(Nov/Dec 2010) (16 marks) Ans: 3.Explain the basic processes used in silicon planar technology with neat diagram. (16 Marks) (April/May 2010) Ans: 1. Silicon wafer (Substrate) preparation 2. Epitaxial Growth 3. Oxidation 4. Photolithiography 5. Diffusion 6. Ion Implementation 7. Isolation Technique 8. Metallization 9. Assembly Processing and packaging 1. Silicon wafer (Substrate) preparation The following steps are used in the preparation of Si-wafers 1. Crystal growth and doping 2. Ingot trimming and grinding 3. Ingot slicing 4. Wafer polishing and etching 5. Wafer cleaning Epitaxial growth SiCl4+2H2 Si +4Hcl Oxidation Si + 2H2O SiO2 + 2H2 Photolithography 4.Discuss the various methods used for fabricating IC resistors and compare their performance. (16 Marks) (April/May 2010)(May/June 2013) Ans: - Commonly used methods - 1. Diffused 2. Epitaxial 3. Pinched and 4. Thin film techniques. Diffused Resistor: - The diffused resistor is formed in any one of the isolated regions of epitaxial layer during base or emitter diffusion processes. Commonly used parameter for defining this resistance is called the sheet resistance. In the monolithic resistor, the resistance value is expressed by R = Rs 1/w where R= resistance offered (in ohms) Rs = sheet resistance of the particular fabrication process involved (in ohms/square) l = length of the diffused area and w = width of the diffused area. Epitaxial Resistor: The N-epitaxial layer can be used for realizing large resistance values. Pinched resistor: The sheet resistance offered by the diffusion regions can be increased by narrowing down its crosssectional area. This type of resistance is normally achieved in the base region. Thin film resistor: The advantages of thin film resistors are as follows: 1. They have smaller parasitic components which makes their high frequency behaviour good. 2. The thin film resistor values can be very minutely controlled using laser trimming. 3. They have low temperature coefficient of resistance and this makes them more stable. The main disadvantage of thin film resistor is that its fabrication requires additional processing steps. 5.aExplain the process of epitaxial growth in IC fabrication process with neat diagrams.(8Marks)(Nov/Dec 2011) Ans: - Derived from Greek word epic meaning upon and the past tense of the word teinon meaning arranged. Arranging atoms in single crystal fashion upon a single crystal substrate so resulting layer is an extension of the substrate crystal structure. SiCl4+2H2 Si +4Hcl 5.b.With neat sketches explain the fabrication of diodes (8 Marks)(Nov/Dec2011) Monolithic diodes: Ans: The diode is obtained from a transistor structure using one of the following structures. 1. The emitter-base diode, with collector short circuited to the base. 2. The emitter-base diode with the collector open and 3. The collector –base diode, with the emitter open-circuited. The choice of the diode structure depends on the performance and application desired. Schottky Barrier Diode: - The metal contacts are required to be ohmic and no PN junctions to be formed between the + metal and silicon layers. The N diffusion region serves the purpose of generating ohmic contacts. 6.a.Explain the different isolation techniques.(8 Marks)(Nov/Dec 2011) Ans: Isolation techniques 1. PN junction Isolation 2. Dielectric Isolation PN junction Isolation - P+ type impurities are selectively diffused into the N-type epitaxial layer so that it touches the P-type substrate at the bottom. This method generated Ntype isolation regions surrounded by P-type moats. - If the P-substrate is held at the most negative potential, the diodes will become reversebiased, thus providing isolation between these islands. Dielectric Isolation - A layer of solid dielectric such as silicon dioxide or ruby surrounds each component and this dielectric provides isolation. - This method is very expensive due to additional processing steps needed and this is mostly used for fabricating IC‘s required for special application in military and aerospace. 6.b.Describe in detail about the diffusion process of IC fabrication.(8 Marks)(Nov/Dec 2011) Ans: Isolation Diffusion Base diffusion: Emitter Diffusion 7.Explain the detail the fabrication process of passive component in integrated circuits (16 Marks)(May/June 2012) Ans: Fabrication of passive component 1. Integrated resistors 2. Integrated Capacitors 3. Integrated Inductors 1.Integrated Resistors: - A resistor in a monolithic integrated circuit is obtained by utilizing the bulk resistivity of the diffused volume of semiconductor region. - The commonly used methods for fabricating integrated resistors are 1. Diffused 2. Epitaxial 3. Pinched and 4. Thin film techniques. Diffused Resistor: - The diffused resistor is formed in any one of the isolated regions of epitaxial layer during base or emitter diffusion processes. Epitaxial Resistor: - The N-epitaxial layer can be used for realizing large resistance values. Pinched resistor: - The sheet resistance offered by the diffusion regions can be increased by narrowing down its cross-sectional area. - This type of resistance is normally achieved in the base region. Thin film resistor: - A very thin metallic film of thickness less than 1μm is deposited on the silicon dioxide layer by vapour deposition techniques. Normally, Nichrome (NiCr) is used for this process. 2.Integrated Capacitors: - The junction capacitor is a reverse biased PN junction formed by the collector-base or emitter-base diffusion of the transistor. The capacitance is proportional to the area of the junction and inversely proportional to the depletion thickness. C α A, where a is the area of the junction and C α T , where t is the thickness of the depletion layer. 2 The capacitance value thus obtainable can be around 1.2nF/mm . 3.Integrated Inductors: - No satisfactory integrated inductors exist. If high Q inductors with inductance of values larger than 5μH are required, they are usually supplied by a wound inductor which is connected externally to the chip. Therefore, the use of inductors is normally avoided when integrated circuits are used. 8.With necessary diagrams explain the fabrication of MOSFET (16 Marks)(May/June 2012) Ans: MOSFET Fabrication Use of sillicon nitride(Si3N4) Polysillicon Gate 09.Explain the fabrication Marks)(Nov/Dec 2012) Ans: JFET Fabrication of n-channel JFET with necessary diagrams. (16 MOSFET Fabrication UNIT-2 PART-B 1. Explain the types of feedback configurations available.(8 Marks)(Nov/Dec 2010) Ans: 1.b.Briefly explin summing amplifier.Draw an adder circuit for the given expression V0=(0.1 V1+ V2+5 V3) .(8 Marks)(Nov/Dec 2010) Ans: V0=- (V1+ V2 +V3)/3 V0=- (0.1+ 1 +5)/3 V0=-2.03 2.Briefly explain the frequency response of op-amp.Give the frequency compensation techniques adopted in operational amplifiers .(16 Marks) (Nov/Dec 2010)(Nov/Dec 2011) Ans: frequency response of op-amp. 2.a.Explain the functions of all the basic building blocks of an op-amp (8Marks)(April/May 2010) Ans: - Operational amplifiers are the main building block of analog systems. They can provide gain, buffering, filtering, mixing and multiple mathematic functions. - The relationship between the outputs and the inputs is straightforward: Vout = A (Vin+ ‐ Vin‐) Bias Section - The bias section provides all of the voltages and currents needed by the other 3 sections. - Voltage must be constant even if the supply voltage changes or if the temperature changes. Gain Section - Gain means the output is bigger than the input. - In an ideal op amp, the gain is infinite. That means that the smallest difference in the input voltages causes the output to slam up or slam down. Buffer Stage - The buffer stage serves two critical functions. - First, it protects the gain circuit from anything that can be connected to the output. - Secondly, it drives the load. That means it can provide the current needed to take the load to the correct output voltage. 2.b.Explain the application of OPAMP as (1) integrator (2) differentiator.(8 Marks)(April/May 2010) Explain the working of operational amplifier (1) integrator (2) differentiator (8Marks)(Nov/Dec 2011) Ans: (1) Integrator - An integrator is a circuit which has an output voltage that is proportional to the time integral of its input voltage. Because a division by s in the complex frequency domain is equivalent to an integration in the time domain, it follows from this equation that the time domain output voltage is given by (2) Differentiator. - A differentiator is a circuit which has an output voltage that is proportional to the time derivative of its input voltage. The voltage gain transfer function is given by 3.Find V0 of the following circuit. .(16 Marks)(April/May 2010) Ans: 4.Draw the circuit of a symmetrical emitter coupled differential amplifier and derive for CMRR (16 Marks)(May/June 2012) Ans: CMRR 5.a.Show with the help of circuit diagram an op-amp used as (8 Marks)(May/June 2012) (i) (ii) Summer Intrgrator and explain their operation. Ans: Summer - Used to sum two signal voltages. Intrgrator and explain their operation. - An integrator is a circuit which has an output voltage that is proportional to the time integral of its input voltage. 6.a.What are ideal op-amp characteristics? (6 Marks)(Nov/Dec 2012) Ans: Open loop gain infinite (ii) Input impedance infinite (iii) Output impedance low (iv) Bandwidth infinite (v) Zero offset, i.e., Vo=0 when V1=V2=0 6.b.With a neat circuit diagram explain the operation of a op-amp differentiator and derive an expression for the output of a practical differentiator. (10 Marks)(Nov/Dec 2012) Ans: A differentiator is a circuit which has an output voltage that is proportional to the time derivative of its input voltage. The voltage gain transfer function is given by The input impedance transfer function is that of the capacitor C1 to virtual ground given by. 7.Explain the different frequency compensation techniques of op-amp(16 Marks)(Nov/Dec 2012) Ans: 1. External Compensation 2. Internal Compensation Dominant-pole compensation Pole-zero compensation: 8.List the characteristics of an ideal op-amp explain in detail.Give the practical op-Amp equivalent circuit.(16 marks)(May/June 2013) Ans: 1. 2. 3. 4. 5. Open loop gain infinite Input impedance infinite Output impedance low Bandwidth infinite Zero offset, ie, Vo=0 when V1=V2=0 Open loop gain infinite Input impedance infinite - Input impedance is the ratio of input voltage to input current and is assumed to be infinite to prevent any current flowing from the source supply into the amplifiers input circuitry (Iin =0). Real op-amps have input leakage currents from a few pico-amps to a few milli-amps. Output impedance low - The output impedance of the ideal operational amplifier is assumed to be zero acting as a perfect internal voltage source with no internal resistance so that it can supply as much current as necessary to the load. This internal resistance is effectively in series with the load thereby reducing the output voltage available to the load. Real op-amps have outputimpedance in the 100-20Ωrange. Bandwidth infinite - An ideal operational amplifier has an infinite frequency response and can amplify any frequency signal from DC to the highest AC frequencies so it is therefore assumed to have an infinite bandwidth. With real op-amps, the bandwidth is limited by the GainBandwidth product (GB), which is equal to the frequency where the amplifiers gain becomes unity. Zero offset, ie, Vo=0 when V1=V2=0 - The amplifiers output will be zero when the voltage difference between the inverting and the non-inverting inputs is zero, the same or when both inputs are grounded. Real op-amps have some amount of output offset voltage. Equivalent Circuit for Ideal Operational Amplifiers 9.Explain in detail about DC characteristics of op-amp (16 Marks)(May/June 2013) Ans: 1. 2. 3. 4. Input bias current Input offset voltage Input offset current Thermal drift Input bias current Input offset voltage Input offset current Thermal drift UNIT-3 PART-B 1. a. Explain the first order low pass Butterworth filter with a neat circuit diagram. Derive its frequency response and plot the same. (Nov/Dec 2010) (8 marks) Ans: First order low pass filter First order LPF that uses an RC for filtering op-amp is used in the non inverting configuration. Resistor R1 & Rf determine the gain of the filter. According to the voltage – divider rule, the voltage at the non-inverting terminal (across capacitor) C is, Low pass filters: It has a constant gain from 0 Hz to a high cutoff frequency f1. At fH the gain in down by 3db. The frequency between 0hz and fH are known as the pass band frequencies. Whereas the range of frequencies those beyond fH, that are attenuated includes the stop band frequencies. Butterworth and causer filter are some of the most commonly used practical filters. The key characteristics of the butter worth filter are that it has a flat pass band as well as stop band. Frequency response 1.b.Design a lowpass filter with a cutoff frequency of 1KHZ and with a passband gain of (Nov/Dec 2010) (8 marks) Ans: f H 2 KHZ c 0.01 F f H 1 / 2 RC R 1 / 2 2 103 0.01 106 7.957 K AF 2 AF 1 Rf R1 Rf R1 1 R f R1 R f R1 10 K 2.b.What is an instrumentation amplifier? Give the important features of an instrumentation amplifier. Explain the working of three op-amp instrumentation amplifier. Give its application. (Nov/Dec 2010) (16 marks) Explain the principle of instrumentation amplifier and derive the gain for that circuit(16 Marks)(May/June 2013) Ans: Instrumentation amplifier In a number of industrial and consumer applications, one is required to measure and control physical quantities. Some typical examples are measurement and control of temperature, humidity, light intensity, water flow etc. these physical quantities are usually measured with help of transducers. The output of transducer has to be amplified so that it can drive the indicator or display system. This function is performed by an instrumentation amplifier. The important features of an instrumentation amplifier 1. High gain accuracy 2. High CMRR 3. High gain stability with low temperature coefficient 4. Low output impedance 3.Design and explain triangular wave generator using Schmitt trigger and integrator circuit. (16 Marks) (April/May 2010) Ans: 4.a.Explain the operation of dual slope ADC. (8 Marks) (April/May 2010) Ans: 4.bExplain the following characteristics time,linearity.8Marks)(April/May 2010) Ans: of ADC resolution,accuracy,settling Resolution: - Resolution can also be defined electrically, and expressed in volts. The minimum change in voltage required to guarantee a change in the output code level is called the least significant bit (LSB) voltage. Accuracy: - Specifies the derivation of the actual output from the ideal output, for any combination of X and Y inputs falling within the permissible operating range of the multiplier. Setting Time: - The most important dynamic parameter is the settling time.It represents the time it takes for the output to setle within a specified band (1/2) LSB of its final value following a code change at the input (usually a full scale change). Linearity: - This defines the accuracy of the multiplier. - This linearity error imposes a lower limit on the multiplier accuracy. 6.a.Explain the following applications of op-amp.(8 Marks)(Nov/Dec 2011) (i) Voltage to current converter (ii) Clamper Ans: Voltage to current converter V-I converter with floating load. V-I converter with grounded load. The output voltage is That is As the input impedence of an non-inverting amplifier is very high, this circuit has the advantage of drawing very little current from the source. A voltage to current converter is used for low voltage dc and ac voltmeter, LED and zener diode tester. Clamper: In clamper circuits a predetermined dc level is added to the output voltage. (or) The output is clamped to a desired dc level. 1. If the clamped dc level is +ve, the clamper is positive clamper 2. If the clamped dc level is –ve, the clamper is negative clamper. Other equivalent terms used for clamper are dc inserter or restorer. Inverting and Non-Inverting that uses this technique. In this circuit, the input waveform peak is clamped at Vref. For this reason, the circuit is called the peak clamper. 6.b.Explain the detail the working of. Weighted resistor type DAC Dual slope type ADC Ans: (i) Weighted resistor type DAC (8 Marks)(Nov/Dec 2011) (ii) Dual slope type ADC 7.a.(i)Explain the working principle of successive approximation type ADC (12Marks) (ii)Explain the important DAC specifications (4 Marks) (May/June 2012) Ans: .(i)Explain the working principle of successive approximation type ADC - Successive-approximation ADC is a conversion technique based on a successiveapproximation register (SAR). - This is also called bit-weighing conversion that employs a comparator to weigh the applied input voltage against the output of an N-bit digital-to-analog converter (DAC). - Uses a comparator to reject ranges of voltages, eventually settling on a final voltage range. - Successive approximation works by constantly comparing the input voltage to the output of an internal digital to analog converter (DAC, fed by the current value of the approximation) until the best approximation is achieved. - At each step in this process, a binary value of the approximation is stored in a successive approximation register (SAR). - The SAR uses a reference voltage (which is the largest signal the ADC is to convert) for comparisons. 8.(ii)Explain the important DAC specifications Resolution: - Resolution can also be defined electrically, and expressed in volts. - The minimum change in voltage required to guarantee a change in the output code level is called the least significant bit (LSB) voltage. - The resolution Q of the ADC is equal to the LSB voltage. The voltage resolution of an ADC is equal to its overall voltage measurement range divided by the number of discrete values: Accuracy: - This specifies the derivation of the actual output from the ideal output, for any combination of X and Y inputs falling within the permissible operating range of the multiplier. Setting Time: - The most important dynamic parameter is the settling time.It represents the time it takes for the output to setle within a specified band (1/2) LSB of its final value following a code change at the input (usually a full scale change). 9.Explain with neat diagram any one sine wave oscillator using op-amp and derive expressive for frequency of oscillator and gain of op-amp. (16 Marks)(Nov/Dec 2012) Ans: The conventional sine wave oscillator circuits use phase shifting techniques that usually employ Two RC tuning networks, and Complex amplitude limiting circuitry Phase Shift Oscillator Oscillation criterion 11.With neat sketches explain in detail about I/V and V/I converter using op-amp.(16 Marks)(May/June 2013) Ans: Current to voltage converter 1. Open – loop gain a of the op-amp is very large. V 1 V 2 2. Input impedance of the op-amp is very high. (i.e) the currents entering into the 2 input terminals is very small. I B I B 0 ---(2) Sensitivity of the I – V converter: 1. The output voltage V0 = -RF Iin. 2. Hence the gain of this converter is equal to -RF. The magnitude of the gain (i.e) is also called as sensitivity of I to V converter. 3. The amount of change in output volt ∆V0 for a given change in the input current ∆Iin is decide by the sensitivity of I-V converter. 4. By keeping RF variable, it is possible to vary the sensitivity as per the requirements. Voltage to current converter In many applications, one may have to convert a voltage signal to a proportional output current. For this, there are two types of circuits possible. V-I converter with floating load. V-I converter with grounded load. The output voltage is That is ………………. (5) As the input impedence of an non-inverting amplifier is very high, this circuit has the advantage of drawing very little current from the source. A voltage to current converter is used for low voltage dc and ac voltmeter, LED and zener diode tester. UNIT-4 PART-B 1. a. Explain the voltage controlled oscillator with a neat block diagram.Give its typical connection diagram and its output waveforms. (Nov/Dec 2010) (8 marks) Ans: - The output frequency of the VCO can be changed either by i) RT, ii) CT or iii) the voltage vc can be varied by connecting a R1R2 circuit. The components RT and CT are first selected so that VCO output frequency lies in the center of the operating frequency range. Now the modulating input voltage is usually varied from 0.75 Vcc to Vcc which can produce a frequency variation of about 10 to 1. 1.b.Derive the expression for capture range for PLL where a simple RC network is used as a LPF.(Nov/Dec 2010) (8 marks) Ans: The low pass filter not only removes the high frequency components and noise, but also controls the dynamic characteristics of the PLL.These characteristics include capture and lock range, band-width and transient response. When PLL is not initially locked to the signal,the frequency of the VCO will be free running frequency f0 the phase angle difference between the signal and the VCO output voltage will be, The fundamental frequency term supplied to the LPF by the phase detector will be the difference frequency f f s f0 The total capture range is 2fc 2 f1f L 2.Draw the functional diagram of IC 555 timer.Explain with a circuit diagram how it can be connected for monostable operation. (Nov/Dec 2010)(April/May 2010) (16 marks) Ans: Description of Functional Diagram Monostable Operation 3.With neat block diagram explain IC566 VCO operation and discuss any two applications. (16 Marks) (April/May 2010) Ans: The output frequency of the VCO can be calculated as follows: The total voltage on the capacitor changes from 0.25 Vcc to 0.5 Vcc. Thus ∆v = 0.25 Vcc. The capacitor charges with a constant current source. The output frequency of the VCO can be changed either by i) RT, ii) CT or iii) the voltage vc can be varied by connecting a R1R2 circuit as shown in fig. The components RT and CT are first selected so that VCO output frequency lies in the center of the operating frequency range. Now the modulating input voltage is usually varied from 0.75 Vcc to Vcc which can produce a frequency variation of about 10 to 1. Applications FM modulation Frequency shift keying demodulator 4.a.Explain the working of voltage controlled oscillators. (8 Marks) (Nov/Dec 2011) Ans: The third section of PLL is the VCO; it generates an output frequency that is directly proportional to its input voltage. The maximum output frequency of NE/SE 566 is 500 Khz. 4.b.What is PLL?Explain its application as frequency multiplier.(8Marks)(Nov/Dec2011) Ans: PLL The PLL is in free running state. Once the input frequency is applied the VCO frequency starts to change and PLL is said to be in the capture mode. The VCO frequency continuous to change until it equals the input frequency and the PLL is in phase lock mode. When Phase locked, the loop tracks any change in the input frequency through its repetitive action Application as frequency multiplier A divide by N network is inserted the VCO output and the phase comparator input. In the locked state, the VCO output frequency fo is given by, fo = Nfs The multiplication factor can be obtained by selecting a proper scaling factor N of the counter. Frequency divider is inserted between the VCO & phase comparator. Since the output of the divider is locked to the fIN, VCO is actually running at a multiple of the input frequency. The desired amount of multiplication can be obtained by selecting a proper divide-by-N network, where N is an integer. Frequency multiplication can also be obtained by using PLL in its harmonic locking mode. If the input signal is rich in harmonics e.g. square wave, pulse train etc, then VCO can be directly locked to the n-th harmonic of the input signal without connecting any frequency any divider in between. The circuit can be also be used for frequency division. Since the VCO output is rich in harmonics, it is possible to lock the m-th harmonic of the VCO output with the input signal fs. The output f0 of VCO is now given by f0 fs . m 5.Explain the astable and bistable operation of IC 555 with necessary waveforms .(16 Marks)(Nov/Dec 2011) Ans: Astable operation Bistable operation 6. Design and draw the waveforms of 1KHZ square waveform generator using 555 timer for duty cycle. (i) D=25 % (8 Marks) (ii) D=50% (8 Marks) (May/June 2012) Ans: (i) D=25 % T 1 / f 1 / 1 103 1ms D TON / T TON D T 0.25T 0.25ms TOFF T TON 0.75ms C 0.1 TON 0.69 RAC TOFF 0.69 RBC RA 3.62 K RB 10.62 K (ii) D=50% T 1 / f 1 / 1 103 1ms f 1KHZ T 1ms D 50% Td Tc 0.5ms C 0 .1 Td 0.69 R AC Tc 0.69 RBC Td Tc 0.5ms R A RB 7.246 K 7.a.Perform the closed loop analysis of PLL ( 8marks) (may/june 2012) Ans: Under locked conditions a linear relationship can exist between the output voltage of the phase detector and the phase difference between the VCO and the input signal if the later is small. The nonlinearity of phase detector makes the PLL nonlinear. d 0 t dt 0 t 0 0 t dt 0 t 0 t c K 0V f t Vf s Vf s K F s A 1 K F s A. K F s A KV s 1 K KV F s A 7.b. Explain the two applications of PLL ( 8marks) (may/june 2012) Ans: Frequency Multiplier Fig. shows the block diagram for a frequency multiplier using PLL 565. Here, a divide by N network is inserted between the VCO output (pin 4) and the phase comparator input (pin 5). Since the output of the divider is locked to the input frequency fi, the VCO is Frequency Synthesizer 8.Draw the functional diagram of IC 555 timer in astable mode and explain its operation and derive expression for frequency (16 Marks) (Nov/Dec 2012) Ans: - Resolution can also be defined electrically, and expressed in volts. The minimum change in voltage required to guarantee a change in the output code level is called the least significant bit (LSB) voltage. - The resolution Q of the ADC is equal to the LSB voltage. The voltage resolution of an ADC is equal to its overall voltage measurement range divided by the number of discrete values: - - - When the capacitor voltage equals, (2/3) Vcc the upper comparator triggers the control flip-flop so that Q = 1. This, in turn, makes transistor Q1 on and capacitor C a time constant RBC. current also flows into transistor Q1 through RA. Resistors RA and RB discharge transistor Q1. The minimum value of RA is approximately equal to Vcc/0.2 where 0.2 A is the maximum current through the on transistor Q1. During the discharge of the timing capacitor C, as it reaches Vcc /3, lower comparator is triggered and at this stage S = 1, R = 0, which turns Q = 0. Now Q = 0 unclamps the external timing capacitor C. the capacitor C is thus periodically charged and discharged between (2/3) Vcc and (1/3) respectively. The timing sequence and capacitor voltage wave form. The length of time that the output remains HIGH is the time for the capacitor to charge from (1/3) Vcc to (2/3) Vcc. 9.Design a first order low pass filter for a high cut-off freq of 2 KHZ and pass band gain of 2. (16 Marks)(May/June 2013) Ans: √ f= R= = 10.Explain the operation of a square wave generator by drawing the capacitor and output voltage wave forms(16 Marks)(May/June 2013) Ans: R2 Fraction β = R1 R2 of the output is feedback to the positive input terminal of op-amp. Design 1. The expression of fo is obtained from the charging period t1 & t2 of capacitor as 1 fo = 2RC ln[1 2R1 / R2 ] 2. To simplify the above expression, the value of R1 & R2 should be taken as R2 = 1.16R, 1 such that fo simplifies to fo = 2RC 3. Assume the value of R1 and find R2. R2 = 1.16KΩ (10K) 1 4. Assume the value of C & Determine R from fo = 2RC 5. Calculate the threshold point from lVTl or lβVSATl = output voltage wave forms R1 lβVSATl where β is the feedback ratio. UNIT-5 PART-B 1. a. Explain the working of series voltage regulator.(Nov/Dec 2010) (8 marks) Ans: 1.b.Write a note on optocouplers.(Nov/Dec 2010) (8 marks) Ans: The combined package of a LED and a photodiode is called an optocoupler. Ills also called an optoisolator or an optically coupled isolator. 2.What is a switching regulator?with a neat diagram explain the internals of A 7840. (Nov/Dec 2010) (16 marks) Ans: 3.With a neat diagram, explain working principle of switch mode lower supply. (16 Marks) (April/May 2010) Ans: It has to satisfy the requirements as : 1. It has to supply required power and the losses associated with the regulator. 2. It must be high• to satisfy the minimum requirements of the regulator. 3. It must be large to supply sufficient dynamic range of line and load changes. Block Diagram of SMPS - The period of this pulse waveform is same as that of oscillator output say T. The duty cycle is denoted as t on / T or t on f as mentioned earlier. This duty cycle is controlled by the difference between the feedback voltage and the reference voltage. - When Q1 is on in saturation state, V CE for Q1 is zero. Hence entire input voltage Vin appears at point A. Thus the current flows through inductor L 1 . - When D I is off, L I still continue to supply current through itself to the load. The diode Di provides the return path for the current. - The capacitor C 1 acts to smooth out the voltage and the voltage at the output is almost d.c. in nature. The output voltage V o of the switching regulator is a function of duty cycle and the input voltage V. Mathematically it is expressed as, V0 - t on Vin Vin T Thus w hen T is constant, output is proportional to t„. This method is called pulse width modulation (PWM). When t o n is constant, the output is inversely proportional to the period T i.e. proportional to frequency of the pulse waveform. This method is called frequency modulation 4.Draw and explain the application of IC 723 as low voltage regulator and high voltage regulator.(16Marks)(Nov/Dec2011) Draw and explain the fundamental block diagram of a 723 voltage regulator and how this IC can be used as high voltage regulator. (16Marks)(May/June 2012) Draw and explain the fundamental block diagram of a 723 voltage regulator and how this IC can be used as low voltage regulator. (16Marks)(Nov/Dec2012) Ans: The functional block diagram of IC 723 can be divided into four major blocks 1. Temperature compensated voltage reference source, which is zero diode. 2. An op-amp circuit used as an amplifier 3. A series pass transistor capable of a 150 mA output current 4. Transistor used to limit output current. - The initial switching frequency is set by the timing capacitor CT connected between pins 12 and 11. Initial duty cycle is 6:1. - The control of the duty cycle and the switching frequency is possible by the current limit circuitry Ipk sense, pin 14 and the comparator, pins 9 and 10. - The comparator controls the off time of the switch transistor Q i and Q2. Low voltage regulator V0 V ref R sc R2 R1 R 2 0.6 I lim it Power dissipation of transistor= Vi max V0min I Lmax Power dissipation of IC= Vi max V0min I L max h femin ofQ1 High voltage regulator R V0 V ref 1 1 R2 0.6 . R sc I lim it 5.a.Explain the block diagram of ICL 8038 function generator IC .(8 Marks)(Nov/Dec 2011) Ans: - The operation of ICL 8038 is based on charging and discharging of a grounded capacitor C, who’s charging discharging rates are controlled by programmable current generators IA and ID , respectively. - When switch is at position A, the capacitor charges at a rate determined by current source. - Once the capacitor voltage reaches VuT, the upper comparator (CMPI) triggers and resets the flip-flop output. This causes the switch position to change from position A to B. - Now, capacitor starts discharging at the rate determined by the current sink l. - Once the capacitor reaches V 1 1 , the lower comparator (CMP2) triggers and sets the flip-flop output. This causes the switch position to change from position B to A. And this cycle repeats. - As a result, we get square wave at the output of flip-flop and triangular wave across capacitor. The triangular wave is then passed through the on chip wave shaper to generate sine wave. 5.b.Write short notes on opto couplers.(8 Marks)(Nov/Dec 2011) Ans: The combined package of a LED and a photodiode is called an optocoupler. Also called an optoisolator or an optically coupled isolator. The Fig shows the basic circuit of an optocoupler. It has LED on the input side and a photodiode on the output side. - The source V I and series resistance R 1 decide the forward current II through the LED. Thus LED emits the light. This light is incident on a photodiode. Due to this, a reverse current is set up in the output circuit. This current produces a drop across the output resistance R2. The output voltage is the difference between the supply voltage V2 and the drop across the resistor R2 . - When input voltage is changed, the amount of light emitted by LED changes. This varies the reverse current in the output circuit and hence the output voltage. The output voltage is thus varying in step with the input voltage. This coupling between LED and photodiode is hence called optocoupler. 6.Write an explanatory note on: 1. Power amplifier 2. Isolation amplifiers.( 8marks) (may/june 2012) Ans: 1. Power amplifier - An amplifier receives an input signal from some transducer or other input source and provides a large amplifier signal to some output device or another amplifier stage. - The power amplifier is basically used to amplify an audio signal faithfully. The loads to such amplifiers are generally loud speakers and servomotors. - Also called as large signal amplifiers or power amplifiers. - The low output impedance is another requirement of such loads which is to be satisfied by the power amplifiers. Thus the main features of a large signal amplifier or an power amplifier are, i) The large amount of power to be delivered to the load. ii) The power efficiency. iii) The impedance matching to the output device. The large signal amplifiers develop an a.c. power of the order of few watts. Similarly large power gets dissipated in the form of heat, at the junctions of the transistors used in the power amplifiers. Hence the transistors used in such amplifiers are power transistors with heat. 2. Isolation amplifier - An isolation amplifier is an amplifier that offers an ohmic or electrical isolation between its output terminals. - The isolation amplifier is achieved by use of transformer or by use of optically coupled devices discussed earlier. - An important characteristics of an isolation amplifier is the linearity of the input to output transfer characteristics. - There are various methods of obtaining a high degree of linearity in optically coupled isolation amplifiers. 7.Design an adjustable voltage regulator (5V to 15 V) with a short circuit current limit of 50MA using a m723 regulator. (16 Marks) (May/June 2013) Ans: √ f= R= = 8.Design a 4 bit R-2R ladder network determine the size of each steb if r=10K ,Rf=40 K and VCC= 15 V.Calculate the output voltage for D0=1,D2=1,D3=1 if bit 1 applied as 5V and bit o applied as 0V. Ans: