IRFP250
Data Sheet
January 2002
33A, 200V, 0.085 Ohm, N-Channel
Power MOSFET
Features
• 33A, 200V
This N-Channel enhancement mode silicon gate power field
effect transistor is an advanced power MOSFET designed,
tested, and guaranteed to withstand a specified level of
energy in the breakdown avalanche mode of operation. All of
these power MOSFETs are designed for applications such
as switching regulators, switching convertors, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These types can be operated directly from integrated
circuits.
Formerly developmental type TA9295.
Ordering Information
PART NUMBER
IRFP250
• Single Pulse Avalanche Energy Rated
• SOA is Power Dissipation Limited
• Nanosecond Switching Speeds
• Linear Transfer Characteristics
• High Input Impedance
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
PACKAGE
TO-247
• rDS(ON) = 0.085Ω
BRAND
D
IRFP250
NOTE: When ordering, use the entire part number.
G
S
Packaging
JEDEC STYLE TO-247
SOURCE
DRAIN
GATE
DRAIN
(TAB)
©2002 Fairchild Semiconductor Corporation
IRFP250 Rev. B
IRFP250
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg
IRFP250
200
200
33
21
130
±20
180
1.44
810
-55 to 150
UNITS
V
V
A
A
A
V
W
W/oC
mJ
oC
300
260
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ = 25oC to 125oC.
Electrical Specifications
TC = 25oC, Unless Otherwise Specified
MIN
TYP
MAX
UNITS
Drain to Source Breakdown Voltage
PARAMETER
BVDSS
ID = 250µA, VGS = 0V (Figure 10)
200
-
-
V
Gate Threshold Voltage
VGS(TH)
VGS = VDS, ID = 250µA
2.0
-
4.0
V
-
-
25
µA
-
-
250
µA
33
-
-
A
Zero Gate Voltage Drain Current
SYMBOL
IDSS
TEST CONDITIONS
VDS = Rated BVDSS, VGS = 0V
VDS = 0.8 x Rated BVDSS, VGS = 0V, TC = 125oC
On-State Drain Current (Note 2)
Gate to Source Leakage Current
Drain to Source On Resistance (Note 2)
Forward Transconductance (Note 2)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
(Gate to Source + Gate to Drain)
Gate to Source Charge
ID(ON)
IGSS
rDS(ON)
gfs
td(ON)
tr
td(OFF)
VDS > ID(ON) x rDS(ON)MAX, VGS = 10V
VGS = ±20V
-
-
±100
nA
ID = 17A, VGS = 10V (Figures 8, 9)
-
0.07
0.085
Ω
13
19
-
S
-
18
30
ns
-
125
180
ns
-
70
100
ns
-
80
120
ns
-
79
120
nC
-
12
-
nC
VDS ≥ 50V, ID = 17A (Figure 12)
VDD = 100V, ID = 30A, RGS = 6.2Ω, VGS = 10V,
RL = 3.2Ω
MOSFET Switching Times are Essentially
Independent of Operating Temperature
tf
Qg(TOT)
Qgs
Gate to Drain “Miller” Charge
Qgd
Input Capacitance
CISS
Output Capacitance
Reverse Transfer Capacitance
VGS = 10V, ID = 30A, VDS = 0.8 x Rated BVDSS,
IG(REF) = 1.5mA (Figure 14)
Gate Charge is Essentially Independent of Operating
Temperature
-
42
-
nC
-
2000
-
pF
COSS
-
800
-
pF
CRSS
-
300
-
pF
-
5.0
-
nH
-
12.5
-
nH
-
-
0.70
oC/W
-
-
30
oC/W
VDS = 25V, VGS = 0V, f = 1MHz (Figure 11)
Internal Drain Inductance
LD
Measured from the Contact
Screw on Header Closer to
Source and Gate Pins to
Center of Die
Internal Source Inductance
LS
Measured from the Source
Lead, 6.0mm (0.25in) from
Header to Source Bonding
Pad
Modified MOSFET
Symbol Showing the
Internal Device
Inductances
D
LD
G
LS
S
Thermal Resistance, Junction to Case
RθJC
Thermal Resistance, Junction to Ambient
RθJA
©2002 Fairchild Semiconductor Corporation
Free Air Operation
IRFP250 Rev. B
IRFP250
Source to Drain Diode Specifications
PARAMETER
SYMBOL
Continuous Source to Drain Current
ISD
Pulse Source to Drain Current (Note 3)
ISDM
TEST CONDITIONS
Modified MOSFET Symbol
Showing the Integral
Reverse P-N Junction
Rectifier
D
MIN
TYP
MAX
UNITS
-
-
33
A
-
-
130
A
-
-
2.0
V
140
-
630
ns
1.8
-
8.1
µC
G
S
Source to Drain Diode Voltage (Note 2)
VSD
Reverse Recovery Time
trr
Reverse Recovery Charge
QRR
TJ = 25oC, ISD = 33A, VGS = 0V (Figure 13)
TJ = 25oC, ISD = 30A, dISD/dt = 100A/µs
TJ = 25oC, ISD = 30A, dISD/dt = 100A/µs
NOTES:
2. Pulse test: pulse width ≤ 300µs, duty cycle ≤≤ 2%.
3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. VDD = 50V, starting TJ = 25oC, L = 1.1mH, RG = 50Ω, peak IAS = 33A.
Typical Performance Curves
Unless Otherwise Specified
40
1.0
ID, DRAIN CURRENT (A)
POWER DISSIPATION MULTIPLIER
1.2
0.8
0.6
0.4
0.2
0
0
50
100
150
32
24
16
8
0
25
75
50
TC, CASE TEMPERATURE (oC)
100
150
125
TC , CASE TEMPERATURE (oC)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
ZθJC , THERMAL IMPEDANCE
1
0.5
0.2
0.1
10-2
0.1
0.05
PDM
0.02
0.01
t1
t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC + TC
SINGLE PULSE
10-3
10-5
10-4
0.1
10-3
10-2
t1, RECTANGULAR PULSE DURATION (s)
1
10
FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE
©2002 Fairchild Semiconductor Corporation
IRFP250 Rev. B
IRFP250
Typical Performance Curves
Unless Otherwise Specified
(Continued)
103
50
102
10µs
100µs
1ms
10
10ms
1
DC
40
30
1
VGS = 6V
20
VGS = 5V
10
TJ = MAX RATED
TC = 25oC
SINGLE PULSE
0.1
VGS = 4V
0
10
102
VDS , DRAIN TO SOURCE VOLTAGE (V)
0
103
20
102
VGS = 10V
VGS = 7V
30
VGS = 6V
20
10
100
80
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
VDS ≥ 50V
VGS = 8V
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
40
60
FIGURE 5. OUTPUT CHARACTERISTICS
50
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
40
VDS , DRAIN TO SOURCE VOLTAGE (V)
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
VGS = 5V
10
TJ = 150oC
TJ = 25oC
1
VGS = 4V
0
0
1
2
4
3
5
0.1
0
2
4
6
8
VGS , GATE TO SOURCEVOLTAGE (V)
VDS , DRAIN TO SOURCE VOLTAGE (V)
FIGURE 6. SATURATION CHARACTERISTICS
3.0
NORMALIZED DRAIN TO SOURCE
ON RESISTANCE
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
0.4
0.3
VGS = 10V
0.2
0.1
0
10
FIGURE 7. TRANSFER CHARACTERISTICS
0.5
rDS(ON), ON-STATE RESISTANCE (Ω)
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
VGS = 10V
VGS = 7V
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
OPERATION IN THIS
AREA IS LIMITED
BY rDS(ON)
VGS = 20V
2.4
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
ID = 17A, VGS = 10V
1.8
1.2
0.6
0
0
25
50
75
ID, DRAIN CURRENT (A)
100
125
NOTE: Heating effect of 2µs pulse is minimal.
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
©2002 Fairchild Semiconductor Corporation
-40
0
40
80
120
160
TJ , JUNCTION TEMPERATURE (oC)
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
IRFP250 Rev. B
IRFP250
Typical Performance Curves
(Continued)
7500
ID = 250µA
1.15
VGS = 0V, f = 1MHz
CISS = CGS + CGD
6000 CRSS = CGD
COSS ≈ CDS + CGD
C, CAPACITANCE (pF)
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
1.25
Unless Otherwise Specified
1.05
0.95
4500
CISS
3000
COSS
0.85
1500
CRSS
0.75
-40
0
40
80
120
0
160
1
2
5
10
2
5
VDS , DRAIN TO SOURCE VOLTAGE (V)
TJ , JUNCTION TEMPERATURE (oC)
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
103
20
ISD, SOURCE TO DRAIN CURRENT (A)
gfs, TRANSCONDUCTANCE (S)
25
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
VDS ≥≥ 50V
TJ = 25oC
TJ = 150oC
15
10
5
0
10
20
30
ID, DRAIN CURRENT (A)
40
50
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT
VGS, GATE TO SOURCE (V)
20
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
102
TJ = 150oC
10
1
0
102
0
TJ = 25oC
0.5
1.0
1.5
VSD, SOURCE TO DRAIN VOLTAGE (V)
2.0
FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
ID = 30A
VDS = 160V
VDS = 100V
VDS = 40V
16
12
8
4
0
0
25
50
75
100
125
Qg , GATE CHARGE (nC)
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
©2002 Fairchild Semiconductor Corporation
IRFP250 Rev. B
IRFP250
Test Circuits and Waveforms
VDS
BVDSS
tP
L
VDS
IAS
VARY tP TO OBTAIN
VDD
+
RG
REQUIRED PEAK IAS
-
VGS
VDD
DUT
tP
0V
0
IAS
0.01Ω
tAV
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
tON
tOFF
td(ON)
td(OFF)
tr
VDS
RL
90%
+
RG
-
90%
10%
10%
0
VDD
tf
90%
DUT
VGS
0
50%
50%
PULSE WIDTH
10%
VGS
FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
FIGURE 17. SWITCHING TIME TEST CIRCUIT
VDS
(ISOLATED
SUPPLY)
CURRENT
REGULATOR
VDD
Qg(TOT)
12V
BATTERY
0.2µF
SAME TYPE
AS DUT
50kΩ
Qgd
Qgs
0.3µF
D
IG(REF)
VDS
DUT
G
0
S
0
IG CURRENT
SAMPLING
RESISTOR
VDS
ID CURRENT
SAMPLING
RESISTOR
FIGURE 19. GATE CHARGE TEST CIRCUIT
©2002 Fairchild Semiconductor Corporation
VGS
IG(REF)
0
FIGURE 20. GATE CHARGE WAVEFORMS
IRFP250 Rev. B
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. H4