Study of Epitaxial Growth and Fabrication of InGaP/GaAs HBT’s
Ricardo T. Yoshioka , Augusto C. Redolfi, Jacobus W. Swart.
Jefferson Bettini and Mauro M. G. de Carvalho
DSIF/FEEC and LPD/IFGW - UNICAMP
Abstract: An initial study of the growth of InGaP/GaAs layers by means of Chemical Beam Epitaxy
(CBE) and the fabrication of Heterojunction Bipolar Transistors, HBT’s, is presented. This study shows the
dependency of emitter-base I-V curves with growth conditions of the layers and gives the indication for
designing the following experiments. The results represent the first working HBT’s totally fabricated at our
laboratory and in Brazil.
1- Introduction
Heterojunction bipolar transistors, HBT’s, present superior performance compared to homojunction
bipolar transistors, BJT’s, due to the fact that they allow the use of highly doped base regions, with a doping
level higher than that of the emitter, leading to high maximum oscillation frequency. This inverse emitter/base
doping level ratio is possible because high emitter injection efficiency is obtained mainly due to the emitter/base
heterojunction band-gap offset. The heterojunction emitter/base can be obtained with III-V materials of different
compositions, such as: AlGaAs/GaAs, AlInAs/InGaAs, InP/InGaAs and InGaP/GaAs. HBT’s of AlGaAs/GaAs
are the most popular and mostly studied up to now. HBT’s of InGaP/GaAs have been proposed and studied
lately to replace the AlGaAs/GaAs structure because of its superior characteristics [1, 2]. Among these, a higher
valence band off-set (~300 meV) [3], the absence of DX-centers in the emitter and a high etching selectivity
between InGaP and GaAs are the main advantages. A study of the growth of InGaP and GaAs epitaxial layers by
means of CBE has been performed at our laboratory [4]. Following this, new layers has been designed and
grown for the fabrication of HBT’s. This paper presents this study, including the fabrication of HBT’s and the
correlation between the heterojunction characteristics and the growth conditions.
2- Experimental Procedures
Four samples has been grown according to a typical layer specification for HBT as shown in table 1.
The growth series are named as #CBE616, #CBE636, #CBE638 and #CBE647.
Table 1: Specified layer structure for the HBT fabrication.
Layer
Material
Thickness [nm]
Doping [cm-3]
Cap
GaAs (Si)
250
(n+)4e18
Emitter
In0.5Ga0.5P (Si)
100
(n)3e17
Spacer
GaAs (Un)
10
Base
GaAs (Be)
100
(p+)5e19
Collector
GaAs (Si)
500
(n)3e16
Sub-collector
GaAs (Si)
500
(n+)4e18
GaAs layers were grown using arsine and triethylgallium (TEG) sources while for InGaP layers,
trimethylindium (TMI), TEG and phosphine sources were used. Silicon doping was used for n-type layers, while
beryllium doping was used for the p-type base layer. A 10 nm thick undoped spacer layer was inserted between
the n type InGaP emitter and the p type GaAs base layers. This spacer layer is designed in order to account for
the diffusion of the beryllium from the highly doped base layer and to avoid it from entering the emitter layer.
This layer was however omitted in the #CBE647 growth run. Table 2 shows the substrate and the solid silicon
and beryllium doping cell temperatures during growth and the corresponding surface quality obtained.
Table 2: Temperatures of growth conditions and final surface characteristic
Growth
TSubstrate [oC]
TSi-cell [oC]
TBe-cell [oC]
Surface
+
run
n /n
p+
(view by pyrometer)
#CBE616
535
1100 / 1050
790
Mirror like
#CBE636
535
1140 / 900
800
Slightly milky
#CBE638
535
1140 / 900
800
Slightly milky
#CBE647
520
1140 / 900
800
Mirror like
The doping profile of sample of run #CBE616 were obtained by means of electrochemical C-V
profiling. The doping levels of the n+ and n layers were respectively below and above the specified values of
table 1. For this reason, the silicon cell temperature was changed to the values as in table 2 for the other growth
runs. The beryllium cell was also increased in order to correct the base doping. In order to avoid unwanted
beryllium doping in the other layers by increasing the beryllium cell temperature, the following care measures
were taken: increase the time interval with no growth, between base and emitter growth, from 30s to 90s; reduce
the standby temperature of the beryllium cell from 500oC to 200oC. Even with these precautions, the changes in
doping cell temperatures resulted in slightly milky surfaces. In order to improve the surface quality, the growth
temperature was reduced to 520oC in run #CBE647, what resulted in a mirror like surface again.
Transistors were fabricated on samples of the above grown layers, using a process sequence similar to
the one described before for AlGaAs/GaAs HBT’s[5]. The differences were: 1) the following selective etching
solutions were used for GaAs and InGaP respectively: H3PO4:H2O2:H2O (3:1:50) and HCl. 2) The metallizations
and sinterings after emitter metallization were also specific in each run, as indicated in table 3.
Table 3: Metallization and sintering conditions for each run
Sample /
Emitter [nm]
Base [nm]
Collector [nm]
Sintering
Device
(oC/s)
#CBE616
CPqD
LME/USP
CPqD
250/10
/
Ni/Ge/Au/Ni/Au
Ti/Pt/Au
Ni/Ge/Au/Ni/Au
340/5
DN17
(5/50/100/50/100)
(50/50/100)
(5/50/100/50/100)
#CBE636
LPD
LPD
LPD
150/15
/
AuGeNi/Au
Cr/Al
AuGeNi/Au
300/15
DN19
#CBE638
LPD
LPD
LPD
(1o)150 /15
/
AuGeNi/Au
Cr/Al
AuGeNi/Au
300/15
DN20
(2o)150/10
330/30
LPD
#CBE647
LPD
LPD
250 /15
/
AuGeNi/Au
Cr/Al
AuGeNi/Au
350 /30
DN21
The metallizations of samples #CBE636, #CBE638, #CBE647 were all performed at our laboratory
using a refractory wire coil as resistive heating source. The metallizations for sample #CBE616 were done at
CPqD/Telebrás and at LME/USP using E-beam metallization systems. The sintering done after the emitter
metallizations aims to increase its adhesion to endure the following wet etching step and to improve its ohmic
contact resistance. This is however a critical step because it can also degrade the performance of the device.
Sample #CBE616 went through a final alloy step in order to optimize its ohmic contact resistance. This was also
done in a RTP system in a two temperature step sequence of 250/10 and 350/10 [oC/s]. Similar alloy step on
samples #CBE636, #CBE638 and #CBE647 degraded these devices. For this reason, only characteristics
measured before alloy will be presented for these devices.
3- Results and Discussion
Device DN17 was the first InGaP/GaAs HBT fabricated at our laboratory. The Gummel-Plot of the
transistor is shown in Fig.1. It shows that the ideallity factor for the collector current is quite good, namely 1.2.
However, the ideallity factor for the base current is high, 3.9, indicating that the emitter-base junction is of poor
quality. The growth runs of #CBE636, #CBE638, #CBE647 were aimed to improve this junction quality, by
changing the growth conditions as described above. As mentioned before, the final alloy step of devices DN19,
DN20 and DN21 resulted in over-alloy with leaky junctions (due to a problem with the thermocouple of the RTP
as identified afterwards). The emitter-base I-V curves of the devices (Fig. 2) were measured before the final
alloy step. The ideallity factors can be estimated from these curves and are shown in table 4. These results
indicate that the quality of the emitter-base junction increased with the improvement in the epitaxial growth
conditions as described above. The improvement of the ideallity factor of devices DN19 and DN20 compared to
device DN17 can be attributed to increased time interval used between the growth of the base and emitter layers
and reduce the standby temperature of the beryllium cell from 500oC to 200oC. It also indicates that the milky
like surface does not affect much the junction. The further improved ideallity factor of device DN21 is probably
related to the better InGaP material due to the lower substrate temperature during growth. The effect of using or
not the 10 nm spacer layer between emitter and base needs to be investigated further, because in growth
#CBE647 two variables were altered at once (temperature and no spacer). A new growth is scheduled with the
same parameters and adding the spacer layer. The optimization of the growth conditions and the device
processing will be continued. The obtained results are giving the directions of this work and represent the results
of the first HBT totally fabricated at our laboratory and in Brazil.
Fig.ure 1- The Gummel Plot of DN17 device after
alloy process.
Figure 2- Emitter-base I-V curve of DN21 device
before alloy process.
Table 4: Ideallity factor obtained from Gummel-Plot and emitter-base I-V curves.
Device
Ideallity Factor
1.2
DN17
(#CBE616)
3.9
DN19 (#CBE636)
DN20 (#CBE638)
DN21 (#CBE647)
3.4
3.0
2.5
Measurement
Gummel Plot (Transistor)
- collector current
Gummel Plot (Transistor)
- base current
I-V of E/B junction
I-V of E/B junction
I-V of E/B junction
Acknowledgments:
This work has been supported by FAPESP, FINEP and CNPq. Additionally the authors would like to
acknowledge LME/USP and CPqD/Telebrás for metallization processes and Mrs. K. M. I. Landers, Mr. A. A.
Von Zuben and Mr. A. C. Silveira for sample preparation, metallization and C-V profile measurements
respectively, at our laboratory.
References:
[1] M. J. Mondry and Kroemer, “Heterojunction bipolar transistor using (Ga,In)P emitter on a base, grown by
MBE”, IEEE Electron Device Lett., vol. EDL-6, pp 175-177, 1985.
[2] T. Kobayashi, K.Taira, F. Nakamura, and H. Kawai, “Band lineup for a GaInP/GaAs heterojunction
measured by a high-gain npn heterojunction bipolar transistor grown by metalorganic chemical vapor
deposition”, J.Appl. Phys., vol 65, pp.4898-4902, 1989.
[3] M. A. Rao, E. J. Caine, H. Kroemer, S. I. Loun, and D. I. Babic,: “Determination of valence and conductionband discontinuities at the (Ga, In)P/GaAs heterojunction by C-V profiling”, J.Appl. Phys., vol. 61, no. 2,
pp.643-649, 1987.
[4] J. Bettini, Master dissertation, “Crescimento Epitaxial de InxGa1-xP sobre GaAs pela Técnica de Epitaxia por
Feixe Químico (CBE)”. March 1997.
[5] A. C. Redolfi, R. T. Yoshioka and J. W. Swart, “Design of a Test Chip for HBT Process Development and
Results of AlGaAs/GaAs HBT Fabrication”, 10th Congress of the Brazilian Microelectronics Society and 1st
Ibero American Microelectronics Conference, Canela - RS - Brazil, July 1995, pp.503-514.