ISSN : 2230-7109 (Online) | ISSN : 2230-9543 (Print)
IJECT Vol. 3, Issue 4, Oct - Dec 2012
A Review of Different Architectures of Operational
Transconductance Amplifier
1
Sanjeev Sharma, 2Pawandeep Kaur, 3Tapsi Singh, 4Mukesh Kumar
1,2,3,4
Lovely Professional University, Jalandhar, Punjab, India
Abstract
The outside world is of analog nature and to interact with
computerized devices, we need analog and mixed signals along
with Analog to Digital (A/D) circuits. Among various analog
circuits, Operational Transconductance Amplifier (OTA) plays a
very dominant role. OTA is an amplifier whose differential input
voltage produces an output current. Its main characteristics are
Gain, Unity Gain Bandwidth, Phase margin, Output swing, Slew
rate, CMRR, PSRR and Offset etc. It is widely used in Voltage
Controlled Amplifiers, A/D converters and filter applications. In
this paper we discussed different architectures of the OTA and
the Trade-offs among its characteristics made evident. Designing
a high gain, high speed and low power consuming OTA is real
challenge for the analog designers. As increasing or decreasing in
one parameter will result in variations in other parameters. This
paper identifies the different issues related to OTA and solution
to overcome different Trade-offs.
Keywords
Telescopic OTA, Folded Cascode, Gain enhancement, Unity Gain
Bandwidth
I. Introduction
Operational Transconductance Amplifier (OTA) is an amplifier
whose differential input voltage produces an output current. Thus,
it is a Voltage Controlled Current Source (VCCS).
Iout = (Vin+ - Vin-) gm
There is usually an additional input for a current to control the
amplifier’s Transconductance. The OTA converts an input voltage
to an output current relative to a Transconductance gain parameter
Gm=Io/Vi. The OTA is similar to a standard operational amplifier
in that it has high impedance differential input stage and that
it may be used with negative feedback. The conventional OTA
is classified as a class A amplifier and is capable of generating
maximum output currents equal to the bias current applied.
The equivalent circuit model indicates the Transconductance
amplifier generates an output current (io) proportional to an input
voltage (vi) based on the Transconductance gain Gm.
II. Different Architectures
As lot of research work is going in the field of Operational
Transconductance Amplifiers with high gain, high unity gain
bandwidth and also for low power consumption. We discuss
different configurations related to this research work, each
configuration having its own merits/demerits. There are different
configurations of the OTA discussed in the literature and commonly
used architectures are:
• Single Stage OTA
• Two Stage OTA
• Telescopic Cascode OTA
• Cascode OTA
• Folded Cascode OTA
A. Single Stage OTA
As discussed in [1] the single stage OTA is shown in fig. 2. This
is the least complex OTA and hence its speed can be very high.
Here in this architecture M1-M2 forms the current mirror and
M3-M4 represents the differential pair with inputs Vin1 and Vin2.
The output is taken across M2 which is the difference between the
two input voltages Vin1 and Vin2. If both the inputs are same then
the output is zero because there is no voltage difference generated
between two voltages.
Fig. 2: Single Stage OTA
The drawback is that the gain is rather low due to the fact that
the output impedance of this configuration is relatively low. This
low impedance also leads to high unity gain bandwidth and hence
high speed.
Fig. 1: Basic OTA
In this paper we will discuss the different configurations of the OTA
in section II, along with its merits and demerits, then in section III,
we will discuss different performance enhancement techniques
then in section IV, we will conclude about the problem.
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International Journal of Electronics & Communication Technology
1. Advantages of Single stage OTA
• It is easy to implement as compared to other architectures.
• It gives high speed and high bandwidth as this is one of the
simplest architecture of OTA.
2. Disadvantages of Single stage OTA
• It gives low gain as output impedance of this architecture
is low.
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IJECT Vol. 3, Issue 4, Oct - Dec 2012
ISSN : 2230-7109 (Online) | ISSN : 2230-9543 (Print)
B. Two-Stage OTA
By adding another stage, two-stage amplifier is obtained which
is shown in figure 3. This modification increases the gain up to a
certain extent as compared to a single stage OTA. But this addition
of an extra stage also increases the complexity. The increased
complexity will reduce the speed in comparison to a single stage
amplifier. In this architecture M1-M2 forms the current mirror
and M3-M4 forms the differential pair with inputs Vin1 and Vin2.
VBIAS,VBIAS1 and VBIAS2 the voltage biasing to the circuit
to provide amplification. M6-M7 provides the DC biasing to the
circuit. This configuration needs a suitable compensation scheme
to stabilize the amplifier. One of the various compensation circuits
(Rc Cc ) is also shown in fig. 3.
Fig. 4: Telescopic Cascode OTA
The telescopic Cascode has high gain as well as high speed, but by
adding more transistors the voltage swing at the output is reduced.
This is not used in systems with low supply voltages.
Fig. 3: Two Stage OTA
1. Advantages of Two Stage OTA
• It gives high gain as compared to single stage OTA.
• It gives high unity gain bandwidth and low power consumption
as compared to single stage OTA.
2. Disadvantages of Two Stage OTA
• Due to addition of extra stage the architecture becomes
complex and due to complexity cost will also increase.
• It needs compensation techniques to stabilize the circuit.
C. Telescopic Cascode OTA
The design of CMOS folded cascode OTA in different regions
of operation through Gm/Id methodology in [2]. Cascoding the
transistors is a well-known solution to enhance the DC gain of
the amplifier without degrading its frequency response. But the
amount of increase in DC gain obtained by cascoding is not
sufficient in many cases. Besides, there are also other methods
to enhance the OTA gain e.g. positive feedback and
use of replica amplifier. In all these methods high amount of power
and chip area is used for the gain enhancement circuitry. Here three
architectures are discussed. Firstly, the telescopic cascode OTA
configuration is shown in figure 4. The reason why the gain of the
single-stage OTA is low is that it has low output impedance. One
way of increasing the impedance is to add some transistors at the
output including using an active load. Transistors are stacked on
top of each other. The transistors are called “Cascode” and will
increase the output impedance and thereby increase the gain.
1. Advantages of Telescopic OTA
• By addition of Cascode stage the gain will further increase
without increasing the power consumption.
• It gives high speed and high unity gain bandwidth.
2. Disadvantages of Telescopic OTA
• By adding more transistors the voltage swing at the output
is reduced.
D. Cascode OTA
A Cascode is a two transistor stack used to obtain high gain and
high output impedances. A Cascode consists of a common source
configuration followed by a common gate stage. Consider in fig.
5, the action of the circuit in response to the test current applied at
node B. This will flow through and raise the voltage at intermediate
node A. The gain is taken to be the product of the Transconductance
and the output impedance. The gain depends on the loading of the
amplifier. The load impedance should be suitably high or the effect
of high output resistance of the cascode configuration is lost.
Fig. 5: Cascode OTA
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IJECT Vol. 3, Issue 4, Oct - Dec 2012
ISSN : 2230-7109 (Online) | ISSN : 2230-9543 (Print)
The other important thing is that the input impedance at the
intermediate node A is very small, usually taken to be 1/GM2.
Thus the Miller effect on the capacitance CGD (M1) is greatly
reduced. The Cascode configuration gives more gain as compared
to a simple common source configuration.
to most scaling laws, further reduces this gain.
Cascoding is the mostly used technique to achieve high gain
compared to two-stage designs because of its superior frequency
response. In this section we will discuss different new techniques
to increase the gain along with different Trade-offs.
1. Advantages of Cascode OTA
• It provides high output impedance which is useful in obtaining
high gain from the circuits.
• It reduces the capacitances at input in comparison to the
normal configuration which helps in obtaining high frequency
response.
A. Current Boosting Technique
Current boosting technique is discussed in [3] in this new
topology based on current boosting in class- AB stage which
achieve considerable improvement of Slew Rate and GainBandwidth while maintaining the same power consumption as
the conventional design.
The two stage OTA structure is usually utilized in which the first
stage is a folded Cascode and is suitable for low voltage applications.
In the second stage to achieve large values of gain-bandwidth and
slew rate, the class-AB amplifier must be employed.
2. Disadvantages of Cascode OTA
• It requires compensation techniques for stability.
E. Folded Cascode OTA
The folded Cascode amplifier is in a way a compromise between
the two-stage amplifier and the telescopic Cascode amplifier.
It permits low supply voltage, still having a rather high output
voltage swing and the input and output common mode levels
can be designed to be equal. Its gain is lower than for the twostage amplifier and its speed is lower than for the telescopic
Cascode, which makes it a good compromise between these two
amplifiers.
This design is discussed in [4] and has found a broad use in filters
A/D converters because of its reduced thermal noise, high gain
and possible optimization of power consumption.
Fig. 6: Folded Cascode OTA
1. Advantages of Folded Cascode OTA
• It provides high output impedance which is useful in obtaining
high gain from the circuits.
• It helps to achieve high gain, high bandwidth and high
swing.
2. Disadvantages of Folded Cascode OTA
• It consumes more power as compare to Telescopic
Cascode.
III. Performance Enhancement Techniques
For VLSI high-frequency circuits, transistors with minimum
feature size are used. Such transistors exhibit channel length
modulation and carrier multiplication due to hot carrier effects,
even at relatively low voltages. Scaling devices down, according
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International Journal of Electronics & Communication Technology
B. Self Cascode and Stacking Technique
This technique is used to reduce the power consumption in the
folded Cascode OTA [4]. Folded Cascode OTA has been chosen
since it allows shorting of input and output terminals with
extremely negligible swing limitations. Folded Cascode OTA is
used for high speed applications thanks to its capability to provide
high gain and large bandwidth. The application of Low Power
Consumption to the OTA structure provides significant decrease
in power with increase in gain.
C. Current Buffer based Compensate Technique
A novel design is discussed in [5] the design work on low voltage
but at high frequencies in which a current buffer compensation
circuit is coupled with a miller capacitance in series with one
other. The primary aim of the current buffer circuit is to enhance
the operating frequency.
It provides large output resistance in a relatively small area. The
current mirror topology performs the different to single ended
conversion of the input signal and thus load provides addition
advantage to CMRR.
D. Bulk Driven OTA
The bulk driven OTA with feed forward compensation has discussed
in [6] [7]. Though lower supply voltages result in lower power
consumption, as the supply reduces there is a need to maintain
relatively larger threshold voltage in order to reduce sub threshold
currents. One of the circuit techniques to overcome this threshold
voltage problem is to use bulk driven input MOSFETs which are
operated in weak inversion mode. An Enhanced Bulk driven OTA
is discussed in [8], which will increase the gain significantly.
E. Complementary Input Folded Cascode OTA
This OTA [9] plays an important role in the ADC, because of
its conversion rate and power consumption are limited by the
performance of the OTA. The folded Cascode OTA consists of
fully differential and regulated Cascode gain boosting technique.
Besides, a Common Mode Feed Back (CMFB) circuit was
introduced and some methods are concerned to improve the
performance. Then, by proper optimization of the layout design,
OTA’s mismatch was reduced up-to a great extent.
F. Push Pull Configuration OTA
A push pull configuration [10] for the input stage of a folded Cascode
OTA for enhancement of both gain and unity gain bandwidth. One
of the schemes for gain improvement is the Cascode configuration.
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ISSN : 2230-7109 (Online) | ISSN : 2230-9543 (Print)
In general, there are two types of Cascode configurations namely
Telescopic Cascode (TC) and Folded Cascode (FC). In telescopic
Cascode, high gain and high bandwidth can be achieved with
less power consumption, at the cost of degradation in the signal
swing. But in folded Cascode configuration, high gain, high
bandwidth and high swing can be achieved at the cost of increase
in power consumption .Further, FC OTA with PMOS transistor as
the input device is preferred to its NMOS counterpart due to its
lower flicker noise, better input common mode level and better
frequency response because of higher non-dominant poles. This
study proposes the Push Pull configuration to enhance the gain
and unity gain bandwidth.
G. Recycling Folded Cascode
The recycling amplifier architecture based on folded Cascode
Transconductance is described [11] the proposed amplifier is
reusing or recycling, existing devices and currents to perform an
additional task and delivers an appreciably enhanced performance
over that of the conventional folded. This is achieved by using
previously idle devices in the signal path, which results in an
enhanced Transconductance, gain, and slew rate. Moreover, the
input referred noise and offset analyses are included to demonstrate
that the proposed modifications have no adverse effects on these
design metrics.
One more design is discussed [12] the double recycling technique
for folded Cascode OTA , demonstrating another phase of the
significant performance enhancement over existing folded
Cascode , recycling folded Cascode counterparts.
IV. Conclusion
Different architectures of OTA and different techniques to
enhance the performance of the design have been discussed
from the literature along with the merits and demerits of different
architectures. We have found that with the development in the
architecture design the complexity of the circuit increases but
the performance parameter increases. In Telescopic Cascode
Configuration, high gain and high bandwidth can be achieved
with less power consumption, but with the degradation in the
signal swing. But in Folded Cascode Configuration, high gain,
high bandwidth and high swing can be achieved at the cost of
increase in power consumption.
V. Future Scope
Low power is becoming the key research area in today’s electronics
industry. The low power consumption is becoming an important
parameter in battery operated devices as speed, area and gain.
So we have to design such an efficient circuit which will provide
us high Gain, high Unity Gain Bandwidth, high slew rate with
the minimum power consumption. We can even try different
techniques from the literature to implement with our design to
get the better performance.
References
[1] Bhavesh H. Soni, Rasika N. Dhavse,"Design of Operational
Transconductance Amplifier Using 0.35µm Technology",
International Journal of Wisdom Based Computing, Vol. 1
(2), August 2011.
[2] H. Daoud Dammak, S. Bensalem, S. Zouari, M. Loulou,"Design
of Folded Cascode OTA in Different Regions of Operation
through gm/ID Methodology", World Academy of Science,
Engineering and Technology, 45, 2008.
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IJECT Vol. 3, Issue 4, Oct - Dec 2012
[3] Mehdi Noormohammadi, Vahid Khojasteh Lazarjan,
Khosrow HajSadeghi,“New Operational Transconductance
Amplifiers Using Current Boosting”, 2012 IEEE.
[4] Swati Kundra, Priyanka Soni, Anshul Kundra,“Low Power
Folded Cascode OTA", International Journal of VLSI design
& Communication Systems (VLSICS) Vol. 3, No.1, February
2012.
[5] Vibhor Kumar Bhardwaj, Harish Kumar, Piyush Kumar,
Aijaz Ahmed,"A Low Power 2 GHz Unity Gain Frequency
with 154 PSRR CMOS OTA", International Conference on
Solid-State and Integrated Circuit, 2012.
[6] Rekha S., Laxminidhi T.,"A Low Power, Fully Differential
Bulk Driven OTA in 180nm CMOS Technology”, International
Journal of Computer and Electrical Engineering, Vol. 4, No.
3, June 2012.
[7] A. Guzinski, M. Bialko, J. C. Matheau,“Body driven
differential amplifier for applications in continuous time
active-C filter”, In Proc. European Conf. Circuit Theory and
Design (ECCTD’87), pp. 315-320, 1987.
[8] Arash Ahmadpour, Pooya Torkzadeh,"An Enhanced BulkDriven Folded-Cascode Amplifier in 0.18 μm CMOS
Technology”, Circuits and Systems, 2012, 3, 187-19.
[9] Manas Kumar Hati,“Design of a low power, high speed
complementary input folded regulated cascode OTA for a
parallel pipeline ADC”, 2011 IEEE Computer Society Annual
Symposium on VLSI
[10]S.Kumaravel, B.Venkataramani,“An Enhanced Folded
Cascode OTA with push pull Input Stage”, 2012 IEEE.
[11] Rida S. Assaad, Jose Silva-Martinez,“The Recycling Folded
Cascode: A General Enhancement of the Folded Cascode
Amplifier”, IEEE Journal of Solid-State Circuits, Vol. 44,
No. 9, September 2009.
[12]Zushu Yan, Pui-In Mak, R. P. Martins,"Double recycling
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[13]Behzad Razavi,“Design of analog CMOs integrated circuits”,
Professor of electrical engineering, McGraw Hills, USA,
2001
Sanjeev Sharma was born in Punjab,
India in 1989. He has done B.Tech in
ECE from P.T.U. and currently he is
pursuing M.Tech ECE from Lovely
professional University. His main
research areas are VLSI and low power
analog designs.
Pawandeep Kaur was born in Punjab,
India. She has done B.Tech and M.Tech
in ECE. Currently she is working
as Assistant professor in Lovely
Professional University. Her main
research areas are VLSI and low power
analog designs.
International Journal of Electronics & Communication Technology 387
ISSN : 2230-7109 (Online) | ISSN : 2230-9543 (Print)
IJECT Vol. 3, Issue 4, Oct - Dec 2012
Tapsi Singh was born in Punjab,
India in 1988. She has done B.Tech
and M-Tech in ECE. Currently she
is working as Assistant professor in
Lovely Professional University. Her
main research areas are VLSI and low
power analog designs.
Mukesh Kumar was born in Punjab,
India in 1989. He has done B.Tech in
ECE from P.T.U. and currently he is
pursuing M.Tech ECE from Lovely
Professional University. His main
research areas are Embedded Systems
and Virtual Instrumentations.
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International Journal of Electronics & Communication Technology
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