Finite State Machines School of Electrical and Computer Engineering Georgia Tech1 Contents: Background Prelab Experiment Page 1 Page 6 Page 8 Background: Combinational logic circuits can perform many complex tasks, but they have no memory of past actions or events. They generate outputs based only on the current input values. A Finite State Machine, a type of sequential circuit, combines a combinational logic circuit with registers in order to include memory in the logic decisions. The “state” is a set of system variables that contain information about the sequence of inputs that led from an initial state to the current state. The current state is stored as a value in one or more registers. This circuit is easily built using a decoder and OR gates. A Finite State Machine can be represented by a transition diagram that shows what states are available and what input values cause a transformation from one state to another. The following transition diagram shows the states named as A, B, and C. The states are defined by the values stored in the registers; for example, State B corresponds to S1S0 = 01 where S1 is the value of Register 1 and S0 is the value of Register 0. The external input is X. X=1 A (00) X=0 X=1 X=1 C (10) X=0 X=0 B (01) Figure 1: State Transition Diagram. The value of X on each arrow indicates what input value will cause the state to transition to the next state. For example, to get from state A to state B, the input X must be 0. If the input X is 1, then state A will stay in state A. The actual transition occurs after the next clock pulse in the circuit. This diagram can be summarized in a truth table where NS1 represents the next value of S1 , that is, the value after the state transition: 1 For comments, please contact Professor Bonnie Ferri. 1 Finite State Machines State S1 S0 X New State NS1 NS0 A 0 0 0 B 0 1 A 0 0 1 A 0 0 B 0 1 0 C 1 0 B 0 1 1 A 0 0 C 1 0 0 C 1 0 C 1 0 1 A 0 0 -- 1 1 0 -- -- -- -- 1 1 1 -- -- -- Because there are three states, two registers are needed to be able to count up to three. The last two rows are empty, because there is no fourth state. If the state machine is built correctly, it should never end up in the fourth state (which would be represented as S1=1, S0 =1), and these rows can be ignored. The right side of the table shows the values in the next state. The top row of the table shows that State A (S1=0, S0 =0) transitions to State B (S1=0, S0=1) when X=0. The second line shows that the system stays in State A (00) when X=1. The third line shows that the system transitions from State B (01) to State C (10) when X = 0; and so on. A finite state machine can be built from a decoder, OR gates, and registers (or flip-flops). Decoders: A decoder has n inputs and 2n outputs. Below is the truth table for a 3-to-8 decoder—that is, 3 inputs and 8 outputs where A0 – A2 represent the inputs and Y0-Y7 represent the outputs. The circuit converts the binary representation of a number into an output pattern which has a “1” on the output pin associated with the decimal representation of the input with all other outputs are “0”. For example, the binary number 011 is equal to the decimal value 3, so Y3 = 1 with all other outputs equal to 0. A2 A1 A0 Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 1 0 0 0 1 1 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0 0 0 0 1 1 0 0 1 0 0 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 The icon for a 3 to 8 decoder is A0 A1 A2 3 to 8 decoder 2 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Finite State Machines A decoder can implement a combinational circuit that has multiple inputs and outputs. For example, look at the output NS0 in the state transition table. NS0 = 1 when S1S0 X = 000. Let the decoder inputs be defined as A2A1 A0 = S1S0 X, then NS0 = Y0. Similarly, NS1 = 1 when S1 S0X = 010 or when S1S0 X = 100. So let NS1 = Y2 OR Y4. The NS1 and NS0 signals are connected to the registers, so that the registers will be updated with the new state when the clock signal goes from low to high. Registers: Registers are the basic units of memory in a digital circuit. They can store a 0 or 1 and output it for other circuits to use. To change the value in the register, the new value is put on the incoming pin and the clock signal is changed from 0 to 1 (positive edge) to store the new value. Registers can be made from D flip flops. IN The value of IN (0 or 1) is only stored in the register when CLOCK goes from 0 to 1. OUT is always equal to whatever is currently stored in the register. OUT CLOCK State Machine Circuit Diagram: A state machine can be implemented with registers to hold the memory and a decoder and OR gates to perform the combinational logic. The state transition diagram in Figure 1 can be implemented using the circuit diagram shown below. X NS0 NS1 Decoder S1 CLOCK S0 CLOCK Figure 2: Schematic for the state machine with state transition diagram shown in Figure 1. 3 Finite State Machines Protoboards: Protoboards (also known as breadboards) make many connections under the board in order to reduce the number of wires that you have to connect. Typically, groups of 5 holes are connected. There are also lines of groups of 5 that are all connected. See the example figure. Terminals Every hole in this vertical line is connected. This is true of every vertical line. Each horizontal group of 5 holes is connected. Figure 3: Protoboard. Integrated Chip: An integrated chip (IC) can have several gates (circuits) on it. For example, the 74HC32 IC has 4 2-input OR gates. It has 14 wire pins coming out the sides with the connections from the pins to the logic gates shown in Figure 4. pin 1 near notch Figure 4b: Logic gates for the 74HC32 IC. Figure 4a: Pin Diagram to the 74HC32 Quad 2-input OR gate. 4 Finite State Machines Pin Connection Diagram: A pin connection diagram shows the physical layout of the connections between components. Each component is shown along with the corresponding pin numbers for that component. The pin diagram for the logic expression F = (A OR B) OR (C OR D) is shown below. The pin numbers correspond to the pins as labeled above for the 74HC32 2-input OR chip. A 1 B 2 OR Gate 74HC32 3 9 OR Gate 74HC32 8 10 C 4 D 5 F OR Gate 74HC32 6 To build this circuit, you would need to connect a wire from pin 3 of the IC to pin 9, another wire from pin 6 to pin 10. Pins 1, 2, 4, and 5 are inputs and connect to outputs from other components while pin 8 is connected to an LED or an input to another component. The pin diagram for the state machine with schematic shown in Figure 2 is To LED 0 Input from dip switch 1 2 3 2 D Q A0 Y0 15 A1 Y1 14 74HC74A 13 D flip flop A2 74HC238 Decoder Y2 Y3 Y4 Y5 Y6 Y7 5 12 11 10 9 7 1 OR Gate 74HC32 To LED 1 3 2 B 12 D Q 9 74HC74A D flip flop Figure 5: Pin diagram for state machine in Figures 1 and 2. For simplicity, some of the connections, such as ground, Vcc, clock and reset are not shown. 5 Finite State Machines Prelab: X=0 A (00) X=1 B (01) X=0 X=1 X=1 X=0 X=0 D (11) X=1 C (10) 1) For the state transition diagram shown, complete the truth table below. STATE S1 S0 X NEW STATE NS1 NS0 A 0 0 0 A 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 6 Finite State Machines 2) Draw the circuit diagram for the state machine. Your circuit should include a decoder, two registers, and 2- or 3-input OR gates. 3) Draw the pin connection diagram for the state machine. Start with the basics of the pin diagram shown below, and complete it using Figure 5 as a guideline. Use the IC descriptions in the appendix to determine the proper pins to use. To LED 0 Input from dip switch 1 A0 A1 A2 74HC238 2 D Q Y0 15 Y1 14 74HC74A 13 D flip flop Y2 Y3 Y4 Y5 Y6 Y7 5 12 11 To LED 1 10 9 12 7 D Q 74HC74A D flip flop Prelab sign off, TA or Instructor ______________ 7 9 Finite State Machines Experiment: Part A: Build the Finite State Machine defined in the introduction of this lab with the pin connection diagram shown in Figure 5.. Two registers, two pushbuttons (RESET and CLOCK), DIP Switches, a decoder, registers, and OR gates are already placed on the breadboard. The IC diagrams and pin layouts are given in the appendix. Terminals VCC GND DIP Switches 3- input OR gates LED for S0 LED for S1 L0 L1 Decoder Chip 2 input OR gate Register Chip Debouncer Clock Button Reset Button Figure 6: Layout of the protoboard. The circuit is partially wired as shown in Figure 6: • The battery pack supplies high voltage (Vcc) from the red lead and the ground (GND) from the black lead. The power routed through the uppermost dip switch, which must be turned on to power the circuits. • Vcc and GND are connected to all of the ICs. • The ICs are all oriented so that the upper left pin is PIN 1 (when the board is oriented as shown above). • The light emitting diodes (LEDs) are connected to S0 and to S1. The LEDs light when the signal is “1”. • The reset button resets the state to State A. It is already connected to the registers. 8 Finite State Machines • • • • The clock button advances the clock. The register stores the values of its input and passes the value to its output after each time that the clock button is pushed. It is already connected to the registers. The resistors (small cylindrical components with stripes) are used to limit the current in some of the lines. Otherwise, the components many burn out too quickly. A “debounce” circuit, consisting of an additional IC and a capacitor, is connected to the clock button. A bounce is when a switch does not produce a clean signal. There may be some ripple in the signal (or perhaps a small spike) that might be interpreted by the digital logic as a second input signal, in this case, an extra clock pulse. The debounce circuit filters the signal to remove the ripple or spike. The decoder has the enable pins already wired. Steps: 1) Make sure that the power is turned off of the board prior to constructing the circuit, that is, turn off the uppermost dip switch. 2) Complete the circuit according to the PIN Connection Diagram shown in Figure 5. Use the loose lead wires that are supplied with the kit. The color of wire is insignificant. Refer to the protoboard description to see which holes are connected within the protoboard, and refer to the appendix to see the pin numbers of the ICs. 3) Turn on the power to the circuit. 4) Now, test the State Machine to make sure it is working properly. First reset the state machine to put it in state A. Set the DIP switch to 0 and then press the clock button. Determine the state from the LEDs and mark it in the table below. Change the input to 1 and press the clock button to see the next state value. Move the DIP switch to either the on or off position according to the table, and then press the clock button to change the state. Complete the table below to show the states corresponding to the given input sequence. Verify that this sequence follows the transitions as dictated by the state transition table in Figure 1. State Input A 0 State Input State 1 Input State 1 Input State Input 0 State 0 Input State 0 Input State 1 Instructor or TA Initials: ___________ Part B: Build the Finite State Machine designed for the Prelab. 1) Turn off the power to the circuit before making any changes. 2) Remove only the wires that you added to the protoboard for Part A (do not remove the wires that were already there) . 3) Build the circuit using the pin connection diagram that was completed for the Prelab. 4) When the state machine is complete, turn on the power. Reset the state machine to put it in state A, and input the following sequence into the circuit. Write down the state after each step: State Input A 0 State Input 1 State Input 1 State Input 1 Instructor or TA Initials: ___________ 9 State Input 0 State Input 1 State Input 1 State Finite State Machines Appendix Decoder IC (74HC238): Register (D-FlipFlop) IC (74HC74): 10 Finite State Machines 2 Input OR Gate IC (74HC32): 3 Input OR Gate IC (74HC4075B1R) 11