55:041 Electronic Circuits. The University of Iowa. Fall 2013.
Homework Assignment 03
Question 1 (Short Takes), 2 points each unless otherwise noted.
1.
Two 0.68 𝜇F capacitors are connected in series across a 10 kHz sine wave signal source. The
total capacitive reactance is:
(a) 46.8 Ω
2.
(d) 21 Ω
In a VAC series RC circuit, if 20 VAC is measured across the resistor and 40 VAC is
measured across the capacitor, the magnitude of the applied voltage is:
(b) ≈ 55 VAC
(c) ≈ 50 VAC
(d) ≈ 45 VAC
Answer: The applied voltage is 𝑉𝐼𝑁 = 𝑉𝑅 + 𝑗𝑉𝐶 , so that |𝑉𝐼𝑁 | = �𝑉𝑅2 + 𝑉𝐶2 = √2,000 ≈
45 VAC. Thus (d) is the answer.
What is the magnitude of the current phase angle for a 5.6 𝜇F capacitor and a 50-Ω resistor in
series with a 1.1 kHz, 5 VAC source?
(a) 72.9°
4.
(c) 7.45 Ω
Answer: The total capacitance is 0.34 𝜇F. The reactance at 10 kHz is 𝑋𝑐 = 1⁄(2𝜋𝑓𝐶)
= 1/(2𝜋 × 10 × 103 × 3.4 × 10−6 = 46.8 Ω. Thus, (a) is the answer.
(a) ≈ 60 VAC
3.
(b) 4.68 Ω
(b) 62.7°
(c) 27.3°
(d) 17.1
Answer: The impedance of the RC circuit is = 𝑅 − 1⁄𝑗2𝜋𝑓𝐶 = 50 − 𝑗25.84 Ω. The
magnitude of the phase angle is |tan−1(−25.84⁄50)| = 27.3°. Thus, (c) is the answer.
In the circuit, 𝑉1 = 1.5 V, 𝑉2 = 2.5 V, and all the resistors have value 20K. The output
voltage is
(a)
(b)
(c)
(d)
(e)
−4.5 V
+4.5 V
−4 V
−0.5 V
+0.5 V
Answer: This is a summing inverter with 𝑉𝑜𝑢𝑡 = −𝑉1 (𝑅2 ⁄𝑅1 ) − 𝑉2 (𝑅2 ⁄𝑅1 ). Since all the
resistors have same value, 𝑉𝑜𝑢𝑡 = −𝑉1 − 𝑉2 = −4 V
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55:041 Electronic Circuits. The University of Iowa. Fall 2013.
5.
An engineer measures the (step response) rise time of an amplifier as 𝑡𝑟 = 0.7 𝜇s. Estimate
the 3 dB bandwidth of the amplifier.
Answer:
0.35
𝑡𝑟
0.35
=
0.7 × 10−6
= 500 kHz
𝐵𝑊 ≅
6.
What is the time constant of the circuit?
Answer: The resistance the capacitor sees is
𝑅𝑇𝐻 = 10K||10K = 5K, so the time constant is
𝜏 = 𝑅𝑇𝐻 𝐶𝐿 = (5 × 103 )(1 × 10−6 ) = 5 ms.
7. Consider the amplifier below. 𝑉𝑖𝑛 = 1.5 V, what is 𝑉𝑜𝑢𝑡 ?
Answer: Gain of 1st amplifier is 𝐴𝑓 = − (30)⁄10 = −3 and gain of the 2nd amplifier is −1.
Thus, overall gain is (−3)(−1) = 3. The output voltage is thus 𝑉𝑜𝑢𝑡 = 1.5 × 3 = 4.5 V.
8. A differential amplifier has a common-mode gain of 0.2 and a common-mode rejection ratio of
3250. What would the output voltage be if the single-ended input voltage was 7 mV rms?
(a) 1.4 mV rms
9.
(b) 650 mV rms
(c) 4.55 V rms
(d) 0.455 V rms
Answer: 𝐶𝑀𝑀𝑅 = 𝐴𝑑 ⁄𝐴𝑐 so that 3250 = 𝐴𝑑 ⁄0.2 and 𝐴𝑑 = 650. The output voltage is
650 × 7 = 4.55 mV rms.
An amplifier has a differential gain of -50,000 and a common-mode gain of 2. What is the
common-mode rejection ratio?
(a) –87.96 dB
(b) 44 dB
(c) -44 dB
(d) 87.96 dB
Answer: CMMR = 20 log10 |𝐴𝑑 ⁄𝐴𝑐 | = 20 log10 |50 × 103 ⁄2| = 87.96 dB, so the answer
is (d).
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55:041 Electronic Circuits. The University of Iowa. Fall 2013.
10.
If the feedback/input resistor ratio of a feedback amplifier is 4.6 with 1.7 V applied to the
noninverting input, what is the output voltage value?
(a) 7.82 V
11.
(c) Cutoff
(d) 9.52 V
Answer: 𝐴𝑣 = �1 + 𝑅𝑓 ⁄𝑅1 � = (1 + 4.6) = 5.6. The output voltage is then 𝑉𝑂 = 1.7 ×
5.6 = 9.52 V. Thus, the answer is (d)
The output of the circuit shown is
(a)
(b)
(c)
(d)
12.
(b) Saturation
Sine wave with frequency 𝜔 rad/s
Square wave with frequency 𝜔⁄2𝜋 Hz
Triangular wave with frequency 𝜔 rad/s
Need additional information
Answer: With no feedback, the circuit is highly non-linear and operates as a comparator,
comparing the input amplitude against 0 V. The output is a square wave for frequency 𝜔⁄2𝜋
Hz, so the answer is (b).
Decreasing the magnitude of the gain in the given circuit could be achieved by
(a) Reducing amplitude of the input voltage
(b) Increasing 𝑅𝑓
(c) Removing 𝑅𝑓
(d) Increasing 𝑅𝑖
13.
14.
Answer: 𝐴 = − 𝑅𝑓 ⁄𝑅𝑖 so one should increase 𝑅𝑖 to reduce the voltage gain.
Assuming ideal op-amp behavior, the input resistance 𝑅𝑖 of the amplifier is
(a)
(b)
(c)
(d)
(e)
15.
𝑅𝑥
∞Ω
0Ω
𝑅1
𝑅1 + 𝑅𝑥
Answer: For an ideal op-amp, no current flows into the + input terminal, so the the input
resistance is ∞. This, the answer is (b).
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55:041 Electronic Circuits. The University of Iowa. Fall 2013.
16.
In the circuit shown, the output voltage is
(a)
(b)
(c)
(d)
(e)
17.
Answer: This is a non-inverting amplifier with gain (1 + 8⁄2) = 5, so with a 5-V input the
output should be 25 V. However, the op-amp is powered by a +15-V power supply, so that
the output will be clamped to a value close to +15 V, so the answer is (c).
Consider the circuit shown. Assume ideal op-amp behavior.
(a)
(b)
(c)
(d)
18.
5(1 + 8⁄2) = 25 V
5(8⁄2) = 20 V
≈ 15 V
≈ −15 V
(8⁄2) = 120 V
V− = 𝑉+ = 5 V (op-amp operation)
𝑉− = 10 × 2⁄(2 + 8) = 2 V (voltage division)
V− = 0 (op-amp input current = 0)
Need additional information
Answer: These is no feedback in the circuit to create a virtual short (𝑉− = 𝑉+ ). No current
flows into the input terminals so that 𝑉− follows from voltage division, so the answer is (b).
In the circuit below 𝑅1 = 10K, 𝑅2 = 15K, and 𝑅3 compensates for the op-amp’s input bias
current. What should its value be to be effective?
(a)
(b)
(c)
(d)
(e)
10K
15K
6K
25K
Need 𝐼𝑂𝑆
Answer: Choose R 3 = R1 ‖R 2 = 6K, so (c) is the answer.
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55:041 Electronic Circuits. The University of Iowa. Fall 2013.
19.
What is the purpose of 𝑅3 in the circuit below, and what should the value be to be effective?
20.
Answer: This compensates for the op-amp’s input bias current. The value should be
𝑅1 ||𝑅2.
21.
Answer: Typically, slew rate is expressed in V/𝜇s.
What are the units of slew-rate?
What is the voltage gain 𝐴𝑣 = 𝑣𝑜 ⁄𝑣𝑠 of the amplifier below if 𝑔𝑚 = 0.04 S and 𝑟𝑜 = 100K?
(a)
(b)
(c)
(d)
(e)
−400
400
Need additional information (i.e., 𝑟𝜋 )
≈ 364
≈ −364
Answer: 𝐴𝑣 = −𝑔𝑚 (𝑟𝑜 ‖10K) = −0.04(100K‖10K) = −363.6 ≈ −364 so (e) is the
correct answer.
22. An engineer measures the gain of the circuit below and finds that with an input voltage
𝑣𝑖 = 3 V, the output voltage is 𝑣𝑜 = 18 V, so that the gain of the amplifier is 6. However,
op-amp theory suggests the gain is 1 + 6.2⁄1 = 7.2. Give one phrase that could explain the
difference.
Answer: “Slew Rate”
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55:041 Electronic Circuits. The University of Iowa. Fall 2013.
23.
Which of the circuit is a current-to-voltage converter?
24.
Answer: Circuit (a)
Which circuit is a voltage-to-current converter?
Answer: Circuit (b)
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55:041 Electronic Circuits. The University of Iowa. Fall 2013.
25.
26.
In the circuit 𝑉𝐼𝑁 = 10 V, 𝑅1 = 10K, and 𝑅𝐿 = 5K. What current flows through 𝑅𝐿 ?
Answer: By op-amp action the voltage across 𝑅1 is 𝑉𝑖𝑛 and the current through 𝑅1 and 𝑅𝐿 is
10⁄10K = 1 mA.
The Thevenin voltage VTH for the circuit external to R L is (4 points)
(a) 135∠63.4° V
(b) 13.4∠63.4° V
(c) 12.2∠0° V
(d) 122∠0° V
27.
Answer: 𝑉𝑇𝐻 is the no-load voltage between terminals 𝐴 and 𝐵. Using voltage division,
𝑉𝑇𝐻 = (30∠0°) × (𝑗45⁄(90 + 𝑗45)) = 6 + 𝑗12 V. This is equivalent to 13.4∠63.4° V, so
the answer is (b).
Answer:
𝐼=
2 − 0.7 − (−8)
= 0.37 mA
(5K + 20K)
𝑉𝑂 = −8 + (20K)(𝐼) + 0.7 = 0.14 V
𝑉𝑂 =? , 𝐼 = ?
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55:041 Electronic Circuits. The University of Iowa. Fall 2013.
28.
Answer: This is a current-to-voltage converter with
𝑣𝑂 = −𝑖𝑆 𝑅𝐹 = (10 × 10−6 )(1 × 106 ) = −10 V
29.
𝑖𝑆 = 10 µA, 𝑅𝐹 = 1 MΩ V, 𝑣𝑜 =?
Answer: This is a follower where 𝑣𝑂 = 𝑣+ .
Thus
30.
𝑣𝑂 = 𝑣+ =
𝑣𝐼 = 6 V, 𝑣𝑜 =?
20
6= 2V
20 + 40
Answer: This is a noninverting amplifier where
Thus
𝑣+ =
𝑣𝐼1 𝑣𝐼2
+
= 1+2= 3
2
2
𝑣𝑂 = �1 +
𝑣𝐼1 = 2 V, 𝑣𝐼2 = 4 V, 𝑣𝑜 =?
8
50
� 𝑣 = 2𝑣+ = 6 V
50 +
55:041 Electronic Circuits. The University of Iowa. Fall 2013.
Question 2 Assume that the op-amp in the non-inverting buffer configuration below has
infinite input resistance, zero output resistance, and an open-loop gain of 𝐴𝑂𝐿 = 1,000.
Determine the closed-loop gain 𝐴𝑓 = 𝑉𝑜 ⁄𝑉𝑠 , and be sure to provide your answer to four decimal
places. (6 points)
Solution
KVL around the loop shown below gives
−𝑉𝑠 + 𝑉𝑅𝑠 + 𝑉𝑖 + 𝑉𝑜 = 0
Where 𝑉𝑅𝑆 is the voltage across 𝑅𝑠 . However, no current flows into the op-amp, so 𝑉𝑅𝑆 = 0, and
the KVL equation becomes
−𝑉𝑠 + 𝑉𝑖 + 𝑉𝑜 = 0
Now 𝑉𝑜 = 1,000𝑉𝑖 = 1,000 𝑉𝑠 , which means 𝑉𝑖 = 𝑉𝑜 ⁄1,000, so the KVL equation becomes
−𝑉𝑠 +
𝑉𝑜
+ 𝑉𝑜 = 0
1,000
Solving for 𝐴𝑓 = 𝑉𝑜 ⁄𝑉𝑠 yields 𝐴𝑓 = 1,000⁄(1 + 1,000) = 0.9999
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55:041 Electronic Circuits. The University of Iowa. Fall 2013.
Question 3 An amplifier has an input resistance 𝑅𝑖 = 1K, and has a voltage gain of 𝐴𝑣 = 100
when driven from a signal with internal resistance 𝑅𝑠 ≈ 0. The amplifier is used to amplify a
𝑣𝑠 = 1 mV signal from a sensor that has an internal resistance of 𝑅𝑠 ≈ 20K. What is the output
amplitude? (6 points)
Solution
The sensor’s internal resistance and the amplifier’s input resistance form a voltage divider so that
the effective input voltage is
𝑣𝑖 =
1
1 mV = 47.6 𝜇V
1 + 20
The output voltage is 𝑣𝑜 = 𝐴𝑣 𝑣𝑖 = 100 × 47.6 × 10−6 = 4.76 mV
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55:041 Electronic Circuits. The University of Iowa. Fall 2013.
Question 4 The multimeter in the figure below has a common-mode rejection specification of
80 dB. What possible range of output voltages can the meter indicate? (6 points)
Solution
𝑉+ = 5.01 V, 𝑉− = 5 V
The difference voltage is 𝑉𝑑 = 𝑉+ − 𝑉− = 0.01 V = 10 mV, and the common-mode voltage is
𝑉𝑐𝑚 = (𝑉+ + 𝑉− )⁄2 = 5.005 V A common-mode rejection specification of 80 dB means that the
multimeters will suppress 𝑉𝑐𝑚 by a 80 dB, which is equivalent to a factor 104 . The contribution
of the common-mode error is thus 5.005⁄104 = 0.5 mV. However, the sign is unknown. Thus,
the multimeter could display anything in the range
9.5 mV ≤ 𝑉𝐷𝑖𝑠𝑝𝑙𝑎𝑦 ≤ 10.5 mV
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55:041 Electronic Circuits. The University of Iowa. Fall 2013.
Question 5 The input voltage is 𝑣𝐼 for each ideal op-amp below. Determine each output voltage.
Assume 𝑣𝐼 = 6 V. (2 points each)
Solution
(a) This is a follower where 𝑣𝑂 = 𝑣+ . Thus
𝑣𝑂 = 𝑣+ =
20
6= 2V
20 + 40
(b) Same answer as (a)
(c) This is a noninverting amplifier where 𝑣𝑂 = (1 + 10⁄10)𝑣+ = 2𝑣+ . Thus
𝑣𝑂 = 2𝑣+ = 2 �
6
6� = 1.333 V
6 + 48
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55:041 Electronic Circuits. The University of Iowa. Fall 2013.
Question 6 The circuit below is driven by the series of pulses shown. Assume 𝑉𝐶 = 0 at 𝑡 = 0.
(a) Write an expression for 𝑣𝑂 . (2 points).
(b) Determine the output voltage after n pulses. (4 points)
(c) Use the results from (b) and design, by specifying values for R and C, so that the output
voltage is -5 V after 5 pulses. (4 points)
Solution
1
𝑡
Part (a) The output of the integrator is 𝑣𝑂 = − 𝑅𝐶 ∫0 𝑣𝐼 (𝑡)𝑑𝑡.
Part (b) 𝑣𝑂 decreases linearly with each pulse. A the end of the pulse the output voltage is
10 𝜇s
𝑣𝑂 = −
𝑅𝐶
The circuit holds this voltage until the next pulse, during which it again increases linearly. At
the end of n pulses, the voltage is
𝑣𝑂 = −𝑛
10 𝜇s
𝑅𝐶
Part (c) We have to design the circuit so that this voltage is -5 V when 𝑛 = 5. Thus
10 𝜇s
𝑅𝐶
⇒ 𝑅𝐶 = 10 𝜇s
−5 = −5
Pick 𝐶 = 0.01 𝜇F, then 𝑅 = 1 kΩ. Other reasonable values will also work.
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55:041 Electronic Circuits. The University of Iowa. Fall 2013.
Question 7 Determine the voltage gain 𝐴𝑣 = 𝑣𝑂 ⁄𝑣𝐼 for the
ideal op-amp circuit shown. (10 points) (Hint: apply KCL at
the junction of the T-network and the inverting input.
Solution
There is a virtual short between 𝑣+ and 𝑣− so that 𝑣+ = 𝑣𝐼 . Call the voltage at the junction of
the three resistors that form the T-network, 𝑣𝑥 . KCL at the T-network junction gives
KCL at the inverting input gives
𝑣𝑥 − 𝑣𝐼 𝑣𝑥 𝑣𝑥 − 𝑣𝑂
+ +
=0
2𝑅
𝑅
2𝑅
𝑣𝐼 𝑣𝐼 − 𝑣𝑥
+
=0
𝑅
2𝑅
Solving for 𝑣𝑥 in the second equation gives 𝑣𝑥 = 3𝑣𝐼 . Substituting this in the first KCL equation
and some algebraic manipulation yields 𝑣𝑂 = 11𝑣𝐼 ⇒ 𝐴𝑣 = 𝑣𝑂 ⁄𝑣𝐼 = 11.
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