EMITTER-COUPLED LOGIC INEL4207 - Spring 2014 Figure 15.25 The basic element of ECL is the differential pair. Here, VR is a reference voltage. SIMPLIFIED ECL INVERTER R vC1 vIN Q3 Q1 Q2 IEE VREF vO IE3 -VEE Example: Select R so that VL = -1.5V. Use IEE = 0.1mA. ECL WITH RESISTOR BIASING R vC1 vIN Q3 Q1 Q2 IREE REE VREF vO IE3 R3 -VEE2 -VEE Example: Find R and R3 if VEE = VEE2 = −5.2V, VL = −1.3V, IEE = 300μA and IEE2 = 100μA. R4 R vC1 vIN Q3 Q1 Q2 IREE REE VREF vO IE3 R3 -VEE Example: Use the above circuit design an ECL gate for which VH = −1.7V and VL = −2.3V . The average power dissipation should be less that 2mW. The supply voltage is −5.2V . Neglect the base currents. Find VR if vD1 = vD2 = vBE = 0.75V. Neglect iB. Figure E15.12 Figure 15.26 Basic circuit of the ECL 10K logic-gate family. tp ≈ 1ns, the time it takes light to travel 1 foot. For previous circuit, find IE through RE if A and B are left open. Also find vC,QR and vCA,B. Use VR = -1.32V, VBE=0.75V and a very large β. Figure 15.27 The proper way to connect high-speed logic gates such as ECL. Properly terminating the transmission line connecting the two gates eliminates the “ringing” that would otherwise corrupt the logic signals. (See Section 15.4.6.) Figure 15.28 Simplified version of the ECL gate for the purpose of finding transfer characteristics. Figure 15.28 Simplified version of the ECL gate for the purpose of finding transfer characteristics. Find VOL and VOH (neglect iC of QR) if β=100. Then find NMH and NML if VIL and VIH are defined as the conditions for which IE, QR/IE, QA = 99 and vice-versa. Figure 15.30 Circuit for determining VOH. VOH = -0.88V. Take into account base current and variations in vBE. Assume that at iC = 1mA, vBE = 0.75V. Figure 15.31 15.28 Figure 15.32 δ = -2mV/℃ Figure 15.33 Equivalent circuit for determining the temperature coefficient of the reference voltage VR. ∆VOL = -0.43 δ Figure 15.34 Equivalent circuit for determining the temperature coefficient of VOL ∆VOH = -0.93 δ Figure 15.35 Equivalent circuit for determining the temperature coefficient of VOH. Figure 15.36 The wired-OR capability of ECL. Figure P15.30 Figure P15.39 udent #: December 21, 2010 Sec.: This exam has 3 problems. Each problem counts for 1/3 of the exam grade. 1. For the ECL inverter shown in the following sketch, the high voltage level is VH = −1.7V and the average power dissipated when the input is high 50 % of the time is P = 5mW . Determine the source’s current IEE , the low voltage level VL , the reference voltage level VREF and the value of resistance R3 . 2k 2k Q3 vin Q1 Q2 vout VREF R3 IEE -3.3V -5.2V Name: Student number: 2. Find VL , VH and VREF for the following circuit. Neglect base currents and assume VBE = 0.7V if a transistor is ON. (25 points) 1kΩ Q2 vIN Q1 VREF vOUT 4kΩ 1kΩ -2V -5V