2nd MTCA Workshop for Industry and Research
11-12 December 2013
Deutsches Elektronen-Synchrotron DESY
Hamburg, Germany
Book of Abstracts
For more information please visit: http://mtcaws.desy.de
For more information please visit: http://mtcaws.desy.de
This workshop is part of the Helmholtz Validation Fund Project HVF-0016 “MTCA.4 for Industry”.
Welcome to the 2nd MTCA Workshop for
Industry and Research
Dear friends of the MTCA community,
it is my great pleasure to welcome you again in Hamburg to the 2nd MTCA Workshop
at DESY!
2013 has been an eventful year for MTCA developers, users, manufacturers and
system integrators alike, and we at DESY are pleased to host one of the most
important gatherings for this community once more to help disseminate the latest
ideas, research results, tools and applications.
Your response to this second edition of the MTCA Workshop has been
overwhelmingly positive. A record attendance of 200 participants and 18 industrial
exhibitors from 18 different countries shows the growing interest in MTCA technology
worldwide. 2013 has been an extremely productive year for DESY as well, as we
have completed the hardware development of a large array of MTCA.4-compliant
components and began licensing these designs to our industrial partners. We have
seen much interest in these designs well beyond the accelerator physics research
community, as other potential applications in fields like medical imaging, radar and
industrial automation begin to take shape. The MTCA standard holds promise for
both, small companies serving narrowly defined niche markets as well as larger
players who would like to strengthen their positions in mass market applications. We
are delighted to see that the consortium of industrial partners in our corresponding
Helmholtz Validation Fund project “MTCA.4 for Industry” is steadily increasing.
DESY has made a commitment to help newcomers and early adopters of MTCA, and
so we offer a pre-workshop tutorial again this year to demonstrate basic system startup and configuration procedures for participants with little exposure to the MTCA
standard. Comprehensive two-day hands-on training sessions for beginners are
available year-round at DESY for those who would like to learn more, and for 2014
an extension of this program for advanced users is in preparation.
We are looking forward to a rich workshop program with 53 talks in 8 sessions
covering a wide variety of topics around MTCA, but we also recommend visiting the
associated industrial exhibition to keep up with the latest trends in MTCA product
development. There is also plenty of time to meet up with old friends (or make new
ones) at the workshop dinner and during the tours of the DESY facilities. We hope
you find this 2nd MTCA Workshop both interesting and enjoyable, and your feedback
on this event is very valuable to us.
Herzlich willkommen!
Dr. Holger Schlarb
Hamburg,
December
2013
2nd MTCA Workshop Chair
1
Advisory
Committee
Holger Schlarb (Chair)
DESY
Dieter Notz (Sectretary) DESY
Local
Organizing
Committee
Matthias Balzer
KIT
Vollrath Dirksen
N.A.T.
Matthias Drochner
FZJ
Tobias Hoffmann
GSI
Anders J Johansson
LTH
Markus Joos
CERN
Ray Larsen
SLAC
Dietmar Mann
Schroff
Shinichiro Michizono
KEK
Kay Rehlich
DESY
Uwe Tews
TEWS
Andreas Werner
IPP
Gohar Ayvazyan
Karin Brandis
Katharina Fein
Matthias Kreuzeder
Sörne Möller
Thomas Walter
2
General Information
Venue
DESY Lecture Hall, building 5
Deutsches Elektronen-Synchrotron
Notkestraße 85, 22607 Hamburg
W-LAN
Please select the WLAN ”MTCA-Workshop” and enter the
WPA/WPA2-PSK pre-shared key at "Password". Click the
"Connect" button to activate the wireless network connection.
WPA/WPA2-PSK : bFtL9hXb
If you are a member of an institution (e.g. a university), which is a
member of the "eduroam" community, you can use the wireless
network "eduroam".
Social Events
The workshop dinner will take place at 20:00 on Wednesday,
December 11th in the DESY canteen (building 9).
Meals
Breakfast:
If you stay at the Mercure Hotel Hamburg am Volkspark, breakfast
will be provided there. You can also have breakfast at the DESY
cafeteria (building 9, open from 7:00 – 17:00 ) at your own
expenses.
Lunch:
There will be lunch tickets for guests in the conference folder. All
participants can use the DESY canteen or cafeteria for lunch
(building 9).
Restaurants
Restaurant Don Quichotte http://www.osdorfermuehle.de/ Osdorfer
Landstrasse 162 a, open 11:00 –24:00. International food served
all day. From main gate at Notkestrasse take bus no. 1, direction
Schenefelder Holt, S Blankenese, Sieversstücken, S Rissen, exit
"Knabeweg”
Lambert
Restaurant
&
Sushi
Bar
http://www.lambert‐
hamburg.de/cms/ Osdorfer Landstrasse 239, open Tue‐Fri
(Mondays closed) 6:00 –10:30 and 12:00 –2:30. International food
and Sushi. From main gate at Notkestrasse take bus no. 1,
direction Schenefelder Holt, S Blankenese, Sieversstücken, exit
“Langelohstrasse (Nord)”.
Restaurant
Jim
Block
http://www.jim‐
block.de/restaurants/othmarschen/ Statthalterplatz 5, open 11:30 –
22:00. Trendy Hamburger‐Restaurant. From main gate at
Notkestrasse take bus no. 1, direction S‐Othmarschen, Altona, exit
“S‐Othmarschen”.
Restaurant Le Jardin (Mercure Hotel Hamburg am Volkspark)
Regional and international food served all day.
3
Other useful
information
Shopping at the Elbe Einkaufszentrum:
Shopping mall with more than 170 shops, opening hours 09:00 –
20:00. From main gate at Notkestrasse bus no. 1, direction
Schenefelder Holt, S Blankenese, Sieversstücken, exit “Elbe
Einkaufszentrum”
Supermarkets in the vicinity:
LIDL: from main gate at Notkestrasse turn right and walk some
700‐800 m down Notkestrasse, LIDL will be clearly visible on the
left
side
of
the
street
at
the
next
junction.
PENNY: from main gate at Notkestrasse walk straight down the
small street (zum Hühnengrab) to the bottom, there you will find
Penny supermarket on the right side of the street.
Cash point / ATM:
You will find an ATM at the DESY canteen entrance area in
building 9.
4
Workshop program
Tuesday 10 December 2013
Registration - DESY Lecture Hall, Foyer (13:00-15:00)
DESY Tour 1 - (14:15-15:00)
Julien Branlard, Frank Ludwig;Valeri Ayvazyan, Annika Rosner; Mavric Uros,
Matthias Hoffmann
Tutorials by experts - DESY Lecture Hall (15:00-16:45)
Chair: Ludwig, Frank (DESY)
15:00 MTCA.4 Tutorial Basics
MANN, Dietmar (Schroff
GmbH)
15:45 MicroTCA Management
STECHMANN, Christoph
(DESY)
16:15
PETROSYAN, Ludwig (DESY)
MicroTCA and PCIe HotSwap under Linux
Coffee Break - DESY Lecture Hall (16:45-17:15)
Tutorials by experts - DESY Lecture Hall (17:15-18:15)
Chair: Ludwig, Frank (DESY)
17:15 MTCA Tutorial: Configuring and Maintaining
DIRKSEN, Vollrath (N.A.T.
GmbH)
5
Wednesday 11 December 2013
Registration - DESY Lecture Hall, Foyer (08:15-09:00)
Welcome - DESY Lecture Hall (09:00-09:30)
Chair: Balzer, Matthias (KIT)
09:00 Introduction to DESY and the European XFEL
WEISE, Hans (DESY)
09:15 Status of "MTCA.4 for Industry" Helmholtz Validation
Fund
SCHLARB, Holger (DESY)
Session 1: Applications in research facilities - DESY Lecture Hall (09:30-11:00)
Chair: Balzer, Matthias (KIT)
09:30 Discussion of Future MicroTCA.4 Standards
Extensions and Brief Overview of SLAC Programs
LARSEN, Raymond (SLAC
National Accelerator Lab)
09:45 Update on MTCA.4 for FLASH and XFEL
REHLICH, Kay (DESY)
10:00 Evaluation results of MicroTCA equipment at CERN
DI COSMO, Matteo (CERN)
10:15 Diagnostic Use Case Examples in different form
factors (MTCA.4, ATCA, PXIe)
SIMROCK, Stefan (ITER)
10:30 Experience with the MTCA.4 LLRF System at FLASH SCHMIDT, Christian (DESY)
10:45 MTCA.4-based LLRF system tests at ELBE
KUNTZSCH, Michael (HZDR)
Coffee Break - DESY Lecture Hall, Foyer (11:00-11:30)
Session 2: New products - DESY Lecture Hall (11:30-13:10)
Chair: Mr. Hoffmann, Tobias (Helmholtzzentrum für Schwerionenforschung GSI
GmbH)
11:30 Improving Functional Density
BELLUR HIRIYANNAIAH,
Balasubramanya (Vadatech
Ltd)
11:40 Upgrade to 16 PCIexpress lanes in MTCA.4
DIRKSEN, Vollrath (N.A.T.
GmbH)
GEISLER, Andreas (Kontron)
11:50 Kontron product strategy
12:00 Pentair / Schroff MTCA.4 products
MANN, Dietmar (Schroff
GmbH)
12:10 MTCA.4 hardware solutions
SALTUKLAR, Aksel (ELMA)
6
12:20 The SIS83xx MTCA.4 Digitizer AMC family and
associated RTMs
MATTHIAS, Kirsch (Struck
Innovative Systeme GmbH)
12:30 MTCA.4 Front End Processing
WASTIAUX, Thierry (Interface
Concept)
12:40 1000W Low Noise MTCA.4 Power Supply
BERNER, Thomas (WIENER
Plein + Baus GmbH)
12:50 Presentation of high-voltage modules in MTCA.4
standard at CAEN els
FARINA, Simone (CAEN ELS
d.o.o.)
13:00 New MTCA.4 products from IOxOS Technologies SA
BOVIER, Joel (IOxOS
Technologies SA)
Group Photo - DESY Lecture Hall, Foyer (13:10-13:30)
DESY Tour 2 - (13:30-14:15)
Julien Brandlard, Frank Ludwig; Valeri Ayvazyan, Annika Rosner; Mavric Uros,
Matthias Hoffmann
Lunch - DESY Canteen (13:30-14:30)
Session 3: New products - DESY Lecture Hall (14:30-16:00)
Chair: Joos, Markus (CERN)
14:30
Beyond 10 Gbps with MTCA.4
MAKOWSKI, Dariusz (Lodz
University of Technology,
DMCS)
14:40
High speed interface simulation using the new 3D layout MUFF, Simon (Ansys
HFSS interface
Germany GmbH)
14:50
New 32 Channel ADC design
15:00
MTCA.4 RF-Backplane Option : Features and
Management
KOLL, Niels (TEWS
Technologies)
CZUBA, Krzysztof (Warsaw
University of Technology)
15:10
High speed AMC Digitizer and RTM based application
modules
BOU HABIB, Samer (Warsaw
University of Technology)
15:20
High-Speed AMC to PC bridge
BARROS MARIN, Manoel
(CERN)
15:30
Middleware Technologies: The Software Bridge into the SCHACHNER, Robert (RST
Industry
Industrie Automation.GmbH)
15:40
From MicroTCA to ATCA. Scalability issues for data
acquisition systems.
15:50
Discussion
FIX, Friedrich (Eicsys
Embedded Integrated Control
Systems)
7
Exhibition - Building 09 (16:00-20:00)
Dinner - DESY Canteen, Building 09 (20:00-22:00)
Exhibition - Building 09 (20:00-22:00)
8
Thursday 12 December 2013
Session 4: Applications in research facilities - DESY Lecture Hall (09:00-10:45)
Chair: Dirksen, Vollrath (N.A.T. GmbH)
09:00 XFEL Machine Protection System (MPS) Based on
MicroTCA
KARSTENSEN, Sven (DESY)
09:15 A general MTCA.4-based laser to RF synchronization
system
MAVRIC, Uros (DESY)
09:30 MicroTCA @ CMS
BEHRENS, Ulf (DESY)
09:45 Intra-pulse RF feedbacks for normal conducting cavities
with femto-second precision
HOFFMANN, Matthias
(DESY)
10:00 Open hardware / open software MTCA.4-based beam
position measurement system
KASPROWICZ, Grzegorz
(Warsaw University of
Technology / Creotech
Instruments SA)
FELBER, Matthias (DESY)
10:15 MicroTCA for the Optical Synchronization Systems at
XFEL and FLASH
10:30 ATCA/MicroTCA based Compute Nodes in the Belle II
Pixel Detector DAQ
SPRUCK, Bjoern (University
Giessen)
Coffee Break - DESY Lecture Hall, Foyer (10:45-11:15)
Session 5: Applications in research facilities - DESY Lecture Hall (11:15-12:25)
Chair: Larsen, Raymond (SLAC)
11:15 Femtosecond bunch arrival time monitoring with precision SZEWINSKI, Jaroslaw
FMC-ADC modules
(NCBJ)
11:29 Control and Data Acquisition of the Wendelstein 7-X
Experiment
WERNER, Andreas (MPI f.
Plasmaphysik)
11:43 Image Acquisition and Processing with MTCA.4
PEREK, Piotr (Lodz University
of Technology, DMCS)
11:57 Design of a Stripline BPM System on MicroTCA.4
YOUNG, Andrew (SLAC)
XU, Chengcheng (SLAC)
12:11 Low-latency 1D image detector realized as an AMC
module
MIELCZAREK, Aleksander
(Lodz University of
Technology, DMCS)
Short Break - DESY Lecture Hall (12:25-12:30)
9
Session 6: Applications in industry - DESY Lecture Hall (12:30-13:30)
Chair: Mann, Dietmar (Schroff GmbH)
12:30 Novel Applications of MicroTCA
SHEARER, Ian (VadaTech
Ltd)
12:45 MicroTCA application in the industry
SALTUKLAR, Aksel (ELMA)
GEISLER, Andreas (Kontron)
13:00 MicroTCA based universal Satellite Testbed
HOLZAPFEL, Thomas
(powerBridge Computer)
13:15 Creotech and Open Hardware experiences
KASPROWICZ, Grzegorz
(Creotech Instruments SA)
DESY Tour 3 - (13:30-14:15)
Valeri Ayvazyan, Annika Rosner; Julien Brandlard, Frank Ludwig
Lunch - DESY Canteen (13:30-14:30)
Session 7: Interoperability - further developments - DESY Lecture Hall (14:3015:45)
Chair: Werner, Andreas (MPI f. Plasmaphysik)
14:30 Preliminary Functional Tests of the DRTM-LOG1300
Assembly
ROHLEV, Tony (TSR
Engineering)
14:45 MMC V1.0 - DESY Starter Kit for MTCA.4 Module
Management
FENNER, Michael (DESY)
15:00 EMI test board
OWCZAREK, Tomasz (ISE
PW)
15:15 EMI compliant design of MTCA.4 modules
IBOWSKI, Heinz-Hartmut
(brightONE ES GmbH)
15:30 Ratified ZONE 3 classes to achieve enhanced AMC-RTM LUDWIG, Frank (DESY)
modularity
Coffee Break - DESY Lecture Hall, Foyer (15:45-16:15)
10
Session 8: Software for MTCA.4 - DESY Lecture Hall (16:15-17:45)
Chair: Tews, Uwe (TEWS Technologies GmbH)
16:15 Driver and Software for MTCA.4
KILLENBERG, Martin (DESY)
16:30 MTCA.4 developments for the ESS
MEHLE, Marko (Cosylab)
16:45 PCIe Device Drivers Common Interface.
PETROSYAN, Ludwig
(DESY)
17:00 MicroTCA Module Management Controller Software
KAEMMERLING, Peter
(Forschungszentrum Jülich,
ZEA-2)
17:15 Considerations for the real-time performance issues in
linux/MicroTCA
KIM, Kukhee (SLAC)
17:30 Overview and Status of the MicroTCA for Physics
Standards Effort
MAKOWSKI, Dariusz (Lodz
University of Technology,
DMCS)
17:45 Closing remarks
SCHLARB, Holger (DESY)
DESY Tour 4 - (18:00-18:45)
Mavric Uros, Matthias Hoffmann
11
The following abstracts were reviewed by the Advisory Committee
presentation at the 2nd MTCA Workshop for Industry and Research.
and approved for the
Table of Contents
Tutorials by experts ................................................................................................. 14
MTCA.4 Tutorial Basics ....................................................................................... 14
MicroTCA Management ....................................................................................... 14
MicroTCA and PCIe Hot-Swap under Linux ......................................................... 15
MicroTCA Tutorial: Configuring and Maintaining .................................................. 16
Welcome ................................................................................................................. 17
Status of the Helmholtz Validation Fund Project "MTCA.4 for Industry" ............... 17
Applications in research facilities ............................................................................. 18
Discussion of Future MicroTCA.4 Standards Extensions and Brief Overview of
SLAC Programs ................................................................................................... 18
Update on MTCA.4 for FLASH and XFEL ............................................................ 19
Evaluation results of MicroTCA equipment at CERN ........................................... 20
Diagnostic Use Case Examples in different form factors (MTCA.4, ATCA, PXIe). 21
Experience with the MTCA.4 LLRF System at FLASH ......................................... 21
MTCA.4-based LLRF system tests at ELBE ........................................................ 22
New products .......................................................................................................... 23
Improving Functional Density ............................................................................... 23
Upgrade to 16 lane PCIexpress lanes in MTCA.4 ................................................ 23
Kontron product strategy...................................................................................... 24
Pentair / Schroff MTCA.4 products ...................................................................... 24
MTCA.4 hardware solutions ................................................................................. 24
The SIS83xx MTCA.4 Digitizer AMC family and associated RTMs ...................... 25
MTCA.4 Front End Processing ............................................................................ 25
1000W Low Noise MTCA.4 Power Supply ........................................................... 26
Presentation of high-voltage modules in MTCA.4 standard at CAEN els ............. 26
New MTCA.4 products from IOxOS Technologies SA ......................................... 27
Beyond 10 Gbps with MTCA.4 ............................................................................. 29
High speed interface simulation using the new 3D layout HFSS interface ........... 29
New 32 Channel ADC design .............................................................................. 30
MTCA.4 RF-Backplane Option : Features and Management ............................... 30
High speed AMC Digitizer and RTM based application modules.......................... 31
High-Speed AMC to PC bridge ............................................................................ 31
Middleware Technologies: The Software Bridge into the Industry ........................ 32
From MicroTCA to ATCA. Scalability issues for data acquisition systems ............ 33
Applications in research facilities ............................................................................. 34
12
XFEL Machine Protection System (MPS) Based on MicroTCA ............................ 34
A general MTCA.4-based laser to RF synchronization system............................. 34
MicroTCA @ CMS ............................................................................................... 35
Intra-pulse RF feedbacks for normal conducting cavities with femto-second
Precision .............................................................................................................. 35
Open hardware / open software MTCA.4-based beam position measurement
system ................................................................................................................. 36
MicroTCA for the Optical Synchronization Systems at XFEL and FLASH ............ 36
ATCA/ MicroTCA based Compute Nodes in the Belle II Pixel Detector DAQ ....... 37
Femtosecond bunch arrival time monitoring with precision FMC-ADC modules ... 37
Control and Data Acquisition of the Wendelstein 7-X Experiment ........................ 38
Image Acquisition and Processing with MTCA.4 .................................................. 38
Design of a Stripline BPM System on MicroTCA.4 ............................................... 39
Low-latency 1D image detector realized as an AMC module ............................... 39
Applications in industry............................................................................................ 40
Novel Applications of MicroTCA........................................................................... 40
MicroTCA application in the industry .................................................................... 40
MicroTCA based universal Satellite Testbed........................................................ 41
Creotech and Open Hardware experiences ......................................................... 41
Interoperability - further developments .................................................................... 42
Preliminary Functional Tests of the DRTM-LOG1300 Assembly .......................... 42
MMC V1.0 - DESY Starter Kit for MTCA.4 Module Management ......................... 42
EMI test board ..................................................................................................... 43
Ratified ZONE 3 classes to achieve enhanced AMC-RTM modularity ................. 43
EMI compliant design of MTCA.4 modules .......................................................... 44
Software for MTCA.4 ............................................................................................... 45
Driver and Software for MTCA.4 .......................................................................... 45
MTCA.4 developments for the ESS ..................................................................... 45
PCIe Device Drivers Common Interface .............................................................. 46
MicroTCA Module Management Controller Software ........................................... 47
Considerations for the real-time performance issues in linux/MicroTCA............... 47
Overview and Status of the MicroTCA for Physics Standards Effort .................... 48
13
Tutorials by experts
MTCA.4 Tutorial Basics
Dietmar Mann
Schroff GmbH
Abstract ID: 64
This tutorial covers the basics of MTCA.4. It begins with background information on
why the existing MicroTCA and AMC standards did not satisfy the needs of the
Physics community and what new features were required.
The physical features of MTCA.4 like board sizes, connector definitions, module
insertion/extraction and also the management interface between the RTM and the
Front board are explained. Then it gives an overview of management features which
have been added in MTCA.4 to manage the RTM and the Cooling Unit.
MicroTCA Management
Christoph Stechmann
DESY
Abstract ID: 60
High reliability and serviceability are two of the main requirements on MicroTCA
systems.Furthermore a system should be flexible and versatile without raising the
administration effort.
Management of each single hardware component in a MicroTCA is therefore
inevitable. The monitoring of parameters like temperatures and voltages inside the
shelf, the handling of interconnections and the automatic supervision of cooling units
and power modules are essential features of each MicroTCA system.
Summary:
This tutorial illustrates the role of the MicroTCA Carrier Hub (MCH) and describes
the architecture of IPMI (Intelligent Platform Management Interface) both on the hardand software side.
14
MicroTCA and PCIe Hot-Swap under Linux
Ludwig Petrosyan
DESY
Abstract ID: 5
One of the main characteristics of any computer architecture is reliability and
uninterrupted operation. This important if a system allows a possibility to add and
remove devices in run. The Hot-Swap service is irreplaceable not only in the process
of development of final devices but also in the use, thus ensuring continuous
functioning of the system as a whole. Such feature plays an important role especially
in control systems.
In the MicroTCA systems the Hot-Plug is generally provided by the Shelf Manager
and the Hot-Swap services of the PCI Express Bus. One of especially important
features of this bus is a possibility of hot replacement of the devices without resetting
an operating system.
The PCI Express Hot-Swap service is being used relatively long. However, the
MicroTCA system makes its own amendments into general architecture of the PCIe
Hot-Swap and in the methods and ways of use.
For MicroTCA systems using PCIe as the base link, the Hot-Swap provided by the
following various subsystems:
1. PCIe Hot-Plug controller enclosed in the PCIe root or switch ports, with the
standardized Software Interface
2. uTCA Shelf Manager, MMC controller
3. Hot-Swap services supplied by IPMI
4. Hot-Plug services supplied by OS (Hot-plug driver and user notification
subsystems)
The specificity of the mTCA systems is in fulfillment of certain tasks of the Hot-Plug
Controller by the MCH and AMC.
Interaction of these subsystems leads to the following three important capabilities:
1. a method of replacing of failed expansions cards without turning the system off
2. keeping the OS and other services running during the repair
3. shutting down and restarting software associated with the failed device
Effective functionality of Hot-Swap system requires adjustments of all these basic
elements.
Our experience of the adjustment, starting and testing as well as use of the PCIe
Hot-Swap in MicroTCA architecture will be presented.
15
MicroTCA Tutorial: Configuring and Maintaining
Vollrath Dirksen
N.A.T. GmbH
Abstract ID: 11
The configuration and maintenance of a MTCA.4 system is presented and shown in
life demos.
Covered themes are: set up PCIexpress, PCIexpress hot-plug, remote firmware
update (.hpm), methods to update FPGA, detection mechanism for issues,
maintenance.
Summary:
This 60 minute presentation including life demos is a follow up of last year MTCA.4
tutorial „Bring up a MTCA.4 System“(see http://webcast.desy.de/?cat=61).
You will get answers to the following questions:
• How will PCIexpress enabled, successful training verified and hot plug of
PCIexpress
• boards realized?
• How to write a clock script file?
• How to update the firmware of the MCH, AMCs, CU, PM?
• How to read the backplane FRU and how to update it?
• How to update the image of the FPGA of AMC boards and on the NAT-MCH?
16
Welcome
Status of the Helmholtz Validation Fund Project "MTCA.4 for
Industry"
Holger Schlarb
DESY
Abstract ID: 66
The Helmholtz Validation Fund project "MTCA.4 for Industry" has successfully
passed the mid-term evaluation and it was extended by half year till end of2014. The
industrial consortium has grown from initially 7 to meanwhile 12 partners. More than
27 hardware developments have been defined with many close to completion. In this
presentation a summary of the achievements, overview on the current sub-projects
and future plans will be given.
17
Applications in research facilities
Discussion of Future MicroTCA.4 Standards Extensions and
Brief Overview of SLAC Programs
Raymond Larsen
SLAC National Accelerator Lab
Abstract ID: 48
The MicroTCA.4 development under the PCI Industrial Computer Manufacturers
Group (PICMG) is proving successful in meeting a large range of needs for
accelerator controls and instrumentation. A number of further extensions have been
undertaken by DESY for the XFEL program for RF distribution which raises the
question of preserving interoperability within the standard as important new solutions
are discovered.
Similarly the Zone 3 connector space has been specified functionally for a class of
fast ADC-DAC use cases, in particular Low level RF and Beam Position Monitors,
which suggests standards definition formalization wider than the current use cases.
Common reference designs for AMC and RTMs are another area of need. In the
software-firmware space, now bolstered by real experience, labs and industry can
begin to converge on preferred architectures and software-firmware interface
standards or at least guidelines for Best Practices. Prior work done in this area by the
Software Working Group, reported separately, needs to be resumed and level of
effort expanded.
The SLAC overview will refer to recent accomplishments as well as planning in
progress for the 2-mile accelerator CAMAC control system upgrade.
The presentation covers the work of many contributors.
The MicroTCA for Physics leading committee members for Hardware Working Group
were Robert Downing, Dick Somes, Vince Pavlicek, Kay Rehlich, Tomasz Jezynski,
Dietmar Mann, Michael Thompson, Eike Waltz , Jean-Pierre Cachemiche and others.
Key Software Working Group leaders were Stefan Simrock, Gus Lowell, Zhen’An Liu,
Dariusz Makowski, Jorge Sousa, Michael Thompson and others.
The SLAC MTCA.4 development team members are Andrew Young, Charlie Xu,
Sonya Hoobler, Till Straumann, Ernest Williams, Kukhee Kim, Bo Hong, Thuy Vu,
David G. Anderson, Dan van Winkle, Debbie Rogind, Tom Himel and others. Zheqiao
Geng, a major contributor, has recently joined PSI in Switzerland
18
Update on MTCA.4 for FLASH and XFEL
Kay Rehlich
DESY
Abstract ID:51
MicroTCA will be used for all fast data acquisition systems of the European-XFEL.
First MicroTCA installations for this project are currently commissioned. After a
longer shut-down FLASH was equipped with several MicroTCA systems as well.
These systems are used successfully in the daily operations. Further MicroTCA
crates for a second undulatory beam line are being installed these days. The status
of and experience with various MicroTCA components of these projects will be given.
19
Evaluation results of MicroTCA equipment at CERN
Matteo Di Cosmo
CERN
Abstract ID: 14
MicroTCA is a candidate platform for modular electronics for the upgrade of the
current generation of high energy physics experiments at CERN. Driven by the rising
interest in this standard, the Electronic Systems for Experiments group has launched
in 2011 an evaluation project with the aim of performing technical evaluations and
eventually providing support for equipment procured on a large scale by LHC
experiments.
Different devices from different vendors have been acquired, evaluated and
interoperability tests have been performed. This presentation shows the test
procedures and facilities that have been developed for this purpose and focuses on
the evaluation results including electrical, thermal and interoperability aspects.
Summary:
The AdvancedTCA and MicroTCA industry standards are gaining momentum among
the LHC experiments both as platforms for new projects and as replacements for
certain VMEbus based systems. At CERN, the first MicroTCA systems are going to
be installed during the current Long Shutdown (LS1) while deployment of larger
quantities of systems are planned for the Long Shutdowns 2 (2018) and 3 (2022/23).
Several independent groups at CERN and in collaborating institutes have already
started to develop MicroTCA modules for Large Hadron Collider (LHC) experiments
and the question arises as to what standard format these modules should eventually
be based on. In this framework, the CERN Electronic Systems for Experiments group
launched the MicroTCA Evaluation Project with the goal of providing technical
evaluation of MicroTCA systems with a clear focus on the infrastructure equipment
such as shelves, power supplies, power modules, cooling units and MCHs.
The project includes electrical evaluations of power modules, thermal
characterization of crates and IPMI functionality tests. The electrical evaluation of the
power modules includes static and dynamic regulation tests, efficiency and power
factor measurements, ripple and noise characterization as well as overcurrent
protection test. The thermal tests aim at estimating the cooling unit performance and
airflow homogeneity inside a shelf. The IPMI functionalities have been tested using a
commercial automated test suite for checking the Hardware Platform Management
Software and (E)MMC firmware implemented in MicroTCA based systems. A
complete test setup consisting of AMC and RTM load modules for electrical and
thermal tests has been designed and built. The control and monitoring of the
equipment under test is based on a Labview interface developed to automate the test
procedure.
During the test phases, several interoperability problems and technical issues have
been uncovered and addressed by working in collaboration with the manufacturers.
This allowed us to acquire knowledge and experience with these new architectures.
For each component a detailed evaluation report has been written.
This presentation describes the test procedures and facilities and reports on the
evaluation results with a clear focus on the electrical, thermal and interoperability
aspects of the tested MicroTCA equipment.
20
Diagnostic Use Case Examples in different form factors
(MTCA.4, ATCA, PXIe)
Stefan Simrock
ITER
Abstract ID: 41
ITER requires extensive diagnostics to meet the requirements for machine operation,
protection, plasma control and physics studies.
Most of the extremely complex ITER diagnostics systems are provided by the ITER
Domestic Agencies (DAs) and their partners. On their demand the IO has created
several diagnostics use case examples in different form factors (MTCA.4, ATCA,
PXIe) to enhance the understanding of diagnostics Plant System I and the
associated deliverables.
The use cases come complete with documentation and implementation, further
helping the DAs, their suppliers and diagnostic responsible officers to meet the ITER
diagnostics requirements.
In this paper, we present the current status and achievements in implementation and
documentation with focus on the MTCA.4 form factor.
Summary:
The currently implemented diagnostic use case examples are still under development
and testing. In the near term, the IO will add the high performance networks (DAN,
SDN, TCN) to neutronics and imaging diagnostic use cases (both in PXIe and
MTCA.4 form factor). In the following phase use cases for Thomson scattering /
microwave reflectometry and magnetics integrators will be added.
Experience with the MTCA.4 LLRF System at FLASH
Christian Schmidt
DESY
Abstract ID: 27
The Free Electron Laser in Hamburg (FLASH) provides ultra-short laser pulses down
to a wavelength of 4.2 nm. Precision regulation of the RF fields is done by a fast
digital LLRF system which has been recently upgraded to the MTCA.4 based
platform. Installations inside the acceleration tunnel require a stable and reliable
system due to a radiated environment and limited access. Installation routines and
platform related issues have been investigated to gain experience for the next larger
scale installation at the European XFEL. For the first time it has been shown that the
MTCA.4 based LLRF system is capable to run at a user facility for permanent
operation with outstanding performance.
21
MTCA.4-based LLRF system tests at ELBE
Igor Rotkowski 1 , Radosław Rybaniec 1,
Lukasz Butkowski 2, Christian Schmidt 2, Matthias Hoffmann 2
Michael Kuntzsch 3 (HZDR)
1-ISE, Warsaw University of Technology, 2-DESY, 3- HZDR
Abstract ID: 28
ELBE (Electron Linac for beams with high Brilliance and low Emittance) is a
multipurpose radiation source at HZDR (Helmholtz-Zentrum Dresden-Rossendorf).
LLRF system controls two normal conducting buncher cavities (one operating at 260
MHz and one at 1300 GHz), a super-conducting gun cavity and 4 super conducting
TESLA-type accelerating cavities. The existing analog feedback loop satisfies field
stability requirements, but lacks flexibility of a digital system.
At the beginning of November a MTCA.4-based single cavity regulation system
performance was evaluated. This paper describes system’s architecture, discusses
achieved results and possible future system developments.
22
New products
Improving Functional Density
Ian Shearer
VadaTech Ltd
Abstract ID: 9
Industry expects the capabilities and performance density of systems to improve over
time. This presentation will look at how new chassis and infrastructure elements
maximise the space available for payload, packing more capability into smaller
spaces.
Upgrade to 16 lane PCIexpress lanes in MTCA.4
Vollrath Dirksen
N.A.T. GmbH
Abstract ID: 18
This presentation shows a solution to overcome the bottleneck in the data path of the
main CPU (root complex), if all IO boards transfer their data via 4 lane PCIexpress
DMA. By default all AMC slots offer 4 lanes of PCIexpress transfers. By extending
the data path to the local CPU of the NAT-MCH-PHYS64 no modification in the
backplane of the MTCA.4 crates is needed to offer a 16 lane PCIexpress path to the
main processing CPU.
Summary:
MicroTCA.4 systems offer 4 lanes of PCIexpress to all 12 AMC slots. At the
beginning IO boards only used 1 lane of PCIexpress (2.5 GBaud) or maximum 4 lane
of PCIexpress (10 GBaud). At that time the main CPU (root complex) read the data.
By using FPGA in IO boards, the IO boards are able to write per DMA directly in the
main memory of CPU. This offers an increase of factor 3 compared to reading data
via CPU and frees up CPU performance for processing. To overcome the
bootleneck, if 12 IO boards DMA their data, the CPU boards offer PCIexpress Gen3
(32 GBaud) to increase data bandwidth. Benchmarks show, that this is no enough
data bandwidth. Therefore a solution offering 16 PCIexpress lanes (offering 128
GBaud) is requested.
In this presentation a solution will be shown, which can be used without any
modification in standard MicroTCA.4 systems. This solution is based on the NATMCHPHYS64 and the local CPU on the RTM of the MCH. Also the connection to
external PCs via PCIexpress x16 cable will be presented. With this two solutions
enough data bandwidth and processing power is available to process all data of high
speed IO boards.
23
Kontron product strategy
Andreas Geisler
Kontron
Abstract ID: 47
The philosophy of designing MTCA products.
Pentair / Schroff MTCA.4 products
Dietmar Mann
Schroff GmbH
Abstract ID: 25
Pentair/Schroff is one of the companies actively contributing in the development of
the PICMG MTCA.4 Standard. Since the last MTCA.4 workshop at DESY in
December 2012, Pentair/Schroff has upgraded its MTCA.4 product portfolio.
The presentation shows the range of Schroff products which comply with MTCA.4:
- 12 Slot MTCA.4 chassis with redundant Cooling Units in a push-pull configuration.
- 12 Slot MTCA.4 for LLRF applications.
- 7-Slot MTCA.4 chassis for laboratory use.
- 5-Slot MTCA.4 chassis with 2U chassis height and horizontal AMC Module
mounting.
- MTCA.4 accessories: Filler / Blocker /Slot Separation Modules
MTCA.4 hardware solutions
Aksel Saltuklar
ELMA
Abstract ID: 45
This talk will show hardware solutions for different demands in field ELMA as a hard
ware provider will show scalable products from 1U to 9U.
Different accessories will round up this presentation.
24
The SIS83xx MTCA.4 Digitizer AMC family and associated
RTMs
Matthias Kirsch
Struck Innovative Systeme GmbH
Abstract ID: 68
Struck is an early adopter of the MTCA.4 Standard. The well known 125 MSPS 16-bit
SIS8300 V2 and SIS8300-L Xilinx Virtex 5 and 6 based cards will be complemented
by the 250 MSPS 16-bit SIS8325 shortly. In parallel DESY's 10 channel DWC10
downconverter and the 8 channel downconverter one channel vector modulator
DWC8VM1 RTMs are license products for LLRF applications.
MTCA.4 Front End Processing
Thierry Wastiaux
Interface Concept
Abstract ID: 37
The best that the technology can provide in MTCA.4 Signal Processing.
Summary:
Last Digital Processing Technologies availlable:
• FPGAs by far the highest ratio processing power/consumption for parallel
computing
• Virtex-7 example
• FPGAs high speed transceivers
• ADCs
• Vita 57 used for high speed coders
• IC-FEP-TCAa Design in partnership with DESY :
• IC-FEP-TCAa/IC-ADC-FMCc presentation
• Reference Designs
25
1000W Low Noise MTCA.4 Power Supply
Thomas Berner
WIENER Plein + Baus GmbH
Abstract ID: 59
The high power and low noise MTCA.4 power supply made by WIENER Plein &
Baus GmbH in Germany features 1000W of total DC output power and further
reduced noise & ripple figures. The latest version of this unit includes improved
functions for setup and maintenance.
Summary:
Presentation of the new WIENER 1000W MTCA.4 Power Supply.
Presentation of high-voltage modules in MTCA.4 standard at
CAEN els
Simone Farina, Denis Moralo, Enrico Braidotti
CAEN ELS d.o.o.
Abstract ID: 50
Presentation of a new multi-channel High-Voltage power supply module in
AMC.0 rev2 format for MTCA.4 rev1 or MTCA.0 rev1 systems.
26
New MTCA.4 products from IOxOS Technologies SA
Joel Bovier
IOxOS Technologies SA
Abstract ID: 24
IOxOS Technologies SA introduces a new MTCA.4 product line based on its most
powerful
VME64x platform, the IFC_1210 FMC/XMC Intelligent FPGA Controller, and a
comprehensive family of ADC mezzanines in FMC form factor, already deployed on
particle accelerator control systems in some of the most reputed institutes of Physics.
The new MTCA.4 product line features VITA 57.1 FMC High Pin Count (HPC)
carriers powered by Virtex-6T FPGA devices and optimized development kits,
ensuring total compatibility with its successful and widely deployed VME64x
counterpart.
The following two boards are the cornerstone of the new MTCA.4 product line:
(1) The MTCA.4 IFC_1410, a Single Board Computer which leverages a
Freescale QorIQ P2020 running Linux with RT extension or VxWorks,
combined with a Xilinx Virtex-6T FPGA connected to a local PCIe GEN2
infrastructure. A PCIe GEN2 Switch –with configurable port operation modes
(UPstream, DOWNstream, Non-transparent, Partition) manages the
interconnection of on-board PCIe resources and peripherals, together with the
attachment to the two AMC PCIe ports. The Virtex-6T FPGA, connected to
the local PCIe infra-structure, controls one VITA 57.1 FMC slot. All MTCA.4
specific features are fully integrated on-board. An XMC mezzanine can be
optionally plugged instead of the FMC, enhancing the interconnect capability
of the solution.
(2) The MTCA.4 RTM_1411, a dual VITA 57.1 FMC carrier featuring a Xilinx
Virtex-6T FPGA -connected to the local PCIe infrastructure through the RTM
connector- to control both FMC HPC slots.
To overcome the challenge of the Virtex-6T FPGA programming, the IFC_1410 and
the RTM_1411 are delivered with the TOSCA II FPGA Design Kit solution, a
comprehensive FPGA design environment which provides full visibility and facilitates
the integration of the user application within a PCIe GEN2 switch centric architecture.
This approach makes possible the implementation of a complete Network on Chip
(NoC) solution which includes PCIe EP, four dedicated DDR3 Memory Controllers
with built-in DMA capabilities and programmable QoS for local data buffering
(enabling a sustained bandwidth of 4 x 1.6 GBytes/s), and fully customizable
embedded user areas tightly coupled with these resources. TOSCA II also includes
reference designs, Bus Functional Models (BFM) for simulation purposes and full
access to VHDL source code.
The MTCA.4 product line is enhanced with the ADC_311x series, a comprehensive
family of ADC mezzanines in FMC form factor providing high-performance data
acquisition capabilities including:
• ADC_3110: Eight channels ADC 16-bit 250 Msps, AC/DC coupled
• ADC_3111: Dual channels DAC 16-bit 500 Msps and Dual channels ADC 16bit 250 Msps
• ADC_3112: Quad channels ADC 12-bit 1 Gsps, DC differential coupled
27
Summary:
IOxOS Technologies SA introduces a new MTCA.4 product line based on its most
powerful VME64x platform, the IFC_1210 FMC/XMC Intelligent FPGA Controller, and
a comprehensive family of ADC mezzanines in FMC form factor, already deployed on
particle accelerator control systems in some of the most reputed institutes of Physics.
28
Beyond 10 Gbps with MTCA.4
Dariusz Makowski
Lodz University of Technology, DMCS
Abstract ID: 19
Digital systems used in high speed telecommunication applications, complex data
acquisition or control systems of modern Physics transmit enormous amount of data.
Every day people break the limits introducing new hardware, standards and protocols
allowing transmission of data with higher throughput.
The MTCA.4 hardware was successfully verified with protocols sending data via a
single channel with throughput up to 6.25 Gbps. However, there is still open
questions if the standard is ready for protocols beyond 10 Gbps.
In this talk we will present a Kintex 7-based, high-speed data processing module,
developed within HVF-0016, capable of sending data with total throughput above 280
Gbps. The first results of data transmission measurement for various MTCA.4
backplanes will be presented.
High speed interface simulation using the new 3D layout
HFSS interface
Simon Muff
Ansys Germany GmbH
Abstract ID: 4
A new 3D Layout interface and meshing technology for the industry standard high
frequency structure simulator is shown on example of a PCIe interface, enabling fast
and parameterized simulation of physical layer structures as well as their
optimization. Statistical methods for data eye calculation and the usage of IBIS AMI
and spice models are shown, as well as coupling to thermal and computational fluid
dynamics simulations.
Summary:
Simulation capabilities, methods and design flows are shown for high accurate
assessment of HSIO interfaces. A new interface for electronic CAD data for a 3D full
wave EM field solver (HFSS) is shown, offering new possibilities in parameterization
and data transfer and by a new mesher enabling full wave solutions for problems or
larger scale.
29
New 32 Channel ADC design
Niels Koll
TEWS Technologies
Abstract ID: 69
This talk describes an MTCA.4 compliant AMC and μRTM for high channel count
analog to digital conversion applications, developed within HVF.
The AMC provides 32 ADCs with 12 or 14 Bit resolution. Depending on the ADC
used, sample rates up to 20 Msps are possible.
A powerful clock distribution allows the use of backplane-distributed or on-board
generated clocks as ADC sample clock.
A Kintex-7 FPGA provides the ability to transfer ADC data via x4 PCI-Express Gen 2.
In addition, on-board DDR3 memory allows to store ADC data for subsequent
readout.
The ADCs analog inputs connect to a μRTM via Zone 3 with a pin assignment
according to Class A1.2.
Signal conditioning and analog input connectors are located on the μRTM, allowing
easy adaption to different user requirements.
MTCA.4 RF-Backplane Option : Features and Management
Krzysztof Czuba
ISE, Warsaw University of Technology
Abstract ID: 33
Recently developed RF Backplane (uRFB) option for MTCA.4 crates allows for
significant extension of crate capabilities. The backplane was developed to distribute
low noise RF signals and high-precision, low-jitter clock signals to RTM cards. The
hot-swap feature for RF signals allows the MTCA.4 crate users to build system with
multi-channel analog signal processing without many coaxial RF cables connected to
front panels of RTM cards. This improves system management, allows for cost
reduction and simplifies system maintenance. The uRFB also offers possibility to
supply RTM cards with managed, bipolar, high-performance (analog) power from two
rear power modules independent from the noisy, digital AMC ones. Finally, uRFB
concept defines extended RTM (eRTM) cards in the volume behind front power
supplies and MCH cards not used by the standard MTCA.4 crate. Developed eRTM
cards offer additional space that can be used for applications requiring more space
than is available on uRTM cards.
This contribution describes the RF Backplane concept, management idea and
performance measurement results.
30
High speed AMC Digitizer and RTM based application
modules
Samer Bou Habib
ISE, Warsaw University of Technology
Abstract ID: 36
This contribution describes the design of an Advanced Mezzanine Card (AMC) in the
MTCA.4 standard suited for direct analog-to-digital conversion of high-frequency
signals up to 2.7 GHz with a maximum ADC clock frequency of 800 MHz. Signal
conversion is performed using the undersampling technique. This card was
designed for the needs of the LLRF and other control and measurement systems of
the FLASH and XFEL accelerators.
The AMC is compliant with the A1.1 Analog class for MTCA.4 AMCs. The designed
module consists of eight very-high-speed ADC channels, four high-speed and
precision DAC channels, a powerful FPGA unit, fast SRAM memory, along with
special power supply and diagnostic circuits. The AMC digitizer work in pair with
various project-specific Rear Transition Modules (RTMs).
This paper describes details and parameters of the digitizer AMC and the specialized
RTMs, as well as performance and usage of direct sampling of high frequency
signals.
High-Speed AMC to PC bridge
Manoel Barros Marin
CERN
Abstract ID: 65
The AMC Bridge (AB) is a small form factor multipurpose interface board targeted to
users of Advanced Mezzanine Cards (AMCs) that has been designed at CERN by
PH/ESE group. Its intended use is to enhance the stand-alone capabilities of the
AMCs by exploiting some features only accessible through the AMC connector thus
forming a compact bench-top system ideal for development and test purposes.
Besides delivering power to the hosted AMC,
the AB provides external access to two differential input/output clock lines and ten
high-speed serial lanes divided in three groups: two lanes featuring respective Small
Form-factor Pluggable Plus (SFP+) sockets, four lanes sharing one Quad Small
Form-factor Pluggable Plus (QSFP+) socket and four PCIe Gen2 (Gen3 upgradable)
dedicated lanes sharing one iPass socket.
31
Middleware Technologies: The Software Bridge into the
Industry
Robert Schachner
RST Industrie Automation.GmbH
Abstract ID: 58
MTCA.4 is an interesting technological approach that is well suited to usage in
sophisticated control systems for automation, medical technology and testing.
However, for this approach to be successful users need access to appropriate
software technologies.
Summary:
MTCA.4 is not a mass product. The initial hurdles that come with a specific I/O
implementation and the related tools are too high for most end customers. For a
hardware platform to be successful nowadays, the related software overhead has to
stay reasonable.
Middleware based platforms make a substantial contribution to solving this problem.
Development tools that attach to a middleware interface are independent of the
underlying hardware, meaning they are developed for far larger markets than
hardware specific tools.
The Gamma middleware platform specifically offers a host of tools and interfaces that
already completely cover the field of use described above. Beyond that, there are
also numerous partner companies in the trade association Embedded4You e.V. who
are actively deploying and utilizing the Gamma platform in the various markets
mentioned above.
The presentation shows how the middleware platform integrates with MTCA.4 and
introduces possible implementation methods. Besides tools, the talk will also show
how already existing I/O plug-ins can be applied to MTCA.4 based systems.
32
From MicroTCA to ATCA. Scalability issues for data
acquisition systems
Friedrich Fix, Wojciech Jalmuzna
Eicsys Embedded Integrated Control Systems
Abstract ID: 13
During hardware work on data acquisition systems, eicSys has evaluated several
form factors and mezzanine standards. First of the most important requirements
defined by customers is a system scalability from several analog channels up to
thousands.
Second one, very important for some customers, is reliability; therefore, ATCA and
MicroTCA standards has been selected for further development.
The decision has been made to use a carrier-mezzanine approach, since it provides
great flexibility in terms of board compatibility, upgrade costs and software
compatibility. After investigations a custom mezzanine board and its interface has
been defined and two types of carrier boards have been designed: ATCA blade and
MTCA.4.
The mezzanines are custom driven boards with different requirements such as
number of channels, sampling frequency for ADCs, special filtering of input signals
and so on. The ADC mezzanine with 24 channels and special filtering features has
been designed for detectors readout. Another types of ADC mezzanine boards with
20 and 40 channels (different precision and ADC sampling frequency) have been
designed for a control and diagnostic system required by fusion energy experiments.
A modular approach together with the development of 1U MTCA.4 chassis and
enhanced for a high precision instrumentation ATCA backplane gives possibility to
build scalable systems from a few analog channels (1U chassis) up to several
hundreds analog channels (ATCA 14-slot crates) using the same type of mezzanine
module.
Different platform (ATCA and MTCA.4) offers diversified processing power and
reliability level. Functionality of MTCA.4 based system might be extended with
DAMC-FMC20 MTCA.4 carrier and any available on the market FMC board. It gives
a wide range of possibilities for system design.
33
Applications in research facilities
XFEL Machine Protection System (MPS) Based on MicroTCA
Sven Karstensen, Martin Staack, Juergen M. Jaeger,
Maria-Elena Castro-Carballo
DESY
Abstract ID: 12
The European X-Ray Free Electron Laser (XFEL) linear accelerator will provide an
electron beam with energies of up to 17.5 GeV and will use it to generate extremely
brilliant pulses of spatially coherent xrays. With a designated average beam power of
up to 600 kW and beam spot sizes down to few micrometers, the machine will hold a
serious damage potential.
To ensure safe operation of the accelerator it is necessary to detect dangerous
situations by closely monitoring beam losses and the status of critical components.
This is the task of the MicroTCA based machine protection system (MPS).
Many design features of the system have been influenced by experience from
existing facilities, particularly the Free Electron Laser in Hamburg (FLASH), which is
a kind of 1:10 prototype for the XFEL. A high flexibility of the MPS is essential to
guarantee a minimum downtime of the accelerator. The MPS is embedded in the
DOOCS control system.
A general MTCA.4-based laser to RF synchronization system
Uros Mavric
DESY
Abstract ID: 54
The first MTCA.4 based laser synchronization system is presented.
We use a standard MTCA.4 crate where a high frequency RF front-end detector
feeds a fast digitizer AMC board. The processing is carried out in the FPGA located
on the digitizer which transmits the control output over a serial link routed on the
standard AMC backplane to a receiver FPGA located on a neighboring AMC board.
The hosting FPGA on this board transmits the control signal to the DACs on the RTM
side which is composed of high voltage piezo pre-amplifiers and high-voltage piezo
drivers. The piezo driver acts on the piezo stretcher of the Er-fibre laser which
controls the frequency of the laser resonator. Such solution opens many possibilities
for processing algorithms and connectivity with other system. Some of the main
limitations and their mitigatios are presented.
34
MicroTCA @ CMS
Ulf Behrens
DESY
Abstract ID: 26
The CMS experiment at the LHC at CERN has decided to upgrade their readout
hardware at a large scale from VME to MicroTCA. In this talk major parts of the
upgrade will be introduced. As a typical use case in the HEP environment the
migration from VME to MTCA.0 will be discussed for a readout crate of a sub
detector. The AMC boards developed by the collaboration will be introduced with a
focus on the AMC13 board.
This board is placed in the second MCH slot and exploits the connectivity in this slot
and is the central part of all the main CMS MTCA upgrade projects.
Intra-pulse RF feedbacks for normal conducting cavities with
femto-second Precision
Matthias Hoffmann
DESY
Abstract ID: 22
In this contribution, we will present first results of single cavity RF control based on
MTCA.4 at REGAE. With the new system design we reduce the system latency down
to 600ns, with still room for improvement. This new latency reduced design, allows us
to implement an intra-pulse RF feedback for the normal conducting RF Gun at
REGAE. The inloop RMS pulse to pulse jitter were reduced below 30fs.
35
Open hardware / open software MTCA.4-based beam position
measurement system
Grzegorz Kasprowicz
Warsaw University of Technology / Creotech Instruments SA
Abstract ID: 32
The Brazilian Synchrotron Light Laboratory (LNLS) is developing a BPM and orbit
feedback system for Sirius, the new low emmitance synchrotron light source under
construction in Brazil. In that context, 5 open-source boards and accompanying
lowlevel firmware / software were developed in cooperation with the Warsaw
University of Technology (WUT) and Creotech Instruments SA to serve as hardware
platform for the BPM data acquisition and digital signal processing platform as well
as orbit feedback data distributor.
The experience of integrating the system prototype in a COTS MicroTCA.4 crate will
be reported as well as the planned developments.
MicroTCA for the Optical Synchronization Systems at XFEL
and FLASH
Matthias Felber
DESY
Abstract ID: 49
The optical synchronization system which is responsible for providing a femtosecond
stable timing reference for beam diagnostics, laser synchronization, and the LLRF
control at Flash and the European XFEL will use MicroTCA hardware for signal
detection, feedback control, and actuator driving. For these purposes some special
and some general purpose modules (AMC, RTM, FMC) have been developed.
This talk gives a brief introduction to the system and the planned topology of the
MicroTCA hardware.
36
ATCA/ MicroTCA based Compute Nodes in the Belle II Pixel
Detector DAQ
Bjoern Spruck
University Giessen
Abstract ID: 55
In this talk we present the application of the MicroTCA based Compute Node in the
Belle II experiment at KEK, Japan. The system comprise an ATCA carrier board and
AMC board design based on Virtex-4 FX60 and Virtex-5 FX70T FPGAs. It is
designed to perform data acquisition of 22 GB/s and data reduction by a factor <10 at
the Belle II pixel detector. The firmware programming comprises buffer management
with pointer lookup tables, DDR2 memory access using NPI (native port interface),
optical link data transfer using GTX transceivers and Aurora 8B/10B, SERDES links
and custom UDP and TCP/IP interfaces. A parallel region-of-interest (ROI) algorithm
performs data reduction of the PXD data based upon charged track extrapolation
from the high level trigger and silicon strip vertex detector, arriving with a large
latency and out of order.
First test of the full DAQ readout chain with a scaled down system, using a
MicroTCA shelf instead of the carrier boards, have been performed recently at DESY
as preparation for a beam test in January 2014.
Femtosecond bunch arrival time monitoring with precision
FMC-ADC modules
Jaroslaw Szewinski 2, Stefan Korolczuk 2, Samer Bou Habib 1,
Grzegorz Boltruczyk 2, Jaroslaw Dobosz 1
1-ISE, WUT, 2- NCBJ
Abstract ID: 34
Bunch Arrival time Monitor (BAM) is an electro-optical device used at FLASH
accelerator in DESY for the high precision, femtosecond scale, measurements of the
moment when electron bunch arrives at the reference point in the machine. The
arrival time is proportional to the average bunch energy, and is used to calculate the
amplitude correction for RF field control. New MTCA.4 devices, dual FMC carrier and
specialized ADC FMC module, has been used to upgrade VME based BAM readout
electronics.
In this talk new MicroTCA devices and the first measurement results will be
presented and compared with old VME system.
37
Control and Data Acquisition of the Wendelstein 7-X
Experiment
Andreas Werner, Torsten Bluhm, Manfred Zilker
MPI f. Plasmaphysik
Abstract ID: 42
Wendelstein 7-X is a nuclear fusion experiment based on magnetically confined
plasmas. Since nuclear fusion has the potential to be a long term primary energy
source, Wendelstein 7-X investigates the reactor capabilities of an advanced
stellarator. In contrast to its predecessor, Wendelstein 7-X is equipped with
superconducting magnets for enabling steady state plasma operation and access to
data acquisition system is quite often restricted. Therefore, the remote monitoring
and configuration features and the compactness of MicroTCA based data acquisition
systems are of great advantage for the experiment operation.
Image Acquisition and Processing with MTCA.4
Piotr Perek , Mariusz Orlikowski, Dariusz Makowski,
Aleksander Mielczarek
Lodz University of Technology, DMCS
Abstract ID: 53
A wide variety of methods employed in diagnostic systems of large-scale physics
experiments is based on data from visible and infrared light cameras. Observation of
rapid physical processes requires the application of high-speed cameras, therefore
the imaging systems should support high-performance image acquisition and
processing. The systems should be also easily scalable and should allow the
synchronization of a few cameras with each other and with other sensors.
The presentation will show MicroTCA -based system dedicated for data acquisition
from ultrafast high-resolution cameras with Camera Link interface. The system
supports data transfer with throughput up to 6.3 Gbit/s for single camera. Thanks to
the modular structure of MTCA.4 architecture the system is scalable and can handle
multiple cameras. The ability of connecting multiple cameras to single MicroTCA
chassis greatly facilitates their synchronization as well as data acquisition and
processing. Software developed for the system ensures primarily data acquisition
and cameras control and monitoring. Moreover, it allows images recording and offline
analysis. It also implements a set of basic algorithms for image processing.
38
Design of a Stripline BPM System on MicroTCA.4
Andrew Young, Chengcheng Xu, Jeff Olsen,
Till Straumann, Sonya Hoobler, Ray Larsen
SLAC
Abstract ID: 38
SLAC National Accelerator Laboratory is a premier photon science laboratory. SLAC
has a Free Electron Laser facility that will produce 0.5 to 77 Angstroms x-rays and a
synchrotron light source facility. In order to achieve this high level of performance,
the beam position measurement system needs to be accurate so the electron beam
bunch can be stable. We have designed a general purpose stripline Beam Position
Monitor (BPM) system that has a dynamic range of 10pC to 1nC bunch charge. The
BPM system uses the MicroTCA (Micro Telecommunication Computing Architecture)
for physics platform that consists of a 16-bit ADC module (SIS8300 from Struck) that
uses the Zone 3 A1.x classification for the Rear Transition Module (RTM). This
paper will discuss the RTM design, architecture, and performance measurements of
this system using the SLAC LINAC. The RTM architecture includes a bandpass filter
at 300MHz with 15 MHz bandwidth, and an automated BPM calibration process. The
RTM communicates with the AMC FPGA using a QSPI interface over the zone 3
connection. The system is also going to be used at the Pohang Accelerator
Laboratory with the newly designed XFEL facility.
Work supported by U.S. Department of Energy under Contract
Numbers DE-AC02-06CH11357, DE-AC02-76SF00515, and WFOA13-197
Low-latency 1D image detector realized as an AMC module
Aleksander Mielczarek
Lodz University of Technology
Abstract ID: 21
XFEL and FLASH machines use magnetic chicanes for compressing the electron
bunches and hence obtaining higher beam peak current.
To monitor the operation of the bunch compressors the spatial charge profile should
be evaluated. As the bunch is traveling through the beam pipe with relativistic speed
it is a very hard task to measure its parameters. One of the methods to do so is by
setting an electro-optic crystal near the beam trajectory and analysing femtosecond
laser pulses passing thorough the crystal.
The presentation will cover design, debugging and evaluation
of low-latency 1D image acquisition system realized in the MicroTCA. The talk will
provide information on the experimental setup, dedicated readout circuits, die to PCB
bonding and other interesting design challenges.
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Applications in industry
Novel Applications of MicroTCA
Ian Shearer
VadaTech Ltd
Abstract ID: 10
MicroTCA is a powerful architecture that provides benefits over competing solutions
in size, price/performance and platform robustness, but is often overlooked when it
is viewed as a cut-down version of AdvancedTCA. This paper looks at some specific
applications where MicroTCA has been applied, across market segments, to solve
particular customer problems.
MicroTCA application in the industry
Aksel Saltuklar
ELMA
Abstract ID: 46
From the idea to the real product; how to implement MicroTCA in the printing
industry.
This talk contains how the VME based old hardware was changed to the new
MicroTCA based philosophy. From the thermal challenges to the performance
challenges of the CPUs, a long way through the engineering will be shown in this
presentation.
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MicroTCA based universal Satellite Testbed
Thomas Holzapfel
powerBridge Computer
Abstract ID: 15
The presentation will explain a real existing user application. It will describe the
applicationenvironment, as well as the reason for the customer decision. In the
presentation the pros and cons of the existing solution will be explained and
compared against the new system. It will showcase also some aspects with regards
to system integration and possible pitfalls due to backplane topology.
Creotech and Open Hardware experiences
Grzegorz Kasprowicz
Creotech Instruments SA
Abstract ID: 30
Creotech Instruments SA is producer and integrator of complex, custom
measurement and control systems for industry, science and (recently) space
applications.
We believe that Open Hardware is great opportunity for industry and science,
especially in applications that require long-term support and non-typical solutions.
Our business model in high-tech segment is based on open hardware and open
software approach since it lowers the development cost and gives direct access to
the scientific community.
OHWR site is also great place to advertise the company activity and new products.
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Interoperability - further developments
Preliminary Functional Tests of the DRTM-LOG1300 Assembly
Tony Rohlev 1, Uros Mavric 2
1-TSR Engineering, 2-DESY
Abstract ID: 56
The DRTM-LOG1300 (uLOG) is a MTCA.4 compliant multi-channel local oscillator
generator and high frequency signal and clock fan-out module. The module provides
the
fanout for 9 high frequency reference, 9 local oscillator and 9 calibration signals
in the range from 400MHz to 6GHz. In addition, the module provides 22 configurable
low jitter differential clock signals in the range up to 160MHz for high-precision ADC
sampling applications. The uLOG assembly consists of two boards, the uLOG-RF
that generates the CAL, and LO signals from the input REF, and the uLOG-Carrier
that distributes these signals, as well as a Clock to the custom RF back-plane. Both
boards have been manufactured and tested, as an assembly, for noise and RF
characteristics. This data, as well as the final mechanical design, is presented.
MMC V1.0 - DESY Starter Kit for MTCA.4 Module Management
Michael Fenner 1, Dariusz Makowski 2, Jaroslaw Szewinski 3
1-DESY, 2- DMCS, 3 - NCBJ
Abstract ID: 16
The talk will present the MMC V1.0 software framework for management of MCTA.4
cards.
This framework is a "drop-in" module that can be used to implement management of
MTCA.4 cards in a very short time.
To allow fast development, DESY also created a hardware reference Platform "MMC
V1.0 Starter Kit " that will be presented in the talk. The kit contains an example
design for an AMC and a RTM board and can be used without modifications in
custom hardware due to availability of source code and schematics.
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EMI test board
Tomasz Owczarek
ISE PW
Abstract ID: 35
The AMC-EMI test board is an AMC board aimed to investige and qualifiy the EMI
perturbances (conductive coupling mode) in MTCA system. The board allows for:
measurement of power supply voltages at AMC connector (3.3V_MP, 12V_PP),
measurement of low voltage drops caused by currents flowing through ground planes
of PCBs or through the crate, introduction of distortion to the AMC-EMI board or
other boards in MTCA crate, measurement of influence of the introduced distortions
to measurement errors depending on the location and coupling mode of sensing
amplifiers, measurement of influence of the introduced distortions to neighbouring
boards and also measurement of vibrations of the AMC board. The presentation
explains the functions of the board and shows possible measurement scenarios.
Ratified ZONE 3 classes to achieve enhanced AMC-RTM
modularity
Frank Ludwig
DESY
Abstract ID: 39
To enhance the compatibility and modularity of AMC and RTM boards, more and
more board manufacturers follow the ratified ZOME3 classes for analog or digital
applications. Here, we present the zone description, electrical specification,
protection sequence and give design examples for application engineers.
Future classes will be discussed.
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EMI compliant design of MTCA.4 modules
Heinz-Hartmut Ibowski, Rudi Ganss
brightONE ES GmbH
Abstract ID: 43
The MTCA.4 architecture is specially designed to fulfil the demands of scientific
instrumentation with of-the-shelf modules. The use of MTCA.4 in accelerator control
is exemplary for applications where there is a mix of highly sensitive analog signals
and fast switching digital data. Minimizing the noise floor results in restrictions for the
EMI design of the board. The direct coupling of signals and - even more important the coupling via the power/ground system of the board must be avoided.
The complexity of the board design makes it difficult to directly control the coupling
paths. The only way to an EMI compliant design is the use of design rules comprising
layer stack-up, routing of signals and decoupling of components. Special attention
has to be paid to the layout of the reference planes.
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Software for MTCA.4
Driver and Software for MTCA.4
Martin Killenberg
DESY
Abstract ID: 7
The DESY MTCA.4 User tool kit (MTCA4U) provides drivers, and a C++ API for
accessing the MTCA devices and interfacing to the control system.
The PICe driver is universal for basic access to all devices developed at DESY.
Modularity and extendability allow to generate device-specific drivers with a minimum
of code, inheriting the functionality of the base driver. A C++ API allows convenient
access to all device registers by name, using mapping information which is
automatically generated when building the firmware. A graphical user interface allows
direct read and write to the device, including plotting functionality for recorded raw
data. Higher level applications will provide callback functions for easy integration into
control systems, while keeping the application code independent from the actual
control system in use.
We introduce the design concept and report on the status and plans for MTCA4U.
MTCA.4 developments for the ESS
Marko Mehle
Cosylab
Abstract ID: 17
The European Spallation Source is one of the largest science and technology
infrastructure projects being built today. This presentation aims to provide an
overview of two MTCA.4-based developments done at ESS: Timing System and
Beam Current Monitor (BCM).
The ESS Timing system is based on the Micro Research Finland (MRF) platform and
is implemented in compact PCI and uTCA.4 form factors. A uTCA.4 timing receiver
prototype was developed and integrated into the EPICS control system using the
MRF EVR PMC and TEWS TAMC260 PMC carrier card. The uTCA.4 timing receiver
will make use of the LVDS trigger lines in the backplane to deliver triggers to other
cards.
The Beam Current Monitor is based on the Struck SIS8300 fast digitizer.
First version of the BCM included development of EPICS support for the SIS8300
digitizer and data processing in software. Custom SIS8300 firmware is under
development to process data in hardware, which will enable fast detection of beam
losses through differential current measurements.
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PCIe Device Drivers Common Interface
Ludwig Petrosyan
DESY
Abstract ID: 6
PCI Express is gradually gaining momentum in becoming a new industry standard for
many chipset manufacturers and developers. The PCI standard is currently the most
widely used architecture. However, recent industry trends indicate chipset
manufacturers will also be utilizing the more afficient PCI Express chipsets in future
designs, alongside the existing PCI chipset.
The MicroTCA as well as the majority of architectures today use the PCI Express bus
as a central bus of data transmissions. In order to take full advantage of PCI Express'
enhanced features, more robust device drivers are required. A device driver contains
all the device-specific code necessary to communicate with a device. This code
includes a standard set of interfaces to the rest of the system. This interface shields
the kernel from device specifics just as the system call interface protects application
programs from platform specifics.
Application programs and the rest of the kernel need little, if any, device-specific
code to address the device. In this way, device drivers make the system more
portable and easier to maintain. But new devices demand new drivers and over time
with increasing in number of drivers, their support is at a loss. On the other side the
drivers from different producers have different API that leads to certain difficulties at
the level of the user programming.
However the basic functionality of the PCI Express device does not depend on
device type and could be common for all drivers. The Linux Device Driver Model
allows modules stacking, that basically means one module can use the symbols
defined in other modules. Using the stacking and independence of the basic
functionality of the PCI Express device allows us to split PCI Express device driver
into multiple parts.
The driver for current device will use PCI Express driver common part provided by
the top level driver. The top level module provides all common structures and
functions for PCI Express communication. Such flexibility will facilitate the tasks of
creation and supporting of the device drivers, on the other hand it will lead to the
principle ”write for one use for all” at the level of user programming.
Our experience of creating and using stacked PCI Express device drivers will be
presented.
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MicroTCA Module Management Controller Software
Peter Kaemmerling, Matthias Drochner, Harald Kleines, Stefan Van Waasen,
Michael Ramm, Axel Ackens
Forschungszentrum Jülich, ZEA-2
Abstract ID: 23
The Module Management Controller of a MicroTCA -card negotiates with the Carrier
Management Controller and the Shelf Management Controller. It handles hardware
signals, power load, diagnosis, receives commands. We designed a MicroTCA -card
and used a PIC32MX460 for the MMC to develop the MMC software.
Considerations for the real-time performance issues in
linux/MicroTCA
Kukhee Kim
SLAC National Accelerator Laboratory
Abstract ID: 52
The MicroTCA platform has been selected for usage as the base platform for SLAC
control systems for future designs and upgrades - along with embedded linux as the
software platform. We have evaluated the MicroTCA and linux platform for usage in
our timing, low-level RF, and BPM systems. We have found that the new platform
brings challenges in interrupt handling, and scatter DMA.
Despite migration of much of the hard real-time functionality to the FPGA firmware
level, the interrupt handling and its real-time performance are important factors for
our control system as the software layer needs to deterministically process time
critical functions driven by each interrupt. Linux has a long processing chain for the
interrupt from the kernel to user space driver, and it also provides various methods of
providing the interrupt notice to the user driver: signal and ioctl() with device file.
Each method provides different performance. We are going to describe our
experience for interrupt handling with regard to real-time performance.
In some cases DMA is also needed for applications which use fast digitizers. We
have used traditional DMA for the real-time world previously, because most real-time
OS(s) are based on a flat memory model. However, for linux based systems, it is not
a flat memory model and we are not so lucky. We intend to use a scatter DMA
engine for achieving real-time performance under linux. We have chosen the
SIS8300 module from Struck for our low-level RF system and BPMs. The firmware
from Struck did not support the scatter DMA, thus we had to allocate linear memory
space in the kernel space for the DMA, and needed to implement a bounce buffer to
copy the DMA data to the user space. This led to a lag in real-time performance.
Thus, we had to implement a scatter DMA technique to avoid the bounce buffer and
to allocate the DMA buffer directly into the user space. During the firmware upgrade,
we learned that the following steps: configuring the DMA engine, re-arming the DMA
and waiting for interrupt should be an atomic operation.
In this presentation we are going to discuss the details of our software experience
with interrupt handling, and scatter DMA using the MicroTCA and linux platform.
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Overview and Status of the MicroTCA for Physics Standards
Effort
Stefan Simrock 1, Augustus Lowell 2
1-ITER, 2- Triple Ring Technologies
Abstract ID: 44
The effort to develop extensions to the MicroTCA standards in support of physics
applications has had mixed results.
Extensions to the hardware standards to define common I/O interfaces and analog
signal distribution paths have defined and approved, with commercial hardware
conforming to the new standards already available for purchase. Extensions to the
hardware standards to provide for distribution of clocks, triggers, and interlocks are
well-advanced. Both efforts have been bolstered by enthusiastic support from both a
variety of lab users and a variety of hardware vendors.
Extensions to software practices and standards, however, have been stymied by a
relative dearth of support from lab users and by the self-limiting of industry
participation largely to the role of observer. One guideline, for a common device
access framework, has been drafted and a first-pass reference implementation has
been created; however, further progress has been halted due to a lack of
applicationoriented test and review. A draft guideline for a standard process model
has been half-completed, but completion and prototyping are on hold pending
availability of a willing author/implementer with EPICS expertise. Other guidelines
and prototypes have also stalled for lack of authors and implementers.
The Software and Protocols committee is issuing a plea for lab participation in the
software standards effort.
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