SMM Imaging of Dopant Structures
of Semiconductor Devices
Application Note
Shijie Wu and Theresa Hopson
Scanning Microwave Microscope
(SMM) has been engineered to
leverage the outstanding accuracy and
flexibility of a vector network analyzer
(VNA) for impedance measurement,
particularly for quantitative capacitance
measurement on a dielectric sample.
Furthermore, it can be engineered to
measure differential capacitance
(dC/dV) by applying a low-frequency
(RF) modulation signal to the microwave
(MW) measuring signal1-3. The device
for dC/dV measurement is called the
dopant profile measurement module
(DPMM) that can be attached to Agilent
VNA instruments. The SMM system
from Agilent consists of a standard AFM
unit and a VNA unit [the performance
network analyzers (PNA) series]. It also
includes a DPMM module and a lock-in
amplifier for dC/dV measurement. The
components of a typical SMM system
are schematically illustrated in Figure 1.
It can be used to perform capacitance
and dC/dV imaging simultaneously.
The MW signal from the VNA is divided
into two parts within the DPMM. The
first part is amplified and used as the
local oscillator signal (LO) for the dC/dV
mixer. The second part is amplified
and sent through the main arm of the
coupler to the AFM probe tip, where a
RF signal is also applied to the tip from
an external source, e.g., a function
generator such as that of the MAC
Mode III controller on the Agilent AFM.
Due to changes in the capacitance of
the sample induced by the RF signal, the
MW signal is reflected and modulated
at a rate equal to the RF frequency. The
reflected, modulated MW signal is then
divided into two parts as well. The first
signal is amplified and directed to the
DPMM internal mixer, where it is mixed
AC+ DC
Bias
Z-Servo
Lock-in
DPMM
dC/dV
Amp, Phase
X, Y
Components
x yz
Half
Wavelength
Resonator
VNA
S11
Amp, Phase
X, Y
Sample Bias
Figure 1. A simple block diagram of the SMM configuration for capacitance and dopant measurement.
with the LO signal and demodulated.
This demodulated signal is further
processed using a lock-in amplifier for
dC/dV amplitude and phase signal. The
second part of the reflected MV signal
is amplified and delivered to the VNA
receiver, and is used to measure the
capacitance of the sample.
In the case of semiconductor devices,
the mobile charge carrier in the doped
region can either accumulate or deplete
in the vicinity of a contact electrode
depending on the DC bias applied4,5. By
applying an AC voltage, Vac, around a
fixed working potential, Vdc, a change
of capacitance dC in response to
the modulation voltage Vac will be
introduced, as illustrated in Figure 2.
Vdc is usually chosen at that point where
the C-V curve has the largest slope,
which is around the flatband voltage.
In this way, maximum sensitivity is
achieved. Under these conditions, a
higher dC/dV value corresponds to low
carrier concentrations, while a lower
dC/dV value corresponds to higher
carrier concentrations. It is also clear
that for both p- and n-type Si, dC/dV
is the same in magnitude but of
opposite sign (positive for p-type,
negative for n-type) for identical
carrier concentrations. Therefore, the
modulation index of the reflected MW
signal, i.e., the magnitude and phase
of the modulated signal measured
by SMM can be used to characterize
the structure and type of dopant in
semiconductor devices.
Figure 2. Capacitance vs voltage plot for n-doped (blue) and p-doped (red) semiconductors. For the
same ac modulation signal applied, the change in capacitance is larger for lower doping density
(solid line) and smaller for higher doping density (dashed line). For p and n-doped samples they are
identical in amplitude, but opposite in phase.
NMOS
PMOS
P_ Well
P+ Buried Layer
N_Well
N+ Buried Layer
NPN
N_Well
N+ Buried Layer
P_ Substrate
Figure 3. A cross-sectional view of the BiCMOS silicon IC sample which has been delayered to
reveal the doped regions within the active devices. The IC process stack includes a lightly doped
p-substrate with an epitaxial layer approximately 3.0 µm thick. Highly doped N+ and P+ buried layers
are positioned at the interface. Shallow doping of various impurities forms the wells and contacts of
the active devices.
The sample shown is from a BiCMOS
silicon IC which has been delayered
using a hydrofluoric etch process to
reveal the doped regions within the
active devices. The IC process stack
includes a lightly doped p-substrate
with an epitaxial layer approximately
3.0 µm thick. Highly doped N+ and P+
buried layers are positioned at the
interface. Shallow doping of various
impurities forms the wells and contacts
of the active devices. A cross-sectional
view is provided for reference in
Figure 3. A 3D topography image of
the chip surface by AFM is shown
in Figure 4.
Figure 4. Topography image of an IC sample.
As stated earlier, SMM can obtain
capacitance and dC/dV images
simultaneously, capacitance (PNA
2
A.
B.
P+ Buried Layer
C.
Active Area of Device(s)
N+ Buried Layer
P+ Buried Layer
D.
Figure 5. Capacitance (A), dC/dV phase (B), phase line profile (C), and design layout of the IC sample.
amplitude) and dC/dV images of the
IC sample are presented in Figure 5.
The capacitance image, Figure 5A,
clearly revealed differences in the varied
shallow doping which construct devices
within the active areas. Dramatic
contrast difference in the dC/dV phase
image, Figure 5B, confirms the presence
of sub-surface highly doped layers. A
vertical line profile across the phase
image (as indicated by the green line in
A.
B.
Figure 5B) is shown in Figure 5C. The
measurement shows that the different
bands in the IC are of 1800 different
in phase, which suggested that those
two different regions of the sample are
dominated by opposite charge carriers,
in correspondence to the existing bands
of n-type buried layer (NBL) and p-type
(PBL) buried layer under the active
components. The circuitry map is also
D.
overlaid atop the PNA amplitude image
to show the regions of the NBL and PBL.
C.
A small difference in capacitance can
Figure 6. Topography (A), dC/dV amplitude (B) and phase (C) images of the IC sample. (D) is a
also be seen between the two regions.
zoomed region on (C) showing the small variations of phase corresponding to individual structures.
Figure 6 shows the topography (A),
dC/dV amplitude (B) and phase (C)
images of a smaller area on the
surface. The dC/dV amplitude reveals
the difference of dopant level in the
structure. The dC/dV phase revealed
3
two types of information in this case:
first the opposite carriers between
the bands, second the small variations
due to changes of each individual
components. These variations become
visible when looking at only the n- or
p-type region with the contrast properly
adjusted, as shown in the zoomed image
of Figure 6D.
In summary, SMM can be used for
capacitance and dopant profiling
measurement on semiconductor
devices. It is possible to identify certain
structures below the surface level due
to the penetration length and interaction
volume of the microwave signal.
References
AFM Instrumentation from
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www.agilent.com/find/afm
1. Han, W.H. In Application Note Agilent technologies, Inc., 2008; Vol. 5989-8881EN.
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H.; Kabos, P.; Kienberger, F. Review of Scientific Instruments 2010, 81.
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5. Duhayon, N., Katholieke Universiteit 2006.
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Published in USA, January 2, 2014
5991-0562EN