Precision Analog Reference Voltage from Smaller, Low-cost Mixed Signal
Devices
By Archana Yarlagadda, Applications Engineer, Cypress Semiconductor Corp.
One of the primary challenges engineers face when designing electronic devices is to reduce system size while keeping the
same feature set. This reduction in size is considered at every step of the system, from transistor size all the way to the end
product size. Each stage of shrinking, however, doesn’t always carry the same feature set forward. Sometimes less commonly
used properties are removed to save die area. If these features are required for a particular application, then the engineer may
be forced to use higher sized/priced chips that still retain these features. However, engineers can often employ innovative
ideas to make a lower cost chip perform beyond its basic capabilities to still achieve the required feature set.
Many applications using mixed signal devices, also referred to as System on Chip (SoC) devices, convert analog signals into a
digital signal and perform operations in the digital domain or in firmware. Thus, there are many SoC devices available on the
market that target applications requiring limited analog capabilities, such as only needing a comparator and Analog to Digital
Convertor (ADC). Given that the end result is in the digital domain, there is frequently no need for analog output pins. As an
analog output pin requires an analog bus and also analog buffers to provide the external drive capability, a large amount of die
area can be saved by taking out these pins.
In certain applications, even though all the signal processing is performed in the digital domain, an analog reference voltage is
required. For example, consider a system with an ADC range of 0 to 5 V and input signal value of ±20 mV. This input signal
cannot be measured directly with the ADC. Rather, a DC offset has to be added to input signal using an external reference
voltage to shift it into the range of ADC. The offset is then compensated for by the firmware after the measurement is taken.
With limited analog capability and no analog output pins, creating an output analog voltage reference is a challenge. This
article will show how to support an analog voltage reference in small-sized chips with no analog output pins, with the use of
only a few external passive components.
Basic Method
Every system has a supply voltage that can be used directly as the reference voltage or indirectly to obtain another voltage
reference. A resistive divider method is the basic form of obtaining a voltage reference from the supply voltage as shown in
Figure 1a. This basic circuit has no control loop and has the disadvantage that the reference voltage is directly proportional to
the supply voltage variations.
Figure 1: Reference voltage using resistor divider circuits
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To regulate the voltage or to obtain different voltages, a control loop can be added to this circuit as shown in Figure 1b. The
reference voltage can be measured and the resistance can be adjusted to maintain the required reference value. One end of
the resistors is connected to the Vref node while the other end is controlled through the pins. The pins can be either grounded
or left at high Z. If the pin is grounded, the corresponding resistor is added into the effective resistance calculation. If the pin is
High Z, it is the same as if the resistor were not connected.
The reference voltage is obtained based on the effective resistance of resistors in parallel (Reff), as shown in equation below.
Vref = Vdd *
(R
Reff
eff
+ RL1 )
When a reference voltage is not required in the application, all the pins can be kept at High Z, thus conserving power. The
resolution of control can be increased by increasing the number of control resistors, which in turn increases the number of
pins, to form a resistive chain control. The concept of resistive chain control can be used to regulate the reference voltage, or it
can also be used to obtain different reference voltages at different times. To regulate the voltage, this type of control will work
only when the variation is slower than the delay of the control.
Traditional PWM-DAC Method
The Pulse Width Modulator-Digital to Analog Convertor (PWM-DAC) is most widely used method to obtain a programmable
reference voltage out of a digital pin. The output of the PWM is a digital signal, which is low pass filtered to obtain the average
DC value as shown in Figure 2. The cut-off frequency of the low pass filter should be chosen such that it is much lower than
the frequency output of the PWM to ensure it is as close to the DC value as possible.
Figure 2: Pulse width modulation methods to generate constant reference voltage
The reference voltage, in this method, is a function of the supply voltage (Vdd) and duty cycle (D) of the PWM as shown in
equation below. If the supply voltage is 5 V, and the duty cycle is 50%, the reference voltage is 2.5V.
Vref = Vdd * D
The pulse width can be varied to change Vref, but as the PWM-DAC method is an open loop system, this is advantageous only
when the supply voltage is highly accurate. If the supply voltage is not accurate, then output reference voltage will also not be
accurate. Obtaining an accurate supply voltage is expensive and thus not readily available in low cost systems. To
compensate for the change in supply voltage, a closed loop system can be formed using an ADC and firmware control as
shown in Figure 2B. The reference voltage value is measured using the ADC and the duty cycle of PWM is adjusted in the
firmware to obtain the required reference value. This feedback loop will reduce the dependency on the supply voltage but adds
latency and uses more resources in the system.
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Self Modulated Voltage Reference
A self-modulated circuit is based on the assumption that though there are limited analog components, the SoC still has an
internal reference voltage. This is often true in systems with an ADC. This method shows a technique to access this analog
voltage externally on a digital pin. While the PWM-DAC method is based on pulse width modulation, this technique is based on
the Pulse Density Modulation (PDM) principle where the density of a digital signal is the percentage of time the signal is high.
Specifically, the density of a signal is the percentage of ‘1’s in a digital signal stream of ‘1’s and ‘0’s. Note that the particular
waveform is not important, only the percentage of the signal that is high. More information about the density signal processing
is given in the references provided.
The circuit uses a synchronous comparator in SoC, and an external low pass filter as shown in Figure 3. The output of the low
pass filter is the feedback, through an analog input pin, to the negative input of the comparator. The comparator, using this
feedback, follows the same rules as an operational amplifier in voltage follower mode. The output of the voltage follower will
change, as required, to keep its two inputs at the same level. If the value on the positive input is higher than the value on the
negative input, the output is high. The high output will cause the output of the low pass filter to drift higher, eventually making
the negative input to the comparator higher than the positive input. When the negative input is higher, the output remains low,
which will pull the negative input lower. Thus, the percentage of time that the signal is high (i.e. the density of the signal)
changes to keep the two inputs at the same value. Eventually this will reach a stable state where it modulates its own output
so that its density results in Vref = Vbg on the output of the low pass filter. Since the comparator is clocked, its output is a welldefined digital signal that is low-pass filtered to obtain a DC reference voltage.
Figure 3: Self-modulated voltage reference circuit
Voltages other than the internal reference voltage (Vbg) can be obtained by adding an attenuator. If the attenuator is added on
the output, then references less than Vbg can be obtained. If an attenuator is added in the feedback, then references greater
than Vbg can be obtained. This attenuation can be in the analog domain or in the density domain.
Density Attenuation
Since the principle of a self-modulating circuit is based on PDM, additional circuits can be added for density modulation to
obtain different embodiments of the main circuit. For example, a density modulator (a PWM in this case) can be added
between the output of the comparator and the feedback signal, as shown in Figure 4A.
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Figure 4. Embodiments of the self-modulator circuit
Amplifier
If the PWM output has a duty cycle of 50%, then the effective density at the output of the AND gate is half of what it was
before. This will cause the negative input value to be low for double the time, thus doubling the output density of the
comparator. Also, the density at the output of the comparator changes based on the duty cycle of the PWM. This digital
density signal is low pass filtered to obtain a DC value that depends on the internal bandgap reference voltage and the duty
cycle of the PWM as shown in equation below.
Vref 2 =
Vbg
(1 − Dout 2 )
Thus, a programmable voltage reference by changing the PWM duty cycle is obtained, without the disadvantages of the PWMDAC method. Since Dout2 cannot be less than zero, Vref2 cannot be less than Vbg.
Attenuator
The same components can be rearranged as shown in Figure 4B to achieve voltages less than the reference voltage (i.e.
attenuator with the density modulation). In this method, the output is given by the equation below.
Vref 2 = Vbg * Dout 2
Analog Attenuation
A resistor analog attenuator like a resistive divider circuit can be used to obtain attenuation in analog path and obtain voltages
other than the reference voltage.
Amplifier
The self-modulated circuit can be used to obtain voltages higher (Amplifier) than the internal reference voltage by adding
analog attenuator as shown in Figure 4C. The reference voltage value is shown in equation below
Vref 2 = Vbg *
( RL 2 + RL1 )
RL 2
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Attenuator
The self-modulated circuit can also be used to obtain voltages lower (Attenuator) than the internal reference voltage by adding
external resistors as shown in Figure 4D. The reference voltage is obtained as shown in equation below
Vref 2 = Vbg *
RL 2
( RL 2 + RL1 )
Buffer
The comparator in the self-modulator configuration can be used as a buffer when both inputs are available externally. The
accuracy of the buffer will be same as the one explained for the reference voltage. The block diagram for the buffer mode will
be the same as Figure 3, with the internal reference voltage Vbg replaced with an external input voltage.
Accuracy and dependency
The low pass filter used to obtain a DC value from the digital signal determines the settling time and accuracy of the output
signal. The pole of the low pass filter has to be chosen based on the frequency of the PWM in the case of the PWM-DAC
method and the comparator clock frequency in the case of the self-modulating method. If the pole of the low pass filter is too
high, then Vout will not reach a study state value. Considering Fclk as the internal clock frequency, the requirement for the low
pass filter is given in equation below:
Rlp * C lp >>
1
(2 * π * Fclk )
The resistor chain and the PWM method are directly proportional to the supply voltage, whereas the variation of the selfmodulated reference voltage depends on the variation of the bandgap voltage and offsets of the comparator.
An implementation of the self-modulating circuit was built using the Cypress Programmable System on Chip (PSoC) in order to
collect performance data. The variation of the internal reference bandgap voltage and externally obtained reference voltage
across Vdd is given in Figure 5. The graph is plotted with data collected from the circuit implemented using the smallest PSoC
chip, the CY8C21123, with an average comparator offset voltage of 8 mV. As can be seen, the external voltage reference
dependency on the supply voltage depends on the variation of the bandgap reference voltage and comparator parameters
(offset) with supply voltage.
Figure 5. Variation of the reference voltage with supply voltage and temperature
The temperature dependency of the first two methods is negligible. The self-modulating voltage reference circuit depends on
the variation of the bandgap voltage and offset variation with temperature. The variation of reference voltage with temperature
is shown in Figure 5. The temperature variation tracks Vbg almost exactly. The comparator non-ideal parameters like offset
vary differently with supply variation as compared to the temperature variation. This causes a higher deviation in output
reference voltage from the internal reference voltage, with variation of Vdd.
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The load drive capability of all the methods discussed is less than a buffered voltage output, since the effective resistance at
the output is not zero. The drive capability among the three is the least in the first method. The resistance connected to this
node has to be much higher than the effective resistance (Reff). The load drive capability of the PWM-DAC is the same as any
low pass filter.
The load drive capability of the self-modulating circuit is obtained by considering an ideal comparator. The feedback resistor
(low pass filter resistor) (Rlp) determines the drive capacity of the circuit. Since the output changes to maintain the two inputs to
the comparator at the same value, the constraint on the load resistance is given in equation below:
Vsup ply * RLoad
( RLoad + Rlp )
> Vbg
This article shows methods of obtaining analog voltage reference values from chips that have limited analog capability. They
can be used in systems that have analog capabilities already used for other purposes. A combination of the circuits can be
used to obtain different voltage references providing more flexibility and programmability.
References:
1. AnalogZone Articles: “Single-Bit ADCs in a Nutshell” Part I, Part II & Part III by Dave Van Ess
2. Cypress application note: “Decimator in PSoC ® - AN51352” by Archana Yarlagadda
3. Cypress application note: “Single Cell Li-Ion Battery Charger with CY8C21x23” – AN55102 by Archana Yarlagadda
Cypress Semiconductor
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Phone: 408-943-2600
Fax: 408-943-4730
http://www.cypress.com
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