FPGA Based EKF Estimator for DTC Induction Motor Drives

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FPGA Based EKF Estimator for DTC Induction Motor Drives
Yadollah Sabri , Virginie Fresse
Hubert Curien Laboratory UMR CNRS 5516
Jean Monnet University- University de Lyon
18 Rue du Professeur Benoît Lauras 42000
Saint Etienne, France
e-mail: yadollah.sabri@gmail.com
virginie.fresse@univ-stetienne.fr
Abstract – A Field Programmable Gate Array based
Extended Kalman Filter estimator employed in Direct
Torque Control system for Induction Motors is
presented in this paper. The implemented algorithm of
Extended Kalman Filter estimates the required state
space variables of Induction Motor for determining the
switching pattern of Voltage Scours Inverter. The
implementation on FPGA including functional
simulations, as well as the hardware in loop tests is
presented.
Key words – FPGA; DTC Controller; Sensorless
Control, EKF; Induction Motors
I. INTRODUCTION
Over recent years, several researches have been
conducted with the aim of proposing alternative
solutions to the Field Oriented Control (FOC) of PWM
inverter-fed drives for Induction Motors. The main
goal of these studies, in essence, was to reducing the
complexity while maintaining the accuracy and
effectiveness of the control system. Among those
solutions, the Direct Torque and Flux (DTFC) control
has gained a wide interest satisfying above mentioned
conditions as alternative to the (FOC) control systems
[1], [2]. Alongside with the increasing interests in the
simplified control strategies there is also a growing
demand to minimizing the cost of the hardware of
control systems highlighting the importance of
sensorless controllers. Several sensorless control
strategies to estimate the rotor speed (thereby position)
of Induction motors eliminating the needs to use their
corresponding mechanical sensors have been also
developed. Among these methods, the Extended
Kalman Filter appears to be an efficient candidate as a
robust online estimation towards random noise
environment, [2], [3], [4].
Rachid Beguenane, Francis Okou
Department of Electrical and
Computer Engineering of RMCC
Stn Forces K7K 7B4
Kingston, Canada
Rachid.Beguenane@rmc.ca
It is evident, by considering the successively improving
reliability and performance of digital technologies, that
even the most complicated control methods are
achievable by means of nowadays
technologies. High
email :Rachid.Beguenane@rmc.ca
speed Digital
Signal Processors (DSP), for instance,
because of their software flexibility and ability to
perform very complex calculations, have been of the
highest interests for those control systems requiring
intensive mathematical computations. However, due to
the their inflexible architecture, this kind of DSP have
been proven to fail to offer sufficiently short execution
time which is vital for stability of the controllers
dealing with the rapid systems, i.e. the systems with
very small time constants. The Field Programmable
Gate Arrays (FPGA) technology has, fortunately,
appeared to be the solution for overcoming the above
mention problem. This technology, providing a flexible
architecture, makes it possible to designate the
appropriate duties to be shared by hardware and
software facilities so as the main goal of minimizing
the overall execution time and/or the resource usage to
be achieved. The application of FPGA covers a vast
area such as signal processing, mathematical
computation, control systems, target tracking,
navigation and robotics [5], [6], [7]. The
implementation of an FPGA, however, faces a major
drawbacks which are the complicated and intensive
operations such as multiplication and division that
demands high computational resources [6], [8].
An FPGA-based EKF has been implemented in this
study to be used in DTC controller for Induction Motor
Drives. Unfortunately, the whole DTC controller was
not implemented due to the lack of laboratory facilities
such as Induction Motor-Load, VSI inverter, so that the
application was limited to the implementation of EKF
estimators using Xilinx ML506 Evaluation Platform.
The obtained results from MATLAB complete DTC
simulation with those obtained from FPGA were
compared to examine the effectiveness of the EKF
estimator thus implemented.
Over subsequent sections, the description of the
Extended Kalman Filter will be presented including the
main features of DTC controller, this section will be
followed by description of EKF algorithm refinement
and simulations. The development of the FPGA-based
EKF algorithm will be then explained providing the
results of the Hardware in Loop. The time/ area
performance of implemented EKF will be discussed at
the final section of this paper.
II . DESCRPTION OF THE EXTENDED
KALMAN FILTER (EKF)
A. The state space model of induction motor and
description of DTC control system
The space state model of induction motor can be
written as:
.

 x  f ( x, u )  w


 y  Cx  v
(1)
Where,
x  [is , is ,  r ,  r ]
U  [Vs ,Vs ]T , y  [is , is ]T
MRr
M r
1 

(1  Ts  )is  Ts L 2 k  r  Ts L k  r  Ts k Vs 
r
r


 (1  T  )i  T M r   T MRr   T 1 V 
s
s
s
r
s
r
s
s
2

Lr k
k 
Lr k
f ( x, u )  

T
M


Ts is  (1  s ) r  Ts r r
Tr
Tr




Ts
M
Ts is  Ts r r  (1  ) r


T
T
r
r


same performance as provided by vector controllers [3].
Therefore, the advantages accrued to this control
strategy as mentioned above have still maintained it in
the top spot of interests for industry sector. The DTC
control strategy, however, relies heavily upon the
precise measurement or estimation of electromagnetic
flux and torque as these two variables determine the
switching pattern to be followed by VSI inverter. The
importance of the electric flux and torque estimation
reveals the necessity of using an identification
algorithm to achieve the goal of DTC control strategy.
The estimation or identification method employs the
Extended Kalman Filter (EKF) in this study, so the
subsequent part describes the main features of EKF.
B . Overview of EKF algorithm
The Kalman filter is a well-known recursive
algorithm which takes the stochastic state space model
of the system with together measured outputs to
achieve the optimal state estimation of the system
under consideration [2], [3]. The goal of Kalman filter,
as it is outlined below, is to obtain the variables which
are not measurable, i.e. covariance matrices Q, R and P
of the system and measurement noise vectors and state

vectors (x), respectively. The filter estimation ( x ) is
obtained from the predicted values of the states (x) and
this is corrected recursively by means of correction
factor as the product of the Kalman gain (L) and the
deviation of estimate and the actual output vector as

( y-C x ).

xk / k
-1
z


x k 1 / k 1
x k 1 / k
1
C
0
0
0
0
1
0
0
0
R
R M2
M
,k 
,   s  r2
0
Ls Lr
Ls Lr Ls
W and V in Equation (1) are the model and
measurement disturbances which are statically
described by the zero-mean Gaussian noises and
characterized by covariance matrices Q and R as it will
be illustrated in more detail through subsequent part B.
uk+1
z-1
Prediction
EKF
Compensator
Innovation
kk+1
yk+1

 i s 
i 
 s 
 
 r 
 r 

  r 
Figure 1, Systolic of the EKF algorithm
The Direct Torque Control (DTC) strategy, in
essence, utilizes a specific switching pattern introduced
by Takashi and Noguchi [3] with the aim of achieving
an effective exploitation of the full capacity of
induction machines of producing electromagnetic
torque and flux. Unlike the vector control systems, the
DTC is the simplest in structure as it eliminates the
need of using external current loop, while it attains the
The system and measurement noise covariance denoted
as Q and R, are 5  5 and 2  2 diagonal matrices,
respectively.
As previously stated, the state vector to be estimated

is x  [is , is , r , r , r ] and the estimation
procedure of Kalman filter is performed over following
steps as illustrated in block diagram form in figure 1.
SwitchingL
UT
Sabc
VSI
INVERTER
IM
1) Prediction of the state vector: The
 s , e ,  e
prediction of state vector at sampling time of (k+1)
from the input vector U(k) and state vector at previous
sampling time (k) is given as:







i s , i s ,r ,r ,  r

x(k  1 / k )  f ( x(k / k ), U (k ))
abc  
(2)
vs , vs is , is
EKF
2) Prediction covariance computation:
The prediction covariance matrix is updated by:
Figure 2, Block diagram of DTC control system
p( k  1 / k )  F ( k ) p( k / k ) F ( k )  Q
T
(3)
Where, Q is the covariance matrix of the system noise
with F given as:
F (k ) 
F
X

x  [is , is , r , r , r ] was examined.
(4)

x ( k ) x ( k / k )
3) Kalman gain computation:
The Kalman filter gain or correction matrix is
computed as:
L(k  1)  p(k  1/ k )C(k )T (C(k ) P(k  1)C(k )T  R)1
(5)
The prediction covariance matrix is then updated in
terms of Kalman filter gain as:
p(k  1/ k  1)  p(k  1/ k )  L(k  1)C(k ) p(k  1/ k )
(6)
4) State vector estimation or innovation step: The
predicted state-vector

x (k+1/k) is added to the term referred to as innovation
multiplied by Kalman gain to provide the overall state
estimation vector x (k+1/k+1) as:


The block diagram of DTC controller, as shown in
figure 2, is simulated using MATLAB SIMULINK
environment thereby the performance of simulated
EKF block on estimating the state variables vector

x(k  1/ k  1)  x(k  1/ k )  L(k  1)( y(k  1)  C x(k  1/ k ))
(7)
III. Algorithm refinement and fixed-point
simulation
Prior to dealing with implementation of the FPGAbased EKF algorithm the complete DTC controller was
first simulated in order to evaluating the functionality
of the whole control system.
EKF algorithm has been fulfilled in a sequential
procedure as summarized in section II (B).
Clk
Start
en
IV. Development of the FPGA-based EKF
algorithm
The EKF as described in section III (B) is an
algorithm requiring a huge number of matrix
calculations such as multiplication, division and
addition. Due to such inevitably intensive matrix
treatments, the FPGA architecture needs a special care
regarding the optimization of consumed hardware
resources without admitting any degradation of timing
performances.
The FPGA architecture of EKF
compensator module is presented in figure 4 where the
computation of covariance matrix P(k+1/k+1) and the
optimal Kalman gain L(k+1/k+1) required for
innovation step is illustrated. The whole matrix
multiplication, as shown in figure 4, was achieved
using a single [m  n  l ] pipelined multiplier where m, n
M n l
done
m  n  l matrix multiplier
en
Figure 3, Actual and estimated state space variables: a)
Isa, b) Isb, c) Phira, d) Wr
Figure 3 summarizes the comparison between actual
and estimated state space vector obtained from
simulated Induction Motor and EKF blocks,
respectively. By examining figures 3 (a) through (d), it
can be seen that the proper convergence between actual
and estimated variables was obtained. Moreover, a
refinement of the EKF algorithm, to be implemented,
was achieved so as the appropriate sampling period of
30 S satisfying the control system stability, as well
as an optimal format of 25-bit fixed-point data is
determined.
Kalman gain control unit
Addr_a
A:
En_a
pk+1/k
+
R
pk/k
done
Addr_b
m n matrix
-
En_a
En_b
En_inv
B: n l matrix En_b
+
-
matrix inversion
En_inv
S-1
pk+1/k+1
Lk+1
Figure 4, FPGA- based architecture of the EKF
compensator
A.
Hardware-in-loop (HIL) tests: Figure 5
describes the hardware in loop setup for FPGA-based
EKF estimator. The designed and developed
architecture was implemented in Xilinx FPGA
VIRTEX-5 ML506 Evaluation Platform device using
the RTL Precision Synthesis Tool and Xilinx ISE 10.1
[9].
Xilinx ML506
FPGA Evaluation
Platform
and l are the dimensions of two [m  n] and [n  l ]
Figure 5, Hardware in Loop
matrices to be multiplied at each step. The maximum
value for m, n and l was 5 corresponding to the step
when two F(k) and P(k/k) matrices with dimensions of
[5  5] were supposed to be multiplied. It should be
In the proposed setup, the observed or probed signals
were the MATLAB output stator voltage and currents,
and the output or control signals are the estimated state
mentioned that, due to the dependency of the each step
to its precedent operation, unfortunately in case of
using one single multiplier, there was no possibility to
achieve the concurrent operations. Therefore, the whole
variables

x  [is , is , r , r , r ]
.
Figure
6
summarizes the comparisons between the results
obtained from FPGA and those from MATLAB
simulation model as described in previous sections. By
examining the results shown in figure 6 (a) through (d),
it is easy to notice that the results obtained from
MATLAB SIMULINK and FPGA are in proper
convergence as both have used the same fixed-point
data format of 25-bit. The maximum error between the
corresponding results was less than 2% which was due
to the truncation occurred on multiplier operand being
treated by 25×18 embedded pipelined multiplier of
ML506 Evaluation Platform [9].
(a)
B. Timing diagram of the DTC controller and
time/area performances: The complete DTC
controller was simulated using MATLAB SIMULINK
environment with the sampling period Ts of 30µS. At
each sampling moment the MATLAB SIMULINK
model updated the electrical quantities of simulated
Induction Motor so as the FPGA board started
performing the Kalman gain computation process using
the latest data provided by MATALB. The EKF
architecture was synchronized using 32 MHz clock
signal so as the whole EKF algorithm was performed in
18.61 µS. After performing each Kalman gain
calculation procedure, the FPGA stopped its operation
and waited for the next incoming start signal produced
by MATLAB.
Figure 7 describes the EKF timing diagram where the
execution time for each step of EKF is shown. The
prediction, Kalman gain calculation and innovation
times are 1.1 µS, 16.99 µS and 1.61 µS, respectively.
The whole EKF execution time is 62% the sampling
period of 30 µS.
(b)
tEKF
tpred
tinov
tgain
kTs
(c)
(k+1)Ts
Figure 7, EKF timing diagram
It is worthwhile to mention that the whole EKF
algorithm has used only 10% of FPGA resources.
Table 1 summarizes the total resources usage of FPGA
by EKF in more detail.
Table 1, FPGA resources usage
Available
Used
Utilization
slice registers
32640
41
1%
Slice LUTs
32640
195
1%
Logics
32640
195
1%
25×18 Hw
multipliers
136
9
7%
(d)
Figure 6, HIL results, a) Isa, b) Isb, c) Phira, d) Wr
V. CONCLUSION
The design and implementation of the FPGA-based
Extended Kalman Filter estimator was presented in this
paper. The implemented EKF algorithm as a part of
DTC control system was described focusing on the
FPGA architecture. Simulation and hardware in loop
(HIL) results were provided in order to validate the
performance and effectiveness of the developed design
and the time/area analysis was then presented. The later
proves that the employment of FPGA as a hardware
solution improves considerably the execution time
regarding with DSP-based software solutions.
[4] S. Belkacem, F. Naceri and R. Abdessemend,
EKF-based speed sensorless direct torque control of
Induction Motor drives, Asian Journal of Information
Technology 6(2): 185-191, 2007
By comparing the dimensions of the P and Q
covariance matrices of [5×5] and corresponding total
execution time of developed EKF algorithm of
18.61µS with those presented in [5] as [4×4] and
10.25µS, respectively; it is evident that the developed
algorithm in this study is as effective as that one
developed in [5].
[6] A. Bigdeli, M. Biglari-Abhari, Z. Salic, Y. T. Lai,
A new Pipelined Systolic Array-Based Architecture for
Matrix Inversion in FPGA with Kalman Filter Case
Study, EURASIP Journal on Applied Signal Processing
Vol. 2006
As stated previously, due to the lack of laboratory
facilities, the authors have just implemented the EKF
estimator where the rest of the whole DTC controller
was simulated in MATLAB SIMULINK environment.
However, an examination of time/ area performance of
FPGA architecture reveals that the whole DTC
controller is implementable using one single stand
alone Xilinx ML506 FPGA Platform as the total
recourses used for implementing EKF algorithm is only
10% of available FPGA hardware. The rest of the
resource is quite enough to implement all low speed
adders or multipliers required for designing the
remaining parts of complete DTC controller.
ACKNOWLEDGEMENTS
This work is granted by the Rhone Alpes Region,
SEMBA projet, Cluster ISLE, France.
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Xilinx Data Book, [Online], Available on:
www.xilinx.com
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