IJCSNS International Journal of Computer Science and Network Security, VOL.7 No.6, June 2007
245
Simulation of Closed Loop Controlled IPFC System
Mr.S.Sankar†, Dr.S.Ramareddy ††
† Research Scholar, Sathyabama University, Chennai-600 119, India.
† † Professor in Dept of EEE, Jerusalem College of Engineering, Chennai-601 302
Summary
This paper describes inter Line Power flow controller in power
system. An Inter line power flow controller is VSC-based
FACTS controller for Series compensation with the unique
capability of power management among multiline’s of a subsstation. The FACTS technology is essential to alleviate these
difficulties by enabling utilities to get most service from their
transmission facilities, FACTS controllers can control series
impendence, shunt impedance, current, voltage and phase angle.
The different controller’s circuits are simulated using PSPICE
software package. IPFC is used to improve the power flow and to
provide a power balance of a transmission system. the circuit
model of IPFC was developed and the same is used for
simulation
1.1. Interline Power Flow Controller
The basic principles of the Interline Power Flow
Controller (IPFC) employs a number of DC to AC
inverters each providing series compensation for different
line as showing in Fig.1.1. The series compensation is
provided by Static Synchronous Series Compensators [6].
Key words:
FACTS, SSSC, IPFC, TCR, PSPICE.
1. Introduction
As a result of Flexible AC transmission system,
considerable effort has been spent in recent years on the
development of power electronics based power flow
controllers [1]. They employ self-commutated inverters as
synchronous voltage sources. The power electronics based
voltage sources can internally generate and absorb reactive
power without the use of capacitors and reactors. They can
facilitate both real and reactive power compensation and
thereby can provide independent control for real and
reactive power flow [2, 3].
The Interline Power Flow Controller (IPFC) schemed
proposed provides, together with independent controllable
reactive series compensation of each individual line, a
capacity to directly transfer real power between the
compensated lines. This capability makes it possible to
equalize both real and reactive power flow between the
lines; transfer power demand from overland to under
loaded lines; compensate against resistive line voltage
drops and the corresponding reactive power demand;
increase the effectiveness of the overall compensating
system for dynamic disturbances[4,5]. The IPFC can
potentially provide and effective scheme for power
transmission management at a multi-line substation.
In the literature [1] to [10], the simulation of
closed lop system is not presented .In the present work ,the
circuit model for closed controlled IPFC is developed and
the same is used for simulation.
Manuscript received June 5, 2007
Manuscript revised June 20, 2007
Fig 1. Block of an Inter line Power flow Controller
The Compensating inverters are linked together at the DC
terminals. The compensators in addition to provide series
reactive compensation can be controlled to supply real
power exchange through the dc link from its own
transmission line[7]. Thus surplus power available in
underutilized lines is made available by other lines. This
arrangement mandates the rigorous maintenance of the
overall power balance at the common dc terminal by
appropriate control action, using the general principle that
the under loaded lines are to provide help, in the form of
appropriate real power transfer, for the overloaded lines
[8-10].
246
IJCSNS International Journal of Computer Science and Network Security, VOL.7 No.6, June 2007
voltage V1pq. The inserted voltage phasor V1pq is added
to the fixed end voltage phasor V1s to produce the
effective sending end voltage. The difference between V1
self and V1, gives the compensated voltage Vx1, across,
X1. As r1 is varied over its full 360 range, the end of
phasor V1pq moves along a circle with its centre at the
end of V1s.’
The rotation of phasor V1pq with angler1modulates both
the magnitude and angle phasor Vx1 and therefore both
real power P1R and reactive power Q1R vary with r1 in a
sinusoidal manner as shown in Fig.4 The voltage source
inventor (V1pq) supplies or absorbs both real power
(P1pq) and reactive power (Q1pQ), which are also a
sinusoidal functions of angle r.
Fig 2. Basic two – Inverter Interline Power flow controller
2. Simulation Results
The circuit model of IPFC is shown in Fig5a.The series
transformers are represented as voltage depended voltage
sources. The real power wave form with out IPFC is
shown in Fig.5b.The real power with IPFC is shown in Fig
5c. From fig5c, it can be seen that the real power is
increased.
R3
L1
1
2
L5
1
.001
2
1
30mH
H1
2
30mH
2
-
receiving end voltage phasor is V2R.
All sending end and receiving end voltages are constant
with fixed amplitudes, V1s=V1R=V2s=V2r=1p.u, and with
fixed angles resulting in transmission angles, d1=d2.
The line impedances and the rating of the two
compensating voltage sources are identical, that his
V1pqmax=V2pqmaxand X1=X2=0.5p.u.
Fig.4 Variation of the Real and Reactive Power with Respect
to Phase Angle
+
The elementary IPFC scheme consisting of two back–to
back dc to ac inverters each compensating a transmission
line by series voltage injection is shown in Fig.2 Two
synchronous voltage sources. With phasors V1pq and V2pq
in series with transmission lines 1 and 2, represent the two
back-to –back to dc to ac inverters. The common dc link is
represented by a bi-direction link (P12) for real power
exchange between the two voltage sources. Transmission
Line 1, represented by reactance X1, has sending ends bus
with voltage phasor Vir. The sending end voltage phasor
of line 2, represented by reactance X2, is V2s and the
H
R1
10
1
1
V1
L6
VOFF = 0
FREQ = 50
VAMPL = 10000
100mH
2
0
S2
S1
+
-
V5
D6
Dbreak
D7
Dbreak
+
-
V2
+
-
+
-
S
S
1
0
0
C1
2
50m
S4
V4
D9
Dbreak
D8
Dbreak
+
-
S3
+
+
-
V3
-
S
0
0
+
-
0
E1
+
-
E
R2
1
L4
L2
2
1
.001
2
30mH
1
2
30mH
1
Fig 3. For prime system and phasor diagram
R5
10
2
1
System 1 is selected to be prime system as shown in Fig 3
for which controllability of both real and reactive power is
stipulated. Fig.3 is the phasor diagram defining to the
relationship between V1s, Vx1 and the inserted phasor
V6
L3
VOFF = 0
VAMPL = 10000
FREQ = 50
100mH
2
0
Fig 5a. Circuit model of IPFC with phase difference
+
-
IJCSNS International Journal of Computer Science and Network Security, VOL.7 No.6, June 2007
247
0.5MW
The circuit model of IPFC with different values of
voltages is shown in Fig .6a.Lines 1&2 operate at 11kv
and 10kv respectively.
0W
400KW
-0.5MW
300KW
200KW
-1.0MW
50 m s
100ms
150ms
2 00 m s
2 5 0m s
3 0 0m s
W ( L3 )
Time
100KW
Fig 6b.The Reactive power with out IPFC
800KW
0W
200ms
250ms
W(R5)
300ms
350ms
400ms
450ms
500ms
550ms
600ms
400KW
Time
Fig.5b. Real power with out IPFC
0W
400KW
300KW
-400KW
200KW
-800KW
200ms
250ms
W(L3)
100KW
300ms
350ms
400ms
450ms
500ms
550ms
Time
Fig 6c.The Reactive power with IPFC
0W
110ms
W(R5)
120ms
130ms
140ms
150ms
160ms
170ms
180ms
190ms 199ms
From Fig.6c, it can be observed that the Reactive power is
increased.
Time
Fig.5c. Real power with IPFC
R3
L1
1
2
L5
1
.001
2
1
30mH
2
R3
2
H
2
L5
1
.001
2
1
30mH
H1
2
30mH
2
-
R1
+
+
L1
1
30mH
-
H1
H
R1
10
10
1
1
1
1
V1
VOFF = 0
FREQ = 50
VAMPL = 11000
V1
L6
L6
VAMPL = 11000
100mH
100mH
FREQ = 50
PHASE = 30
2
0
2
0
R4
1
S2
S1
V5
D6
Dbreak
D7
Dbreak
R6
2
1
0.001
2
S2
0.001
+ +
- -
V2
+ +
- -
S1
D1
S
D3
0
0
1
0
0
2
50m
S4
S4
V4
D9
Dbreak
D6
Dbreak
S
C1
C1
2
D5
Dbreak
S
S
1
+ +
- -
V2
+ +
- -
V5
D8
Dbreak
S3
+ +
- -
V4
D2
+ +
- -
V3
D4
S3
D8
Dbreak
+ +
- -
+ +
- -
V3
D7
Dbreak
S
S
0
0
0
0
+
-
0
E1
+
-
+
-
0
E1
E
+
-
R2
E
1
R2
1
L4
L2
2
1
.001
2
30mH
1
1
2
30mH
.001
2
L4
L2
2
1
2
30mH
1
30mH
R5
1
10
2
R5
10
2
1
V6
L3
100mH
PHASE = 20
V6
VOFF = 0
VAMPL = 10000
FREQ = 50
1
VAMPL = 11000
FREQ = 50
L3
2
100mH
2
0
0
Fig 7a.circuit model with different phase angles.
Fig 6a. Circuit model of IPFC with different values and voltages.
The circuit model with different phase angle is shown in
Fig 7a.source at line1 and 2 operate at 20o and 30°
600ms
IJCSNS International Journal of Computer Science and Network Security, VOL.7 No.6, June 2007
248
respectively. Real and reactive powers in lines1 are shown
in Fig 7b&7c respectively.
Line 1
5.0MW
attenuated using potential dividers .The outputs of lines
1&2 are applied to the differential amplifier. IPFC is
enabled when the voltages are different .The circuit model
of closed loop system is shown in fig 8a .The voltage
across the switch S is shown in fig 8b.
R12
4.0MW
L4
R13
1
2.5
L5
2
1
11.5m
F2
3.0MW
2.5
2
11.5m
F
R14
2.0MW
D15
MUR150
MUR150
10
V3
VOFF = 0
VAMPL = 10000
FREQ = 50
1.0MW
D13
2
L9
D14
15m
0W
0s
20ms
40ms
60ms
80ms
100ms
120ms
140ms
160ms
180ms
200ms
S6
W(R1)
V1
Time
Fig7b.
S
VOFF = 0.0V
VON = 2
TD = 1
MUR150
0
1
+ +
- -
VOFF = 0
VAMPL = 2000
FREQ = 50
D16
MUR150
C2
4000u
R19
R1
99.1k
R25 0.09k
500KW
1000k
400KW
U2
0
30000
R22 1k
0
E6
OUT
300KW
+
-
+
-
R23
R26
+
1k
200KW
H6
R17
R16
+-
L6
1
H
2
11.5m
100KW
E
0
OPAMP
0
100.0ms
120.0ms
140.0ms
160.0ms
180.0ms
D17
D18
MUR150
MUR150
D19
D20
R15
2.5
10
80.0ms
1k
30k
2
11.5m
2.5
0W
63.2ms
W(R1)
0
L7
1
R24
200.0ms
2
Time
VOFF = 0
VAMPL = 10000
FREQ = 50
Fig7c.
V4
L8
MUR150
15m
MUR150
C3
0
1
4000u
Line2
R20
R21
0.1k
99.9k
0
4.0MW
Fig 8a Closed Loop System of IPFC
3.0MW
Real powers in lines 1&2 are shown in Figures
8c&8d.The reactive power through lines 1&2 are shown in
Figures 8e & 8f respectively. From the above Figures, It
can be observed that the real power increases when the
IPFC is enabled.
2.0MW
1.0MW
0W
0s
20ms
40ms
60ms
80ms
100ms
120ms
140ms
160ms
180ms
200ms
W(R5)
589MV
Time
Fig 7d.
400MV
900KW
800KW
200MV
600KW
0MV
400KW
-200MV
200KW
0W
63.2ms
W(R5)
-400MV
80.0ms
100.0ms
120.0ms
140.0ms
160.0ms
180.0ms
200.0ms
-600MV
0s
Time
0.200s
0.400s
0.600s
0.800s
V(S6:3,S6:4)
Time
Fig 7e.
3. Closed Loop System
In the control circuit the ac voltages are rectified
using diode bridge rectifiers. The outputs of rectifiers are
Fig 8b.Voltage across the switch
1.000s
1.193s
IJCSNS International Journal of Computer Science and Network Security, VOL.7 No.6, June 2007
249
4.0MW
4. Conclusion
Circuit model with phase difference and voltage difference
were simulated to study the real and reactive power flows.
The circuit model for open loop and closed loop systems
are presented. They are used to simulate the 2 line system
to study real and reactive power flows .It is observed that
the real and reactive powers are increased by the presence
of IPFC.IPFC is a viable solution to balance the power
flow through transmission system.
3.0MW
2.0MW
1.0MW
0W
0.814s
0.850s
W(R14)
0.900s
0.950s
1.000s
1.050s
1.100s
1.150s
1.191s
Time
st
Fig 8c.Real power in the 1 Line
149.7MW
100.0MW
50.0MW
0W
0. 8496s
0.88 00s
W(R 15)
0. 9200s
0.9600s
1.000 0s
1.0 400s
1 .0800s
1.120 0s
Time
Fig 8d.Real power in the 2nd Line
1.0MW
0.5MW
0W
-0.5MW
-1.0MW
0.861s
W(L9)
0.900s
0.950s
1.000s
1.050s
1.100s
1.150s
1.200s
800ms
968ms
Time
Fig 8e.Reactive power in the 1st Line
27.1MW
20.0MW
0W
-20.0MW
-32.8MW
0s
200ms
400ms
600ms
W(L8)
Time
Fig 8f. Reactive power in Line2
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