Single-Stage BJT Two-Port Insertion Gain
Objective
The transistor is a three-terminal two-port circuit element generally operated in one or the
other of three general configurations, Common Emitter (CE), Common Base(CB), and
Common Collector(CC). Each configuration offers individual enhanced operational
advantages in connection with incremental signal amplification; the objective of this note is
to describe and evaluate these advantages. To do this we imagine that an incremental signal
is to be transferred from a source (Thevenin or Norton equivalent) to a resistive load. For a
base reference against which to make comparisons we examine first the case where the
source is connected directly to the load. Then we insert a transistor amplifier, each of the
three two-port configurations in turn, and examine transfer properties, comparing these
both against one another and to what a direct connection provides.
Generic Circuit
A block diagram of the general circuit configuration used in
this discussion is drawn to the right. The voltage source
and resistor on the left form the Thevenin equivalent of an
input source circuit. The resistor to the right is the 'load'
across which the output voltage Vo is measured. A twoport network is connected between the two, in general to
modify the voltage transfer from the source to the load from
what it would be with a direct connection.
The simplest situation is that for which the two-port transfer network is comprised simply of two wires;
i.e., it implements a 'straight-through' connection from the source to the load. The transfer voltage 'gain'
in this case is never greater than one, and quite often is considerably less;
If Ro << R i the voltage transferred is only a small fraction of the source voltage, and the voltage 'gain' is
considerably less than one. The current gain on the other hand is 1; the input and output current have the
same magnitude.
The 'straight-through' two-port circuit provides a convenient reference against which to compare the effect
of inserting other two-ports on the voltage and current transfer fractions. For the present discussion
single-stage bipolar junction transistor amplifiers will be inserted. The objective is to examine the special
advantages (or disadvantages) of the three possible configurations, Common Emitter (CE), Common Base
(CB), and Common Collector (CC). For each case we consider first qualitatively the general nature of
what is to be expected, then calculations using simplified transistor circuit models are used to obtain semiquantitative estimates, and finally PSpice computations simulate experimental measurements.
To illustrate further the general character of the discussion to follow consider the diagram below; an
idealized controlled source representation of a voltage amplifier is used for the two-port insertion.
Introductory Electronics Notes
The University of Michigan-Dearborn
55-1
Copyright © M H Miller: 2000
revised
The input resistance of the amplifier equivalent circuit is R1; the
reverse-transfer from output to input is neglected (and is negligible
for the present purpose). The amplifier provides a forward
voltage gain A, and has an output resistance R2. A
straightforward calculation obtains
As the factoring of the equation suggests the amplifier influences three aspects of the voltage transfer from
source to load. The first term describes the input transfer, i.e., how efficiently the source transfers voltage
'into' the two-port. This is basically a voltage-divider action for which the voltage divides between the
source resistance and the input resistance. The second term corresponds to the voltage transfer across the
two-port itself, i.e., an amplifying action. The third term, similar to the first term, expresses the efficiency
of the output transfer from the two-port to the load. Depending on the specific circuit involved any or all
of these factors may provide a significant improvement or degradation of the overall voltage transfer, as
compared to the 'straight-through' transfer gain.
Common Emitter Amplifier Stage
Consider the Common Emitter transistor configuration first.
Before making a formal illustrative analysis however a
qualitative overview of the circuit can provide a surprising
amount of insight into performance. The incremental
equivalent circuit for a simplified amplifier circuit is drawn to
the right. The incremental resistance looking into the circuit is
rbe. The transfer current gain is substantial, ≈ ß. The
incremental voltage gain across the amplifier is (omitting the
sign) shown below the circuit. If the amplifier is to handle
maximum symmetrical signals the collector bias voltage, and so
the voltage drop across the collector resistor, would be roughly
VCC /2. Substituting for kT/q @ 300K obtains the voltage gain estimate shown, and for a nominal 10 volt
collector supply voltage the gain will be about 200. This is an estimate of an upper limit; the actual gain
generally will be smaller for various reasons.
An illustrative Common Emitter amplifier circuit diagram is
drawn to the left. It differs, of course, from the simplified circuit
used above to obtain some general estimates of capability. For
example insofar as the incremental signal transfer is concerned the
biasing resistors form a shunt across the transistor input, thus
degrading at least to some extent the input voltage transfer into the
BJT proper. The input voltage transfer is degraded further by the
effect of the source resistance, as will be seen.
It is clear the biasing resistors should be ‘large’ to limit the
degradation of the input voltage transfer, but there are constraints limiting choice. For example the biasing
resistors provide the base current, and the resistances must be small enough to permit adequate current
flow. Indeed, for stability reasons, the bias resistor current should be much larger than simply the
necessary base current. The subject here is not biasing design, but it is worth pointing out that tradeoffs
are a fact of electronic life. Incidentally the degree of degradation of the input transfer depends on rbe, and
that can be estimated readily. The value of rbe depends on the collector current, and this provides another
design consideration for the choice of a bias current.
Some rough estimates may be made based on preceding discussion. The voltage gain can be estimated to
be less than 20 x 15 = 300. By simply ignoring the collector-emitter voltage the collector current is seen to
be less than 15/(5.6+0.56) ≈ 2.4 ma, and so rbe will be greater than about 120 x 26/2.4 or 1.3 KΩ. The
input transfer loss then is about (10||82)/(1.3 + 10||82) or 0.87. Allowing for this degradation makes the
(rough) upper estimate of voltage gain about 262.
Introductory Electronics Notes
The University of Michigan-Dearborn
55-2
Copyright © M H Miller: 2000
revised
For a more formal evaluation the DC quiescent point voltages and currents expected can be calculated,
using nominal device parameters and a PWL transistor model. For comparison a PSpice digital
computation is made. The base coupling capacitor is indicated as having '∞' value, meaning that its value
is large enough so that at a nominal frequency of 1 kilohertz or so the capacitative reactance is small
compared to the 1 KΩ source resistance. The capacitor then provides a DC blocking action isolating the
source from the biasing circuitry, but has a negligible influence on the source impedance for higher
frequencies.
Similarly the emitter bypass capacitor reactance at the same general frequency should be small compared to
560Ω. The emitter resistance then provides DC current stabilization but is effectively bypassed at higher
frequencies. The exact capacitance values are not critical for the present purpose, and are taken to be 100
µF in the PSpice netlist shown just below. Subsequent computation verifies the consistency between this
value for the capacitance and the assumption of negligible reactance.
It is not difficult to make a rough estimate of the DC emitter current assuming normal mode operation, and
check to be assured that the transistor is not saturated or cutoff. Replace the bias circuit as seen by the
base by its Thevenin equivalent. Anticipate (subject as always to a consistency verification) that the
voltage drop across the 560 Ω will dominate that across the base resistor, i.e., that some attention was paid
to bias stability in selecting element values. Then the base voltage ≈ (10)(15)/92 = 1.63 volts, and the
emitter current ≈ (1.63 - 0.7)/.56 = 1.66 ma. (Assume a nominal ß of 120 for the 2N3904.) A more
complete calculation (include bias resistors) produces an estimate of 1.47 ma. The PSpice computed value
is 1.52 ma. Note that changes in the emitter junction voltage drop because of temperature changes (say ≈
0.2 volt over 100°C) are likely to be noticed for this design (Why?).
Using the estimated quiescent collector current of 1.66 ma calculate the value of rbe @ 300K as 1.88KΩ.
The incremental parameter equivalent circuit (neglect rce, rbc for simplicity; justify from PSpice
calculations) is as shown, and a straightforward calculation gives a voltage gain VC/VS as -217 (46.7 dB).
The PSpice computation provides the value -199.5 (46 dB).
The netlist for the circuit follows below; it is a useful check to redraw the circuit from the netlist .
Capacitor values of 100 µF have a small enough reactance at 1 kHz (the signal frequency used) to be a
practical equivalent to ∞. A larger value could be used (since it is not necessary actually to assemble the
circuit physically) to verify that no significant change in computed values occurs.
*CE Amplifier Transfer Analysis
VS
1
0
AC 1
RS
1
2
1K
CIN 2
3
100UF
R1
6
3
82K
R2
3
0
10K
Q1
5
3
4
Q2N3904
RE
4
0
560
CE
4
0
100UF
RC
6
5
5.6K
VCC 6
0
15V
* Calculate gain at 1KHz
.AC LIN 1 1K 1.1K
.OP
.END
Introductory Electronics Notes
The University of Michigan-Dearborn
*DC* Node Voltages
(1)
0.0000 (2) 0.0000 (3) 1.5382
(4)
0.8629 (5) 6.4288 (6) 15.0000
Transistor voltages & Currents
NAME
MODEL
Q1
Q2N3904
IC
1.53E-03
VBE
6.75E-01
VCE
5.57E+00
FREQ
1.000E+03
55-3
Voltage Gain
46 dB
Copyright © M H Miller: 2000
revised
Common B ase Amplifier Stage
This comparison is conducted similarly to the previous one,
except that the Common Base amplifier configuration is
involved. The incremental equivalent circuit for a simplified
amplifier circuit is drawn to the right. (The collector source
arrow is reversed to avoid uncomfortable feelings; to
compensate the base current polarity convention is changed
to maintain the same relative relationship.)
The incremental current gain is the ß/(ß+1) ≈ 1, and the input resistance is rbe/(ß+1) ≈ kT/qIc. This
lowered input resistance is a distinguishing characteristic of the CB stage, and is a consequence of the
transistor action, i.e., only a portion ib of the input current (ß+1)ib produces a voltage drop across rbe. At
300K and for a nominal current of 1 ma the incremental input resistance is about 26 Ω.
The terminal voltage gain estimate (using the same reasoning as before) is the same as for the CE
configuration, i.e., ßrbe/Ic ≈ 20 Vcc. However the low input resistance affects the voltage transfer from
the source to the terminals. The low input resistance and the near unity current gain characteristic of the
Common Base configuration make it advantageous for current transfer from a source to a high resistance
load. (An idealized current transfer device would present a short-circuit input so that the input current is
determined by the input source alone, and acting as a current source deliver the same current at the
output .)
A representative Common Base amplifier configuration is drawn
below. Note that the DC biasing circuitry is exactly the same as
for the preceding CE amplifier illustration, so that previous
calculations for DC voltages and currents carry over directly. A
base-to- ground capacitor is added so that at frequencies for which
the reactance is sufficiently small, assumed to be the circumstance
for which calculations are to be made, there is effectively a ‘shortcircuit' from the base to ground in the incremental equivalent
circuit. There is no direct physical connection to ground of
course; the colloquial phrase ‘short-circuit' when used in
connection with the incremental circuit indicates there is a
negligible change in the base voltage.
An incremental equivalent circuit is drawn to the left. (The
transistor model is reoriented for convenience.) One obvious
modification from the CE incremental circuit configuration is
the connection of the incremental input signal source between
the emitter and the base. The incremental output is taken
between the collector and the base. As before the current
source polarity is reversed, together with the base current
polarity, for convenience. The resistance seen looking into the
transistor is rbe(ß+1) ≈ 1.88K/121 = 15.5; the 560Ω emitter resistance is effectively bypassed by the low
CB input resistance. The estimated voltage gain is (120/121)(5.6/1.015) = is 5.47, close to the PSpice
computation of 5.2.
*CB Amplifier Transfer Analysis
VS
RS
CIN
RE
Q1
R1
R2
1
1
2
4
5
6
3
0
2
4
0
3
3
0
AC
4
C2
3
0
100UF
RC
6
5
5.6K
VCC
6
0
DC
15V
.AC LIN 1 1K 1.1K ; gain at 1KHz
.OP
.PRINT AC V(5) V(1) I(VS)
.END
1
1K
100UF
560
Q2N3904
82K
10K
Introductory Electronics Notes
The University of Michigan-Dearborn
FREQ
55-4
Voltage Gain
Copyright © M H Miller: 2000
revised
1.000E+03
14.46dB
Common Collector Amplifier Stage
Finally we consider the Common Collector configuration (often called an 'emitter follower'; a simplified
amplifier circuit diagram is drawn to the right. Note that the
incremental output is taken between the emitter and the (AC
grounded) collector, while the incremental input is between the
base and the (AC grounded) collector. Since the incremental
emitter voltage change is very small even for large current
changes the base voltage will be only somewhat greater than the
emitter voltage. The incremental voltage gain is
The current gain is significant however, ≈ ß+1. Note that the input resistance can be increased
substantially because of the current amplification even using a small emitter resistance; input resistance
= rbe + (ß+1)R e.
A representative CC amplifier is drawn to the left. Note that the
collector resistor used in the CE and CB circuits is not used here.
(For convenience the netlist actually specifies a resistor but
assigns a negligible resistance of 1 µΩ.) For some purposes a
composite configuration may be used, in which an unbypassed
emitter resistor is used in a CE configuration to increase the input
resistance.
The simplified incremental parameter transistor model to be used
in circuit calculations for this experiment is redrawn below with
the addition of the signal source. Note that RB, the equivalent bias resistance can be an important factor in
the input voltage transfer, because of the ß+1 multiplying factor in the expression for the input resistance.
The CC configuration offers a possibility of current gain,
but like the CB configuration its principal use is as a
resistance transformer. Whereas the low input resistance
of the CB circuit ‘likes’ a current input, which it transfers
with near unity current gain to the output, the high input
resistance of the CC configuration ‘likes’ a voltage input,
which it transfers to the output with near unity voltage
gain.
A straightforward calculation for the incremental circuit finds a voltage gain of 0.86 A PSpice analysis
(netlist and output follows) gives a voltage gain of 0.8648.
*CC Amplifier Transfer Analysis
VS
1
0
AC 1
RS
1
2
1K
CIN 2
3
100UF
R1
6
3
82K
R2
3
0
10K
Q1
5
3
4
Q2N3904
RE
4
0
560
RC
6
VCC 6
5
0
1U
15V
*
Calculate gain at 1KHz
.AC LIN 1 1K 1.1K
.OP
.PRINT AC V(4) V(1) I(VS) IC(Q1)
.END
FREQVoltage Gain
1.000E+03
-1.26 dB
Introductory Electronics Notes
The University of Michigan-Dearborn
55-5
Copyright © M H Miller: 2000
revised
PROBLEMS
1)
A voltage source with a 1 KΩ internal
resistance provides a signal to an amplifier that is
transferred to a 56Ω load. If a direct connection is
made between source and load there would be severe
input voltage transfer degradation. To avoid this,
and to provide a net voltage gain, the signal is fed to
a CE amplifier and from the CE amplifier to the load
via a CC stage. Make 'eyeball' estimates of gain,
complement these estimates with an incremental
parameter analysis, and then compare to a PSpice
computation.
2)
The two-stage amplifier shown uses a CC
input stage for an efficient input voltage transfer.
The collector current then feeds a CB stage for
efficient current transfer to the 2.7K collector load
resistance. Make rough estimates of performance,
complement these with an incremental parameter
analysis, and compare to a PSpice computation.
3)
The DC-coupled amplifier uses 'local'
feedback, i.e., separate feedback for each stage.
Make rough estimates of performance, complement
these with an incremental parameter analysis, and
compare to a PSpice computation.
Introductory Electronics Notes
0055-BJT Transfer Problem Answers
6
M H Miller:University of Michigan-Dearborn