___________________________________
Audio Engineering Society
Convention Paper
Presented at the 115th Convention
2003 October 10–13
New York, New York
This convention paper has been reproduced from the author's advance manuscript, without editing, corrections, or consideration
by the Review Board. The AES takes no responsibility for the contents. Additional papers may be obtained by sending request
and remittance to Audio Engineering Society, 60 East 42nd Street, New York, New York 10165-2520, USA; also see www.aes.org.
All rights reserved. Reproduction of this paper, or any portion thereof, is not permitted without direct permission from the
Journal of the Audio Engineering Society.
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The Effects and Reduction of Common-Mode
Noise and Electromagnetic Interference in HighResolution Digital Audio Transmission Systems
Jon D. Paul, Vice President
Scientific Conversion, Inc.
Novato, California, USA
jonpaul@scientificonversion.com
ABSTRACT
High-resolution digital audio systems are especially susceptible to sources of electromagnetic
noise from the environment, for example, crosstalk from adjacent cables. The noise can induce
errors and increase jitter in the recovered clock signal.
We discuss the most important noise sources and their characteristics. Next, we analyze the noise
susceptibility of typical transmitter and receiver circuits. Test results are provided for a system
with induced common-mode noise. The paper concludes with circuit design, component and
application considerations.
1. INTRODUCTION
Progress in digital audio technology has increased
resolution to 20…24 bits and sample rates to
96…192 kHz. Equivalent clock jitter has decreased
to 10 - 100 ps. The system's sensitivity to noise and
interference is increased proportionally. Interface
designs which work fine in 16 bit consumer
applications will not deliver the quality or
interference rejection required in high-resolution
professional applications in environments rich in
noise sources. We discuss potential interference
sources and how the interference couples into digital
audio transmission systems. The interference affects
recovered clock jitter, the data error rate and the
conducted noise emission.
We analyze some typical interface circuits used in
digital audio transmission systems. A new test
method is presented for interference susceptibility
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Effects of Interference in Digital Audio Transmission
2. INTERFERENCE GENERATION AND
COUPLING
testing of these systems. The test fixture design and
results are described in depth. Finally, we consider
techniques to reduce the effects of interference.
Carefully specified and applied transformers and
passive filters are key to reducing noise and
interference .
Digital audio systems are generally used in
electrically noisy environments. Movie studios,
broadcast studios and satellite uplinks are examples
rich in interference sources. Stray capacitance and
inductance provide coupling paths for the
interference to enter the digital audio transmission
path. Other entry points include radiated EMI, cross
talk between signals and common-mode noise. Noise
currents flow in either direction through any input or
output.
1.1. Digital Transmission Overview
Figure 1 is an unbalanced system with a transmitter
(TX), cable and receiver (RX) such as described in
AES-3id-2001 [1]. The cable shield reduces
electrostatic interference. Since some common-mode
noise voltage always exists between TX and RX
ground returns, a common-mode current must flow
through the shield along with the signal.
2.1 Interference Sources
Digital clocks for DSPs and CPUs, video equipment,
switching power supplies, wireless and wired
computer networks are examples of conducted and
radiated interference sources. The digital audio signal
is intentionally limited in bandwidth, but out-of-band
high frequency noise can nonetheless affect data
transmission and clock recovery circuits. In large
studios, the use of hundreds of signals on long cables
(100-1000M) further increase the noise burden.
Figure 2 shows a balanced system including a
shielded cable pair, such as described in AES3-1992
(r1997) [2, 3]. The TX output and RX inputs are
differential. This is intended to provide rejection of
common-mode noise coupled into the RX input.
The function of these systems is to transmit and
recover data without errors, and to recover clocks
with minimal increase in jitter. The author has
discussed the use of transformers in digital audio
systems in a previous paper [4] and developed a
powerful measurement technique, Induced Jitter
Histograms, for measuring the interference
susceptibility of these systems [5].
Switch-mode power supplies usually operate in the
range between 20 kHz and 10 MHz. These supplies
must meet regulatory requirements for radiated and
conducted EMI, but they can emit sufficient
interference to affect high-resolution systems.
Shielding and grounding technique has been
discussed extensively in the literature [6, 7, 8,]. These
papers are directed towards baseband audio, but the
same basic principles apply to digital audio
transmission systems. The high-resolution designer
who seeks to approach theoretical performance
should consider a system design using EMI noise
reduction techniques, RF layout practice, grounding
and shielding to achieve the best possible noise
immunity and transmission fidelity.
Figure 3 is a two-channel, balanced system
illustrating some of the noise sources and coupling
mechanisms mentioned above. Figure 4 defines the
normal (differential) mode and common-mode
currents generated by an interference source [9].
Normal-mode current flows in a circuit from a source
to a load and back, while common-mode currents are
coupled equally into both conductors, and flow to the
load via stray capacitances to ground.
2.2 Resistively Coupled Interference
1.1.1. Application to Separated Clocks
Figure 5 illustrates resistive (or galvanic) coupling of
noise between device #1 and #2 by common
impedance shared in the return (“ground loop”). The
common impedance depends on the length and
copper area of the conductors such as PCB traces,
ground planes, chassis to earth connections, etc.
The AES/EBU and S/PDIF type formats embed clock
and data in a single bit stream, and recover the clock
with a phase-locked loop (PLL). Other transmission
formats use separate clock and data (e.g. SDIF-2,
“superclock”) to reduce recovered clock jitter by
eliminating the PLL for clock recovery. The
transmission
system
topology,
measurement
techniques and solutions discussed can be applied to
either method of digital audio transmission.
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Effects of Interference in Digital Audio Transmission
2.3 Capacitively Coupled Interference
In a typical receiver, the impedances to ground
include bias resistors inside the IC and external to it,
stray capacitances to ground and the junction
capacitance of any protective diodes. Since diode
junction capacitance is a function of applied voltage,
there will be both dynamic and static unbalance of
the impedances to ground. Other possible sources of
unbalance can include capacitors, transformers, noise
filters etc.
Figure 6 shows capacitive coupling between noise
source #1 and device #2. The stray capacitance may
represent adjacent cable pairs, PC board traces, etc.
The degree of coupling depends on the stray
capacitance and the load impedance at the receiver.
2.4 Inductively Coupled Interference
2.6 Unbalanced Inputs and Outputs
Figure 7 illustrates inductive coupling between two
devices. Noise source #1 generates a current that
drives load #1. Device #2 source drives input #2. Any
circuit will have stray inductance proportional to the
loop area encircled by the current flowing. A mutual
inductance must exist between conductors #1 and #2 ,
increasing as the loop areas approach each other. This
is in effect a transformer! Long cables with multiple
conductors and circuits with large enclosed areas will
have substantial coupling. Twisted pair cables reduce
the loop area of the normal-mode current by
changing the direction of the field with each twist.
The mutual inductance between pairs is never zero,
since the twisted wires must have some space
between them (e.g. for insulation).
The unbalanced system in Figure 1 has no inherent
rejection of common-mode noise. The common
shield carries both signal and noise currents between
the equipment chassis, which can cause noise and
interference problems.
3. INTERFACE CIRCUITS
Confusion exists in the details of the interface circuit
between the digital signal and the transmission cable.
For example, industry standards [1-3] for
transmission differ in the use and specifications of
transformers. IC manufacturer's application notes and
evaluation board circuits show wide variations in
circuit design recommendations and parts.
2.5 Common-Mode to
Normal-mode Conversion
It is very difficult to obtain the internal circuit details
of digital audio ICs. The IC specifications reveal few
details about the interface circuit. We reviewed
several manufacturer's data sheets and discussed the
circuits with the IC designers to clarify the topologies
used. Balanced inputs and outputs are generally RS485 compliant and single-ended interfaces are usually
logic level requiring external drivers and receivers.
We assume RS-485 type drivers and receivers are
used in the ICs unless otherwise indicated on the
spec sheets.
Balanced connections are intended to reject commonmode noise. Figure 8 shows a balanced system
similar to Figure 4, with the addition of stray
impedances to ground from either side of a balanced
load. Common-mode noise current flows through the
balanced cable, one-half of the total current in each
conductor, if the stray impedances to ground were
equal.
Since the stray impedances are never exactly equal,
perfect balance cannot be achieved in practice. The
common-mode current will produce a normal-mode
noise voltage across the load, as shown by (1).
(1) VinDM =
3.1. Analysis of Transmitter Circuits
Figure 9 shows the output stage of an RS-485
compatible driver similar to the SN75174 family. The
half-bridge output stage is used in most digital audio
transmitter ICs. The balanced outputs are
complementary.
Icm Zload ( Z1stray − Z2 stray )
2 Zload + Z1stray + Z2 stray
The normal-mode voltage depends on the degree of
imbalance of the stray impedances to ground and the
ratio of load impedance to the sum of the impedances
to ground.
3.1.1. Sensitivity of TX to Induced Jitter
Conducted interference can enter the TX connection
and contaminate signals used at other points in the
equipment.
For example: Icm = 5 mA, Zload = 5 kΩ, Z1stray =
250 kΩ, and Z2stray = 200 kΩ, VinDM = 1.375 V.
Figure 10 shows a balanced TX circuit with a
transformer driving an AES/EBU output. Commonmode noise enters the cable by capacitive coupling.
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3.3. The Effect of Transformers
The noise current flows through the transformer's
primary-secondary capacitance CS and into the TX IC
outputs. A portion of this current will flow to either
power or ground, depending on the instantaneous
state of the IC output half-bridge.
The receiver interface requires a transformer to
provide significant rejection of high frequency
common-mode noise.
If a differential amplifier were used (e.g. external to
the RX IC) its common-mode rejection (CMRR) will
rolloff above the high frequency breakpoint. The
CMRR of the transformer is inversely proportional to
its P-S capacitance, so the high frequency rolloff of
its CMRR is at a substantially higher frequency than
that of the amplifier. Active circuitry cannot replace
the transformer.
The ground plane, power plane and IC connections
have some inherent inductance and resistance. The
common-mode noise current induces noise voltages
on these parasitic impedances. This noise can affect
clocks and data in other parts of the TX circuit.
3.2. Analysis of Receiver Circuits
Figure 11 shows a few RX IC manufacturer's
suggested interface circuits. The upper two are
balanced inputs, both with and without a transformer.
The lower left is a typical S/PDIF single ended input.
The lower right shows a more advanced balanced
circuit, with a shielded transformer and overvoltage
protection diodes.
A low-capacitance transformer increases the
impedance of the common-mode noise path.
Optimized low-capacitance transformers can achieve
1 - 2 pF vs. 15 - 40 pF for ordinary types. Optimized
transformers with interwinding (Faraday) shields can
further reduce this capacitance to 0.5 - 1 pF!
Certain industry recommendations for transformer
bandwidth are misleading. A well-designed
transformer must have ample bandwidth and
minimum pulse aberration [4]. Modern systems must
operate over a wide range of Frame Sync (FS) e.g. 32
to 96 kHz or 192 kHz. The need to pass signal
harmonics and maintain phase linearity requires a
much wider bandwidth than is often assumed to be
sufficient.
RX ICs with single-ended inputs are CMOS
compatible, and require external circuitry for all
signal conditioning e.g. for common-mode rejection
(CMRR). Figure 12 shows typical IC internal
circuitry for balanced inputs. The most common
circuit is a comparator with some hysteresis. The
comparator has little capability for CMRR. The lower
half of the figure has an input using two separate
stages, typical of RS-485 ICs such as the SN75175
family. The A and B inputs are Schmitt triggers of
opposite polarity, to provide a measure of noise
immunity. There is no cross-coupling of the two
inputs and hence no common-mode rejection.
3.2.1.
A previous paper [4] shows that the transformer's low
frequency cutoff Flow affects jitter due to intersymbol
interference. We recommend an Flow = FSmin/3, e.g.
for 44 kHz FSmin , ~ 10 - 15 kHz. The high frequency
cutoff Fhi should pass at least the 5th harmonic of the
highest half-bit frequency, 128x FSmax. With a FSmax
= 96 kHz, the half-bit rate is 12.288 MHz so the
transformer Fhi should be at least 60 MHz. Optimally
designed transformers have a bandwidth ratio
Fhi / Flow of 3.5 to 4 decades, e.g. 10 kHz to 100 MHz.
Sensitivity of RX Input To Induced Jitter
Figure 13 shows a receiver with a common-mode
noise source on the input. The noise current flows
through
the
transformer
primary-secondary
capacitance CS, to the IC inputs. The current is
coupled to the RX IC power and ground through the
impedances (in the IC or external) to ground and the
stray capacitance from inputs to power and ground.
This current generates noise voltages across the
parasitic impedances between various points in the
circuit and contaminates power and ground planes.
3.2.2.
Some designers attempt to use the transformer to
limit the risetime of the signal. This approach is not
optimal, due to tradeoffs in transformer design. A
transformer with adequate bandwidth and low pulse
aberration cannot also limit the risetime of the signal
to the desired values. The overall risetime should be
limited by other system components.
Noise Induced Jitter in Reclocking RX
Figure 14 has a reclocking stage to reduce the
recovered clock jitter in the system of Figure 13. The
flow of noise current through the power and ground
planes contaminates the output of the reclocking
stage, which increases the jitter of the clock output to
the D/A converter.
3.4. Simulation of Differential Amplifier
A computer simulation demonstrates the effect of
transformer capacitance on RX CMRR. Figure 15 is a
model of a transformer T1 driving a differential
amplifier. A common-mode noise source is applied to
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Effects of Interference in Digital Audio Transmission
both sides of the transformer primary. This generates
a noise current through the interwinding capacitance
C1, which flows to both sides of the transformer
secondary. The noise current through the amplifier
input impedance R15/C2 results in a common-mode
voltage at both (paralleled) inputs of the differential
amplifier.
The example in (3) calculates the time error for a full
scale 15 kHz sinewave digitized to 20-bit resolution.
The LSB equivalent sample time error is 20 ps!
(3) te = 2 − 19 / 30kπ = 20.24 ps
4.1.2. Decoded Data Errors
Figure 16 is a plot of the CMRR for this model. The
parameter is the transformer interwinding capacitance
C1. The upper trace is the CMRR of the amplifier
alone (C1 = infinite). A high capacitance transformer
(type X) with C1 = 25 pF, middle trace, provides
some rejection at relatively low frequencies, 100 kHz
– 500 kHz, but has little effect above 1 MHz.
Figure 17, upper trace is the eye pattern at the input
of an RX IC with a differential probe from RXP to
RXN, taken without any common-mode noise.
In the lower trace of Figure 17, common-mode noise
is applied to the inputs via the cable and coupled
through a high capacitance transformer X. The noise
closes the eye pattern considerably and increases the
RX clock jitter.
The low capacitance shielded transformer (type S2)
with C1 = 0.5 pF, lower trace, shows greatly
improved CMRR throughout the frequency range. At
100 kHz transformer S2 shows an improvement of 34
dB in CMRR compared to the high capacitance
transformer X. At frequencies above 10 MHz,
transformer X provides 1 dB rejection, while the
CMRR improvement of S2 is 16 dB compared to
type X. The transformers mentioned here are shown
in figures 36 and 37, and described below.
4.2. Common-Mode Rejection (CMRR) of
Interface Circuits
Single-ended RX inputs have no common-mode
noise rejection. Most balanced receiver circuits use
Schmitt triggers to provide a measure of noise
immunity, but have little or no common-mode noise
rejection; transformers must be used to provide this
function. Transmitter ICs are also susceptible to
common-mode noise and require transformer
isolation to reject such noise.
This result and plot shape are explained by the effect
of the capacitive divider formed by the transformer
self-capacitance and the input and stray capacitance
of the amplifier.
4.3. Power Supply and Ground Plane
4. INTERFERENCE EFFECTS
Noise Contamination
Both TX and RX sides of a system serve as paths for
common-mode noise currents passing into the IC
input/output pins. The currents flow through the IC
and into power and ground planes contaminating
other circuitry.
EMI, crosstalk and noise increase jitter and the
recovered data's error rate. Other effects include
power and ground plane noise contamination and
reduced regulatory compliance for conducted
emissions and circuit susceptibility. Transmit and
receive circuits are both affected by common-mode
noise.
This problem is more severe on the TX side since the
output is connected to either Vcc or ground,
depending on the state of the transmitter input. The
noise is modulated by the signal applied to the TX IC
half-bridge transistors.
4.1. Susceptibility of Interface Circuits
4.1.1. Sensitivity of Clocks To Induced Jitter
Sampling clocks determine the instant of A/D or D/A
converter sample time. Jitter in the sample clock must
result in a corresponding error in the digitized or
reconstructed audio. Equation (2) is a calculation
based on dv/dt for a system of N bit resolution and an
audio signal sinewave of radian frequency ω. The
sampling time error, te is inversely proportional to
signal frequency and resolution [10 - 15].
(2) te = 21 − N / ω
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Effects of Interference in Digital Audio Transmission
5.1. CM Interference Test Fixture
4.4. Regulatory Compliance
Figure 18 shows the details of the test fixture. A low
jitter squarewave at 128x FS drives the RS-485 TX.
The complementary outputs are AC coupled to a
balanced attenuator to match a 110 Ω impedance. A
1:1 transformer connects to a 31-m length of CAT 5
cable. The transformer is mounted on an IC header,
and is easily changed by using a ZIF socket.
All electronic equipment requires regulatory
compliance for conducted and radiated interference
emission [16]. Some regulations provide for testing
of the conducted interference susceptibility of
equipment to such noise.
4.4.1. Circuit Susceptibility
IEC 61000-4-6 [17] is a conducted immunity
standard, tested with interference intentionally
applied to the equipment’s input and output cables,
while the interference frequency is swept over a wide
range. The equipment should operate properly despite
the applied interference.
The cable has 5 pairs, one for the signal and 4 other
pairs paralleled together to a common-mode
interference source, applied through a wideband
isolation transformer to break ground loops. The
noise source may be connected to either the TX or
RX end of the cable.
4.4.2. Conducted Interference Emission
The output of the cable pair carrying the signal is
transformer coupled, with that transformer also
mounted on a ZIF socket. The transformer secondary
is terminated with 110 Ω and applied to the input of
the RS-485 RX. The output of the RX IC is
connected to the counters, time analyzer and scope.
Many national and international regulations cover the
emission of EMI for various types of equipment.
Compliance with conducted emission requires noise
levels on all connectors and cables to be limited
according to frequency and equipment type [16, 17].
Both TX and RX terminations are center-tapped to
allow observation of the common-mode noise at that
point. The RS-485 ICs include 10 Ω current sampling
resistors in series with their power and ground pins.
A probe samples the voltage across the 10 Ω resistors
to observe noise currents to power and ground. The
probe connects to the network analyzer's input via
AC coupling capacitors and a 39 Ω matching resistor
through a 50 Ω cable. The AC coupling allows
checking of the +5V supply noise current.
The same basic principles governing noise
susceptibility apply to EMI emission. For example, a
balanced cable with transformer-coupled output will
also isolate common-mode noise emitted from the
equipment [18].
5. MEASUREMENT TECHNIQUES
Equipment manufacturers and designers often neglect
to test for interference susceptibility. It is difficult to
characterize a complete digital audio system for noise
susceptibility because of the effects of encoders,
decoders, clock recovery phase lock loops, etc.
5.2. Application of Network Analyzers
An Agilent HP3577 Network Analyzer is used to test
the effect of common-mode noise over a wide
frequency range. The analyzer source drives the
common-mode input of the test fixture, and the 4
unused cable pairs. The source is leveled using an
HP35676A divider (a precision splitter/directional
coupler) to sample the source voltage and to drive the
analyzer's reference input.
We approached the problem of interface testing by
simplifying the digital audio system to just the
transmission TX and RX ICs interface and the
transmission cable. We use a squarewave at the halfbit rate 128x FS instead of the AES/EBU signal.
A balanced output is generated with an RS-485 TX
IC. This output is coupled to a multi-paired balanced
cable and then to an RS-485 receiver. Common-mode
noise is injected into the cable and the effects
observed.
The impedance mismatch represented by the cable's
capacitance (resonance as well as standing wave
effects) causes the analyzer's source to fluctuate
widely as the frequency is swept. This mismatch is
compensated for by normalizing the analyzer to a
circuit omitting the transformer. A shorting plug
replaces the transformer and the network analyzer is
swept through the desired frequency range, e.g. 100
kHz to 100 MHz. The measurement with the shorting
plug is normalized to 0 dB, the upper line of the
A network analyzer, statistical counter, digital scope
and time interval analyzer connected to the output
characterize the effects of noise and interference on
the test fixture's transmission system. The induced
jitter histogram technique employed was described
by the author in a previous paper [5].
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In DSOs, the residual jitter and histogram resolution
depends on signal frequency, memory depth and
other characteristics of the particular scope selected.
Signals at frame sync frequencies can typically be
analyzed with 10 ps to 100 ps resolution. Due to
trigger jitter, memory depth and software, these
scopes can be rather costly and complex to setup
compared to the counters and dedicated analyzers
discussed.
reference grid. The transformer is then replaced and
the analyzer swept again. The result is a direct plot of
the common-mode noise rejection increase due to
the transformer.
One test with the analyzer is rejection of commonmode noise in power and grounds. The CM noise
current enters both TX and RX circuitry through the
cable and the self-capacitance of the transformers on
both sides of the cable.
5.4. Induced Jitter Histogram Technique
The analyzer is connected via the probe to TX or RX
IC's power or ground current sampling resistor. The
input signal to the TX IC is either grounded or held
high to remove the modulation effect of the
transmitted signal from the noise. The TX output
stage passes the noise current to either the ground or
power plane.
This technique was developed by the author to
provide a sensitive test of the effect of system
components such as transformers on common-mode
noise rejection [5]. Interference is applied to a
transmission system similar to the test fixture
described above. The interference source couples
common-mode noise into the RX via the transmission
cable.
5.3. Jitter Measurement Equipment
The receiver output goes to the time interval analyzer
to measure the jitter and the shape of the period
histogram. The histograms in figures 23 - 32 show
the mean period at the center of the horizontal axis
and the deviation from the mean in increments of
100 ps per bin. The vertical axis is the number of
samples in that bin. The Jitter Histogram is
effectively a probability distribution of a sample set
of periods centered around the mean period. This is a
very sensitive test for comparison of the commonmode noise rejection of transformers, cables,
receivers, differential amplifiers and other devices in
the signal path.
Figure 19 shows specifications of various types of
equipment for measuring jitter. Since the peak-topeak, weighted jitter [12, 14] cannot be tested by
most of this equipment, we elected to measure the
RMS wideband jitter, which is the standard deviation
σ, of a sample set of periods. The results are fine for
comparisons and can be correlated to the weighted
P-P jitter.
The simplest technique uses a time interval counter
with statistics setup to measure the period, and to
take a set of samples (e.g. 500 - 5,000). The
HP5370B counter (circa 1970s!) has 20-ps residual
jitter. Later versions, e.g. HP5372B and Stanford
Research Systems SR620, can display time variation
of the period and also jitter histograms. The
HP5372B has a CRT display while the SR620 uses a
numeric display and outputs graphics to an external
scope. Residual jitter and resolution of these
instruments is ~100 ps.
6. MEASUREMENT RESULTS
The test fixture was operated with a 6.144 MHz test
signal and either a 3.6 MHz interference source or the
network analyzer, swept up to 100 MHz. Various
transformers were used in both TX and RX.
Observations at one side of the system were made
with the best low-capacitance transformer on the
opposite side. Data taken includes scope photos at
several points, network analyzer plots of power and
ground noise current vs. frequency and jitter
histograms taken at both transmit and receive
locations.
Time interval analyzers have been specifically
developed for telecom and CD/disk drive
measurements. These instruments provide convenient
statistical analysis and dedicated jitter histograms. A
good example is the Yokogawa TA320/520/720
series. The TA320 was employed in these tests.
6.1. Test Fixture Waveforms
A wide range of digital oscilloscopes (DSO) are
available, some of which are capable of jitter
measurements. In most, memory, software or
firmware options are required to provide these
functions. Tektronix TDS5000 and TDS7000 series
and LeCroy Wave Runner/Wavepro are examples.
Figure 20 shows the input to the transmitter IC and
the common-mode noise observed at the primary of
the TX transformer. This demonstrates the effect of
common-mode noise coupled into the cable.
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6.4. TX Induced Jitter Histograms
Figure 21 shows the noise seen at the RX IC input.
The high capacitance transformer X passes
substantial noise, while low capacitance transformer
S2 attenuates most of the noise.
The effect of common-mode noise on the TX side
was observed by placing the time analyzer at the
primary side of the TX transformer. Common-mode
noise on the cable induces jitter at that point by
passing current through the transformer self
capacitance. Several types were used for the TX
transformer,
while
keeping
low-capacitance
transformer S1 on the RX input.
6.2. Network Analysis Plots
Figure 22 is a plot of common-mode noise current to
ground at the RS-485 TX IC, referred to a circuit
without a transformer. The sharp peaks and dips are
due to resonance (e.g. transformer inductance and
cable capacitance) and mismatch of the commonmode impedance to the network analyzer output
impedance. The test was normalized to the upper
grid reference line. The reference level at 3.544 MHz,
(no transformer) was 614 uA RMS of noise current at
the TX IC return pin. The rolloff below 100 kHz was
due to the very low signal levels at these frequencies.
Figure 27 was taken with no transformer and shows
jitter of 19.367 ns with a scattered histogram of many
discrete periods. Figure 28 uses a high capacitance
transformer X with 85 ns of scattered jitter. Figure 29
shows low capacitance unshielded transformer S1,
which reduced the jitter to 1.64 ns. Figure 30 used a
very low-capacitance shielded transformer S2, with
jitter 302 ps and a nearly ideal Gaussian histogram.
Transformer X provides 8 dB of attenuation at low
frequencies and virtually none at high frequencies.
Shielded low-capacitance transformer S2 increases
common-mode rejection to over 20 dB at frequencies
up to 15 MHz and still provides 10-20 dB of
improvement up to 40 MHz. Similar results are seen
at the power pins of the ICs. The rolloff of both
curves above 50 MHz may be an artifact of the test,
to be investigated in the future.
6.5. Interpretation of Jitter Histograms
The shape of the jitter histogram reveals the nature of
the variation of clock period about the mean value.
Figure 31 shows several patterns:
Upper: Gaussian distribution of period is random.
Middle: Bi-value Gaussian, periods distributed
normally about two discrete periods.
Lower: Sinewave variation of period with time.
6.3. RX Induced Jitter Histograms
Figure 32 has more examples:
RX tests were performed using low-capacitance
transformer S1 on the TX side. The system residual
jitter is 150 ps, representing the noise in the RS-485
ICs, the signal generator and the internal noise of the
analyzer. The effect of transformers on the RX side
was observed by changing the RX transformer. The
output of the RX IC is analyzed by the Yokogawa
TA320 time interval analyzer.
Upper: Very Narrow Gaussian (residual jitter)
Second: Symmetric Period Variation
Third: Uniform Period distribution
Lower: Multiple Discrete Periods
7. RECOMMENDATIONS FOR
IMPROVEMENT
Figure 23 shows the induced jitter without any
transformer. Common-mode noise induces a jitter of
1.505 ns RMS. Figure 24 shows the results with a
high capacitance transformer X at the RX. The jitter
is 3.104 ns and the histogram is uniformly distributed
with peaks at the extreme ends.
7.1. Applications of Transformers
These results prove the transformer's dramatic effect
on system performance when noise is present. Both
TX and RX sides should use low-capacitance or
shielded low capacitance transformers. The
bandwidth of the transformer must be adequate for
the maximum sample rate anticipated, e.g. for
192 kHz sample rate, the bandwidth should be at
least 125 MHz. Low pulse aberration requires control
of the transformer's phase linearity. If a shielded
transformer is used, the shield should be tied to the
ground plane, near the connection to the IC return
pin.
Figure 25 shows the RX output jitter using a high
capacitance shielded transformer Y at the RX. Jitter
has increased to 7.83 ns. The histogram shape
indicates a sine variation of period with time. The
phase response of this transformer may account for
the result. Figure 26 is the result using optimized
low-capacitance transformer S1, with 297 ps jitter
and a nearly ideal Gaussian histogram.
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8
Effects of Interference in Digital Audio Transmission
CONFIDENTIAL! Prepublication Preview only!
The capacitance of the shielded transformers was
measured with a guarded high frequency bridge: it is
the effective capacitance from primary to secondary
with the shield grounded. Common-mode rejection
was checked at 6 MHz using the network analyzer.
Pulse aberration was measured with a low aberration
generator and digital oscilloscope in a precision
constant impedance test fixture connected to the
scope via a precision 50 Ω cable.
7.1.1. Interstage Transformer Applications
Figure 33 is a modification of Figure 14 with a
transformer added between the reclocking stage and
the DAC to break the path of common-mode noise
current. This technique reduces contamination of the
reclocking stage's output clocks. The same technique
can be used to couple clocks or signals from a
transmit side IC to other stages. This avoids
contamination of the clocks and data by commonmode noise coupled from the output connector.
The design and construction of a transformer has
substantial effects on its performance. Figure 37
illustrates some typical transformer internal details
and construction. The winding design, and material
quality and assembly technique determine the
capacitance, leakage inductance and pulse aberration.
7.1.2. Balanced System Using Shielded
Transformers
Figure 34 is the balanced system of Figure 2 with the
addition of shielded transformers on both transmit
and receive sides. 30 - 40 dB of improvement in
CMRR and noise immunity can be obtained at both
sides of the system.
Plastic injection molded parts such as model X
(Figure 37A) usually contain small toroidal cores
(Figure 37B) with primary and secondary very
closely spaced, resulting in high self-capacitance.
The plastic molding has a dielectric constant (K) of
3.2 to 4.5, which increases the interwinding
capacitance. Common-mode rejection and pulse
aberration suffer greatly.
7.1.3. Unbalanced System with Transformers
Unbalanced systems use the cable shield as the
signal's return path. They have substantial noise
susceptibility due to noise voltage between the
transmit and receive equipment grounds. The
situation is improved by inserting transformers.
Figure 35 is the unbalanced system as in Figure 1,
with 2:1 ratio transformers on both TX and RX sides
to improve noise rejection and provide 6 dB of stepup of received signal level [4, Fig. 18].
E core transformers generally have lower selfcapacitance and better performance than toroids, but
great differences exist in these types. Most are
random wound by automated machine and varnish
impregnated such as Part Y (Figure 37C). The
varnish dip increases the self-capacitance. The result
is usually better than the toroids, but still far from
optimal. Model Y has a relatively low shielded
capacitance, but performs rather poorly as indicated
in the chart of Figure 36 by its high jitter, pulse
aberration, and ratio error.
The transformers provide a balanced connection to
the TX and RX ICs. This breaks the path for
common-mode noise current in the cable shield. The
circuit allows use of unbalanced coaxial cables and
connectors, while providing the benefits of the
reduction of common-mode noise by the
transformers.
7.1.4. Comparison
of
Digital
Transformer Parameters
The best transformers for digital audio transmission
use very high quality core and bobbin materials and
precision optimized windings to yield superior
results. Transformers S1 and S2 (D) are examples
which are optimized for very low capacitance and
excellent pulse aberration. They have the lowest
possible self-capacitance compared to the other types.
The trade off is cost vs. performance [4, 5].
Audio
Figure 36 compares the parameters and performance
of a wide range of commercially available digital
audio transformers. The 4 parts tested with jitter
histograms in the figures are identified by the *.
Those include: high capacitance model X, low cost,
shielded type Y, optimized very low-capacitance part
S1 and optimized, shielded low-capacitance
transformer S2.
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CONFIDENTIAL! Prepublication Preview only!
Effects of Interference in Digital Audio Transmission
choke inductance. 30 - 1000 Ω are typical commonmode choke impedances. Figure 39, upper half,
shows the dimensions and impedance of a bead core
with 1 turn and a finished common-mode choke
made using that core.
7.2. Transient Protection
Digital audio transmitter and receiver ICs generally
do not have much transient protection. The inputs and
outputs may be clamped to power and ground with
internal protective diode junctions, but excess
currents or voltages can easily damage those
junctions. RS-485 interface ICs have a higher level of
protection, including internal protective Zener
junctions to limit the transient voltage, but are not
"bulletproof".
The lower half of Figure 39 shows a commercially
available SMD CM choke. Manufacturers such as
TDK and Murata make both through-hole and SMD
chokes. CM chokes also have some DM mode
inductance, and certain models are specifically
designed to combine both functions in a single device
by maximizing the differential inductance. "Data
Line" filters are available which include CM/DM
chokes and capacitors combined in one package to
reduce parts count and PCB footprint.
The use of transformer isolation provides the highest
level of common-mode transient protection due to the
low capacitance, high CMRR and the barrier
provided by the insulation between windings (500 1500 V). Note that digital audio transformers are not
designed or rated for safety (power mains) barrier
application!
7.2.2 Ferrite Shield Beads and Capacitors
Separate ferrite beads on each signal conductor can
be used to protect against differential-mode
interference above the desired signal passband.
7.3. Filter Considerations: CommonMode Chokes and Beads
The small capacitors placed after the chokes (both
differential and common-mode) create two-pole L-C
filters to increase the rolloff from 6 to 12 dB/octave
above the cutoff frequency. The combination of
normal-mode and common-mode chokes plus the
common-mode rejection of the shielded transformer
provides the maximum attenuation of interference.
Extensive literature on EMI filter design can be
consulted to optimize these filter components [19].
Interference susceptibility at high frequencies can be
improved by the use of ferrite beads and commonmode chokes. Figure 38 shows an improved receiver
circuit with shield beads, a common-mode choke and
a shielded transformer.
7.2.1 Common-Mode Chokes
At frequencies above 20 MHz, the interference
suppression of even the best transformer will begin to
roll off, since it is impractical to reduce primary to
secondary capacitance much below ~ 1 pF. An
improvement is to add a small common-mode choke
between the connector and the transformer, as shown
in Figure 38. These chokes must be selected to
provide the desired attenuation at frequencies where
the transformer common-mode rejection begins to
fall off, but must not affect the desired signal's
amplitude or phase characteristics. Ferrite cores can
be wound to make this part, or ready-made CM
chokes can be used.
7.2.3 Reciprocity
The noise rejection provided by the transformer,
bead, common-mode choke, etc. affects the noise
current flow regardless of the location of the noise
source. Due to reciprocity, the suppression measures
taken to protect against external EMI and incoming
CM noise will also attenuate internally generated
interference, and reduce the conducted noise
emission leaving the equipment over the digital audio
cables. These techniques can be applied at both
transmitter and receiver. Note that the degree of
attenuation will be different for each direction, due to
the different source and termination impedances as
seen by the filter.
The common-mode choke consists of a ferrite bead
or small toroid, composed of wide band RF ferrite
material. The balanced signal conductors are wound
through the bead or toroid using a twisted pair wire
(bifilar). Several turns are used to increase the
inductance. The normal-mode signal travels up one
wire and back through the other, canceling the
magnetic flux in the ferrite core, so there is no effect
on the normal mode signal. Common-mode noise
current flows in the same direction through both
wires and encounters the high impedance of the
7.4. PCB layout
Figure 40 is a suggested PC board layout technique to
achieve maximum isolation between primary and
secondary of the transformer. The ground plane is
split under the transformer and the secondary of the
transformer goes to the RX IC input via short traces.
The shield of the transformer is connected to the
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Effects of Interference in Digital Audio Transmission
Commonly used transmitter and receiver ICs have
limited (if any) ability to reject the common-mode
noise. One effect of the noise is increased clock jitter.
ground plane half at the secondary side of the
transformer. One layout technique is to use a "star"
connection of several ground planes, to minimize the
effect of noise currents in the ground planes.
The noise rejection of single ended ICs can be
improved by the use of RS-485 transmitters and
receivers and balanced connections with transformer
coupling. Clock outputs from reclocking stages are
also susceptible to contamination by common-mode
noise and EMI interference through their power and
ground connections.
7.5. Receiver Termination
Receiver circuits are normally terminated at the IC
input pins after the transformer and/or passive filters
(combined into a passive network for this
discussion). The secondary termination damps the
inductances and capacitances of the network, thus
reducing pulse response ringing and smoothing the
frequency response. The input impedance at the
connector will be affected by the passive network,
causing the impedance to deviate over the frequency
band from the ideal resistive value. With secondary
termination we have a tradeoff between CMRR and
the effect on impedance.
High-resolution systems should use high-quality,
low-capacitance, low-aberration transformers at both
TX and RX sides. The noise rejection of a
transformer is a function of its interwinding
capacitance, interwinding shields and the receiver
common-mode impedance. Use of an optimized
transformer will improve common-mode noise
rejection, reduce jitter and reduce noise
contamination. Another benefit is greatly increased
immunity to common-mode voltage transients.
Moving the termination to the input connector gives a
nearly ideal resistive load, but the passive network
will be undamped and "ring", the amount of pulse
aberration depending on the filter components.
Passive filter components such as beads, commonmode chokes and shunt capacitors can further
improve the noise immunity and CMRR of a design.
We have developed a solution using double
termination. A portion of the termination resistance is
placed on either side of the passive network, with the
parallel combination equal to the desired termination
impedance. In fig 41, a 110 Ω input impedance is
realized with 165 Ω input termination Rin and 330 Ω
at the IC input, Rsec.
ACKNOWLEDGMENTS
The author wishes to thank Dr. Richard Redl of ELFI
S.A., Dr. Markus Erne of Scopein Research S.A., Dr.
Steven Harris, and James A. Moorer for their very
kind
assistance,
comments
and
support.
Rin swamps the reactive effects of the network and
Rsec damps the ringing. Figure 42 illustrates the
improvement (plotted as the reflection coefficient)
over a 10 kHz to 100 MHz band. The usual
secondary termination of 110 Ω is the upper trace
while the double termination is the lower trace.
8. CONCLUSIONS
The circuitry of a high-resolution digital audio
interface is especially sensitive to common-mode
noise, crosstalk and electromagnetic interference. The
design of interface circuits and printed circuit board
layouts must consider this interference susceptibility
to realize high quality, low jitter transmission of
digital audio signals.
New product designs should be tested for interference
susceptibility to detect and debug the effects of noise
and interference on clock jitter and data errors.
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Effects of Interference in Digital Audio Transmission
REFERENCES
[10] Harley, Robert – “ The Jitter Game,” Stereofile,
(1993 January).
[1] AES3-1995, – Transmission of AES3 formatted
data by unbalanced coaxial cable, AES, New York,
NY, (1995).
[2] AES3-1992 (r1997) – Serial transmission format
for digital audio data (Revision of AES3-1985) fig. 6
[11] Harris, Steve – “The Effects of Sampling Clock
Jitter on Nyquist Sampling Analog-to-Digital
Converters, and on Oversampling Delta-Sigma
ADCs,” Journal of the Audio Eng. Soc., vol. 38, no.
7/8, (1990 July/August).
[3] EBU 3250, European Broadcasting Union, Ed. 2
(1992).
[12] Dunn, Julian – “Jitter Theory - Part Two,”
Audio Precision Newsletter, vol. 15, no. 1 (2000).
[4] Paul, Jon – “The Effect of Transformers on
Transmission of Digital Audio Signals,” Preprint
4840, presented at the 105th AES Convention, San
Francisco, 1998 September.
[13] Cabot, Richard – “Digital Audio Transmission Why Jitter is Important,” Audio Precision Newsletter,
vol. 11, no. 1 (1996).
[14] Dunn, Julian – “Jitter Theory,” Audio Precision
Newsletter, vol. 14, no. 1 (1999).
[5] Paul, Jon – “Characterizing Digital Audio
Transformers with Induced Jitter Histograms,”
Preprint 5448, presented at the 111th AES
Convention, New York, 2001 December.
[15] Trischitta, Patrick R – “ Jitter in Digital
Transmission Systems,” Artech House, ISBN 089006-248-X, (1989).
[6] Fause, Kenneth – “ Fundamentals of Grounding,
Shielding, and Interconnection,” JAES, vol. 43, no. 6,
pp. 498 (1995 June).
[16] Ramie, Jerry – “EMC Testing and Design: The
Impact of Emerging European Standards,”
Compliance Engineering Magazine, vol 18, no 6, pp
62-73 (2001 July/August).
[7] Macatee, Stephen – “ Considerations in
Grounding and Shielding Audio Devices,” Journal of
the Audio Eng. Soc., vol. 43, no. 6, pp. 472, (1995
June).
[17] IEC 61000-4-6 Conducted immunity standard
(1996 April).
[18] Schlicke, Heinz – “Electromagnetic
Compossibility,” Marcel Dekker, Inc. NY, NY.
ISBN 0-8247-1887-9, (1988).
[8] Muncy, Neil – “ Noise Susceptibility in Analog
and Digital Signal Processing Systems,” Journal of
the Audio Eng. Soc., vol. 43, no. 6, pp. 435, (1995
June).
[19] Nave, Mark – “Power Line Filter Design for
Switched-mode Power Supplies,” Van Nostrand
Reinhold, Inc. NY, NY. ISBN 0-442-00453-2
(1991).
[9] Redl, Richard – “ Predicting and Suppressing
Conducted EMI in Power Electronics Systems,”
seminar at the University of Salerno, 2000. (The
author is with ELFI, S.A., Switzerland.)
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Effects of Interference in Digital Audio Transmission
Fig. 1 Unbalanced Transmission System
Fig. 2 Balanced Transmission System
RECEIVER
TRANSMITTER
BALANCED CABLE
RX GND PLANE
TX GND PLANE
RECEIVER
CHASSIS
GROUND
TRANSMITTER
CHASSIS
GROUND
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Effects of Interference in Digital Audio Transmission
Fig. 3 Balanced Transmission System with
Noise Sources
RF INTERFERENCE
Balanced
TRANSMITTER
Balanced
RECEIVER
Balanced Cable
Ccm
Ccm
Crosstalk
CM to DM noise conversion
Coupling of ground currents
Fig. 4 Normal-Mode and Common-Mode
Currents
INTERFERENCE SOURCE
Vnormal mode
Inormal mode
LOAD
Icommon mode
Cs stray
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CONFIDENTIAL! Prepublication Preview only!
Effects of Interference in Digital Audio Transmission
Fig. 5 Resistive Coupled Interference
(“ground loop”)
DEVICE #2
DEVICE #1 LOAD
A
1
2
7
DEVICE #1 SOURCE
14
DEVICE #2 INPUT
100nH
CM NOISE
CURRENT
Zcommon
0.1 Ohm
Fig. 6 Capacitive (Electric) Coupled Interference
14
DEVICE #2
DEVICE #1 SOURCE
Cs
DEVICE #2 INPUT
1
A
2
7
STRAY
DEVICE #1 LOAD
DEVICE #2 SOURCE
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Effects of Interference in Digital Audio Transmission
Fig. 7 Inductive (magnetic) Coupled Interference
14
DEVICE #2
DEVICE #1 SOURCE
1
A
2
7
DEVICE #2 INPUT
STRAY L
STRAY L
MUTUAL INDUCTANCE
DEVICE #1 LOAD
DEVICE #2 SOURCE
Fig. 8 Common-Mode to Differential-Mode Conversion
INTERFERENCE SOURCE
1/2 Icm
C1stray
Vnormal mode
+
1/2 Icm Zload
Vindm
Z1stray
C2stray
Z2stray
Vcommon mode
Icm
Cs stray
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Effects of Interference in Digital Audio Transmission
Fig. 9 RS-485 Output Driver and IC Manufacturer’s Suggested Circuits
RS-485 Output Driver
AES/EBU and S/PDIF Output Circuits
Fig. 10 Transmitter Common-Mode Noise/EMI
Current Paths
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Effects of Interference in Digital Audio Transmission
Fig. 11 RX IC Manufacturer’s Suggested Circuits
AES/EBU “Transformerless”
S/PDIF unbalanced 75 Ω
Minimal Transformer Coupled
Improved transformer coupled
Fig. 12 RX and RS-485 Input Circuit, Transfer Function
AES/EBU IC RX Input
RS-485 Transfer Function
RS-485 Input Circuit
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Effects of Interference in Digital Audio Transmission
Fig. 13 Balanced RX Common-Mode Noise Current
Fig. 14 Receiver with Reclocking
Stage Common-Mode Noise Current Paths
100nH
VCC
100nH
0.1 Ohm
PCB/LEAD parasitic L + R
Cbypass
0.1 mF...100 mF
T1
CM NOISE
CURRENT
Cs
parasitic
AES/EBU INPUT
2
1:2
1
3
R502
110 ohm
6
2
4
CM NOISE
CURRENT
Vcc
RECEIVER
0.1 Ohm
PCB/LEAD parasitic L + R
Vcc
CM NOISE
CURRENT
JITTER REDUCER
DAC etc.
4
3
1
100nH
0.1 Ohm
PCB/LEAD parasitic L + R
Csparasitic
100nH
100nH
0.1 Ohm
PCB/LEAD parasitic L + R
0.1 Ohm
CLK OUT
PCB/LEAD parasitic L + R
Csparasitic
Cs
parasitic
GND. OF IC
CM NOISE
SOURCE
CM NOISE
CURRENT
100nH
0.1 Ohm
PCB/LEAD parasitic L + R
GND. OF IC
100nH
CM NOISE
CURRENT
GND. OF IC
100nH
CM NOISE
CURRENT
PCB/LEAD parasitic L + R
PCB/LEAD parasitic L + R
0.1 Ohm
0.1 Ohm
100nH
0.1 Ohm
PCB/LEAD parasitic L + R
100nH
PCB/LEAD parasitic L + R
0.1 Ohm
100nH
0.1 Ohm
PCB/LEAD parasitic L + R
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Effects of Interference in Digital Audio Transmission
Fig. 15 Simulation Model of Common-mode Gain of
Transformer + CMOS Differential Amp.
Fig. 16 Transformer and Differential Amplifier
Simulation of CMRR vs. Frequency
NO TRSF.
LOW CAP TRSF S2
HI CAP TRSF X
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Effects of Interference in Digital Audio Transmission
Fig 17. RX Differential Signal Eye Pattern
with Common-mode Noise
NO CM NOISE
3.6 MHz CM NOISE
Fig. 18 Common-mode Interference Test Fixture
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Effects of Interference in Digital Audio Transmission
Fig. 19 RMS Jitter and Histogram Test Equipment
Type
Time
Interval
Counter
Time
Interval
Counter
Freq/Time
Interval
Analyzer
Manufacturer
SRS
Hewlett
Packard
Hewlett
Packard
Model
S R 6 20
5370B
5372B
URL
srsys.com
Output
Formats
LED
numeric,
ext histo
LED
numeric
Max
Frequency
300 MHz
RMS Jitter
Time
Interval
Analyzer
Time
Interval
Analyzer
Time
Interval
Analyzer
Yokogawa Yokogawa Yokogawa
DSO
DSO
LeCroy
TDS
TDS5032
TDS7154
TA320
TA720
TA520
yokogawa
.com
yokogawa
.com
yokogawa
.com
Waverun
LT262
JTA
Lecroy
.com
CRT,
histo,
time plot
LCD,
h is t o ,
time plot
LCD,
histo,
time plot
LCD,
histo,
time plot
LCD
histo,
time plot
LCD
histo,
time plot
100 MHz
500 MHz
14 MHz
80 MHz
43 MHz
350 MHz
To 1 GHz
25 ps
20 ps
100 ps
100 ps
100 ps
100 ps
100 ps
To 10 ps
R e s o l u ti o n
100 ps
20 ps
100 ps
100 ps
25 ps
25 ps
100 ps
100 - 200
ps
Relative Cost
$4000
$ 5 0 0 -4,000
$ 9 0 0 -5,000
$10,000
$28,000
$19,000
$7,300
$11,000,
$28,500
testequity. testequity.
com
com
tek.com
Fig. 20 Common Mode Noise at TX
TRANSMITTER
RECEIVER
Ccm
Ccm
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Effects of Interference in Digital Audio Transmission
Fig. 21 RX Inputs With CM Interference
HI CAP TRANSF. X
SHIELDED LO C
TRANSF. S2
Fig. 22 TX IC Power CM current
Hi Cap Trsf X vs. Shielded Low Cap Trsf S2
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Effects of Interference in Digital Audio Transmission
Fig. 23 RX Induced Jitter No Transformer
Jitter 1.505 ns RMS
Fig. 24 RX Induced Jitter
Transformer X Jitter 3.104 ns RMS
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Effects of Interference in Digital Audio Transmission
Fig. 25 RX Induced Jitter TX
Transformer Y, Jitter 7.83 ns RMS
Fig. 26 RX Induced Jitter Low Capacitance
Transformer S1, Jitter 297 ps RMS
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Effects of Interference in Digital Audio Transmission
Fig. 27 TX Induced Jitter No Transformer
Jitter 19.367 ns RMS
Fig. 28 TX Induced Jitter Hi Capacitance
Transformer X, Jitter 84.5 ns RMS
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Effects of Interference in Digital Audio Transmission
Fig. 29 TX Induced Jitter Lo Capacitance
Transformer S1, Jitter 1.64 ns RMS
Fig. 30 TX Induced Jitter
Shielded Transformer S2, Jitter 302 ps RMS
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Effects of Interference in Digital Audio Transmission
Fig. 31 Jitter Histogram Interpretations
Gaussian Distribution
Bi-value Gaussian
Sine Variation of Period
Fig. 32 Jitter Histogram Interpretations
Narrow Gaussian
(system residual jitter)
Asymmetric Period Variation
White Noise Period
Multiple Discrete Periods
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Effects of Interference in Digital Audio Transmission
Fig. 33 Reclocking RX with Transformer Isolation
Ls
VCC
Ls
Rs
T1
AES/EBU INPUT
RECEIVER
Cs
2
1:2
1
Vcc
DAC etc.
1
6
T1
3
4
6
2
110 ohm 1/4W 5%
2
4
JITTER REDUCER
Rs
Cs
R502
3
Vcc
4
3
1
Ls
Rs
Cs
Cs
TRANSFORMER
BLOCKS CM CURRENT
GND. OF IC
CM NOISE
SOURCE
GND. OF IC
CM NOISE
CURRENT
GND. OF IC
CM NOISE
CURRENT
R
RS
R?
R
Ls
Rs
Ls
Rs
Ls
Rs
Fig. 34 Balanced Transmission System Using
Shielded Transformers
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Effects of Interference in Digital Audio Transmission
Fig. 35 Application of Transformers to
Unbalanced System
TRANSMITTER
OUTPUT TRANSF.
BNC
2:1
300 Ω
BNC
1:2
75 Ω COAX
CABLE
0.1 µF mono
RECEIVER
INPUT TRSF.
300 Ω
TX GND PLANE
RX GND PLANE
CHASSIS
EARTH
CHASSIS
EARTH
Fig. 36 Transformer Parameter Comparison (* Tested Units)
Parameter
Unit
A
B
Primary
Inductance
µH
2500
250
Capacitance
P-S
pF
25
8
Shielded Cap.
pF
LF cutoff FLOW
kHz
3.0
26.0
3.0
20.0
6.5
7
24.3
3.0
10
32.0
13.0
HF Cutoff FHIGH
MHz
55
50
55
28
150
80
9
55
40
200
100
RMS Jitter
ps
332
390
CMRR
7.0 MHz 50Ω
dB
23
32.5
21.5
23.5
27
18.9
38
23
37.5
52.0
50.5
Pulse Aberration
%
11
32
20
4
13
11
51
11
20
4
4
3%
22%
1%
1%
Ratio
error
C
D
2000 3500
28
23
E
900
16
F
V
X
*
1522 600 - 2500
2200
31
5.5
25
1.5
Y
*
S1
*
S2
*
225
300
850
9
2.0
3.0
2
1950 1260 1900 2400 1320 1250 1060 1950 2902
3%
0.5
AES 115TH CONVENTION, 2003 OCTOBER 10: DO NOT COPY OR CIRCULATE!
30
CONFIDENTIAL! Prepublication Preview only!
Effects of Interference in Digital Audio Transmission
Fig. 37 Transformer Construction
“X”
Encapsulated Toroids
Toroid before encapsulation
“Y”
“S1, S2”
Machine Wound, Varnish Dip
Precision wound Bobbin, Clip Assembly
Fig. 38 Improved Receiver Circuits with Shield
Beads, CM Choke and Shielded Transformer
RECEIVER
SHIELDED TRANSFORMER
AES/EBU INPUT
3
2
1
4
L1
47 pF
6
3
3
4
1
FERRITE BEADS
2
4
T1
COMMON MODE CHOKE
1
2
10 pF
AES 115TH CONVENTION, 2003 OCTOBER 10: DO NOT COPY OR CIRCULATE!
31
CONFIDENTIAL! Prepublication Preview only!
Effects of Interference in Digital Audio Transmission
Fig. 39 Common-mode Chokes
2631480102
Z, Rs, Xl ( Ω )
150
125
100
75
Z
50
Rs
Xl
25
0
1E+6
1E+7
1E+8
1E+9
FREQUENCY (Hz)
Bead Impedance Per turn
Thru Hole Bead
SMD Common-mode Choke
Fig. 40 Suggested PCB Groundplane
Layout for Transformer Input Receiver
AES 115TH CONVENTION, 2003 OCTOBER 10: DO NOT COPY OR CIRCULATE!
32
CONFIDENTIAL! Prepublication Preview only!
Effects of Interference in Digital Audio Transmission
Fig. 41 Double Termination
RECEIVER
PASSIVE NETWORK
AES/EBU INPUT
TRANSFORMER
Rin
BEADS
Rsec
COMMON MODE CHOKE
Fig. 42 Double Termination vs. Secondary Termination Reflection Coefficient
Sec Term 110 Ω
Double Term 165 Ω pri, 330 Ω sec
AES 115TH CONVENTION, 2003 OCTOBER 10: DO NOT COPY OR CIRCULATE!
33
__________________________________
Audio Engineering Society
Convention Paper
Presented at the 111th Convention
2001 September 21–24
New York, NY, USA
This convention paper has been reproduced from the author's advance manuscript, without editing, corrections, or consideration
by the Review Board. The AES takes no responsibility for the contents. Additional papers may be obtained by sending request and
remittance to Audio Engineering Society, 60 East 42nd Street, New York, New York 10165-2520, USA; also see www.aes.org. All
rights reserved. Reproduction of this paper, or any portion thereof, is not permitted without direct permission from the Journal of
the Audio Engineering Society.
__________________________________
Characterizing Digital Audio Transformers with Induced Jitter
Histograms
Jon D. Paul, Vice President
Scientific Conversion, Inc.
Novato, California, 94947 USA
jonpaul@scientificonversion.com
ABSTRACT
Transformers are employed in digital audio systems primarily to reject common mode noise interference. A new test
characterizes the interference rejection of a practical transmission system with a transformer at the receiver input. A
sample set of the decoded frame sync clocks are accumulated by a statistical time interval analyzer. The analyzer
calculates the mean value of the periods, the standard deviation (jitter), and provides a period histogram. The
histogram and standard deviation establish a basis for comparing the high frequency interference rejection of
various transformers and for quantifying the nature of the induced jitter. Test data are presented for 7 different
types of transformers .
INTRODUCTION
Transformers are used in digital audio transmission
primarily for rejection of high frequency common
mode interference and for breaking ground loops. The
Industry Standards [1,2,3] do not specify the
transformer in great detail, and some [4] do not even
require their use.
A previous paper by the author [5] described digital
audio transformer parameters and their effect on
transmission of signals. The bandwidth, pulse
aberration and common mode rejection ratio (CMRR)
PAUL
Characterizing Transformers with Induced Jitter Histograms
were all shown to be important properties in choosing
transformers for high quality transmission.
Various papers [6,7] have detailed the causes and
effects of jitter in digital audio systems, however the
effect of transformers in reducing jitter by virtue of
their noise rejection properties has not been studied
in detail. Conventional common mode rejection ratio
(CMRR) measurements do not yield data directly
applicable to practical digital audio transmission
systems, especially when noise is present.
If a transformer has adequate bandwidth and low
pulse aberration, but the system environment is
noisy, then the CMRR of the transformer has
substantial effect on overall system performance,
especially on the jitter. Even if reclocking is used to
reduce jitter effects, the contamination of the circuits
ground and power planes via EMI and asynchronous
common mode noise can have serious consequences
in professional and broadcast applications.
This paper describes a sensitive technique for testing
transformers for rejection of common mode noise and
determining the transformer’s contribution to overall
system jitter in practical noisy environments.
The transformer under test is placed between a
transmission cable and a typical digital audio receiver.
Common mode noise is intentionally injected into the
cable. The clock recovered from the receiver is
analyzed by a time interval counter with statistics,
which measures the wide band jitter and provides a
graphic display of a histogram of the period. Statistics
of the period of the frame sync provide a sensitive
measurement of transformer performance. A number
of typical transformers were tested for conventional
parameters as well as jitter histograms. The results
show wide performance variations between
commercially available transformers.
1. TRANSFORMER PARAMETER
MEASUREMENTS
The various parameters that characterize transformers
were reviewed in the author’s previous paper [5]. The
lumped constant parameters e.g. primary inductance
and shunt capacitance affect the low and high
frequency bandwidth, return loss and pulse
aberration. Once these parameters are optimized,
transmission fidelity depends on the cables,
terminations and other system components. The
effectiveness of the transformer in rejection of
common mode noise and EMI is not so easily
evaluated.
2. CONVENTIONAL MEASUREMENT
OF COMMON MODE REJECTION
Direct measurement of common mode rejection of the
transformer and receiver in the system of Fig. 1a is
quite difficult. The receiver's differential amplifier
inputs present a complex and somewhat non-linear
common mode impedance to the transformer output.
The high impedance means that insertion of scope
probes or other measurement devices at the receiver
inputs will result in substantial change in the common
mode impedance and greatly affect the measurement
results.
Transformer measurements carried out with network
analyzers cannot accurately model practical systems.
Figure 1b represents the basic method of testing the
CMRR using either a network analyzer or separate
oscillator and voltmeter.
RECEIVER
TRANSMITTER
OUTPUT TRANSFORMER
INPUT TRANSFORMER
RSOURCE
BALANCED CABLE
RTERM
DIFF AMP
Fig. 1a. Transformer coupled digital audio transmission system.
AES 111T H CONVENTION, NEW YORK, NY, USA, 2001 SEPTEMBER 21–24
2
PAUL
Characterizing Transformers with Induced Jitter Histograms
known. Unfortunately, this capacitance measurement
depends on the test fixture and connections, as well
as the treatment of any shields present in the
transformer.
The best transformers available have a guarded
capacitance of ~ 1 pF making this a difficult and
somewhat inaccurate test. Even when the primary to
secondary capacitance is exactly known, other factors
will affect the calculated CMRR: the effectiveness and
inductance of the internal shield (if present), the
unbalance of the windings causing common mode to
differential mode conversion, the assumed CM
impedance, etc.
Fig. 1b. Conventional common mode rejection test.
A leveled oscillator is connected to both sides of the
primary and the secondary common mode voltage is
detected by connecting both sides of the secondary
to a load impedance and voltmeter. If a shield is
present in the transformer, it is returned to ground.
The CMRR is the ratio the secondary to primary
common mode voltage.
The problem is that suitable network analyzers, e.g.
HP 3577b, have input impedances of 50 or 75 Ω,
which is orders of magnitude lower than the
differential receivers used in digital audio systems.
The common mode impedance presented to the
transformer secondary by the differential receiver is
not easy to characterize, as the differential amplifier
common mode impedance values are comparatively
high (many kΩ) and complex (input capacitance +
bias current). These parameters depend on active
components in the IC and are not tightly specified (if
at all) by the manufacturers.
Thus the effective in-circuit common mode noise
rejection of the transformer cannot be directly inferred
from either conventional CMRR measurements nor
accurately calculated from the primary to secondary
capacitance.
It would seem that that just checking the primary to
secondary
capacitance
of
the
transformer
characterizes its CMRR if the CM impedance was
Crystal
CS8404A
TXP
GND
0.1 MF
120 Ω
SC979-03
Transformer
Under
Test Crystal
CS8414
RXP
FS
RXN
360 Ω
Time
Analyzer
Interval
Yokogawa
TA320
110 Ω
96 kHz FS
31M 4 pair
cable
Xtal
Source
Interference
#24UTP
Fig. 2a. Test fixture block
6.00 MHz
2 Vrms
AES 111T H CONVENTION, NEW YORK, NY, USA, 2001 SEPTEMBER 21–24
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PAUL
Characterizing Transformers with Induced Jitter Histograms
Fig. 2c. Time interval analyzer
Fig. 2b. Test fixture photo.
3. NEW MEASUREMENT METHOD
The goal of the new test was to create a measurement
that directly tests the effect of the transformer on
received clock jitter due to a common mode noise. It
is easy to setup and use and simulates a practical
environment, while showing the differences between
transformers with maximum sensitivity.
Fig. 2a shows a typical implementation of a system
developed over a period of 5 years for testing
transformers with induced noise and jitter histograms.
Fig. 2b is a photograph of the completed test fixture.
An AES3 transmitter such as the Crystal CS-8404A is
clocked at a frame sync rate of 96 kHz. The output is
coupled to a high quality reference transformer
through appropriate resistors and capacitors. The
transformer provides balanced 110Ω AES3 signals to
one pair of a four pair cable. The cable specifications
follow:
Model
Length
Wire
Inductance
CM Capacitance
Resistance
Belden 1538A
31m
#24 ga. UTP PVC twisted pair
13.38 uH/M per conductor
62.58 pF/M each to all others
86.13 mΩ/M per conductor
The common mode interference is generated by an
oscillator connected to all conductors of the
remaining three pairs of the cable at the transmit end.
The far end of the cable pair carrying the AES3 signal
is connected to the primary of the transformer under
test. If the transformer has a shield, it is connected to
the receiver ground plane. The transformer secondary
drives the receiver differential inputs with a 110 Ω
termination resistor across the secondary.
A number of different interference waveforms and
frequencies were tested to obtain a maximum of
common mode interference sensitivity at a realistic
level and frequency. The interference frequency must
not be a multiple or sub-multiple of the 96 kHz frame
sync e.g. 6.144 MHz. The most sensitive test was with
an interference frequency of 6 MHz, which is 62.5 x
96kHz (FS). The reason is that 6 MHz gives a beat
frequency of 48 kHz, which is just at the half sample
rate, thus causing maximum sensitivity to the induced
jitter. The tests in the balance of this paper are made
with a 6.00 MHz square wave, 2.0 VRMS applied as
described above.
The receiver IC chosen is a Crystal 8414, because of
its popularity in current equipment designs and
because its architecture does not reclock the frame
sync. The frame sync output is connected to the time
interval analyzer shown in Fig. 2c, Yokogawa TA320.
This analyzer has 100 ps resolution and can calculate
all statistics of the signal period, and display a
histogram of the distribution of periods. Many other
statistical counters and time interval analyzers could
be used, available from firms such as Hewlett Packard,
Stanford Applied Research, etc.
We configured the analyzer to measure the period of
the frame sync on adjacent positive transitions,
gather a sample set of 3500 samples and calculate the
mean and standard deviation of the period. The
standard deviation corresponds to the wide band
jitter. This analyzer can only measure peak to peak
rather than peak jitter, therefore the test data will be a
factor of 2 greater than the jitter figures from industry
standard measurement techniques [6,7]. The typical
sample set corresponds to ~ 35 ms sample time,
making the test insensitive to low frequency jitter
sources. The beat frequency of 48kHz yields a very
sensitive test. The histogram display shows the
AES 111T H CONVENTION, NEW YORK, NY, USA, 2001 SEPTEMBER 21–24
4
PAUL
Characterizing Transformers with Induced Jitter Histograms
number of samples as a function of time interval,
centered on the mean period.
transformer's contribution to the overall
measurement, "induced jitter", is symbol JT.
4. ISOLATION OF TRANSFORMER
FROM OVERALL SYSTEM JITTER
5. HISTOGRAM TEST RESULTS
Each component of the system will make a
contribution to the observed jitter of the received
frame sync, e.g. bandwidth limitation affecting the eye
pattern and mode conversion from common mode to
normal mode due to imbalance at the transformer or
receiver input stage. Fig. 3 shows the mathematics
relating each component of a system to the overall
jitter. We seek to isolate the effects of the transformer
from that of other system components.
jitter
An ideal jitter histogram would have every period in
the sample set at precisely the desired value,
producing a histogram with a single line in the exact
center. A practical measurement with jitter present has
various periods producing a wider pattern, which
would ideally be of Gaussian shape. As the jitter
increases, the Gaussian pattern will widen. Tests with
very poor CMRR transformers will have widely
disbursed histograms.
V ≈ variance of period
σ ≈ standard deviation of period ≈ wideband jitter
σ
V , σ
V , σ
(1)
V 1,
2
T
1
≈ variance, std. dev. of component 1
2
≈ variance, std. dev. of component 2
T
≈ variance, std. dev. of system 1 + 2
V
(2)
σ
(3)
(4)
σ
σ
T
T
T
1
=V
1+
V
2
=
V
=
V
=
σ +σ
σ −σ
=
T
2
2
1
2
2
2
T
2
1
+
V
2
Fig. 3. Relationship of system to component jitter.
For each transformer to be tested, we take a data set
with the interference source running and a second
measurement with the interference source turned off..
We can show [8] that for statistically independent
measurements we have a linear system and
superposition allows the component variances to add
as in equation (1) to give a total system variance.
Standard deviation is the square root of the variance
as shown in equation (2). Therefore, it is the square
root of the sum of each component's standard
deviation. Equation (3) expresses this as standard
deviation and equation (4) derives the desired system
component's standard deviation as a square root of
the differences between the squares of the overall
system and the other components of the system.
If we define the transformer as component 1 and the
remainder of the system as component 2, the
Fig. 4. Typical AES/EBU transformers.
A great variety of transformers intended for digital
audio transmission are available as shown in Fig. 4.
We selected 7 typical transformers to represent a wide
selection in size, quality, construction and parameters.
All were tested for conventional parameters, and jitter
histograms. The results below show the histogram
and the induced jitter, JT for each transformer.
Please note that the ordinate for all histograms is
number of samples. Initially, a test was made with no
transformer at the receiver input, to show the common
mode rejection of the digital audio receiver itself,
shown in Fig. 5. Fig. 6 represents the worst
transformer of the group: a plastic injection molded
unit with high primary inductance and high primary to
secondary capacitance. Fig. 7, 8 and 9 are three
smaller transformers of similar physical construction
with progressively decreasing number of turns,
inductance and primary to secondary capacitance. All
of these exhibit a greatly disbursed histogram and
high JT.
AES 111T H CONVENTION, NEW YORK, NY, USA, 2001 SEPTEMBER 21–24
5
PAUL
Characterizing Transformers with Induced Jitter Histograms
Fig. 5. Jitter histogram without transformer,
JT = 4,638 ps.
Fig. 9. Jitter histogram of transformer #4,
JT = 2,242 ps.
Fig. 6. Jitter histogram with transformer #1,
JT = 3,617 ps.
Fig. 10. Jitter histogram of transformer #5
(unshielded), JT = 1,241 ps.
Fig. 7. Jitter histogram of transformer #2,
JT = 2,893 ps.
Fig. 11. Jitter histogram of transformer #5 (shielded),
JT = 703 ps.
Fig. 8. Jitter histogram of transformer #3,
JT = 2,304 ps.
AES 111T H CONVENTION, NEW YORK, NY, USA, 2001 SEPTEMBER 21–24
Fig. 12. Jitter histogram of transformer #6
(unshielded), JT = 1,147 ps.
6
PAUL
Characterizing Transformers with Induced Jitter Histograms
Fig. 14 is a transformer optimized for 96…192 kHz use,
with lowest possible capacitance. This has the best
JT of the group tested, and a nearly Gaussian
histogram.
Fig. 13. Jitter histogram of transformer #6 (shielded),
JT = 676 ps.
Fig. 15 is an unusual histogram of a poor quality
transformer which shows 2 sets of Gaussian shapes,
displaced from the center by substantial amounts.
6. CORRELATION OF JT WITH
CONVENTIONAL PARAMETERS
Fig. 14. Jitter histogram of transformer #7,
JT = 368 ps.
Fig. 15. Jitter histogram of transformer #8,
JT = 1,217 ps.
Fig. 10 is a transformer optimized for sample rates
32...48 kHz with a shield, which was left floating. The
histogram is closer to Gaussian.
Fig. 11 is this same transformer with its shield
connected, showing a reasonable JT and better
histogram pattern.
Conventional
parameters
including
primary
magnetizing inductance, primary to secondary
capacitance and leakage inductance were checked for
each transformer using a multi frequency bridge.
Conventional common mode noise rejection was
calculated from the capacitance at 6.0 MHz and with a
110 Ω CM impedance. Return loss was measured at
frequency 500 KHz and 6 MHz using a Hewlett
Packard 3577A network analyzer in a 50 Ω
environment. The induced jitter JT was calculated as
described above in Sec. 4.
Fig. 16 shows a scatter plot of all of the above
measurements with the plot ordinate being
transformer jitter JT and the abscissa showing each of
the other parameters normalized. The plot shows in
sequence
six
parameters:
primary-secondary
capacitance, primary inductance, leakage inductance,
return loss at 6 MHz, low frequency corner, and high
frequency corner. Each parameter is normalized to the
highest value obtained amongst all seven
transformers and is plotted as a function of the jitter
measurement JT.
The set of jitter measurements Jt correlated well with
measured guarded primary to secondary capacitance
as shown in Fig. 17.
Fig. 12 is a surface mount transformer optimized for
medium sample rates with its shield floating.
Fig. 13 is the same model with the shield connected.
The histogram is near ideal and the JT is quite good.
AES 111T H CONVENTION, NEW YORK, NY, USA, 2001 SEPTEMBER 21–24
7
PAUL
Characterizing Transformers with Induced Jitter Histograms
Fig. 18. Comparison chart of seven different transformers.
Transf
oormer
ref 31M
cable
1
2
3
4
5
Un Sh
5
Sh
6
Un Sh
6
Sh
7
Primary Inductance
µH
-
5515
2910
1522
2790
1042
1042
820
820
230
Capacitance P - S
pF
-
70
46
30
25
11
3.1
4.0
1.15
2.90
Leakage Ind
µH
-
0.42
0.30
0.23
0.3
1.65
1.65
1.35
1.35
0.75
LF cutoff FLOW
kHz
DC
2.2
4.1
7.5
4.1
1.7
1.7
7.5
7.5
12.0
HF Cutoff FHIGH
MHz
29.0
26.0
32.7
39.0
39.0
17.3
17.3
60.0
60.0
41.1
RMS Jitter Jt
6 MHz 2V
pS
4638
3178
2161
2278
1613
1013
279
413
553
479
Calc.CMRR
dB
-
11.7
14.9
18.9
20
27
38.7
36
46.8
39.2
Return Loss 500kHz
dB
-
29
30.2
31.7
30.5
25
25
30.3
30.3
33.8
Return Loss 6 MHz
dB
-
18.6
22.5
25.1
21.2
4.6
4.6
10.8
10.8
27
@ 6.0MHz 110 Ω
NORMALIZED PARAMETER
1.20
Cps NOR
Lpri NOR
Llkg NOR
1.00
Fig. 18 is a comparison chart of the seven
transformers tested and appropriate measurements
using no transformer in the first column. Units 5 and 6
have shields and were tested both with the shield
floating (Un Sh) and grounded (Sh). The chart shows
the wide variation in performance and the
insensitivity of jitter to most certain conventional
parameters except primary to secondary capacitance.
RL6 NOR
FLOW NOR
FHIGH NOR
0.80
0.60
0.40
0.20
0.00
0
500
1000
1500
2000
2500
3000
3500
JITTER ps
Fig. 16. Correlation of various transformer parameters
vs. jitter.
Jt pS
3500
1
3000
2500
3
2000
2
CONCLUSION
Conventional transformer tests do not adequately
characterize high frequency common mode rejection
effects in which are critical practical applications. A
new test, using induced common mode noise and
jitter histograms, maximizes the differences between
transformers and provides graphic display of the
effects of transformers on jitter in noisy
environments.
4
1500
1000
6 sh
7 6 un
5 sh
500
0
0
10
5 un
20
30
40
Fig. 17. JT vs. Cpri-sec.
50
60
C p-s 70
The results suggest that all balanced applications and
industry standards should require the use of a
transformer to provide acceptable CMRR and high
frequency EMI rejection. The author suggests that
standards not presently requiring transformers be
amended to do so.
AES 111T H CONVENTION, NEW YORK, NY, USA, 2001 SEPTEMBER 21–24
8
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Characterizing Transformers with Induced Jitter Histograms
References
[1] IEC60958 - 1, 3, 4 Digital Audio Interface,
International Electrotechnical Commission, Geneva.
[2] AES-3id1995, AES Information document for
digital audio engineering - Transmission of AES3
formatted data by unbalanced coaxial cable, Audio
Engineering Society, New York, NY, USA (1995).
[3] EBU 3250, (Ed. 2 1992) European Broadcasting
Union
[4] AES3-1992, AES Recommended practice for digital
audio engineering - Serial transmission format for twochannel linearly represented digital audio data, Audio
Engineering Society, New York, NY, USA (1992).
[5] Paul, Jon D., “The Effect of Transformers on
Transmission of Digital Audio Signals,” Preprint 4840,
105th AES Convention, San Francisco, September
1998.
[6] Dunn J., McKibben B., Taylor R. & Travis C.
“Towards Common Specifications for Digital Audio
Interface Jitter,” Preprint 3705, presented at the 95th
AES Convention, New York, October 1993
[7] Dunn, Julian, “Jitter Theory,” Audio Precision
Newsletter, vol. 14, no. 1 (1999), “Jitter Theory - Part
Two,” Audio Precision Newsletter, vol. 15, no. 1
(2000).
[8] Handbook of mathematics, Bronstein and
Semendjajew, ISBN 3 87144 492 8, Teubner Verlag,
Leipzig
AES 111T H CONVENTION, NEW YORK, NY, USA, 2001 SEPTEMBER 21–24
9
SCIENTIFIC CONVERSION, INC.
Presented AES, Sept. 1998
THE EFFECT OF TRANSFORMERS ON TRANSMISSION OF DIGITAL AUDIO SIGNALS
Jon D. Paul, Vice President
Scientific Conversion, Inc.
Novato, California
Transformers used in the transmission of digital audio signals affect signal fidelity, interference
susceptibility, and conducted EMI emission. Commercially-available transformers specified for
digital audio exhibit vast differences in performance. Transmission standards often specify only
transformer ratio and bandwidth, and ignore many other parameters which affect critical
applications. This paper reviews the function, parameters and performance of digital audio
transformers, and presents data on frequency response, pulse aberration, common mode rejection
ratio, and jitter. It also discusses several applications and compares a number of transformers in
detail.
1. Transformers in Digital Audio Transmission Systems
Digital audio transmission systems use transformer coupling to provide balanced outputs, improve
common mode noise rejection, match impedances, and reduce conducted EMI emission and
susceptibility. (Note: Throughout this paper, the term “digital audio signal” refers to the
Manchester encoded type of modulation with embedded clock, etc. as specified in AES/EBU,
SPDIF, AES-3 and the corresponding twice speed signals such as DVD, etc.)
Figure 1 is a block diagram of a direct-coupled transmission system, without transformers. The
signal fidelity is affected by transmitter slew rate, the cable, and the pickup of common-mode
interference along the cable. The receiver’s differential input sees the common-mode noise
appearing between the transmitter and receiver grounds. The performance of the receiver circuit
depends on the levels of the common-mode interference and the signal. Interference sources
include high speed DSP and microprocessor clocks, RF noise, switching power supplies, and
crosstalk from adjacent cables.
The receiver IC’s differential amplifier is characterized by the common-mode rejection ratio
(CMRR) which decreases with increasing frequency. Because high frequency noise is capacitively
coupled to the cable (crosstalk), a direct-coupled input is highly susceptible to such noise.
Another characteristic of direct coupling is that EMI and crosstalk on the cable shield can enter
and contaminate the transmitter’s or receiver’s internal circuitry (e.g. power, clocks or ground
planes) if the connector shield or cable return is grounded to the circuit ground.
Figure 2 is a block diagram of a transmission system using transformers. The transmitter’s digital
signal is coupled to the output through a transformer. (Note that the figure shows a balanced
cable but single-ended coax can also be used.) The transformer output is isolated from the chassis
ground. The output is connected to a balanced cable, and the cable is connected to a transformercoupled receiver. The resistors set the source and termination impedance to match the
characteristic impedance of the cable.
Page 1 of 8
SCIENTIFIC CONVERSION, INC.
Presented AES, Sept. 1998
The insertion of the transformer in the receive circuit greatly improves the high frequency CMRR,
thus reducing recovered clock jitter. Even receivers with high jitter attenuation will benefit, since
the transformer also attenuates interference contamination by common-mode noise. Both
transmitter and receiver sides make use of transformer coupling to break ground loops, reduce
conducted EMI, and provide voltage or impedance matching.
2. AES/EBU Signal Bandwidth
Frequency components of the digital audio signal exist far beyond the minimum 100 kHz - 8 MHz
bandwidth often specified [1, 2, 3]. Figure 3 is a spectrum of an AES/EBU signal, with 48 kHz
sample rate (Fs), swept from 0 to 100 kHz with vertical scale of 10 dB/div. Note the spectral
content below 100 kHz. Figure 4 is a spectrum of the same signal from 0 to 50 MHz, displaying
substantial energy above 8 MHz.
These spectra show that the digital audio signal bandwidth extends far beyond the minimum
bandwidth usually specified. Although the minimum bandwidth provides useable transmission,
recovery of low-jitter clocks and accurate data transmission in real-world noisy environments will
benefit from greatly increased bandwidth. The transformer is often the limiting factor in the endto-end bandwidth of such a system.
An extension beyond the minimum by 5 to 10 times for both upper and lower bandwidths, (e.g.
from 5 to 20 kHz FLOW and 50 to 100 MHz FHIGH) is recommended. For twice speed applications,
for example, 96 kHz and DVD, FHIGH may be increased to 200 MHz.
3. Transformer Equivalent Circuit
Figure 5 is a generalized equivalent circuit for any transformer [4]. All components except the
ideal 1:N transformer represent parasitic effects. RP and RS are the resistance of primary and
secondary windings. L PLKG and L SLKG are the primary and secondary leakage inductances caused
by the separation in space of the two windings. Capacitance CPSHUNT and CSSHUNT are the primary
and secondary inter-winding shunt capacitance. Inductance LPMAG is the primary magnetizing
inductance, representing the self-inductance of the primary winding when no secondary current
flows. R PLOSS is the core loss component representing energy dissipated by the core as it is
magnetized and de-magnetized. The inter-winding capacitance from primary to secondary is PC-S.
These parasitic components, in combination with the ideal transformer and the impedance of the
external circuit environment, form a broad bandpass filter with typical HFIGH / FLOW ratios of 1000
to 10,000. The low-frequency corner, FLOW is determined by the R - L circuit formed by the
source impedance plus RP in combination with the magnetizing inductance L
PMAG. The highfrequency corner FHIGH is defined by the RLC circuit including shunt capacitances C
PSHUNT and
CSSHUNT , series leakage inductances LPLKG and LSLKG and the circuit environment's impedance. This
lumped constant model is a second-order approximation and does not account for pulse
aberrations due to the distributed nature of the windings.
Page 2 of 8
SCIENTIFIC CONVERSION, INC.
Presented AES, Sept. 1998
Figure 6 is a computer simulation of the frequency response of the model in a 50Ω environment.
The primary inductance, LPMAG is varied from 200 to 1400 µH, (typical values) causing the low
frequency 3-dB point FLOW be to reduced from 20 kHz to 3.3 kHz. Figure 7 is a similar plot where
the series leakage inductance LPLKG changes from 0 to 300 nH. The high-frequency corner, FHIGH. ,
is reduced from 160 MHz at 100 nH to 50 MHz at 300 nH.
For maximum bandwidth, we recommend choosing a transformer with the highest possible
primary inductance LPMAG and lowest possible leakage inductance, LPLKG. Since leakage
inductance is difficult to measure and specify, the high-frequency corner, F
HIGH can be used to
specify that parameter.
4. Frequency Response and Saturation Effects
Figure 8 shows the effect of the transformer's high-frequency corner on the pulse risetime. The
upper trace is a low aberration pulse generator. The middle trace is a transformer with FHIGH equal
to 100 MHz and the lower trace is a transformer with FHIGH equal to 35 MHz. The benefit of
wider bandwidth is obvious.
Figure 9 shows the effect of a transformer's low-frequency corner, FLOW, on the eye pattern of a
received digital audio signal. The upper trace was taken with a transformer with F
LOW of 4 kHz
and the lower trace was taken with a transformer with an FLOW of 400 kHz. Note the closing of
the eye pattern in the lower trace, which causes an increase in inter-symbol interference. This
highlights the importance of using transformers with an extended LFOW.
Figure 10 illustrates the effect of saturation of the transformer core on the signal. This effect is
nonlinear; it is not accounted for in the model above, but is a function of the voltage and time
duration of each pulse. The maximum flux density is a property of the core material, and
determines the point at which the transformer action ceases. The saturated core has a primary
inductance, LPMAG near zero, thus shorting out both primary and secondary.
The transformer in the upper trace has a large flux capacity of 300µVs, and exhibits no
saturation. The lower trace is a transformer with similar frequency response but only 50µVs flux
capacity, showing severe saturation. The flux capacity must be maximized to avoid such
problems. Regardless of the transformer's flux capacity, a capacitor is required in series with the
transformer's primary to prevent DC bias from causing saturation.
5. Pulse Aberration
Nonlinear phase vs. frequency response creates pulse aberration. This may be present even in
transformers with relatively wideband, flat magnitude of frequency response. Figure 11 was
obtained with a 12.288 MHz, 1.5 ns risetime pulse generator (12.288 MHz is the fastest symbol
rate in a 96 kHz digital audio signal). The upper trace is a very linear phase response transformer
with minimal aberration. The lower trace is a transformer with similar bandwidth but with
substantial phase nonlinearity; note the severe overshoot and pulse aberration.
Page 3 of 8
SCIENTIFIC CONVERSION, INC.
Presented AES, Sept. 1998
6. Common-Mode Rejection Ratio and Interference Suppression
Figure 12 is a circuit to test common-mode rejection ratio (CMRR) of a transformer. A wideband
leveled RF generator drives both sides of the primary winding. Both sides of the secondary
winding are attached to a resistive termination and a wideband RF millivoltmeter. The output is
the component of the common-mode signal which "leaks" through the primary-to-secondary
capacitance of the transformer. If the transformer has an interwinding shield, it is returned to the
ground plane. Figure 13 is a plot of the CMRR vs. frequency obtained with this test, for two
different transformer designs. Since improved CMRR is a prime motivation to use a transformer,
the CMRR may be the most significant parameter to specify.
The same consideration for suppression of external interference on received signals also apply to
reduction of conducted interference emitted by the equipment. The symmetrical nature (reversing
input and output) of the interference equivalent circuit means emitted interference such as
microprocessor clocks, high speed DSP clocks, etcetra will be reduced by the same ratio of
common-mode rejection as demonstrated above. Regulatory compliance for conducted EMI on
the digital audio cables and connectors can be improved by using low-capacitance shielded
transformers.
7. Common-Mode Interference: Induced Jitter Test
Figure 14 is a test for jitter-induced by high frequency common-mode asynchronous noise. An
Audio Precision System 1 generates an AES/EBU test signal output transmitted via one of 4 pairs
in a 31m long cable to an AES/EBU decoder circuit.
The cable specification is:
Type
Length
Wire
Inductance
Capacitance
Resistance
=
=
=
=
=
=
Cat 5 Network wire, Belden 1538A
31m
#24 ga. PVC twisted pair
415 uH/conductor
1940 pF/each conductor to all others
2.67 Ω /conductor
Three unused cable pairs are connected in parallel to an RF generator with a 50Ω termination and
a wideband millivoltmeter to monitor the interference level. The interfering signal is applied to
three unused pairs, generating crosstalk that appears as common-mode noise current coupled
through the capacitance between the unused pairs and the active pair. The receiver circuit couples
the digital signal through the transformer under test and decodes it with a Crystal Semiconductor
CS8412 AES/EBU receiver.
The rising edges of the frame sync output (pin 11 of CS8412) of the decoder define the output
sample time. This clock is analyzed by a Hewlett-Packard 5370B Time Interval counter, capable
of statistical analysis and 20 ps jitter measurement. (20 ps is the time for a light ray to cross a
pencil's diameter!)
Page 4 of 8
SCIENTIFIC CONVERSION, INC.
Presented AES, Sept. 1998
The counter measures each frame sync (Fs) period, collects a sample set of 100 to 10,000 periods
and calculates the standard deviation of that set, a direct measure of the wideband RMS jitter.
The impact of the jitter on SNR of an audio signal is a function of the frequency and amplitude of
the signal, and the architecture of the converter.References [5-8] derive the relationship between
jitter and recovered audio's dynamic range.
8. Common-Mode Interference: Induced Jitter Results
Good recovered clock quality is essential for low bit-error-rate data recovery. In addition, low
recovered clock-jitter is essential to minimize audio signal degradation for those systems relying
on the recovered clock for operating A/D and D/A converters.
Figure 15 is a plot of RMS jitter in nanoseconds vs. common-mode interference level in dBm (ref.
50 Ω ) taken with the setup described above. The interfering signal is a 6.98 MHz sinewave. The
upper curve is an unshielded transformer with 40 pF of CP-S. The lower curve is a 3 pF CP-S
shielded transformer. This data illustrates the dramatic effect that a high CMRR transformer can
have on jitter. For optimum performance in high noise environments and low jitter applications, a
low capacitance, high CMRR, shielded transformer is required.
9. Transmission System with Shielded Transformers
Common-mode noise on a transformer primary induces a current through the transformer
primary-to-secondary capacitance C P-S (typically 10 to 40 pF) and then to the receiver input.
Adding an interwinding shield provides a substantial (5 to 20 fold) improvement in CMRR.
Figure 16 shows how a shield introduces a capacitance (from primary to shield, CP-Shield ) which
shunts most of the common-mode current away from the secondary winding and diverts it to
ground. Some capacitance remains from primary to secondary (CP-S ) due to leads, PCB traces,
and other parasitic capacitance. It is possible to realize 1 pF in a good SMD design! The
common-mode current divides in proportion to the capacitance ratio, CP-S/C P-Shield. The receiver
input sees only the small current coupled through CP-S. In general, addition of a shield to any
transformer design leads to a tradeoff, increasing leakage inductance and reducing bandwidth.
10. Typical Digital Audio Transformer Applications
10.0 Balanced 110 Ω System with Shielded Transformers
Figure 17 is a balanced 110 Ω system using shielded transformers both on the transmit and
receive sides. The shield of each transformer is connected to the ground plane of the associated
IC. The connection from shield to the ground plane must have short, low inductance path, to
maintain the shield's effectiveness.
Page 5 of 8
SCIENTIFIC CONVERSION, INC.
Presented AES, Sept. 1998
10.1 75 Ω Unbalanced Interface with 2:1 Ratio Transformers
Figure 18 is a 75 Ω unbalanced system. Since the transmit IC has 0 to 5 V output, the
transformer has a 2:1 step-down ratio to matches the 300 Ω primary impedance to the 75 Ω cable
impedance and reduce the output voltage level to 625 mV. The series 0.1µF capacitor blocks the
dc bias at the output of the IC to prevent transformer core saturation. The transformer shield
returns to the transmit IC ground pin and ground plane. The secondary goes to the connector,
with the low side of the secondary connected to the connector shell.
The shell of an unbalanced connector may either float or go to chassis (earth) ground. If a
floating connector shell is used (e.g. to break ground loops) then a small high-frequency RF return
capacitor for example 10 to 100 pF, may be added from connector shell to chassis (earth) ground.
Any digital audio receiver IC has finite dynamic range and CMRR. Low level, unbalanced signals,
(e.g. SPDIF from a weak source on a lossy cable) will increase the error rate and jitter since the
receiver has less margin and interference rejection. A step-up transformer can increase the signal
voltage level, improving both receiver performance and common-mode rejection.
On the receive side of Figure 18, the 75 Ω connector feeds a transformer with a 1:2 step-up. The
secondary is terminated with 300 Ω . The transformer shield is attached through a short and direct
path to the ground pin of the receive IC (e.g. at local bypass capacitor, and ground plane). The
same considerations mentioned above for transmit side floating connectors also apply to the
receiver.
10.2 Bridging Unbalanced Input and Floating Coax Connector
Figure 19 shows a high impedance bridging receiver using a 1:2 step-up transformer. The 3.9 Ω
k
resistor terminates the transformer to maintain proper frequency response. That resistor is
reflected to the primary as 975 Ω , presenting a light load to the 75 Ω line. The connector is
shown floating, with the RF bypass capacitor to chassis ground.
10.3 Phantom Power Remote Digital Device
Low-power A/D and D/A converters make remotely powered devices such as digital microphones
a reality. Figure 20 is a phantom power circuit where the signal cable carries the DC power. The
power source on the local side of the system is connected to the center tap of the output
transformer. The remote device gets DC power from the input transformer's center tap.
Decoupling filters should be used on both ends.
10.4 Dual output transmitter, 110 Ω Balanced and 75 Ω Unbalanced
Some applications require both balanced and unbalanced outputs. Figure 21 uses a 1:1 center
tapped transformer. The 110 Ω primary resistor reflects to the center tap of the secondary
as 27 Ω . The 47 Ω series resistor matches the 75 Ω unbalanced output impedance. The balanced
110 Ω output is obtained across the entire secondary. Note that only one of the two outputs may
be connected at one time.
Page 6 of 8
SCIENTIFIC CONVERSION, INC.
Presented AES, Sept. 1998
11. Comparison of Typical Transformers
Figure 22 compares the parameters and performance of seven types of commercially-available
digital audio transformers. Note the substantial differences in most parameters. The higher cost of
the best available transformer is easily justifiable in high-quality equipment designs, since that cost
is a negligible fraction of the total material cost, and the benefits are substantial. The worst
transformers can degrade performance and specifications of the equipment and impair regulatory
compliance.
12. PC Layout Considerations
The transformer isolates the relatively noisy external connections from the (hopefully!) clean
internal circuitry of the equipment. The low capacitance and shield of the transformer provide
rejection of high-frequency common-mode interference present on the external connection. Good
RF printed circuit layout practice can further improve the noise rejection of the finished design,
for example, by adding ground planes for shielding and by minimizing the primary to secondary
capacitance.
A typical PCB layout for a transformer circuit (either input or output) is shown in Figure 23. The
external coaxial connector is connected with short and direct traces to the transformer. The traces
to the IC may be longer, but they should be kept away from the connectors. Two ground planes
are used, which are split under the transformer. The ground plane facing the connector goes to
chassis (earth) ground. The ground plane facing the IC and the transformer shield (if present) are
attached to the ground return pin of the associated IC with a short and direct trace.
CONCLUSIONS
Transmission circuits for digital audio signals are improved by the use of transformers on both the
transmit and receive sides. Measurements show that the transformer has substantial impact on the
digital audio signal waveform, the rejection of common mode noise interference and the recovered
clock jitter. Good transformer implementation and application can improve signal waveform
fidelity, increase EMI rejection and reduce conducted EMI emission. The benefits more than
compensate for the small cost increment of high-performance transformers.
ACKNOWLEDGMENTS
The author wishes to thank Dr. Steve Harris of Crystal Semiconductor, and Dr. Richard Redl of
ELFI S.A., for their very kind assistance and suggestions.
Page 7 of 8
SCIENTIFIC CONVERSION, INC.
Presented AES, Sept. 1998
REFERENCES
[1] IEC-958, Digital Audio Interface, International Electrotechnical Commission, Geneva, (1989).
[2] AES3-1992, AES Recommended practice for digital audio engineering - Serial transmission
format for two-channel linearly represented digital audio data, Audio Engineering Society, New
York, NY, USA (1992).
[3] AES3-1995, AES Information document for digital audio engineering - Transmission of AES3
formatted data by unbalanced coaxial cable, Audio Engineering Society, New York, NY, USA
(1995).
[4] Nathan R. Grossner, Transformers for Electronic Circuits, McGraw-Hill, 2 ed. (1983).
p. 275, 385.
[5] Steve Harris, “The Effects of Sampling Clock Jitter on Nyquist Sampling Analog-to-Digital
Converters, and on Oversampling Delta-Sigma ADCs,”Journal of the Audio Eng. Soc., vol. 38,
no. 7/8, 1990 July/August.
[6] Patrick R. Trischitta, Jitter in digital Transmission Systems, Artech House, Inc. (1989),
ISBN 0-89006-248-X.
[7] Yoshitaka Takasaki, Digital Transmission Design and Jitter Analysis, Artech House, Inc.
(1991).
[8] Richard Cabot, “Digital Audio Transmission - Why Jitter is Important,”Audio Precision
Newsletter,
vol. 11, no. 1 (1996).
Page 8 of 8
The Effect of Transformers on
Transmission of Digital Audio
Signals
Jon D. Paul, Vice Pres.
Scientific Conversion, Inc.
Novato, California, USA
Highlights
•
•
•
•
•
•
•
•
Why use transformers in digital transmission?
Spectrum of digital audio signal
Transformer effects on waveform
Transformer effects on noise rejection
Common-mode rejection: relationship to jitter
Jitter Histograms for various transformers
Transformer shielding and noise rejection
Applications: balanced system with shielded
transformers, unbalanced interface,
• high-impedance bridging input, phantom power,
dual balanced and unbalanced output
• Comparison of available transformers
Fig. 1 Direct Coupled Transmission
System
TRANSMITTER
RECEIVER
BNC
BNC
RSOURCE
COAX CABLE
TRANSMITTER GROUND
R TERM
DIFF AMP
RECEIVER GROUND
Fig. 2 Transformer Coupled Digital
Audio Transmission System
RECEIVER
TRANSMITTER
OUTPUT TRANSFORMER
INPUT TRANSFORMER
RSOURCE
BALANCED CABLE
RTERM
DIFF AMP
Reasons for Using Transformers in
Digital Audio Transmission
• Greatly improve common-mode noise rejection
• Reduce conducted EMI emission to ensure
regulatory compliance
• Reduce transmit and receive circuit susceptibility
to EMI interference
• Break ground loops
• Balance input and output
• Match impedance and levels
• Achieve lowest possible recovered clock jitter
Fig. 3 Spectrum of Digital Audio Signal
SPDIF 48kHz, 10kHz/div., 10 dB/div.
10 dB/div.
0
10
20
30
40
50
60
70
80
90
100
kHz
Fig. 4 Spectrum of Digital Audio Signal
SPDIF 48kHz, 5MHz/div., 10 dB/div.
10 dB/div.
0
10
20
30
40
50 MHz
Fig. 5 Equivalent Circuit of
Transformer
CP-S
Pri 1
RP
LPLKG
LSLKG
1:N
CPSHUNT
Pri 2
ideal
LPMAG RPLOSS
RS
Sec 1
CSSHUNT
Sec 2
Fig. 6 Frequency Response of Transformer
Parameter: primary inductance, LPMAG
Attenuation [dB]
1400 uH
800 uH
200 uH
f [Hz]
Fig. 7 Frequency Response of Transformer
Parameter: leakage inductance, LPLKG
Attenuation [dB]
0 nH
100 nH
200 nH
300 nH
f [Hz]
Fig. 8 Effect of Transformer HighFrequency Bandwidth on Pulse Response
12.288 MHz
Pulse Generator
FHIGH = 100 MHz
Transformer “S”
FHIGH = 35 MHz
Transformer “X”
1 V/div
10 ns/div.
Fig. 9 Effect of Transformer LowFrequency Bandwidth on Eye Pattern
FLOW = 4 kHz
Transformer “S”
FLOW = 400 kHz
Transformer “X”
1 V/div
100 ns/div
Fig. 10 Effect of Core Saturation on
Waveform
300 µVs
Transf. “S”
50 µVs,
Transf. “X”
1 V/div
25 µs/div
Fig. 11 Comparison of Pulse Aberration
Squarewave Generator 12.288 MHz, 75 Ω in/out
Type “S”
very low
aberration
Type “X”
excessive
aberration
1 V/div
5 ns/div.
Fig. 11A Comparison of Aberration
Received AES/EBU 31M UTP 96kHz FS, 110 Ω in/out
Type “V”
Type H
Fig. 12 Common-Mode Noise Rejection
Test Circuit
C
P-S
Wideband
trms VM
Transformer
under test
CM
interference
source
RTERM
Fig. 13 Common-Mode Noise Rejection
0
Type “C”
-20
Type “G”
-40
-60
-80
10k
100k
1M
10M
f [Hz]
100M
1G
Fig. 14 AP-1/CS8412/48kHz Common-Mode
Noise Induced Jitter Test Setup
AP
SYSTEM 1
AES/EBU
output
Transformer
under test
CS8412
In+
FS
In-
Ccm
CM
interference
source
4 pair cable
110 S
HP 5370B
counter
Fig 14 HP 5370B
Time Interval Counter
Fig. 15 Induced Common-Mode Noise
Jitter Comparison
100
Transformer “C”
10
1
Transformer “G”
0.1
-40
-30
-20
-10
0
Interference level [dBm]
10
20
Fig. 14A 96kHz Common-Mode Noise
CS8404A/CS8414/96kHz Jitter
96 kHz
FS
Crystal CS8404A
TXP
Transformer Under
31M
Crystal CS8414
Test
4 pair cable
#24UTP
HP 5370B
counter
RXP
FS
TXN
96 kHz FS
Interference
Source
11.269MHz
RXN
110 S
Yokogawa
TA320
Time Interval Analyzer
Fig 14A Yokogawa TA320
Time Interval Analyzer
14 MS/s 100 ps resolution
statistics: P-P, std dev, jitter histograms
Fig. 14B no trsf.
RMS jitter 3401ps
Fig. 14C type“B”
RMS jitter 1540ps
Fig. 14D type “V”
RMS jitter 906ps
Fig. 14E type“H”
RMS jitter 396ps
Fig. 16 Shielded Transformer in CommonMode Noise Equivalent Circuit
Cp-sh
Csh-s
RECEIVER
TRANSMITTER
Balanced Cable
Shielded
Transformer
Ccm
V common mode
Ccm
Termination
Fig. 17 Balanced Transmission System
Using Shielded Transformers
TRANSMITTER
SHIELDED TRANSFORMER
SHIELDED TRANSFORMER
BALANCED CABLE
1:1
1:1
110S
110S
0.1 µF mono
TX GND PLANE
TRANSMITTER
CHASSIS
GROUND
RECEIVER
RX GND PLANE
RECEIVER
CHASSIS
GROUND
Fig. 18 Application of 2:1 Transformers to
75 Ω Unbalanced System
TRANSMITTER
OUTPUT TRANSF.
BNC
2:1
300 S
0.1 µF mono
INPUT TRSF.
BNC
1:2
75 S COAX
CABLE
300 S
TX GND PLANE
CHASSIS
EARTH
RECEIVER
RX GND PLANE
CHASSIS
EARTH
Fig. 19 Hi-Z Bridging Unbalanced Input
with Floating Coax Connector
RECEIVER
RCA OR BNC
1:2
1K INPUT Z
3.9 KS
10 - 100 pF
OPTIONAL RF BYPASS TO CHASSIS
Fig. 20 Phantom Power to Remote
Digital Device
FILTER
LOCAL RX or TX
REMOTE POWERED TX or RX
CENTER TAP TRANSFORMER
CABLE
CENTER TAP TRANSFORMER
PHANTOM POWER SOURCE
Fig. 21 Dual Output Transmitter
110 Ω Balanced / 75 Ω Unbalanced
TRANSMITTER
CENTER TAP TRANSFORMER 1:1
UNBAL 75 S OUT
110 S
47 S
0.1 µF MONO
110 S BAL OUT
Fig. 22 Comparison of Transformers
Parameter
Unit
A
B
C
V
D
E
SC91601
SC93702
SC97903
Primary Inductance
µH
2500
250
2000
600 2200
3500
900
5000
850
300
Capacitance P - S
pF
25
8
28
5.5
23
16
15
3.0
2.0
Shielded Cap.
(NA= none)
pF
NA
NA
NA
1.5
NA
NA
3.0
0.5
NA
Flux Capacity
µVs
20
47
20
80
180
24
680
105
35
Adv. LF cutoff FLOW
kHz
100.0
85.0
100.0
NA
5.0
20.0
3.5
20.0
32.0
Calc. LF cutoff FLOW
kHz
7.0
70.1
8.8
7.5 - 30
5.0
19.5
3.5
20.6
35.0
Meas. LF cutoff FLOW
kHz
3.0
26.0
3.0
24.3
20.0
6.5
1.5
13.0
32.0
HF Cutoff FHIGH
MHz
55
50
55
9
28
150
65
100
200
RMS Jitter
ps
1950
1260
1900
1060
2400
1320
650
502
443
CMRR
dB
23
32.5
21.5
38
23.5
27
41
50.5
52.0
Pulse Aberration
%
11
32
20
51
4
13
5
4
4
Size
mm
11.2896MHz/2.25V
WxLxH
Relative Cost for
12 x 15 x 9 x16 x 6 9 x 12.5
8.5
x6
9.9 x 12 19 x 22 x 7.5 x 9 x 13 x 13 x 9.5 x 11
5.6
16
5
13
5
9.5 x 11
5
ratio
1.00
1.36
1.53
1.55
2.40
3.00
3.10
3.10
3.10
week
12-16
5
12-16
8
6-10
4-8
1
1
1
1K
Leadtime
Fig. 23 Suggested PCB Layout for
Transformer Input Circuit
CIRCUIT GROUND PLANE
CHASSIS GROUND PLANE
100 pF RF bypass
Term.
In
Out
Sh
INPUT
CONNECTOR
TRANSFORMER
TRSF. SHIELD
RECEIVER IC
Summary and Conclusions
• Commercial transformers exhibit tremendous
differences in parameters and performance
• Digital audio transformers substantially improve
common mode noise rejection and EMI emission
• Second order effects such as pulse aberration and
saturation greatly influence waveform fidelity.
• AES/EBU receivers exhibit jitter that is function of
the transformer CMRR and capacitance
• Professional, broadcast and high resolution
applications need maximum CMRR to minimize
recovered clock jitter in the presence of noise.
• High quality transformers offer cost effective
improvements in product design.
Recommendations
• Use transformers with lowest possible PrimarySecondary capacitances and leakage inductances
• For best CMRR use a low-capacitance
transformer, shields and careful PCB layout
• Transformer Low Frequency bandwidth depends
on minimum Frame Sync frequency. Use 1/5 1/20 x AES/EBU min. spec of 100 kHz
• Transformer HF bandwidth should be 5 - 20 x of
AES/EBU spec of 8MHz - depending on max. FS
• Minimize pulse aberration: under 10%