Fast response HF DC-DC converter architecture for RF
amplifiers
plifi
b
based
d on a multilevel
ltil
l topology
t p l gy
University of
Oviedo
M Rodríguez,
M.
Rodríguez J
J. Sebastián,
Sebastián A.
A Rodríguez,
Rodríguez P.
P F
F. Miaja,
Miaja D
D. G
G. Lamar
University of Oviedo, Power Supply Systems Group. Edificio 3, Campus de Viesques s/n, 33204 Gijón, SPAIN Phone: +34 985 182 578;
e mail: rodriguezmiguel.uo@uniovi.es
e-mail:
rodriguezmiguel uo@uniovi es
I. INTRODUCTION
II. SYSTEM ARCHITECTURE
POWER SUPPLIES FOR LINEAR RF POWER
AMPLIFIERS
Proposed en
envelope
elope tracking
supply architecture
Typical envelope tracking
system
Constant voltage
g
10 % efficiency
y region
g
Supply voltage
Envelope
50 % efficiency region
►‘High’ efficiency operation
regions
i
b
besides
id very llow ones
►Very low overall efficiency (10 %)
►Linear operation is mandatory
due to the new modulation
schemes
This work ffocuses on
th MIB
the
MIBuck
k topology
t
l
One of the main issues would be the integration of
the MIBuck HF driving circuitry with the switches
Variable voltage: ENVELOPE TRACKING
50 % efficiency region
Supply
pp y voltage
g
Envelope
p
►Always operate in the high
efficiency region
►Needs a special power supply
Many integration possibilities
III MIBUCK TOPOLOGY
III.
The intermediate voltages
can b
be chosen
h
to optimize
i i
the response when working
with a certain modulation
REQUIREMENTS
►Variable output voltage
g
BELO(determined by the transmitter architecture)
►Fast response
W voltage ripple to avoid spectral regrowth
►Low output
LIMIT
►Power capability depending on system specifications
S?
Here they have been chosen
equally spaced, being Vmax and
0 the maximum and minimum
voltages respectively
STATIC BEHAVIOUR
IV. EXPERIMENTAL RESULTS
Vi =
The
e MIBuck
uc is
s used to reproduce
ep oduce high
g frequency
eque cy waveforms
a eo s
1
Conversion ratio in CCM
►The main idea of the MIBuck is to switch the voltage that
enters the output lowpass filter between two close values
►The output voltage is easily obtained
Vout = dij ⋅ Vi - Vj + Vj
Envelope tracking system simulation
Power and driving section
(
Control section
►RF MOSFETs are used due to the
high switching frequency (MRF373)
►Hard-switching
►Hard
switching and hard
hard-gating
gating
►Isolated driving
g circuitry:
y digital
g
transmission circuits (IL610) and
hi h ffrequency d
high
driver
i
IC
ICs (EL7156) ,
plus isolated power supply
►FPGA Vi
Virtex
t 4 is
i used
d to
t
generate the pulse pattern
►4 MHz switching
g frequency
q
y
►Block diagram of the system
)
Equally
spaced
Vout
2
Vmax
=
⋅ dijj ⋅ ( i - j ) + j
n
(
)
Output voltage ripple
►The output voltage ripple is reduced by a factor of n
►The counter-based DPWM is the
limiting
g factor: only
y a 5 bits
resolution is possible using a 100
MH clock
MHz
l k
ΔVs =
(
Vmax ⋅ dij ⋅ 1 - dij
)
8 ⋅ L ⋅ C ⋅ fs 2 ⋅ n
►From a different point of view,
view the cut-off
cut off frequency of the
output filter
te ca
can be increased
c eased with
t respect
espect to a co
conventional
e t o a buc
buck
RESULTS
►2-sided PCB
►88 % efficiency
y
►82 % taking the driver into account
Prototype
yp
Vmax
⋅ i , i = 0, 1,..., n
n
3
S it hi
Switching
llosses
►The MOSFETs switch between two close voltages, so that switching
l
losses
are smaller
ll th
than th
those off a conventional
ti
lb
buck
k ttopology
l
►The switching frequency can be increased substantially in
comparison with a conventional buck
IV. CONCLUSIONS
60 kH
kHz sinusoid
i
id
58 W peak power
60 kHz square
52 W peak power
60 kH
kHz sawtooth
t th
51 W peak power
120 kHz sinusoid
40 W peak power
1
The MIBuck topology is appropriate to be the cornerstone of an
envelope tracking power supply
2
Hi h frequency
High
f
operation
i and
d ffast response are achieved
hi
d
3
Both the control system and the power topology should be
modified
difi d tto reach
h hi
higher
h switching
it hi ffrequencies
i and
d ffaster
t
responses
Thi work
This
kh
has b
been supported
t d by
b
under grant AP-200604777 and project TEC
TEC2007-66917