Application Report
SBAA211 – August 2014
Achieving True Universal Input Capability Using ADS1248
and ADS1148
Rajiv Mantri, Gitesh Bhagwat
ABSTRACT
In this application report, we design a simple connection scheme which can be used to connect multiple
transducers to ADS1248/1148. The scheme utilizes features of the devices such as current sources,
internal reference, and so forth, while allowing same circuitry on each channel; thus realizing true
universal input capability.
1
2
3
4
5
6
Contents
Introduction ................................................................................................................... 2
1.1
ADS1146/7/8 and ADS1246/7/8 .................................................................................. 2
1.2
ADS1248 Operation ................................................................................................ 2
Application Schematic ....................................................................................................... 4
Operation ..................................................................................................................... 6
3.1
Two-Wire RTD ...................................................................................................... 6
3.2
Three-Wire RTD .................................................................................................... 6
3.3
Four-Wire RTD ...................................................................................................... 7
3.4
Thermocouple Connections (without CJC) ...................................................................... 8
3.5
Thermocouple Connections (with CJC) .......................................................................... 8
3.6
Analog Input Connections (0–10 V) ............................................................................. 9
3.7
Input Current Connections (4-20 mA ) ......................................................................... 10
Test Results ................................................................................................................. 10
4.1
2-Wire RTD Emulation ........................................................................................... 11
4.2
3-Wire RTD Emulation ............................................................................................ 12
4.3
4-Wire RTD Emulation ............................................................................................ 13
4.4
Current Input Emulation 4–10 mA .............................................................................. 14
Conclusion .................................................................................................................. 15
Reference ................................................................................................................... 15
List of Figures
1
Block Diagram ................................................................................................................ 2
2
Multiplexer .................................................................................................................... 3
3
Universal Input Connection Scheme ...................................................................................... 4
4
Two-Wire RTD Connections................................................................................................ 6
5
Three-Wire RTD Connections .............................................................................................. 7
6
Four-Wire RTD Connections ............................................................................................... 7
7
Thermocouple Connections (Without CJC)
8
Thermocouple Connections (with CJC) ................................................................................... 9
9
Analog Input (0–10 V) Connections ....................................................................................... 9
10
Current (4–20 mA) Connections
11
12
13
..............................................................................
.........................................................................................
Resistance Directly Connected to EVM Board .........................................................................
Resistance Connected Through Switch Scheme (Internal Reference Used) ......................................
Resistance Directly Connected to EVM board .........................................................................
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10
11
11
12
1
Introduction
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14
Resistance Connected Through Switch Scheme (Internal Reference Used) ...................................... 12
15
Resistance Directly Connected to EVM Board ......................................................................... 13
16
Resistance Connected Through Switch Scheme (Internal Reference Used) ...................................... 13
17
ADC Excitation Current On (Drop Across R4 = 300 mV) ............................................................. 14
18
ADC Excitation Current On (Drop Across R4 = 900 mV) ............................................................. 14
19
ADC Excitation Current On (Drop Across R4 = 1.9 V) ................................................................ 15
List of Tables
1
Switch Positions.............................................................................................................. 5
2
Test Data .................................................................................................................... 10
1
Introduction
1.1
ADS1146/7/8 and ADS1246/7/8
The ADS1146, ADS1147, and ADS1148 are highly-integrated, precision, 16-bit analog-to-digital
converters (ADCs). The ADS1146/7/8 feature an onboard, low-noise, programmable gain amplifier (PGA),
a precision delta-sigma ADC with a single-cycle settling digital filter, and an internal oscillator. The
ADS1147 and ADS1148 also provide a built-in voltage reference with 10-mA output capacity, and two
matched programmable current digital-to-analog converters (DACs). The ADS1146/7/8 provide a complete
front-end solution for temperature sensor applications including thermal couples, thermistors, and
resistance temperature detectors (RTDs).
The ADS1246, ADS1247, and ADS1248 are similar devices with 24-bit analog-to-digital converters
(ADCs).
We will now discuss the detailed operation of the ADS1248. Similarities can be drawn to other devices.
1.2
ADS1248 Operation
The block diagram for ADS1248 is shown in Figure 1.
AVDD
REFP0/ REFN0/ ADS1248 Only
GPIO0 GPIO1 REFP1 REFN1
VREFOUT VREFCOM
Burnout
Detect
Voltage
Reference
VREF Mux
VBIAS
DVDD
ADS1247
ADS1248
GPIO
AIN0/IEXC
AIN1/IEXC
SCLK
System
Monitor
AIN2/IEXC/GPIO2
AIN3/IEXC/GPIO3
Input
Mux
AIN4/IEXC/GPIO4
AIN5/IEXC/GPIO5
PGA
DIN
3rd Order
DS
Modulator
Dual
Current
DACs
AIN6/IEXC/GPIO6
AIN7/IEXC/GPIO7
ADS1248 Only
Adjustable
Digital
Filter
Serial
Interface
and
Control
DRDY
DOUT/DRDY
CS
START
RESET
Internal Oscillator
Burnout
Detect
AVSS
IEXC1
IEXC2
CLK
DGND
ADS1248 Only
Figure 1. Block Diagram
2
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Introduction
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The ADS1246, ADS1247, and ADS1248 are highly integrated 24-bit data converters. They include a lownoise, high-impedance programmable gain amplifier (PGA), a delta-sigma (ΔΣ) ADC with an adjustable
single-cycle settling digital filter, internal oscillator, and a simple but flexible SPI-compatible serial
interface.
The ADS1247 and ADS1248 also include a flexible input multiplexer with system monitoring capability and
general-purpose I/O settings, a very low-drift voltage reference, and two matched current sources for
sensor excitation.
The block diagram for the multiplexer is shown in the Figure 2.
AVDD
AVDD
IDAC2
IDAC1
System Monitors
AVSS
AVDD
VBIAS
AVDD
AVDD
AIN0
AVSS
AVDD
VBIAS
VREFN
AIN1
ADS1247/48 Only
Temperature
Diode
VREFP
AVSS
AVDD
VREFP1/4
VBIAS
VREFN1/4
VREFP0/4
AIN2
AVSS
AVDD
VREFN0/4
VBIAS
AVDD/4
AIN3
AVSS/4
DVDD/4
ADS1248 Only
AVSS
AVDD
DGND/4
VBIAS
AIN4
AVDD
AVSS
AVDD
Burnout Current Source
(0.5mA, 2mA, 10mA)
VBIAS
AIN5
AINP
AVSS
AVDD
VBIAS
AVSS
AVDD
VBIAS
PGA
AINN
To
ADC
AIN6
Burnout Current Source
(0.5mA, 2mA, 10mA)
AIN7
AVSS
Figure 2. Multiplexer
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Application Schematic
2
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Application Schematic
Figure 3 gives the proposed application schematic which shows the different connections required for
implementing a universal input scheme.
U1
CD74HC4051PWT
R4
S1-0
J0
100ES4-0
1
R1
2
18K
3
16 VCC
A4 1
15 A2
A6 2
14 A1
A 3
13 A0
A7 4
12 A3
A5 5
11 S0
~E 6
10 S1
VEE 7
9 S2
4
100E
R3
R2
2K
2K
S5-0
1 DVDD
SCLK 28
2 DGND
S2-0
S3-0
R18
S6-0
GND 8
U2
ADS1248IPW
3 CLK
DIN 27
DOUT/DRDY 26
ADS1248IPW
4 RESET
R9
S1-1
J1
100ES4-1
1
R6
2
18K
3
DRDY 25
5 REFP0/GPIO0
CS 24
6 REFN0/GPIO1
START 23
7 REFP1
AVDD 22
8 REFN1
AVSS 21
9 VREFOUT
IOUT1 20
10 VREFCOM
4
S5-1
R7
12 AIN1/IEXC
AIN2/IEXC/GPIO2 17
2K
2K
13 AIN4/IEXC/GPIO4
AIN7/IEXC/GPIO7 16
14 AIN5/IEXC/GPIO5
AIN6/IEXC/GPIO6 15
833E R5
100E
S4-2
S6-1
S3-1
R13
S1-2
J2
AIN3/IEXC/GPIO3 18
R8
R19
TO_MCU_ADC
IOUT2 19
11 AIN0/IEXC
S2-1
100E
S25
1
R10
2
18K
3
4
R20
R12
R11
2K
2K
S5-2
100E
S4-3
R17
S1-3
J3
S2-2
S3-2
S6-2
100E
1
R14
2
18K
3
4
R15
2K
2K
S5-3
S2-3
R16
S3-3
100E
S6-3
R21
Figure 3. Universal Input Connection Scheme
4
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Application Schematic
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Using this scheme, each device can be used to connect 4 differential inputs, thus enabling 4 transducer
connections. A total of 20 SPST and 5 SPDT switches are required in the scheme. These can be
manually operated DIP switches or electronically controlled FET switches, depending on the accessibility
of the unit.
The sheet in Table 1 details on the different switch positions for different transducer options:
Table 1. Switch Positions
Input
Type
Termination
S/W Connections
U1 MUX
Reference
Int/Ext
Internal
Current
Connection
Internal
Current
Value
MCU ADC
Ch 0
15 mA
NA
S1
S2
S3
S4
S5
S6
S25
(2,3) RTD
Close
Open
Open
Open
N/O
Open
Do not care
Do not care
External
3-wire
RTD
(2,3) RTD, 4 Exc
Close
Open
Open
Open
N/C
Open
Do not care
Do not care
External
Ch 0 and 1
15 mA
NA
4-wire
RTD
(2,3) RTD, (1,4)
Exc
Close
Open
Open
Open
N/C
Open
N/O
A0
External
IOUT 1 (pin
20)
15 mA
NA
TC
(2,3) TC
Close
Open
Open
Open
N/O
Open
Do not care
Do not care
External
Ch 1
15 mA
NA
2-wire
RTD
TC with
CJC
(2,3) TC, 1 Temp
Close
Open
Open
Open
N/O
Open
N/C
A0
External
Ch 1
15 mA
For cold jn
temp
0–10 V
2
Open
Close
Close
Open
N/C
Open
Do not care
Do not care
Internal
Ch 0 and1
0.1 mA
NA
4–20 mA
2
Close
Open
Open
Close
N/C
Close
Do not care
Do not care
Internal
Ch 1
1 mA
NA
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Operation
3
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Operation
Now we take a look at the operation of the scheme for different switch positions for a few of the
transducers.
3.1
Two-Wire RTD
Figure 4 shows the connection diagram for a 2-wire RTD connection. The dotted red lines show the
current flow path. The excitation current flows out of Ch0 of the device, through the RTD and into the 833Ω resistor to ground. The magnitude is set to 1.5 mA, thus giving a drop of 1.25 V across the resistor. This
voltage is used as the reference to eliminate any inaccuracies due to variation of the excitation current
value.
Figure 4. Two-Wire RTD Connections
3.2
Three-Wire RTD
Figure 5 shows the connection diagram for a 3-wire RTD connection. The dotted red lines show the
current flow path. The excitation current flows out of Ch0 and Ch1 of the device. The current from Ch0
flows into the RTD and then into the 833-Ω resistor to ground. The current from Ch1 flows into one of the
leads of the RTD, then through the 833-Ω resistor into ground.
Differential measurement between Ch0 and Ch1 gives the RTD drop. This includes the drop because of
the leads.
The single channel reading of Ch1 gives the drop of the leads which can be used to offset the differential
reading for better accuracy.
The voltage across the 833-Ω resistor is 2.5 V and can be used as a reference to eliminate any
inaccuracies due to variation in the excitation current value.
6
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Operation
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Figure 5. Three-Wire RTD Connections
3.3
Four-Wire RTD
Figure 6 shows the connection diagram for a 4-wire RTD connection. The dotted red lines show the
current flow path. The excitation current flows out of excitation current pin 1. This flows through the RTD,
then through the 833-Ω resistor, into ground. Thus, there is no current flow through the measurement
leads connected on Ch1 and Ch1, eliminating any drops. Here as well, the drop across the 833-Ω resistor
can be used as the reference.
Figure 6. Four-Wire RTD Connections
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Operation
3.4
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Thermocouple Connections (without CJC)
Figure 7 shows the connection diagram for a thermocouple without cold junction compensation. The
dotted red lines show the current flow path. The excitation current flows out of Ch1 of the device. This
current flows through the 833-Ω resistor to ground and is used to generate a common mode voltage
greater than 100 mV to meet the minimum requirement of the device (page 3 of device data sheet).
The voltage across the thermocouple adds on to this voltage and care should be taken to ensure that the
total value does not exceed the maximum value of common mode voltage.
However, this does not impact the temperature measurement as the thermocouple voltage is differential
across Ch0 and Ch1.
Figure 7. Thermocouple Connections (Without CJC)
3.5
Thermocouple Connections (with CJC)
Figure 8 shows the connection diagram for a thermocouple with cold junction compensation. The
connection scheme is the same as in the previous case of measurement without CJC. The only additional
connection is that of CJC input which is routed to the MCU ADC through the external multiplexer and
switch S25. The CJC input is connected on pin 1 of external connector J0.
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Figure 8. Thermocouple Connections (with CJC)
3.6
Analog Input Connections (0–10 V)
Figure 9 shows the connection diagram for an analog voltage from 0–10 V. The scheme steps down the
input voltage by a factor of 10. This is done through the voltage divider formed by resistors R1 and R2.
The 0- to 10-V input is scaled down to 0–1 V. It also ensures that the minimum common-mode voltage
requirement is met.
Figure 9. Analog Input (0–10 V) Connections
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Operation
3.7
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Input Current Connections (4-20 mA )
Figure 10 shows the connection diagram for a 4- to 20-mA current voltage. The scheme converts input
current into voltage across the resistor (R4).The same is measured through Ch0 and Ch1 of ADS1248.
Figure 10. Current (4–20 mA) Connections
4
Test Results
A few of the previously mentioned transducer connections have been emulated and tested. The details for
the emulated test setup and the summarized readings are given in Table 2.
Table 2. Test Data
Emulated Input
Scenario
Measured Value Connection
Directly to EVM
Measured Value Connection
Through Proposed
Scheme
1
2-wire RTD
49.8 mV
50.8 mV
470-Ω resistor (5% tolerance) connected between Ch0 and
Ch1; 100-µA current into Ch0; Ch0 and Ch1 connected as
inputs to ADC; internal reference used, external reference
(generated by Ch0 current into 833-Ω resistor) use should
help improve results.
2
3-wire RTD
49.8 mV
50.8 mV
470-Ω resistor (5% tolerance) connected between Ch0 and
Ch1; 100-µA current into Ch0 and Ch1; Ch0 and Ch1
connected as inputs to ADC; internal reference used,
external reference (generated by Ch0,1 currents into 833-Ω
resistor) use should help improve results.
3
4-wire RTD
45.2 mV
46.1 mV
470-Ω resistor (5% tolerance) connected between Ch0 and
Ch1; 100-µA current into lout0; Ch0 and Ch1; connected as
inputs to ADC; internal reference used, external reference
(generated by lout0 current into 833-Ω resistor) use should
help improve results.
4
4 to 20-mA current
input
Differential voltage
measured - decimal
Differential voltage
measured - analog value
Test Setup Comments
4.1
4 mA input
4750
298 mV
800 mV supply connected to channel 2 of external connector
J0, drop measure across R4 = 100 Ω
4.2
10 mA input
14412
904 mV
2-V supply connected to channel 2 of external connector J0,
drop measure across R4 = 100 Ω
4.3
20 mA
30207
1.9 V
4-V supply connected to channel 2 of external connector J0,
drop measure across R4 = 100 Ω
Sr. No.
10
Test Setup Comments
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Test Results
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4.1
2-Wire RTD Emulation
Figure 11 and Figure 12 use 100 µA current into Ch0; Ch0 and Ch1 inputs.
Figure 11. Resistance Directly Connected to EVM Board
Figure 12. Resistance Connected Through Switch Scheme (Internal Reference Used)
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Test Results
4.2
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3-Wire RTD Emulation
Figure 13 and Figure 14 use 100 µA current into Ch0; Ch0 and Ch1 inputs; one terminal of external
resistance directly connected to ground.
Figure 13. Resistance Directly Connected to EVM board
Figure 14. Resistance Connected Through Switch Scheme (Internal Reference Used)
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Test Results
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4.3
4-Wire RTD Emulation
Figure 15 and Figure 16 use 100 µA connected to channel from current source- Iout0.
Figure 15. Resistance Directly Connected to EVM Board
Figure 16. Resistance Connected Through Switch Scheme (Internal Reference Used)
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Test Results
4.4
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Current Input Emulation 4–10 mA
Figure 17 shows the current input emulation settings for 4-mA input.
Figure 17. ADC Excitation Current On (Drop Across R4 = 300 mV)
Figure 18 shows the current input emulation settings for 10-mA input.
Figure 18. ADC Excitation Current On (Drop Across R4 = 900 mV)
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Conclusion
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Figure 19 shows the current input emulation settings for 20-mA input.
Figure 19. ADC Excitation Current On (Drop Across R4 = 1.9 V)
5
Conclusion
Using the arrangement shown in this report, ADS1248/1148 and other similar devices can be used to
design a universal input terminal.
Further transducers can be made compatible by making additions on similar lines.
6
Reference
1. ADS1248 data sheet (SBAS426G)
2. ADS1148 data sheet (SBAS453F) (http://www.ti.com/lit/ds/symlink/ads1148.pdf)
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