a
Ultralow Offset Voltage
Operational Amplifier
OP07
PIN CONNECTIONS
FEATURES
Low VOS: 75 V Max
Low VOS Drift: 1.3 V/C Max
Ultrastable vs. Time: 1.5 V/Month Max
Low Noise: 0.6 V p-p Max
Wide Input Voltage Range: 14 V
Wide Supply Voltage Range: 3 V to 18 V
Fits 725,108A/308A, 741, AD510 Sockets
125C Temperature-Tested Dice
8-Lead PDIP (P-Suffix)
8-Lead SOIC (S-Suffix)
VOS TRIM 1
8
VOS TRIM
2
7
V+
+IN 3
6
OUT
5
NC
–IN
V–
APPLICATIONS
Wireless Base Station Control Circuits
Optical Network Control Circuits
Instrumentation
Sensors and Controls
Thermocouples
RTDs
Strain Bridges
Shunt Current Measurements
Precision Filters
OP07
4
NC = NO CONNECT
GENERAL DESCRIPTION
The OP07 has very low input offset voltage (75 µV max for
OP07E) that is obtained by trimming at the wafer stage. These
low offset voltages generally eliminate any need for external nulling. The OP07 also features low input bias current (± 4 nA for the
OP07E) and high open-loop gain (200 V/mV for the OP07E).
The low offsets and high open-loop gain make the OP07 particularly useful for high gain instrumentation applications.
The wide input voltage range of ±13 V minimum combined with a
high CMRR of 106 dB (OP07E) and high input impedance provide high accuracy in the noninverting circuit configuration.
Excellent linearity and gain accuracy can be maintained even at
high closed-loop gains. Stability of offsets and gain with time or
variations in temperature is excellent. The accuracy and stability
of the OP07, even at high gain, combined with the freedom
from external nulling have made the OP07 an industry standard
for instrumentation applications.
The OP07 is available in two standard performance grades. The
OP07E is specified for operation over the 0°C to 70°C range, and
the OP07C is specified over the –40°C to +85°C temperature range.
The OP07 is available in epoxy 8-lead PDIP and 8-lead SOIC. It
is a direct replacement for 725, 108A, and OP05 amplifiers;
741 types may be directly replaced by removing the 741’s nulling
potentiometer. For improved specifications, see the OP177 or
OP1177. For ceramic DIP and TO-99 packages and standard
micro circuit (SMD) versions, see the OP77.
V+
7
NONINVERTING
INPUT 3
INVERTING
INPUT
R2B*
R2A*
*NOTE
R2A AND R2B ARE
ELECTRONICALLY
ADJUSTED ON CHIP
AT FACTORY FOR
MINIMUM INPUT
OFFSET VOLTAGE.
R3
1
R1A
(OPTIONAL
NULL)
R1B
Q19
Q10
Q9
Q3
Q5
Q11
Q8
Q7
Q6
Q4
Q27
Q21
Q23
Q22
Q24
C3
R9
OUTPUT
6
Q12
Q17
C2
R10
Q16
R5
Q1
R4
R7
C1
8
Q26
Q20
Q15
Q2
Q25
Q14
2
Q13
4
Q18
R6
R8
V–
Figure 1. Simplified Schematic
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© 2003 Analog Devices, Inc. All rights reserved.
OP07–SPECIFICATIONS
OP07E ELECTRICAL CHARACTERISTICS (V = 15 V, T = 25C, unless otherwise noted.)
S
Parameter
Symbol
INPUT CHARACTERISTICS
Input Offset Voltage1
Long-Term VOS Stability2
Input Offset Current
Input Bias Current
Input Noise Voltage
Input Noise Voltage Density
VOS
VOS/Time
IOS
IB
en p-p
en
Input Noise Current
Input Noise Current Density
In p-p
In
Input Resistance—Differential Mode4
Input Resistance—Common-Mode
Input Voltage Range
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain
RIN
RINCM
IVR
CMRR
PSRR
AVO
A
Conditions
Min
Typ
Max
Unit
75
1.5
3.8
± 4.0
0.6
18.0
13.0
11.0
30
0.80
0.23
0.17
200
30
0.3
0.5
± 1.2
0.35
10.3
10.0
9.6
14
0.32
0.14
0.12
50
160
± 14
123
5
500
µV
µV/Mo
nA
nA
µV p-p
nV/√Hz
nV/√Hz
nV/√Hz
pA p-p
pA/√Hz
pA/√Hz
pA/√Hz
MΩ
GΩ
V
dB
µV/V
V/mV
150
400
V/mV
0.1 Hz to 10 Hz3
fO = 10 Hz
fO = 100 Hz3
fO = 1 kHz
fO = 10 Hz
fO = 100 Hz3
fO = 1 kHz
15
VCM = ± 13 V
VS = ± 3 V to ± 18 V
RL ≥ 2 kΩ, VO = ± 10 V
RL ≥ 500 Ω, VO = ± 0.5 V,
VS = ± 3 V4
± 13
106
20
OUTPUT CHARACTERISTICS
Output Voltage Swing
VO
RL ≥ 10 kΩ
RL ≥ 2 kΩ
RL ≥ 1 kΩ
± 12.5
± 12.0
± 10.5
± 13.0
± 12.8
± 12.0
V
V
V
DYNAMIC PERFORMANCE
Slew Rate
Closed-Loop Bandwidth
Closed-Loop Output Resistance
Power Consumption
SR
BW
RO
Pd
RL ≥ 2 kΩ3
AVOL = 15
VO = 0, IO = 0
VS = ± 15 V, No Load
VS = ± 3 V, No Load
RP = 20 kΩ
0.1
0.4
0.3
0.6
60
75
4
±4
V/µs
MHz
Ω
mW
mW
mV
Offset Adjustment Range
120
6
NOTES
1
Input offset voltage measurements are performed by automated test equipment approximately 0.5 seconds after application of power.
2
Long-term input offset voltage stability refers to the averaged trend time of V OS vs. the time over extended periods after the first 30 days of operation. Excluding the
initial hour of operation, changes in V OS during the first 30 operating days are typically 2.5 µV, refer to the typical performance characteristics. Parameter is sample tested.
3
Sample tested.
4
Guaranteed by design.
5
Guaranteed but not tested.
Specifications subject to change without notice.
–2–
REV. C
OP07
OP07C ELECTRICAL CHARACTERISTICS (V = 15 V, T = 25C, unless otherwise noted.)
S
Parameter
Symbol
INPUT CHARACTERISTICS
Input Offset Voltage1
Long-Term VOS Stability2
Input Offset Current
Input Bias Current
Input Noise Voltage
Input Noise Voltage Density
VOS
VOS/Time
IOS
IB
en p-p
en
Input Noise Current
Input Noise Current Density
In p-p
In
Input Resistance—Differential Mode4
Input Resistance—Common-Mode
Input Voltage Range
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain
RIN
RINCM
IVR
CMRR
PSRR
AVO
A
Conditions
Min
Typ
Max
Unit
150
2.0
6.0
± 7.0
0.65
20.0
13.5
11.5
35
0.90
0.27
0.18
120
60
0.4
0.8
± 1.8
0.38
10.5
10.2
9.8
15
0.35
0.15
0.13
33
120
± 14
120
7
400
µV
µV/Mo
nA
nA
µV p-p
nV/√Hz
nV/√Hz
nV/√Hz
pA p-p
pA/√Hz
pA/√Hz
pA/√Hz
MΩ
GΩ
V
dB
µV/V
V/mV
100
400
V/mV
0.1 Hz to 10 Hz3
fO = 10 Hz
fO = 100 Hz3
fO = 1 kHz
fO = 10 Hz
fO = 100 Hz3
fO = 1 kHz
8
VCM = ± 13 V
VS = ± 3 V to ± 18 V
RL ≥ 2 kΩ, VO = ± 10 V
RL ≥ 500 Ω, VO = ± 0.5 V,
VS = ± 3 V4
± 13
100
32
OUTPUT CHARACTERISTICS
Output Voltage Swing
VO
RL ≥ 10 kΩ
RL ≥ 2 kΩ
RL ≥ 1 kΩ
± 12.0
± 11.5
± 13.0
± 12.8
± 12.0
V
V
V
DYNAMIC PERFORMANCE
Slew Rate
Closed-Loop Bandwidth
Closed-Loop Output Resistance
Power Consumption
SR
BW
RO
Pd
RL ≥ 2 kΩ3
AVOL = 15
VO = 0, IO = 0
VS = ± 15 V, No Load
VS = ± 3 V, No Load
RP = 20 kΩ
0.1
0.4
0.3
0.6
60
80
4
±4
V/µs
MHz
Ω
mW
mW
mV
Offset Adjustment Range
150
8
NOTES
1
Input offset voltage measurements are performed by automated test equipment approximately 0.5 seconds after application of power.
2
Long-term input offset voltage stability refers to the averaged trend time of V OS vs. the time over extended periods after the first 30 days of operation. Excluding the
initial hour of operation, changes in V OS during the first 30 operating days are typically 2.5 µV, refer to the typical performance characteristics. Parameter is sample tested.
3
Sample tested.
4
Guaranteed by design.
5
Guaranteed but not tested.
Specifications subject to change without notice.
REV. C
–3–
OP07–SPECIFICATIONS
OP07E ELECTRICAL CHARACTERISTICS (V = 15 V, 0C T 70C, unless otherwise noted.)
S
Parameter
Symbol
INPUT CHARACTERISTICS
Input Offset Voltage1
Voltage Drift without External Trim2
Voltage Drift with External Trim3
Input Offset Current
Input Offset Current Drift
Input Bias Current
Input Bias Current Drift
Input Voltage Range
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain
VOS
TCVOS
TCVOSN
IOS
TCIOS
IB
TCIB
IVR
CMRR
PSRR
AVO
OUTPUT CHARACTERISTICS
Output Voltage Swing
VO
A
Conditions
Min
Typ
Max
Unit
130
1.3
1.3
5.3
35
± 5.5
35
180
45
0.3
0.3
0.9
8
± 1.5
13
± 13.5
123
7
450
µV
µV/°C
µV/°C
nA
pA/°C
nA
pA/°C
V
dB
µV/V
V/mV
± 12
± 12.6
RP = 20 kΩ
± 13
103
VCM = ± 13 V
VS = ± 3 V to ± 18 V
RL ≥ 2 kΩ, VO = ± 10 V
RL ≥ 10 kΩ
32
V
NOTES
1
Input offset voltage measurements are performed by automated test equipment approximately 0.5 seconds after application of power.
2
Guaranteed by design.
3
Sample tested.
Specifications subject to change without notice.
OP07C ELECTRICAL CHARACTERISTICS (V = 15 V, 40C T 85C, unless otherwise noted.)
S
Parameter
Symbol
INPUT CHARACTERISTICS
Input Offset Voltage1
Voltage Drift without External Trim2
Voltage Drift with External Trim3
Input Offset Current
Input Offset Current Drift
Input Bias Current
Input Bias Current Drift
Input Voltage Range
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain
VOS
TCVOS
TCVOSN
IOS
TCIOS
IB
TCIB
IVR
CMRR
PSRR
AVO
OUTPUT CHARACTERISTICS
Output Voltage Swing
VO
A
Conditions
Min
Typ
Max
Unit
250
1.8
1.8
8.0
50
± 9.0
50
100
85
0.5
0.4
1.6
12
± 2.2
18
± 13.5
120
10
400
µV
µV/°C
µV/°C
nA
pA/°C
nA
pA/°C
V
dB
µV/V
V/mV
± 11
± 12.6
RP = 20 kΩ
VCM = ± 13 V
VS = ± 3 V to ± 18 V
RL ≥ 2 kΩ, VO = ± 10 V
RL ≥ 10 kΩ
± 13
97
51
V
NOTES
1
Input offset voltage measurements are performed by automated test equipment approximately 0.5 seconds after application of power.
2
Guaranteed by design.
3
Sample tested.
Specifications subject to change without notice.
–4–
REV. C
OP07
ABSOLUTE MAXIMUM RATINGS
1
Supply Voltage (VS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 22 V
Input Voltage2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 22 V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . ± 30 V
Output Short-Circuit Duration . . . . . . . . . . . . . . . . Indefinite
Storage Temperature Range
S, P Packages . . . . . . . . . . . . . . . . . . . . . . –65°C to +125°C
Operating Temperature Range
OP07E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
OP07C . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . 150°C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . . 300°C
Package Type
JA*
JC
Unit
8-Lead PDIP (P)
8-Lead SOIC (S)
103
158
43
43
°C/W
°C/W
*JA is specified for worst-case conditions, i.e., JA is specified for device in socket
for PDIP package, and JA is specified for device soldered to printed circuit board
for SOIC package.
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating; functional operation of the device
at these or any other conditions above those listed in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
2
For supply voltages less than ± 22 V, the absolute maximum input voltage is equal
to the supply voltage.
ORDERING GUIDE
Model
Temperature
Range
Package
Description
Package
Option
OP07EP
OP07CP
OP07CS
OP07CS-REEL
OP07CS-REEL7
0°C to 70°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
8-Lead PDIP
8-Lead PDIP
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
P-8
P-8
S-8
S-8
S-8
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
OP07 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.
REV. C
–5–
OP07 – Typical Performance Characteristics
1000
30
25
ABSOLUTE CHANGE IN INPUT
OFFSET VOLTAGE (V)
600
400
200
0
50
15
THERMAL
SHOCK
RESPONSE
BAND
10
DEVICE IMMERSED
IN 70C OIL BATH
5
0
–20
100
20
TEMPERATURE (C)
MAXIMUM ERROR REFERRED TO INPUT (mV)
MAXIMUM ERROR REFERRED TO INPUT (mV)
0.8
0.6
0.4
OP07C
0.2
OP07E
10k
100k
MATCHED OR UNMATCHED SOURCE RESISTANCE ()
OP07E
60
0
100
80
0.8
0.6
0.4
OP07C
0.2
OP07E
1k
INPUT OFFSET CURRENT (nA)
OP07C
2
1
OP07E
100k
10k
10
0
–10
–20
–30
–30
0
50
100
TEMPERATURE (C)
TPC 7. Input Bias Current vs.
Temperature
–20
–10
0
10
20
30
DIFFERENTIAL INPUT VALUE (V)
TPC 6. Input Bias Current vs.
Differential Input Voltage
0
0
REFERRED TO INPUT
5mV/CM AT OUTPUT
2.0
1.5
1.0
OP07C
0
0
0
0
0.5
0
OP07E
–50
5
AT | VDIFF| < 1.0V. |IB| < 7nA (OP07C)
VS = 15V
TA = 25C
20
VS = 15V
3
4
30
2.5
VS = 15V
3
TPC 3. Warm-Up Drift
VS = 15V
0C TA 70C
0
100
2
1
TIME AFTER SUPPLY TURN-ON (Minutes)
TPC 5. Maximum Error vs.
Source Resistance
4
INPUT BIAS CURRENT (nA)
40
1.2
1.0
OP07C
5
MATCHED OR UNMATCHED SOURCE RESISTANCE ()
TPC 4. Maximum Error vs.
Source Resistance
0
10
TPC 2. Offset Voltage Change
due to Thermal Shock
1.0
1k
15
TIME (s)
TPC 1. Open-Loop Gain vs.
Temperature
0
100
20
0
0
NONINVERTING INPUT BIAS CURRENT (mA)
0
–50
20
VS = 15V
TA = 25C
VOLTAGE (200nV/DIV)
OPEN-LOOP GAIN (V/mV)
800
25
ABSOLUTE CHANGE IN INPUT
OFFSET VOLTAGE (V)
VS = 15V
TA = 25C, TA = 70C
VS = 15V
0
–100
0
–50
0
50
100
TIME (1s/DIV)
TEMPERATURE (C)
TPC 8. Input Offset Current
vs. Temperature
–6–
TPC 9. Low Frequency Noise
REV. C
OP07
10
1000
130
OP07
VS = 15V
TA = 25C
120
OP07C
100
10
110
CMRR (dB)
RMS NOISE (V)
INPUT NOISE VOLTAGE (nV/ Hz)
RS1 = RS2 = 200k
THERMAL NOISE SOURCE
RESISTORS INCLUDED
EXCLUDED
1.0
100
90
RS = 0
80
70
VS = 15V
TA = 25C
1.0
1.0
10
100
FREQUENCY (Hz)
0.1
1.0
1k
10
100
60
1.0
1k
TPC 10. Total Input Noise
Voltage vs. Frequency
1k
120
TA = 25C
VS = 15V
TA = 25C
PSRR (dB)
90
80
70
800
80
OPEN-LOOP GAIN (dB)
OPEN-LOOP GAIN (V/mV)
110
OP07C
100k
TPC 12. CMRR vs. Frequency
1000
TA = 25C
100
10k
FREQUENCY (Hz)
TPC 11. Input Wideband Noise vs.
Bandwidth (0.1 Hz to Frequency
Indicated)
120
100
10
FREQUENCY (Hz)
600
400
40
0
200
60
0
1.0
10
100
FREQUENCY (Hz)
1k
10k
0
20
60
40
20
0
1k
10k
100k
1M
10M
FREQUENCY (Hz)
TPC 16. Closed-Loop Response
for Various Gain Configurations
PEAK-TO-PEAK AMPLITUDE (V)
VS = 15V
TA = 25C
100
–40
0.1
20
16
12
8
4
0
1k
100k
10k
FREQUENCY (Hz)
TPC 17. Maximum Output
Swing vs. Frequency
–7–
10
100
1k
10k 100k 1M 10M
TPC 15. Open-Loop Frequency
Response
VS = 15V
TA = 25C
24
1
FREQUENCY (Hz)
28
80
CLOSED-LOOP GAIN (dB)
15
TPC 14. Open-Loop Gain vs.
Power Supply Voltage
100
REV. C
10
POWER SUPPLY VOLTAGE (V)
TPC 13. PSRR vs. Frequency
–20
10
5
ABSOLUTE VALUE OF OFFSET VOLTAGE (V)
50
0.1
1M
20
VS = 15V
VIN = 10mV
TA = 25C
15
POSITIVE SWING
NEGATIVE SWING
10
5
0
100
1k
LOAD RESISTANCE TO GROUND ()
TPC 18. Maximum Output
Voltage vs. Load Resistance
10k
1000
1000
VS = 15V
TA = 25C
INPUT NOISE VOLTAGE (nV/ Hz)
POWER CONSUMPTION (mV)
TA = 25C
100
10
1.0
0
20
40
100
VIN (PIN 3) = +10mV, VO = –15V
10
VIN (PIN 3) = –10mV, VO = +15V
1.0
60
0
20
40
FREQUENCY (Hz)
FREQUENCY (Hz)
TPC 20. Output Short-Circuit
Current vs. Time
4
VS = 15V
RS = 100
OP07C
3
2
OP07E
1
0
–50
0
50
TEMPERATURE (C)
100
TPC 21. Untrimmed Offset
Voltage vs. Temperature
16
4
VOS TRIMMED TO < 5V AT 25C
NULLING POT = 20k
12
TOTAL DRIFT WITH TIME (V)
ABSOLUTE VALUE OF OFFSET VOLTAGE (V)
TPC 19. Power Consumption
vs. Power Supply
60
ABSOLUTE VALUE OF OFFSET VOLTAGE (V)
OP07
3
OP07C
2
OP07C
OP07E
1
0.2V/mo.
TREND LINE
0.3V/mo.
TREND LINE
8
4
0.3V/mo. TREND LINE
0
0.2V/mo.
TREND LINE
–4
0.2V/mo.
TREND LINE
0.3V/mo. TREND LINE
–8
–12
OP07E
–16
0
–50
0
50
TEMPERATURE (C)
TPC 22. Trimmed Offset
Voltage vs. Temperature
100
0
1
2
3
4
5
6
7
8
9 10 11 12
TIME (Months)
TPC 23. Offset Voltage Stability
vs. Time
–8–
REV. C
OP07
R3
10k
RF
RIN
R1
SUM MODE
BIAS
V+
2
7
2
7
6
6
R5
10k
3
OP07C
A1
4
R1
EIN 10k
EO
2
V+
FD333
D1
7
6
R2
100k
EO
6
0V TO 10V
AD7115 OR
AD8510A
4
7
2
10V
3
R5
10k
V+
V+
R3
3k
R4
10k
3
OP07
4
V–
OP07
3
4
FD333
D2
V–
V–
R2
10k
V–
EO = –EIN RF – IBIAS RF
R1
R1 = R2
R3
R4
Figure 5. Burn-In Circuit
Figure 2. Typical Offset Voltage Test Circuit
RF
RIN
R4
10k
R1
SUM MODE
BIAS
R1
10k
E1
V+
+15V
E2
R2
10k
E3
R3
10k
7
2
6
2
7
3
OP07C
A1
EO
6
V–
–15V
7
2
R1
10k
3
EO
6
OP07C
A2
4
4
R5
2.5k
V+
R2
100k
4
OP07C
3
R3
3k
EO = –EIN
V–
RF
+ IBIAS RF
R1
PINOUT SHOWN FOR P PACKAGE
Figure 3. Typical Low Frequency Noise Circuit
Figure 6. High Speed, Low VOS Composite Amplifier
R1
R4
10k
R3
SENDING
JUNCTION
V+
R1
10k
E2
R2
10k
E3
R3
10k
+15V
E2
2
7
6
REFERENCE
JUNCTION
E1
3
R2
R4
2
7
EO
OP07
OP07A
6
EO
3
4
4
R5
2.5k
V–
–15V
R1 = R2
R4
R3
PINOUT SHOWN FOR P PACKAGE
Figure 4. Optional Offset Nulling Circuit
Figure 7. Adjustment-Free Precision Summing Amplifier
REV. C
–9–
OP07
TYPICAL APPLICATIONS
APPLICATIONS INFORMATION
R1
The OP07 series units may be substituted directly into 725,
108A/308A, and OP05 sockets with or without removal of external compensation or nulling components. Additionally, the
OP07 may be used in unnulled 741 type sockets. However, if
conventional 741 nulling circuitry is in use, it should be modified or removed to enable proper OP07 operation. The OP07
offset voltage may be nulled to 0 through use of a potentiometer
(see offset nulling circuit diagram).
R3
SENSING
JUNCTION
V+
7
2
EO
6
OP07
REFERENCE
JUNCTION
3
PRECISION ABSOLUTE-VALUE CIRCUIT
4
R2
The OP07 provides stable operation with load capacitance of
up to 500 pF and ± 10 V swings; larger capacitances should be
decoupled with a 50 Ω decoupling resistor.
R1
= R2
R3
R4
R4
V–
Stray thermoelectric voltages generated by dissimilar metals at
the contacts to the input terminals can degrade drift performance.
Therefore, best operation will be obtained when both input contacts are maintained at the same temperature, preferably close to
the package temperature.
PINOUT SHOWN FOR P PACKAGE
Figure 8. High Stability Thermocouple Amplifier
R4
10k
R3
10k
R5
10k
V+
R1
EIN 10k
V+
FD333
D1
7
2
10V
3
2
6
OP07
A1
3
OP07
A2
6
EO
0V TO 10V
4
4
V–
7
FD333
D2
R2
10k
V–
VA
PINOUT SHOWN FOR P PACKAGE
Figure 9. Precision Absolute-Value Circuit
–10–
REV. C
OP07
OUTLINE DIMENSIONS
8-Lead Standard Small Outline Package [SOIC]
Narrow Body
S-Suffix
(R-8)
Dimensions shown in millimeters and (inches)
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
8
5
1
4
1.27 (0.0500)
BSC
0.25 (0.0098)
0.10 (0.0040)
6.20 (0.2440)
5.80 (0.2284)
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
SEATING
0.10
PLANE
0.50 (0.0196)
45
0.25 (0.0099)
8
0.25 (0.0098) 0 1.27 (0.0500)
0.40 (0.0157)
0.17 (0.0067)
COMPLIANT TO JEDEC STANDARDS MS-012AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
8-Lead Plastic Dual-in-Line Package [PDIP]
P-Suffix
(N-8)
Dimensions shown in inches and (millimeters)
0.375 (9.53)
0.365 (9.27)
0.355 (9.02)
8
5
1
4
0.295 (7.49)
0.285 (7.24)
0.275 (6.98)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.100 (2.54)
BSC
0.180
(4.57)
MAX
0.150 (3.81)
0.130 (3.30)
0.110 (2.79)
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.015
(0.38)
MIN
SEATING
PLANE
0.060 (1.52)
0.050 (1.27)
0.045 (1.14)
0.150 (3.81)
0.135 (3.43)
0.120 (3.05)
0.015 (0.38)
0.010 (0.25)
0.008 (0.20)
COMPLIANT TO JEDEC STANDARDS MO-095AA
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
REV. C
–11–
OP07
Revision History
Location
Page
8/03—Data Sheet changed from REV. B to REV. C.
Changes to OP07C ELECTRICAL SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Edits to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Edits to Figure 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3/03—Data Sheet changed from REV. A to REV. B.
Updated Package Titles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Universal
Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2/02—Data Sheet changed from REV. 0 to REV. A.
Edits to FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Edits to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Edits to PIN CONNECTION drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Edits to ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Deleted ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–3
Deleted OP07D Column from ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–5
Edits to TPCs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7–9
Edits to HIGH-SPEED, LOW VOS COMPOSITE AMPLIFIER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
–12–
REV. C
C00316–0–8/03(C)
Changes to OP07E ELECTRICAL SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
LM6171
High Speed Low Power Low Distortion Voltage Feedback
Amplifier
General Description
Features
The LM6171 is a high speed unity-gain stable voltage feedback amplifier. It offers a high slew rate of 3600V/µs and a
unity-gain bandwidth of 100 MHz while consuming only 2.5
mA of supply current. The LM6171 has very impressive AC
and DC performance which is a great benefit for high speed
signal processing and video applications.
The ± 15V power supplies allow for large signal swings and
give greater dynamic range and signal-to-noise ratio. The
LM6171 has high output current drive, low SFDR and THD,
ideal for ADC/DAC systems. The LM6171 is specified for
± 5V operation for portable applications.
The LM6171 is built on National’s advanced VIP™ III (Vertically Integrated PNP) complementary bipolar process.
(Typical Unless Otherwise Noted)
n Easy-To-Use Voltage Feedback Topology
n Very High Slew Rate: 3600V/µs
n Wide Unity-Gain-Bandwidth Product: 100 MHz
n −3dB Frequency @ AV = +2: 62 MHz
n Low Supply Current: 2.5 mA
n High CMRR: 110 dB
n High Open Loop Gain: 90 dB
n Specified for ± 15V and ± 5V Operation
Applications
n
n
n
n
n
n
n
n
n
Multimedia Broadcast Systems
Line Drivers, Switchers
Video Amplifiers
NTSC, PAL ® and SECAM Systems
ADC/DAC Buffers
HDTV Amplifiers
Pulse Amplifiers and Peak Detectors
Instrumentation Amplifier
Active Filters
Typical Performance Characteristics
Closed Loop Frequency Responsevs. Supply Voltage
(AV = +1)
Large Signal Pulse Response
AV = +1, VS = ± 15
01233609
01233605
VIP™ is a trademark of National Semiconductor Corporation.
PAL ® is a registered trademark of and used under licence from Advanced Micro Devices, Inc.
© 2003 National Semiconductor Corporation
DS012336
www.national.com
LM6171 High Speed Low Power Low Distortion Voltage Feedback Amplifier
February 2003
LM6171
Connection Diagram
8-Pin DIP/SO
01233601
Top View
Ordering Information
Package
Temperature Range
Transport Media
NSC Drawing
Rails
N08E
Rails
M08A
Industrial
−40˚C to +85˚C
8-Pin
LM6171AIN
Molded DIP
LM6171BIN
8-Pin
LM6171AIM, LM6171BIM
Small Outline
LM6171AIMX, LM6171BIMX
www.national.com
2.5k Units Tape and Reel
2
Soldering Information
(Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
ESD Tolerance (Note 2)
2.5 kV
Supply Voltage (V+–V−)
36V
± 10V
Differential Input Voltage
Common-Mode Voltage Range
+
Infrared or Convection Reflow
(20 sec.)
235˚C
Wave Soldering Lead Temp
(10 sec.)
260˚C
Operating Ratings (Note 1)
−
V +0.3V to V −0.3V
Output Short Circuit to Ground
(Note 3)
Operating Temperature Range
LM6171AI, LM6171BI
Continuous
−40˚C to +85˚C
Thermal Resistance (θJA)
−65˚C to +150˚C
Maximum Junction Temperature
(Note 4)
5.5V ≤ VS ≤ 34V
Supply Voltage
± 10mA
Input Current
Storage Temperature Range
LM6171
Absolute Maximum Ratings
150˚C
N Package, 8-Pin Molded DIP
108˚C/W
M Package, 8-Pin Surface Mount
172˚C/W
± 15V DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = +15V, V− = −15V, VCM = 0V, and RL = 1 kΩ. Boldface
limits apply at the temperature extremes
Symbol
VOS
Parameter
Conditions
Input Offset Voltage
Typ
LM6171AI
(Note 5)
Limit
Limit
(Note 6)
(Note 6)
3
6
mV
5
8
max
1.5
TC VOS
Input Offset Voltage Average Drift
6
IB
Input Bias Current
1
IOS
RIN
Input Offset Current
Input Resistance
RO
Open Loop
CMRR
Common Mode
0.03
Common Mode
40
Differential Mode
4.9
LM6171BI
Units
µV/˚C
3
3
µA
4
4
max
2
2
µA
3
3
max
MΩ
Ω
14
Output Resistance
VCM = ± 10V
110
Rejection Ratio
PSRR
Power Supply
VS = ± 15V to ± 5V
95
Rejection Ratio
VCM
Input Common-Mode
CMRR ≥ 60 dB
80
75
dB
75
70
min
85
80
dB
80
75
min
± 13.5
V
Voltage Range
AV
Large Signal Voltage
RL = 1 kΩ
90
Gain (Note 7)
VO
Output Swing
80
dB
70
min
70
dB
min
RL = 100Ω
83
70
60
60
RL = 1 kΩ
13.3
12.5
12.5
V
12
12
min
−12.5
−12.5
V
−12
−12
max
9
9
V
8.5
8.5
min
−13.3
RL = 100Ω
11.6
−10.5
Continuous Output Current
80
70
Sourcing, RL = 100Ω
(Open Loop) (Note 8)
3
116
−9
−9
V
−8.5
−8.5
max
90
90
mA
85
85
min
www.national.com
LM6171
± 15V DC Electrical Characteristics
(Continued)
Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = +15V, V− = −15V, VCM = 0V, and RL = 1 kΩ. Boldface
limits apply at the temperature extremes
Symbol
Parameter
Conditions
Typ
LM6171AI
LM6171BI
(Note 5)
Limit
Limit
(Note 6)
(Note 6)
90
90
mA
85
85
max
Sinking, RL = 100Ω
ISC
IS
105
Units
Continuous Output Current
Sourcing, RL = 10Ω
100
(in Linear Region)
Sinking, RL = 10Ω
80
mA
Output Short
Sourcing
135
mA
Circuit Current
Sinking
135
mA
Supply Current
mA
2.5
4
4
mA
4.5
4.5
max
± 15V AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = +15V, V− = −15V, VCM = 0V, and RL = 1 kΩ. Boldface
limits apply at the temperature extremes
Symbol
SR
GBW
Parameter
Slew Rate (Note 9)
Conditions
LM6171AI
Limit
Limit
(Note 6)
(Note 6)
AV = +2, VIN = 13 VPP
3600
AV = +2, VIN = 10 VPP
3000
Unity Gain-Bandwidth Product
−3 dB Frequency
Typ
(Note 5)
AV = +1
AV = +2
φm
Phase Margin
ts
Settling Time (0.1%)
AV = −1, VOUT = ± 5V
Propagation Delay
VIN = ± 5V, RL = 500Ω,
LM6171BI
Units
V/µs
100
MHz
160
MHz
62
MHz
40
deg
48
ns
6
ns
0.03
%
0.5
deg
RL = 500Ω
AV = −2
AD
Differential Gain (Note 10)
φD
Differential Phase (Note 10)
en
Input-Referred
f = 1 kHz
12
f = 1 kHz
1
Voltage Noise
in
Input-Referred
Current Noise
± 5V DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = +5V, V− = −5V, VCM = 0V, and RL = 1 kΩ. Boldface limits apply at the temperature extremes
Symbol
VOS
TC VOS
Parameter
Conditions
Input Offset Voltage
Typ
LM6171AI
(Note 5)
Limit
Limit
(Note 6)
(Note 6)
3
6
mV
5
8
max
1.2
Input Offset Voltage
LM6171BI
4
Units
µV/˚C
Average Drift
IB
IOS
Input Bias Current
1
Input Offset Current
www.national.com
0.03
4
2.5
2.5
µA
3.5
3.5
max
1.5
1.5
µA
(Continued)
Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = +5V, V− = −5V, VCM = 0V, and RL = 1 kΩ. Boldface limits apply at the temperature extremes
Symbol
Parameter
RIN
Input Resistance
RO
Open Loop
Conditions
Typ
LM6171AI
LM6171BI
(Note 5)
Limit
Limit
(Note 6)
(Note 6)
2.2
2.2
Common Mode
40
Differential Mode
4.9
Units
max
MΩ
Ω
14
Output Resistance
CMRR
Common Mode
PSRR
Power Supply
VCM = ± 2.5V
105
80
VS = ± 15V to ± 5V
95
80
Rejection Ratio
Rejection Ratio
VCM
Input Common-Mode
CMRR ≥ 60 dB
75
dB
75
70
min
85
80
dB
75
min
± 3.7
V
Voltage Range
AV
Large Signal Voltage
RL = 1 kΩ
84
75
75
dB
RL = 100Ω
80
65
65
min
70
70
dB
60
60
min
3.5
3.2
3.2
V
3
3
min
−3.4
−3.2
−3.2
V
−3
−3
max
Gain (Note 7)
VO
Output Swing
RL = 1 kΩ
RL = 100Ω
3.2
−3.0
Continuous Output Current
Sourcing, RL = 100Ω
32
(Open Loop) (Note 8)
ISC
IS
2.8
2.8
V
2.5
2.5
min
−2.8
−2.8
V
−2.5
−2.5
max
28
28
mA
25
25
min
28
28
mA
25
25
max
Sinking, RL = 100Ω
30
Output Short
Sourcing
130
mA
Circuit Current
Sinking
100
mA
Supply Current
2.3
3
3
mA
3.5
3.5
max
± 5V AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = +5V, V− = −5V, VCM = 0V, and RL = 1 kΩ. Boldface
limits apply at the temperature extremes
Typ
Symbol
Parameter
SR
Slew Rate (Note 9)
GBW
Unity Gain-Bandwidth
Conditions
AV = +2, VIN = 3.5 VPP
(Note 5)
LM6171AI
LM6171BI
Limit
Limit
(Note 6)
(Note 6)
Units
750
V/µs
70
MHz
AV = +1
130
MHz
AV = +2
45
Product
−3 dB Frequency
φm
Phase Margin
ts
Settling Time (0.1%)
AV = −1, VOUT = +1V,
57
deg
60
ns
RL = 500Ω
5
www.national.com
LM6171
± 5V DC Electrical Characteristics
LM6171
± 5V AC Electrical Characteristics
(Continued)
Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = +5V, V− = −5V, VCM = 0V, and RL = 1 kΩ. Boldface
limits apply at the temperature extremes
Symbol
Parameter
Propagation Delay
Conditions
VIN = ± 1V, RL = 500Ω,
Typ
LM6171AI
LM6171BI
(Note 5)
Limit
Limit
(Note 6)
(Note 6)
8
Units
ns
AV = −2
AD
Differential Gain (Note 10)
0.04
%
φD
Differential Phase (Note 10)
0.7
deg
en
Input-Referred
f = 1 kHz
11
f = 1 kHz
1
Voltage Noise
in
Input-Referred
Current Noise
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.
Note 2: Human body model, 1.5 kΩ in series with 100 pF.
Note 3: Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150˚C.
Note 4: The maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD =
(TJ(max) − TA)/θJA. All numbers apply for packages soldered directly into a PC board.
Note 5: Typical Values represent the most likely parametric norm.
Note 6: All limits are guaranteed by testing or statistical analysis.
Note 7: Large signal voltage gain is the total output swing divided by the input signal required to produce that swing. For VS = ± 15V, VOUT = ± 5V. For VS = +5V,
VOUT = ± 1V.
Note 8: The open loop output current is the output swing with the 100Ω load resistor divided by that resistor.
Note 9: Slew rate is the average of the rising and falling slew rates.
Note 10: Differential gain and phase are measured with AV = +2, VIN = 1 VPP at 3.58 MHz and both input and output 75Ω terminated.
www.national.com
6
LM6171
Typical Performance Characteristics
Unless otherwise noted, TA = 25˚C
Supply Current vs. Supply Voltage
Supply Current vs. Temperature
01233620
01233621
Input Offset Voltage vs. Temperature
Input Bias Current vs. Temperature
01233622
01233623
Input Offset Voltage vs. Common Mode Voltage
Short Circuit Current vs. Temperature (Sourcing)
01233625
01233624
7
www.national.com
LM6171
Typical Performance Characteristics Unless otherwise noted, TA = 25˚C
Short Circuit Current vs. Temperature (Sinking)
(Continued)
Output Voltage vs. Output Current
01233626
01233627
Output Voltage vs. Output Current
CMRR vs. Frequency
01233629
01233628
PSRR vs. Frequency
PSRR vs. Frequency
01233630
www.national.com
01233631
8
Open Loop Frequency Response
LM6171
Typical Performance Characteristics Unless otherwise noted, TA = 25˚C
(Continued)
Open Loop Frequency Response
01233632
01233633
Gain Bandwidth Product vs. Supply Voltage
Gain Bandwidth Product vs. Load Capacitance
01233635
01233634
Large Signal Voltage Gain vs. Load
Large Signal Voltage Gain vs. Load
01233636
01233637
9
www.national.com
LM6171
Typical Performance Characteristics Unless otherwise noted, TA = 25˚C
Input Voltage Noise vs. Frequency
(Continued)
Input Voltage Noise vs. Frequency
01233638
01233639
Input Current Noise vs. Frequency
Input Current Noise vs. Frequency
01233640
01233641
Slew Rate vs. Supply Voltage
Slew Rate vs. Input Voltage
01233642
www.national.com
01233643
10
Slew Rate vs. Load Capacitance
(Continued)
Open Loop Output Impedance vs. Frequency
01233645
01233644
Large Signal Pulse Response
AV = −1, VS = ± 15V
Open Loop Output Impedance vs. Frequency
01233647
01233646
Large Signal Pulse Response
AV = +1, VS = ± 15V
Large Signal Pulse Response
AV = −1, VS = ± 5V
01233648
01233649
11
www.national.com
LM6171
Typical Performance Characteristics Unless otherwise noted, TA = 25˚C
LM6171
Typical Performance Characteristics Unless otherwise noted, TA = 25˚C
Large Signal Pulse Response
AV = +1, VS = ± 5V
Large Signal Pulse Response
AV = +2, VS = ± 15V
01233650
01233651
Small Signal Pulse Response
AV = −1, VS = ± 15V
Large Signal Pulse Response
AV = +2, VS = ± 5V
01233652
01233653
Small Signal Pulse Response
AV = +1, VS = ± 15V
Small Signal Pulse Response
AV = −1, VS = ± 5V
01233654
www.national.com
(Continued)
01233655
12
Small Signal Pulse Response
AV = +1, VS = ± 5V
LM6171
Typical Performance Characteristics Unless otherwise noted, TA = 25˚C
(Continued)
Small Signal Pulse Response
AV = +2, VS = ± 15V
01233656
01233657
Closed Loop Frequency Response vs. SupplyVoltage
(AV = +1)
Small Signal Pulse Response
AV = +2, VS = ± 5V
01233658
01233659
Closed Loop Frequency Response vs. Capacitive Load
(AV = +1)
Closed Loop Frequency Response vs. Supply Voltage
(AV = +2)
01233660
01233661
13
www.national.com
LM6171
Typical Performance Characteristics Unless otherwise noted, TA = 25˚C
Closed Loop Frequency Response vs. Capacitive Load
(AV = +1)
Closed Loop Frequency Response vs. Capacitive Load
(AV = +2)
01233662
01233663
Closed Loop Frequency Response vs. Capacitive Load
(AV = +2)
Total Harmonic Distortion vs. Frequency
01233664
01233665
Total Harmonic Distortion vs. Frequency
Total Harmonic Distortion vs. Frequency
01233666
www.national.com
(Continued)
01233667
14
Total Harmonic Distortion vs. Frequency
(Continued)
Undistorted Output Swing vs. Frequency
01233669
01233668
Undistorted Output Swing vs. Frequency
Undistorted Output Swing vs. Frequency
01233670
01233671
Undistorted Output Swing vs. Frequency
Total Power Dissipation vs. Ambient Temperature
01233673
01233672
15
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LM6171
Typical Performance Characteristics Unless otherwise noted, TA = 25˚C
LM6171
LM6171 Simplified Schematic
01233610
Application Information
When a very fast large signal pulse is applied to the input of
an amplifier, some overshoot or undershoot occurs. By placing an external series resistor such as 1 kΩ to the input of
LM6171, the bandwidth is reduced to help lower the overshoot.
LM6171 PERFORMANCE DISCUSSION
The LM6171 is a high speed, unity-gain stable voltage feedback amplifier. It consumes only 2.5 mA supply current while
providing a gain-bandwidth product of 100 MHz and a slew
rate of 3600V/µs. It also has other great features such as low
differential gain and phase and high output current. The
LM6171 is a good choice in high speed circuits.
The LM6171 is a true voltage feedback amplifier. Unlike
current feedback amplifiers (CFAs) with a low inverting input
impedance and a high non-inverting input impedance, both
inputs of voltage feedback amplifiers (VFAs) have high impedance nodes. The low impedance inverting input in CFAs
will couple with feedback capacitor and cause oscillation. As
a result, CFAs cannot be used in traditional op amp circuits
such as photodiode amplifiers, I-to-V converters and integrators.
LAYOUT CONSIDERATION
Printed Circuit Boards and High Speed Op Amps
There are many things to consider when designing PC
boards for high speed op amps. Without proper caution, it is
very easy and frustrating to have excessive ringing, oscillation and other degraded AC performance in high speed
circuits. As a rule, the signal traces should be short and wide
to provide low inductance and low impedance paths. Any
unused board space needs to be grounded to reduce stray
signal pickup. Critical components should also be grounded
at a common point to eliminate voltage drop. Sockets add
capacitance to the board and can affect frequency performance. It is better to solder the amplifier directly into the PC
board without using any socket.
LM6171 CIRCUIT OPERATION
The class AB input stage in LM6171 is fully symmetrical and
has a similar slewing characteristic to the current feedback
amplifiers. In the LM6171 Simplfied Schematic, Q1 through
Q4 form the equivalent of the current feedback input buffer,
RE the equivalent of the feedback resistor, and stage A
buffers the inverting input. The triple-buffered output stage
isolates the gain stage from the load to provide low output
impedance.
Using Probes
Active (FET) probes are ideal for taking high frequency
measurements because they have wide bandwidth, high
input impedance and low input capacitance. However, the
probe ground leads provide a long ground loop that will
produce errors in measurement. Instead, the probes can be
grounded directly by removing the ground leads and probe
jackets and using scope probe jacks.
LM6171 SLEW RATE CHARACTERISTIC
The slew rate of LM6171 is determined by the current available to charge and discharge an internal high impedance
node capacitor. The current is the differential input voltage
divided by the total degeneration resistor RE. Therefore, the
slew rate is proportional to the input voltage level, and the
higher slew rates are achievable in the lower gain configurations.
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Components Selection And Feedback Resistor
It is important in high speed applications to keep all component leads short because wires are inductive at high frequency. For discrete components, choose carbon
16
(Continued)
TERMINATION
composition-type resistors and mica-type capacitors. Surface mount components are preferred over discrete components for minimum inductive effect.
Large values of feedback resistors can couple with parasitic
capacitance and cause undesirable effects such as ringing
or oscillation in high speed amplifiers. For LM6171, a feedback resistor of 510Ω gives optimal performance.
In high frequency applications, reflections occur if signals
are not properly terminated. Figure 3 shows a properly terminated signal while Figure 4 shows an improperly terminated signal.
COMPENSATION FOR INPUT CAPACITANCE
The combination of an amplifier’s input capacitance with the
gain setting resistors adds a pole that can cause peaking or
oscillation. To solve this problem, a feedback capacitor with
a value
CF > (RG x CIN)/RF
can be used to cancel that pole. For LM6171, a feedback
capacitor of 2 pF is recommended. Figure 1 illustrates the
compensation circuit.
01233614
FIGURE 3. Properly Terminated Signal
01233611
FIGURE 1. Compensating for Input Capacitance
POWER SUPPLY BYPASSING
Bypassing the power supply is necessary to maintain low
power supply impedance across frequency. Both positive
and negative power supplies should be bypassed individually by placing 0.01 µF ceramic capacitors directly to power
supply pins and 2.2 µF tantalum capacitors close to the
power supply pins.
01233615
FIGURE 4. Improperly Terminated Signal
01233612
FIGURE 2. Power Supply Bypassing
17
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LM6171
Application Information
LM6171
Application Information
For example, for the LM6171 in a SO-8 package, the maximum power dissipation at 25˚C ambient temperature is
730 mW.
(Continued)
To minimize reflection, coaxial cable with matching characteristic impedance to the signal source should be used. The
other end of the cable should be terminated with the same
value terminator or resistor. For the commonly used cables,
RG59 has 75Ω characteristic impedance, and RG58 has
50Ω characteristic impedance.
Thermal resistance, θJA, depends on parameters such as
die size, package size and package material. The smaller
the die size and package, the higher θJA becomes. The 8-pin
DIP package has a lower thermal resistance (108˚C/W) than
that of 8-pin SO (172˚C/W). Therefore, for higher dissipation
capability, use an 8-pin DIP package.
The total power dissipated in a device can be calculated as:
PD = PQ + PL
DRIVING CAPACITIVE LOADS
Amplifiers driving capacitive loads can oscillate or have ringing at the output. To eliminate oscillation or reduce ringing,
an isolation resistor can be placed as shown below in Figure
5. The combination of the isolation resistor and the load
capacitor forms a pole to increase stablility by adding more
phase margin to the overall system. The desired performance depends on the value of the isolation resistor; the
bigger the isolation resistor, the more damped the pulse
response becomes. For LM6171, a 50Ω isolation resistor is
recommended for initial evaluation. Figure 6 shows the
LM6171 driving a 200 pF load with the 50Ω isolation resistor.
PQ is the quiescent power dissipated in a device with no load
connected at the output. PL is the power dissipated in the
device with a load connected at the output; it is not the power
dissipated by the load.
Furthermore,
PQ = supply current x total supply voltage with no load
PL = output current x (voltage difference between
supply voltage and output voltage of the same
supply)
For example, the total power dissipated by the LM6171 with
VS = ± 15V and output voltage of 10V into 1 kΩ load resistor
(one end tied to ground) is
PD = PQ + PL
= (2.5 mA) x (30V) + (10 mA) x (15V − 10V)
= 75 mW + 50 mW
= 125 mW
01233613
APPLICATION CIRCUITS
FIGURE 5. Isolation Resistor Used
to Drive Capacitive Load
Fast Instrumentation Amplifier
01233617
01233616
FIGURE 6. The LM6171 Driving a 200 pF Load
with a 50Ω Isolation Resistor
POWER DISSIPATION
The maximum power allowed to dissipate in a device is
defined as:
PD = (TJ(max) − TA)/θJA
Where PD is the power dissipation in a device
TJ(max) is the maximum junction temperature
TA is the ambient temperature
θJA is the thermal resistance of a particular package
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18
(Continued)
LM6171
Application Information
Pulse Width Modulator
Multivibrator
01233619
01233618
DESIGN KIT
• LM6171 in 8-pin DIP Package
• LM6171 Datasheet
• Pspice Macromodel Diskette With the LM6171 Macromodel
Contact your local National Semiconductor sales office to
obtain a pitch pack.
A design kit is available for the LM6171. The design kit
contains:
•
•
•
•
•
High Speed Evaluation Board
LM6171 in 8-pin DIP Package
LM6171 Datasheet
Pspice Macromodel Diskette With the LM6171 Macromodel
An Amplifier Selection Guide
PITCH PACK
A pitch pack is available for the LM6171. The pitch pack
contains:
• High Speed Evaluation Board
19
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LM6171
Physical Dimensions
inches (millimeters) unless otherwise noted
8-Pin Small Outline Package
NS Package Number M08A
8-Pin Molded DIP Package
NS Package Number N08E
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20
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LM6171 High Speed Low Power Low Distortion Voltage Feedback Amplifier
Notes