FDS4953
Dual 30V P-Channel PowerTrench MOSFET
General Description
Features
This P-Channel MOSFET is a rugged gate version of
Fairchild Semiconductor’s advanced PowerTrench
process. It has been optimized for power management
applications requiring a wide range of gave drive
voltage ratings (4.5V – 25V).
• –5 A, –30 V
Applications
• Fast switching speed
• Power management
• High performance trench technology for extremely
low RDS(ON)
RDS(ON) = 55 mΩ @ V GS = –10 V
RDS(ON) = 95 mΩ @ V GS = –4.5 V
• Low gate charge (6nC typical)
• Load switch
• Battery protection
• High power and current handling capability
DD1
DD1
D2
D
5
DD2
6
4
Q1
3
7
SO-8
Pin 1 SO-8
G1
S1 G
G2 S
S2 S
8
1
S
Absolute Maximum Ratings
Symbol
2
Q2
TA=25oC unless otherwise noted
Ratings
Units
V DSS
Drain-Source Voltage
Parameter
–30
V
V GSS
Gate-Source Voltage
±20
V
ID
Drain Current
–5
A
– Continuous
(Note 1a)
– Pulsed
PD
Power Dissipation for Dual Operation
PD
Power Dissipation for Single Operation
–20
2
(Note 1a)
1.6
(Note 1b)
1
(Note 1c)
TJ , TSTG
W
0.9
–55 to +175
°C
(Note 1a)
78
°C/W
(Note 1)
40
°C/W
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA
Thermal Resistance, Junction-to-Ambient
RθJ C
Thermal Resistance, Junction-to-Case
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
FDS4953
FDS4953
13’’
12mm
2500 units
2002 Fairchild Semiconductor Corporation
FDS4953 Rev D1(W)
FDS4953
May 2002
Symbol
Parameter
TA = 25°C unless otherwise noted
Test Conditions
Min
Typ
Max Units
Off Characteristics
BV DSS
∆BV DSS
∆TJ
IDSS
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
V GS = 0 V, ID = –250 µA
V DS = –24 V,
V GS = 0 V
–1
µA
IGSSF
IGSSR
Gate–Body Leakage, Forward
Gate–Body Leakage, Reverse
V GS = –20 V,
V GS = 20 V,
V DS = 0 V
V DS = 0 V
–100
100
nA
nA
–3
V
On Characteristics
–30
ID = –250 µA, Referenced to 25°C
V
–23
mV/°C
(Note 2)
V GS(th)
∆V GS(th)
∆TJ
RDS(on)
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
V DS = V GS , ID = –250 µA
ID = –250 µA, Referenced to 25°C
ID(on)
On–State Drain Current
V GS = –10 V,
V DS = –5 V
gFS
Forward Transconductance
V DS = –5 V,
ID = –5 A
10
S
V DS = –15 V,
f = 1.0 MHz
V GS = 0 V,
528
pF
132
pF
70
pF
–1
–1.7
4.5
V GS = –10 V,
ID = –5 A
V GS = –4.5 V, ID = –3.3 A
V GS = –10 V, ID = –5 A, TJ =125°C
46
70
63
mV/°C
55
95
85
–20
mΩ
A
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Switching Characteristics
td(on)
Turn–On Delay Time
tr
Turn–On Rise Time
td(off)
Turn–Off Delay Time
tf
Turn–Off Fall Time
Qg
Total Gate Charge
Qgs
Gate–Source Charge
Qgd
Gate–Drain Charge
(Note 2)
V DD = –15 V,
V GS = –10 V,
V DS = –15 V,
V GS = –5 V
ID = –1 A,
RGEN = 6 Ω
ID = –5 A,
7
14
ns
13
24
ns
14
25
ns
9
17
ns
6
9
nC
2.2
nC
2
nC
Drain–Source Diode Characteristics and Maximum Ratings
IS
V SD
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward
V GS = 0 V, IS = –1.3 A
Voltage
(Note 2)
–0.8
–1.3
A
–1.2
V
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) 78°C/W when
mounted on a 0.5in2
pad of 2 oz copper
b) 125°C/W when
mounted on a 0.02
in2 pad of 2 oz
copper
c) 135°C/W when mounted on a
minimum pad.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDS4953 Rev D1(W)
FDS4953
Electrical Characteristics
FDS4953
Typical Characteristics
2
30
V GS = -10V
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
-6.0V
-ID , DRAIN CURRENT (A)
-5.0V
V
-4.5V
V
20
-4.0V
10
-3.5V
-3.0V
0
1.8
VGS=-4.0V
1.6
-4.0V
1.4
-5.0V
-6.0V
-7.0V
1.2
-8.0V
-10V
1
0.8
0
1
2
3
4
5
6
0
6
12
-V DS , DRAIN TO SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics.
30
0.25
ID = -5A
VGS = -10V
ID = -2.5A
RDS(ON), ON-RESISTANCE (OHM)
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
24
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
1.6
1.4
1.2
1
0.8
0.2
0.15
TA = 125o C
0.1
T A = 25o C
0.05
0.6
0
-50
-25
0
25
50
75
100
125
150
175
2
4
TJ , JUNCTION TEMPERATURE (oC)
6
8
10
-V GS, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with
Temperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
15
100
25oC
T A = -55o C
-I S, REVERSE DRAIN CURRENT (A)
V DS = -5V
12
-ID, DRAIN CURRENT (A)
18
-ID, DRAIN CURRENT (A)
125oC
9
6
3
0
1
1.5
2
2.5
3
3.5
4
-V GS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
4.5
VGS =0V
10
TA = 125o C
1
25oC
0.1
-55 oC
0.01
0.001
0.0001
0
0.2
0.4
0.6
0.8
1
1.2
1.4
-V SD , BODY DIODE FORWARD VOLTAGE (V)
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDS4953 Rev D1(W)
FDS4953
Typical Characteristics
800
ID = -5A
V D S = -5V
f = 1 MHz
V GS = 0 V
700
-10V
8
600
-15V
CAPACITANCE (pF)
-V GS, GATE-SOURCE VOLTAGE (V)
10
6
4
CISS
500
400
300
COSS
200
2
100
CRSS
0
0
0
2
4
6
8
0
10
5
Figure 7. Gate Charge Characteristics.
15
20
25
30
Figure 8. Capacitance Characteristics.
100
50
P(pk), PEAK TRANSIENT POWER (W)
100µ s
RDS(ON) LIMIT
-I D, DRAIN CURRENT (A)
10
-V DS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
1ms
10ms
10
100ms
1s
10s
1
DC
V GS = -10V
SINGLE PULSE
Rθ JA = 135 oC/W
0.1
T A = 25o C
1
10
30
20
10
0
0.001
0.01
0.1
SINGLE PULSE
RθJA = 135°C/W
TA = 25°C
40
100
0.01
0.1
1
10
100
t 1, TIME (sec)
-V DS , DRAIN-SOURCE VOLTAGE (V)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
1
D = 0.5
RθJA(t) = r(t) + RθJA
RθJA = 135 °C/W
0.2
0.1
0.1
0.05
P(pk)
0.02
t1
0.01
t2
0.01
TJ - TA = P * RθJA(t)
Duty Cycle, D = t 1 / t2
SINGLE PULSE
0.001
0.0001
0.001
0.01
0.1
1
10
100
1000
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
FDS4953 Rev D1(W)
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
Bottomless™
CoolFET™
CROSSVOLT™
DenseTrench™
DOME™
EcoSPARK™
E2CMOSTM
EnSignaTM
FACT™
FACT Quiet Series™
FAST â
FASTr™
FRFET™
GlobalOptoisolator™
GTO™
HiSeC™
I2C™
ISOPLANAR™
LittleFET™
MicroFET™
MicroPak™
MICROWIRE™
OPTOLOGIC â
OPTOPLANAR™
PACMAN™
POP™
Power247™
PowerTrench â
QFET™
QS™
QT Optoelectronics™
Quiet Series™
SILENT SWITCHER â UHC™
SMART START™
UltraFET â
SPM™
VCX™
STAR*POWER™
Stealth™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogic™
TruTranslation™
STAR*POWER is used under license
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
2. A critical component is any component of a life
1. Life support devices or systems are devices or
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. H5