FDMS015N04B Rev.C.3 20131022.fm

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FDMS015N04B
N-Channel PowerTrench® MOSFET
40 V, 100 A, 1.5 mΩ
Features
Description
• RDS(on) = 1.13 mΩ (Typ.) @ VGS = 10 V, ID = 50 A
This N-Channel MOSFET is produced using Fairchild
Semiconductor’s advance PowerTrench® process that has
been tailored to minimize the on-state resistance while maintaining superior switching performance.
• Advanced Package and Silicon Combination for Low RDS(on)
and High Efficiency
• Fast Switching Speed
• 100% UIL Tested
Applications
• RoHS Compliant
• Synchronous Rectification for ATX / Server
• Battery Protection Circuit
• Motor Drives and Uninterruptible Power Supplies
Bottom
Top
S
D
D
D
Pin 1
S
S
G
D
D
5
4
G
D
6
3
S
D
7
2
S
D
8
1
S
Power 56
MOSFET Maximum Ratings TC = 25oC unless otherwise noted.
Symbol
VDSS
Drain to Source Voltage
Parameter
VGSS
Gate to Source Voltage
ID
Drain Current
- Continuous (TC = 25oC)
- Continuous (TA = 25oC)
IDM
Drain Current
EAS
Single Pulsed Avalanche Energy
- Pulsed
PD
Power Dissipation
TJ, TSTG
Operating and Storage Temperature Range
Unit
V
±20
V
100
A
(Note 1a)
31.3
(Note 2)
400
A
(Note 3)
526
mJ
104
W
(TC = 25oC)
(TA = 25oC)
FDMS015N04B
40
(Note 1a)
2.5
W
-55 to +150
o
FDMS015N04B
Unit
C
Thermal Characteristics
Symbol
Parameter
RθJC
Thermal Resistance, Junction to Case, Max.
RθJA
Thermal Resistance, Junction to Ambient, Max.
©2012 Fairchild Semiconductor Corporation
FDMS015N04B Rev. C3
1.2
(Note 1a)
1
50
oC/W
www.fairchildsemi.com
FDMS015N04B — N-Channel PowerTrench® MOSFET
November 2013
Device Marking
FDMS015N04B
Device
FDMS015N04B
Package
Power 56
Reel Size
13 ”
Tape Width
12 mm
Quantity
3000 units
Electrical Characteristics TC = 25oC unless otherwise noted.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
40
-
-
V
-
37
-
mV/oC
Off Characteristics
BVDSS
ΔBVDSS
/ ΔTJ
IDSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
ID = 250 μA, VGS = 0 V
VDS = 32 V, VGS = 0 V
-
-
1
μA
IGSS
Gate to Body Leakage Current
VGS = ±20 V, VDS = 0 V
-
-
±100
nA
2.0
-
4.0
V
-
1.13
1.5
mΩ
-
171
-
S
o
ID = 250 μA, Referenced to 25 C
On Characteristics
VGS(th)
RDS(on)
Gate Threshold Voltage
VGS = VDS, ID = 250 μA
Static Drain to Source On Resistance
gFS
Forward Transconductance
VGS = 10 V, ID = 50 A
VDS = 5 V, ID = 50 A
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Coss(er)
Energy Releted Output Capacitance
Qg(tot)
Total Gate Charge at 10V
Qgs
Gate to Source Gate Charge
Qgs2
Gate Charge Threshold to Plateau
Qgd
Gate to Drain “Miller” Charge
ESR
Equivalent Series Resistance
VDS = 20 V, VGS = 0 V
f = 1 MHz
VDS = 20 V, VGS = 0 V
VDS = 20 V, ID = 50 A
VGS = 0 V to 10 V
(Note 4)
f = 1 MHz
-
6560
8725
pF
-
2795
3720
pF
-
162
-
pF
-
3896
-
pF
-
91
118
nC
-
26
-
nC
-
9
-
nC
-
16
-
nC
-
1.4
-
Ω
-
34
78
ns
-
24
58
ns
-
71
152
ns
-
26
62
ns
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf
Turn-Off Fall Time
VDD = 20 V, ID = 50 A
VGS = 10 V, RG = 4.7 Ω
(Note 4)
Drain-Source Diode Characteristics
IS
Maximum Continuous Drain to Source Diode Forward Current
-
-
100
A
ISM
Maximum Pulsed Drain to Source Diode Forward Current
-
-
400
A
VSD
Drain to Source Diode Forward Voltage
VGS = 0 V, ISD = 50 A
-
-
1.3
V
trr
Reverse Recovery Time
-
78
-
ns
Qrr
Reverse Recovery Charge
VGS = 0 V, ISD = 50 A
dIF/dt = 100 A/μs
-
90
-
nC
Notes:
1.RθJA is determined with the device mounted on a 1in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by
the user's board design.
a. 50 °C/W when mounted on a
1 in2 pad of 2 oz copper.
b. 125 °C/W when mounted on a
minimum pad of 2 oz copper.
2. Repetitive rating: pulse-width limited by maximum junction temperature.
3. L = 3 mH, IAS = 18.72 A, starting TJ = 25°C.
4. Essentially independent of operating temperature typical characteristics.
©2012 Fairchild Semiconductor Corporation
FDMS015N04B Rev. C3
2
www.fairchildsemi.com
FDMS015N04B — N-Channel PowerTrench® MOSFET
Package Marking and Ordering Information
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
500
400
*Notes:
1. VDS = 10V
2. 250μs Pulse Test
ID, Drain Current[A]
ID, Drain Current[A]
100
100
VGS = 15.0V
10.0V
8.0V
7.0V
6.5V
6.0V
5.5V
5.0V
*Notes:
1. 250μs Pulse Test
o
2. TC = 25 C
10
0.1
1
VDS, Drain-Source Voltage[V]
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
3.0
3.5
4.0
4.5
5.0
5.5
VGS, Gate-Source Voltage[V]
IS, Reverse Drain Current [A]
400
1.2
VGS = 10V
1.1
VGS = 20V
1.0
100
o
o
150 C
25 C
10
*Notes:
1. VGS = 0V
o
0.9
*Note: TC = 25 C
0
50
100
150
200
ID, Drain Current [A]
250
2. 250μs Pulse Test
1
0.2
300
Figure 5. Capacitance Characteristics
VGS, Gate-Source Voltage [V]
Coss
1000
*Note:
1. VGS = 0V
2. f = 1MHz
50
0.1
1.2
10
Ciss
100
0.4
0.6
0.8
1.0
VSD, Body Diode Forward Voltage [V]
Figure 6. Gate Charge Characteristics
10000
Capacitances [pF]
6.0
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
1.3
RDS(ON) [mΩ],
Drain-Source On-Resistance
o
-55 C
10
1
2.5
2
o
25 C
o
150 C
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
1
10
VDS, Drain-Source Voltage [V]
©2012 Fairchild Semiconductor Corporation
FDMS015N04B Rev. C3
VDS = 8V
VDS = 20V
VDS = 32V
8
6
4
2
Crss
*Note: ID = 50A
0
40
3
0
25
50
75
Qg, Total Gate Charge [nC]
100
www.fairchildsemi.com
FDMS015N04B — N-Channel PowerTrench® MOSFET
Typical Performance Characteristics
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variation
vs. Temperature
1.7
1.6
RDS(on), [Normalized]
Drain-Source On-Resistance
BVDSS, [Normalized]
Drain-Source Breakdown Voltage
1.12
1.08
1.04
1.00
0.96
*Notes:
1. VGS = 0V
2. ID = 250μA
0.92
-80
-40
0
40
80 o 120
TJ, Junction Temperature [ C]
1.4
1.2
1.0
*Notes:
1. VGS = 10V
2. ID = 50A
0.8
0.6
-80
160
Figure 9. Maximum Safe Operating Area
-40
0
40
80
120
o
TJ, Junction Temperature [ C]
160
Figure 10. Maximum Drain Current
vs. Case Temperature
120
1000
100
ID, Drain Current [A]
ID, Drain Current [A]
VGS= 10V
1ms
10ms
10
100ms
DC
Operation in This Area
is Limited by R DS(on)
1
*Notes:
80
40
o
0.1
1. TC = 25 C
o
0.01
0.01
2. TJ = 150 C
3. Single Pulse
0.1
1
10
VDS, Drain-Source Voltage [V]
o
RθJC= 1.2 C/W
0
25
100
Figure 11. Eoss vs. Drain to Source Voltage
IAS, Avalanche Current [A]
50
EOSS, [μJ]
1.5
1.0
0.5
0
10
20
30
VDS, Drain to Source Voltage [V]
©2012 Fairchild Semiconductor Corporation
FDMS015N04B Rev. C3
150
Figure 12. Unclamped Inductive
Switching Capability
2.0
0
50
75
100
125
o
TC, Case Temperature [ C]
4
o
10
STARTING TJ = 25 C
o
STARTING TJ = 125 C
1
0.1
40
If R = 0
tAV = (L)(IAS)/(1.3*RATED BVDSS-VDD)
If R = 0
tAV = (L/R)In[(IAS*R)/(1.3*RATED BVDSS-VDD)+1]
1
10
100
tAV, Time In Avalanche [ms]
1000
www.fairchildsemi.com
FDMS015N04B — N-Channel PowerTrench® MOSFET
Typical Performance Characteristics (Continued)
FDMS015N04B — N-Channel PowerTrench® MOSFET
Typical Performance Characteristics (Continued)
Thermal Response, ZθJA(t)
Thermal Response
[Normalized] [ZθJA]
(Normalized)
Figure 13. Transient Thermal Response Curve
2
1
0.5
0.2
0.1
PDM
0.1
t1
0.05
o
1. ZθJA(t) = 125 C/W Max.
2. Duty Factor, D= t1/t2
3. TJM - TC = PDM * ZθJC(t)
0.01
0.01
Single pulse
0.005
0.01
t2
*Notes:
0.02
0.1
1
10
100
1000
t1Rectangular
, RectangularPulse
Pulse Duration
Duration [sec]
[sec]
©2012 Fairchild Semiconductor Corporation
FDMS015N04B Rev. C3
5
www.fairchildsemi.com
FDMS015N04B — N-Channel PowerTrench® MOSFET
Figure 14. Gate Charge Test Circuit & Waveform
IG = const.
Figure 15. Resistive Switching Test Circuit & Waveforms
VDS
RG
RL
VDS
VDD
VGS
VGS
DUT
VGS
10V
90%
10%
td(on)
tr
t on
td(off)
tf
t off
Figure 16. Unclamped Inductive Switching Test Circuit & Waveforms
VGS
©2012 Fairchild Semiconductor Corporation
FDMS015N04B Rev. C3
6
www.fairchildsemi.com
FDMS015N04B — N-Channel PowerTrench® MOSFET
Figure 17. Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
+
VDS
_
I SD
L
Driver
RG
VGS
VGS
( Driver )
Same Type
as DUT
VDD
• dv/dt controlled by RG
• ISD controlled by pulse period
Gate Pulse Width
D = -------------------------Gate Pulse Period
10V
IFM , Body Diode Forward Current
I SD
( DUT )
di/dt
IRM
Body Diode Reverse Current
VDS
( DUT )
Body Diode Recovery dv/dt
VSD
VDD
Body Diode
Forward Voltage Drop
©2012 Fairchild Semiconductor Corporation
FDMS015N04B Rev. C3
7
www.fairchildsemi.com
FDMS015N04B — N-Channel PowerTrench® MOSFET
Mechnical Dimensions
Figure 18. 8LD, PQFN, JEDEC MO-240 AA, 5.0X6.0MM
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
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Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
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©2012 Fairchild Semiconductor Corporation
FDMS015N04B Rev. C3
8
www.fairchildsemi.com
tm
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Product Status
Definition
Advance Information
Formative / In Design
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
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First Production
Datasheet contains preliminary data; supplementary data will be published at a later
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Semiconductor. The datasheet is for reference information only.
Rev. I66
©2012 Fairchild Semiconductor Corporation
FDMS015N04B Rev. C3
9
www.fairchildsemi.com
FDMS015N04B — N-Channel PowerTrench® MOSFET
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