A New Class of Low Cost Three-phase High Quality Rectifiers
with Zero-Voltage Switching
Esam H.Ismail and Robert W.Erickson
Department of Electrical Engineering
University of Colorado at Boulder
Boulder, Colorado 80309
Abstmct - Several new schemes of constructing 39 low
harmonic rectifiers are introduced here. These 39 ac-dc
topologies are derived fiom parent dc-dc converter topologies.
With a single active switch featuring the zero-voltage switching
property (ZVS)in addition to the diode rectifier bridge, the
rectifiers are capable of naturally drawing approximately
sinusoidal input current waveforms at nearly unity power
factor. Thus, a family of low cost high efficiency 3$ highpower-factor rectifier is obtained. A second power switch can
be introduced to further improve the current waveshape.
Simulation results are supplied for each of the proposed
scheme to demonstrated the validity of the proposed concepts.
I. Introduction
Building three single-phase low harmonic rectifiers is a complex
and expensive way to construct a 341low harmonic rectifier. Some
single switch topologies are now known [2], with advantages of
low cost, natural high quality line current waveforms and simple
control circuitry. It is now apparent that a wide variety of rectifiers
of this type are possible, and the range of possible configurations
has not been explored.
The objective of this paper is to present a number of new
families of lowcost 341 high quality rectifiers, including singleswitch buck and boost topologies with zero voltage switching. A
new single-phase buck derived rectifier with zero-voltage
switching is also introduced.
Recently a three-phase ac version of the dcdc boost converter
was described in [l] which uses a single active switch and three
input inductors operating in discontinuous conduction mode
( E M ) and yet is capable of drawing high quality current
waveform from the ac source.
Three new families of low cost 34 high quality rectifiers were
introduced in [2]. The first two families of these rectifiers were
derived from parent dcdc PWM converter containing boost-type
inputs and buck-type inputs via a simple transformation. The third
family was derived from parent dcdc converter topologies
containing quasi resonant zerocurrent-switch (ZCS) buck-type
inputs. This led to the discovery of a new polyphase resonant
switch. Most of these topologies require only one controlled
switch device; yet they are capable of drawing a high quality input
current from the 3141ac source.
The input line currents of the 34 ZCS rectifiers described in [2],
are pulsating quasi-sinusoidal with a peak proportional to the input
phase voltage. This property yields an average or low frequency
component in the line current approximately proportional to the
phase voltage. Low harmonic rectification is therefore obtained.
It is also possible to obtain low harmonic rectifier via the dual
argument. A converter having a pulsating quasi-sinusoidal lineline voltage during each switching period with a peak proportional
to the input line current, also exhibits an average or low frequency
component of line current approximately proportional to the phase
voltage. A converter with such input characteristics can be
constructed by taking the dual of the 341 ZCS rectifiers presented
in[2]. As a consequence, the resulting rectifiers have the same
number of active switches as in [2] with the property of zerovoltage-switching (ZVS) instead of ZCS. A new class of 34 ZVS
resonant switch rectifiers which are based on this principle are
given in Sec. II.
Another class of 341 resonant switch rectifiers featuring both
ZVS and ZCS property are also proposed in Sec. IV. This class is
derived from the new 3$ ZVS rectifiers of Sec. 11, by inserting an
additional switch in series with the rectifier diode on the dc side of
the rectifier. Linearization of input port characteristics and
constant frequency control then become possible.
Section V shows another scheme of 341ZVS high power factor
rectifier. This rectifier is derived from the 341 ZCS rectifier
presented in [2] by exchanging the power switch location with the
output diode. The resulting rectifier features the ZVS property as
well as injecting low harmonic in the ac line. Also, a single-phase
version of this rectifier is also possible without loss of the ZVS
property over the entire ac line period. This scheme is introduced
in section VI.
11. New Class of ThreephaseZVS Resonant Rectifiers
A new class of 31) resonant switch rectifiers featuring the movoltage switching property is proposed here. This class is derived
from parent dc-dc converter containing zero-voltage-switch boosttype input (current-fed). With a single active switch operating at
ZVS in addition to the diode rectifier bridge, the rectifiers are
capable of drawing a high quality input current waveforms from the
182
0-7803-0982-0/93$3.00 1993 IEEE
ac main. The proposed rectifiers have many advantages over the
conventional six-switch PWM rectifier. These advantages include:
0 Use of a single controlled switch operating at ZVS, with good
switch utilization.
Simple control circuit, similar to that of the parent dcdc quasi
resonant converter.
0 High power factor, low harmonic rectification is performed
naturally.
Small reactive components, sized to filter the switchingfrequency-,rather than line-frequency-,harmonics.
The concept of 39 ac-dc resonant switch rectifiers featuring ZVS
is introduced here. This shows how we can obtain a 39 high power
factor / low harmonic rectifier by employing a resonant switch
topology starting from the well known dcdc zero-voltage switching
boost converter [3]. Fig. 1 shows a typical half-wave boost-type
quasi-resonant switch. The tank capacitor voltage waveform over
one switching period is quasi-sinusoidal, with peak value Vam
proportional to the input current I. When Vg(t) is a low-frequency
rectified sinusoid, this scheme produces an approximately
sinusoidal tank capacitor average voltage which follows the input
line current I. If the input voltage Vg varies with time and with
switching frequency higher than the line frequency, the tank
capacitor voltage consists of a train of quasi-sinusoidal pulses with
a peak proportional to the input line c m n t I, Fig. 2. Hence, the
average or low-frequency component of the tank capacitor voltage
is also approximately proportional to the line current. Thus the ac
side of the converter and the resonant switch cell naturally perform
the function of high power factorflow harmonic rectification.
The proposed 39 -ZVS resonant network is introduced in Fig. 3.
This circuit contains three tank capacitors Cr and a single tank
inductor Lr. During each switching period, these four elements
form a resonant tank circuit which rings at frequency comparable to
or greater than the switching frequency fs, with piecewise
sinusoidal and linear waveforms. The peak values of the tank
capacitor voltages Val, V m and V a are proportional to their
respective instantaneous phase currents. Hence, the low-frequency
components of the line currents are also approximately
proportional to the phase voltages.
A dcdc converter with a boost-+ (current-fed) input can be
transformed into a 39 ZVS converter by inserting the 39 ZVS boost
rectifier resonant switch network of Fig. 3. For example, a 39ZVS boost rectifier can be transformed by replacing network A of
Fig. 1 by network A' of Fig. 3, while the remainder of the dcdc
converter, network B, remains unchanged. By applying this
transformation to the half-wave ZVS boost-type quasi resonant
converters, a new class of a single transistor 39 acdc (ZVS) high
power factorflow harmonic rectifiers is obtained. Two topologies
of this class are shown in Fig. 4, based on the dcdc boost and
SEPIC dcdc converters.
Other similar recwiers can be
constructed using the proposed transformation.
Similar to the 39 ac-dc ZCS rectifiers presented in [2], the new
39 ZVS resonant switch rectifiers are wellsuited for 341 acdc
Network A
------
Network B
Lr - I - - - - -I
remainder of
Fig. 2 Tank capacitorvoltage waveform.
I-----
Nk!?v@A-
-----1
I
ttt
YT
I
I
I
I
I
L
.
applications. This is because the rectifiers perform the function of
high quality rectihation naturally with minimum component size
and weight. However, this is not true for the single phase case,
since the condition for zero voltage switching is violated. Consider
for example the single phase half-wave boost rectifier of Fig. 1.
For zero voltage switching the constraint ( V o m o ) < I < = must be
satisfied, where I is the instantaneous input current, Vo is the
output voltage and Ro is the tank characteristic impedance. This
constraint is violated whenever the input current approaches zero.
This results in distortion of the line current as well as loss of zero
voltage switching p
r
o
m for a portion of every line cycle.
However, the situation differs in the 39 case: the constraint
(V&) < &-It,) < = is never violated in a properly designed
converter, and zero voltage switching can occur over the entire ac
line cycle.
183
TABLE I
Per-SWi6 Strwsw for 39 ZVS Redifier and
ConveotioaalPWM Rectifier.
Block voltage
Peak Current
E5.15 kW
VLLFlU) V m s
M
[A]
39 ZVS Redifier
620
35
Mwitch F'WM Rectifier
250
35
(per switch)
vb
vc
TABLE Il
b)
Comparisonof Active SwitchTotal S t m s and U M o n .
Total Stress
va
Silicon Utilization
bVA]
vb
vc
I
Fig. 4 Examples of 39 ZVS high power factor rectifiers: a) Boost derived
&er;
b) SEPIC derived M e r .
In the dcdc converter field, the resonant switch approach is
usually restricted to low power levels, because of the high
component stresses and poor switch utilization inherent in most
types of dcdc resonant switch circuits. It was shown in 121 that
these arguments do not apply to the 341 acdc ZCS case, and the
active silicon area is actually much lower in single switch 31) ZCS
rectifiers than in their six switch PWM counterparts. The same
argument holds for the 341 Z V S rectifiers. The single active switch
of the proposed 341 ZVS rectifiers operates with higher stresses
(typically by a factor of two, depending on the application) than
any single device in an equivalent six switch bridge circuit; this
disadvantage is compensated by the fact only one such device is
needed.
The switch blocking voltages and peak currents of the single
switch 341ZVS and six switch PWM approaches both using a boost
topology are compared in Table I for a 5.15 kW, 120 VAC
application. The load voltage and current are 250 V and 20.6 A
respectively. Table II shows the total switch stresses or the product
of the switch blocking voltage and the switch peak currents,
summed over all active switches in the converter. Also shown is
the silicon utilization, defined as the converter output power
divided by the total switch stress. It is clear from these results that
the single switch in the 341Z V S converter is used more effectively
than the six switches of the PWM converter.
III. Analysis of Boost-Type 341ZVS Rectifiers
The 341 acdc (boost-type) Z V S rectifier shown in Fig. 4(a) is
analyzed here. Referring to Fig. 4(a), the three supply phase
voltages are assumed to be balanced and s y m m h c with a peak
voltage of Vm. The frequency of the supply voltage (50 Hz or 60
Hz) is assumed to be much lower than the switching frequency of
the power switch Q. W i g to the circuit symmetry, it is sufficient
to consider a 30" interval. This circuit functions as a high power
39 ZVS Ractifier
21.7
0.24
MwitchF'WMRectifier
52.5
0.09
factorflow harmonic rectifier based on the concept that the peak
tank capacitor voltages Val. V a and V m are proportional to the
line current. Hence, the low frequency components of the tank
capacitor voltages, which follow the input phase voltages, are also
approximately proportional to the line currents. To illustrate this,
the circuit performance over one switching period is given next
while circuit equations are given in [4].
-1:
05cotS30°
-1,
b 5 t 5 ti, all switches are OFF
In this interval, each tank capacitor Cr charges up linearly at a
rate proportional to its respective l i e current. This will continue
until the rectifier bridge input line-line voltage reaches the output
voltage Vo. At this moment, the bridge rectifier input line-line
voltage VBC is maximum, forcing D3 and D5 to conduct along
with the output diode D initiating the second subinterval.
t i 5 t 5 t2, D3, D5 and D are ON
-2,
In this subinterval the capacitor voltages Val continues to
increase, while the other two capacitor voltages rings along with
the output tank inductor current ih. This will continue until, Val
= V m , leadiig to VAB =- VBC. Diode D1 then also conducts
during the next subinterval.
9
t2 5 t 5 t3, D1, D3, D5 and D are ON
In this subinterval, the three tank capacitors Cr plus the tank
inductor form a resonant tank circuit. Each tank capacitor voltage
the rings sinusoidally with a peak approximately proportional to its
respective line current. This subinterval ends when all tank
capacitor voltages discharge to zero. At this moment, the power
switch Q is turned on at zero-voltage switching. This will initiate
the next subinterval.
4
t3 5 t 5 q,Q and D are ON
In this interval, the output tank inductor current ih discharges
at a rate proportional to the output voltage V,. This will continue
until tank current i h reaches the ground level, and the output
diode becomes reverse biased, initiating the final subinterval.
subintervals 4 5 t 5 t 5 , Q i s O N
In this interval, the tank capacitor voltages and the tank inductor
current are zero. The input line currents circulate through the
184
power switch Q. Hence, the switch peak current is equal to the
peak input line current. The converter remains in this state until
the switch Q is OFF again. It should be mentioned that the power
switch Q must be turned on after the tank capacitor voltages
reaches zero and before ib reaches the maximum input line
current (e. g. ib for 0 .S a t S 30°),otherwise the tank capacitors Cr
will be charged and the zero voltage switching propaty can not be
achieved.
The tank waveforms over several switching periods Ts are
shown in Fig. 5. The remaining 30' intervals can be analyzed
following the same procedure.
The power switch Q peak current is limited to the peak input
line current Im, whereas the switch Q peak voltage is given by
Fig. 5 Simulated tank waveforms over a few switdring periods, for converter
of Fig. 4(a).
I
I
I
oA2
0.L
I
I
I
I
0.L
0.d32
0.L
The tank characteristicimpedance & is given by
A
Ro= J W 2 )
[ill
(2)
The new 34 ZVS described in this sectwn performs the function
of high power factorflow harmonic rcctXication naturally. This is
because the input port of the rectifier presents an approximate
three-phase resistive load to the ac main. Each phase then draws
an average current approximately proportional to its phase voltage.
The power consumed by these effective resistors R, is actually
transmitted to the output port. Hence, the converter output port
exhibits power source characteristics. The system can be modeled
as a three-phase loss-free resistor (LXR), an extension of the
single-phase LFR described in (5, 61. The effective input
resistance R, of each phase of the rectifier is a function of the
output voltage Vo, the tank characteristic impedance & and the
switching frequency f,. By selecting the proper operating point, a
total harmonic distortion less than 10%is possible for this rectifier
For closed-loop operation, the controller will vary the converter
switching frequency f,, such that the effective resistance R, is
varied. This causes the output power Pe to be changed and also
(depending on the load characteristics)the output voltage. Hence,
the effective resistance Redepends on the control input f,.
The rectifier of Fig. 4(a) was simulated using the PSPICE
program for a power level of 2 kW with the following parameters:
V ~ ~ = 1 Vrms
2 0 @ 60 Hz, w . 0 8 pF, k 1 8 . 8 6 pH, fs=150 W z ,
V e l 6 8 V and D (switch duty ratio) of 0.34. The simulated line
current and phase voltage for phase a is shown in Fig. 6.
Approximately unity displacement factor is obtained with 99%
distortion factor. Hence, a power factor of 99% is achieved. This
is simply obtained by open loop operation.
IV. Extension of The New 34) ZVS Recaier
The new family of 34 ZVS rectifiers introduced in Section II
emulate an approximate 34 resistive load. The effective resistor
values are functions of a single control variable, the switching
-Pi16
0.dm
0.d
0.L
o.d,
tima [-I
Fig. 6 Simdatedmput line wnmt wavefom ovec one line period for
a m v m of Fig. 4(a).
frequency fs. Since these resistors are non-linear in nature, a few
percent of total harmonic distortion is introduced in the line
current. Nevertheless, a high quality input current is drawn from
the ac source by using a single controllable switch, operating with
zero-voltage switching, with better semiconductor utilization than
the conventional 34 acdc six-switch PWM converter.
An extension is proposed in this section which can further
linearize the input port characteristics. Hence, the total harmonic
distortion in the line current can be reduced. This class is derived
f " the new 341Z V S rectifier class. This is achieved by adding
another controllable switch 4 2 in series with the rectifier diode D
on the dc-side of the 3$ Z V S class shown in Fig. 4. Another
independent control variable is obtained (the off time of switch
Q2), which can be varied along with the switching frequency fs in
such a way that the variation of the effective input resistance Re
becomes almost negligible over the entire ac lime period.
Moreover, this technique also extends the range of attainable
voltage conversion ratios. Another advantage of this scheme is the
possibility of constant frequency operation [7].
To see the validity of the proposed concept, an illustrative
example is considered next. Consider the rectifier of Fig. 4(a). An
additional switch 4 2 is inserted in series with the output diode D,
Fig. 7. The second switch operates with zero current switching
(ZCS), while the f i s t switch Q1 continues to switch at zero voltage
(ZVS). This scheme produces nearly sinusoidal input capacitor
185
average voltages which follow the input inductor line currents.
The circuit operation is similar to the rectifier of Fig. 4(a). except
that when the bridge input line-line voltage (val-vcn) reaches the
output voltage Vo, the power switch 42 is kept off, forcing the
output diode D to be reverse biased for a longer time.
The effective input resistance Re is modified due to the
existence of the second switch 42. This resistance now depends
on two control variables. These are (1) the normalized switching
frequency fs and (2) the length of the second subinterval OT
equivalently the switch Q2 off-time. The variation of the effective
input resistance Re decreases when the length of the switch 42 offtime increases. This means that the input port characteristics of
the rectifier becomes more linear in nature, and hence less
distortion is present in the line current. This is because the tank
capacitor voltage charges at a rate proportional to its respective
phase current for a longer time. This makes the average tank
capacitor voltage more dependent on the phase current and less
dependent on the output voltage V,.
The circuit of Fig. 7 has been simulated for a power level of
1kW with the following circuit parameters: V ~ ~ = 1 2
Vrms
0 @ 60
Hz,C 8 . 2 pF, L,=30 pH, f s 4 0 kHz, V0=86.5 V,Q1 duty ratio of
0.44 and 4 2 off time duty ratio of 0.32. The simulated input
current and voltage for phase a is shown in Fig. 8 with a total
harmonic distortion in the line current approximately 3.5% with
unity displacement factor in open loop operation. Figure 9(a)
shows the Z V S operation for the power switch Q1,while Fig. 9(b)
shows the ZCS operation for the power switch Q2.
Fig. 7 ZVS-ZCS 3$ high power fador boost &er
using two controllable
SwitchW.
Fig. 8 Simulated mput line cumnt waveform over one line period for
conveer of Fig. 7.
a)
V. Another New Class of Three-phaseZVS-HPF Rectifiers
The tank circuit in the rectifiers of Fig. 4 consists of three tank
capacitors Cr placed on the ac-side of the rectifier and a tank
inductor L, placed on the dc-side. Another new class of 39 ZVS
rectifiers featuring high quality input current waveforms can be
constructed from the 3$ ZCS rectifiers presented in [2]. The
resulting recwiers differ from those of Fig. 4 in that they contain
three tank inductors placed on the ac-side plus a tank capacitor on
the dc-side of the rectifier. For example, consider generating a 3$
ZVS rectifier from the a 39 ZCS buck derived rectifier given in [2].
This is simply obtained by exchanging the position of the power
switch Q with the output rectifier diode D. Fig. 10 shows the
resulting new recwier. The switch Q operates at ZVS while the
diode rectifier bridge switches at zero current
One advantage of this rectifier is that the total harmonic
distortion (THD) in the line current is relatively small. This is
because the input port of the rectifier becomes more linear in
nature as the switch duty ratio D increases. On the other hand,
increasing the switch on time will increase the tank and switch
stresses. Nevertheless, acceptable levels of THD (e. g. less than
5%) can be obtained with acceptable stresses.
To see how the proposed circuit operates, an illustrative
example is considered next. The circuit in Fig. 10 functions as a
high power factor/ low harmonic rectifier based on the concept that
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. . . . . . . . . . . . . . . . . . . . . . . . .
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3.91868
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3.96860
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Fig. 9
186
Simulated switch waveforms for convear of Fig. 7: (a) Switch Q1
gating and blodring voltages (ZVS); (b) Switch Q2 current and gating
voltage (243).
the peak of the input line currents are proportional to the input
phase voltage. Thus, the low frequency components of the input
line current follow approximately the input phase voltage.
Consider the 60"s cot < 90" interval in which v, is positive while
and v, are negative. The first subinterval starts when the
switch Q is turned on. Each tank inductor b,charges at a rate
proportional to its respective phase voltage. This will continue
until the switch Q is turned off, initiating the second subinterval.
The three tank inductors with the tank capacitor Cr then form a
resonant tank circuit. Each line current rings sinusoidally with a
peak proportional to its respective applied phase voltage. As
shown in Fig. 11, for 60's cot < 90", & reaches zero first, at which
point diode D6 becomes reverse-biased. The third subintervalthen
occurs, in which phase a and b tank inductors ring in conjunction
with C,. When both ia and ib reach zero, the fourth subinterval
starts, during which the tank capacitor Cr discharges at a rate
proportional to the output current &,. When the tank capacitor
voltage reaches the maximum line-line input voltage ( v h for 60"s
cot 5 90" interval), then the bridge rectifier diodes D1,D5 and D6
become forward-biased. Thus the fifth subinterval starts next in
which the tank inductors ring with the tank capacitor. This will
continue until the tank capacitor voltage is discharged to zero. The
converter remains in this state until the switch Q is turned on again
at zero voltage.
The converter normalized phase plane is shown in Fig. 12. This
phase plane represents the normalized tank current jLr vs. the
normalized tank capacitor voltage %. Quantities are normalized
using the following base parameters,
base voltage =
;
base impedance=Ro base frequency = fo =
5
E
-
va
vb
vc
derived from 341u=S buck redifier.
Fig. 10 341ZVS &er
1 - - kS'??--!
lb
I
2
0.003185
0.003m5
- -%-Tp+-
0.003225
-
0.003245
o.oo3m
:
0.003zn5
t h e [Bec]
Fig. 11 Simulated tank waveforms over a few switching periods,for the
converterof Fig. 10.
V,,, 5 V#(t)5 V,,,
;
3 V#(d
2%
base current= -
1
,
2n - L r C r
~
4;
where V, is the peak amplitude of the phase input voltage Vo(t).
The quantity M b in Fig. 12 is the normalized voltage of phase a
minus phase b voltage, where as Jo is the normalized output load
current, and Jx is the normalized Ix current, and Ix is the transistor
current at the time it is switched off. Also,it should be mentioned
that the switch Q must be turned on before the tank inductor
current (ia for 60's cot < 90" interval) reaches the output load
current I,, otherwise the tank capacitor will ring again with the
three tank inductors and ZVS can not be achieved.
The rectXer shares some of the properties of the buck and the
boost topologies. It shares the pulsating input current and
nonpulsating output current properties of the buck. Its voltage
conversion ratio is similar to the boost, in that the load voltage
must be greater than the maximum input line-line voltage. Fig. 13
shows the rectifier normalized output characteristics, where a is
the transistor conduction angle U), b.
,
I
3
35
I
03
I
13
2
23
4
Jo = b %/ ( 3 V,+) 1 2 )
Fig.13 outpdplaoecharaderisticsfor the wnvelter of Fig. 10, for Merent
normalized values of switchon time a.
The circuit of Fig. 10 has been simulated for a power level of
5.13 kW with the following circuit parameters: VLL=120 Vrms @
60 Hz, C8.32 pF, Lf20 pH, f p 2 5 kHz, V0=304 V and Q duty
ratio of 0.37. The simulated tank current, filtered tank current and
187
voltage for phase a is shown in Fig. 14 with a total harmonic
distortion in the line current approximately 4.5% with unity
displacement factor in open loop operation. It can seen from Fig.
14 that rectifier of Fig. 10 indeed has the property of injecting low
harmonic current into the ac supply source, and the converter input
port characteristicis almost linear in nature.
Fig. 15 New l+ZVS high power factor &er.
VI. A New Single-phaseZ V S Low Harmonic Rectifier
With a Boost Conversion Ratio
The constraint J 2 1 must be satisfied for the rectifier of Fig. 10
in order to obtain zero-voltage switching over the entire ac-line
period. This constraintmakes the proposed rectifier well suited for
single-phase high power factor rectification as well as, three-phase
applications. Fig. 15 shows the single-phase version of the
rectifier. Automatic power factor correction can be achieved for
the rectifier of Fig. 15 without loss of the Z V S property over the
V
entire ac-line period. This is because the constraint &, 2 ,
sin(ot) /
where V,,, is the peak of input phase voltage va(t) and
Ro is the tank characteristicimpedance can be always satisfied.
The rectifier of Fig. 15 has a boost conversion ratio in which the
output voltage Vo is greater than the maximum input voltage.
Moreover, it has the property of injecting low harmonic current
into the ac source. This is because the rectifier input port
characteristics emulates almost a linear resistor. Fig. 16 shows the
variation of the effective input resistor R, as a function of both the
normalized input voltage ma (ma= va(t) / Vo)and the normalized
transistor conduction angle a. It can be seen from Fig. 16 that the
variation in R, is almost negligible (for higher values of a)over
the entire ac line period. Thus, the rectifier behaves as a natural
Loss-Free-Resistor (LFR).
The rectifier of Fig. 15 has been simulated for a power level of
1.5 kW with the following circuit parameters: V ~ p 1 2 0Vrms @
,
V and Q duty
60 Hz,C 4 . 0 5 pF, b 5 5 pH,fs41.6 ~ H zVO=200
ratio of 0.46. The simulated tank current, filtered tank current and
voltage is shown in Fig. 17 with a total harmonic distortion in the
line current approximately 2.5 % with unity displacementfactor in
open loop operation. The simulated phase-plane characteristic ( i k
vs. vcr) near the cusp of the input phase voltage va(t) is shown in
Fig. 18.
-80
0.05
a [rad]
16
Fig. 16 Plot of effective input resistor& vs. both the normalized input voltage
m, and the normalized transistorconductionangle U for the rectifierof Fig. 15.
0.0s
0.052
0.0%
0.0%
0.058
time
0.06
0.062
0.064
0.M
[SOS1
Fig. 17 Simulatedinput line ament wavefom over one line periodfor
converter of Fig. 15.
1
0.052
0.054
0.056
0.058
-e
0.06
0.062
0.064
0.066
-1b
[-I
I
I
I
50
100
150
V4Vl
Fig. 14 Simulated input line. Qurcnt waveform over one line periodfor
converter of Fig. 10.
Fig. 18 Phassplane charaderisticnear OtlF for converterof Fig. 15.
188
0
W.Conclusion
References
Two new classes of lowcost high quality resonant switch
rectifiers are introduced here which perform the function of high
power factorfiow harmonic rectification naturdy. The first class
of rectifiers are obtained f" the ZCS class of rectifiers
introduced in (21, by applying the duality principle. The seoond
class is derived from 39 ZCS rectifiers by exchanging the position
of the power switch with the output diode rectifier. As a
consequence, the resulting rectifiers require the same number of
active switches as their counterpart rectifiers of [2]. The active
switch in these recwiers operates with zero-voltage switching.
Two switch topologies are also introduced. The second switch
allows further linearization of the input port characteristics of these
rectifiers. Furthermore, the second switch operates at ZCS while
the fiist switch continues to operate at ZVS, hence, the rectifier
efficiency remains quite high.
Also introduced is a single-phase ZVS low harmonic rectifier
with a boost conversion ratio. The zero-voltage switching property
for this rectifier is achievable over the ac line period. Where as the
high quality rectification is performed naturally by the rectifier. It
is now clear that an automatic single-phase high power factor
rectifier with ZVS can be obtained. This result has not been
explored.
The proposed rectifiers perform the function of high power
factorflow harmonic rectification naturally. This is because the
input port of these rectifiers emulates approximately 39 resistive
load to the ac source. Simulation results are supplied for each of
the new topologies to prove the validity of the proposed concept.
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189