CHAPTER 7
SPACE VECTOR PULSEWIDTH-MODULATED
(SV-PWM) INVERTERS
7-1
INTRODUCTION
In Chapter 5, we briefly discussed current-regulated PWM inverters using
current-hysteresis control, in which the switching frequency f s does not remain
constant. The desired currents can also be supplied to the motor by calculating
and then applying appropriate voltages, which can be generated based on the
sinusoidal pulse-width-modulation principles discussed in basic courses in electric
drives and power electronics [1]. However, the availability of digital signal
processors in control of electric drives provides an opportunity to improve upon
this sinusoidal pulse-width modulation by a procedure described in this chapter
[2, 3], which is termed space vector pulse-width modulation (SV-PWM). We will
simulate such an inverter using Simulink for use in ac drives.
7-2

SYNTHESIS OF STATOR VOLTAGE SPACE VECTOR vsa
In terms of the instantaneous stator phase voltages, the stator space voltage vector
is
7-1

vsa (t )  van (t )e j 0  vbn (t )e j 2 /3  vcn (t )e j 4 /3
(7-1)
In the circuit of Fig. 7-1, in terms of the inverter output voltages with respect to
the negative dc bus and hypothetically assuming the stator neutral as a reference
ground
van  vaN  vNn ; vbn  vbN  vNn ; vcn  vcN  vNn ;
(7-2)
Substituting Eqs. 7-2 into Eq. 7-1 and recognizing that
e j0  e j 2 /3  e j 4 /3  0 ,
(7-3)
the instantaneous stator voltage space vector can be written in terms of the
inverter output voltages as

vsa (t )  vaN e j 0  vbN e j 2 / 3  vcN e j 4 / 3
(7-4)
A switch in an inverter pole of Fig. 7-1 is in the “up” position if the pole

ia
a
Vd
c

N
qa
qb
qc
Figure 7-1 Switch-mode inverter.
7-2

ib
b
ic
v
c
vb
va
switching function q  1 , otherwise in the “down” position if q  0 . In terms of
the switching functions, the instantaneous voltage space vector can be written as

vsa (t )  Vd (qae j 0  qbe j 2 / 3  qce j 4 / 3 )
(7-5)
With three poles, eight switch-status combinations are possible. In Eq. 7-5, the

stator voltage vector vsa (t ) can take on one of the following seven distinct
instantaneous values where in a digital representation, phase "a" represents the
least significant digit and phase “c” the most significant digit (for example, the
resulting voltage vector due to the switch-status combination 011
 is represented
(3)

as v3 ):


vsa (000)  v0  0


vsa (001)  v1  Vd e j 0


vsa (010)  v2  Vd e j 2 / 3


vsa (011)  v3  Vd e j / 3


vsa (100)  v4  Vd e j 4 / 3


vsa (101)  v5  Vd e j5 / 3


vsa (110)  v6  Vd e j


vsa (111)  v7  0

(7-6)

In Eq. 7-6, v0 and v7 are the zero vectors because of their values. The resulting
instantaneous stator voltage vectors, which we will call the “basic vectors”, are
plotted in Fig. 7-2. The basic vectors form six sectors as shown in Fig. 7-2.
The objective of the PWM control of the inverter switches is to synthesize the
desired reference stator voltage space vector in an optimum manner with the
following objectives:

A constant switching frequency f s
7-3

v2 (010)

v3 (011)
sector 2

vs
sector 3
sector 1

v1(001)

v6 (110)
sector 4
a-axis
sector 6
sector 5

v4 (100)

v5 (101)


Figure 7-2 Basic voltage vectors (v0 and v7 not shown).

Smallest instantaneous deviation from its reference value

Maximum utilization of the available dc-bus voltages

Lowest ripple in the motor current, and

Minimum switching loss in the inverter.
The above conditions are generally met if the average voltage vector is
synthesized by means of the two instantaneous basic non-zero voltage vectors that
form the sector (in which the average voltage vector to be synthesized lies) and
both the zero voltage vectors, such that each transition causes change of only one
switch status to minimize the inverter switching loss.
In the following analysis, we will focus on the average voltage vector in sector 1
with the aim of generalizing the discussion to all sectors. To synthesize an

average voltage vector vsa ( Vˆse js ) over a time period Ts in Fig. 7-3, the


adjoining basic vectors v1 and v3 are applied for intervals xTs and yTs


respectively, and the zero vectors v0 and v7 are applied for a total duration of
7-4

v3  Vd e j / 3

yv3

vs  Vˆse js
s

v1  Vd e j 0

xv1
Figure 7-3 Voltage vector in sector 1.
zTs . In terms of the basic voltage vectors, the average voltage vector can be
expressed as
1



vsa  [ xTsv1  yTsv3  zTs  0]
Ts
(7-7)



vsa  xv1  yv3
(7-8)
x  y  z 1
(7-9)
or
where,
In Eq. 7-8, expressing voltage vectors in terms of their amplitude and phase
angles results in
Vˆse js  xVd e j 0  yVd e j / 3
(7-10)
By equating real and imaginary terms on both sides of Eq. 7-10, we can solve for
x and y (in terms the given values of Vˆs ,  s and Vd ) to synthesize the desired
average space vector in sector 1 (see Problem 7-1).
Having determined the durations for the adjoining basic vectors and the two zero
vectors, the next task is to relate the above discussion to the actual poles (a, b and
c). Note in Fig. 7-2 that in any sector, the adjoining basic vectors differ in one


position, for example in sector 1 with the basic vectors v1(001) and v3 (011) , only
7-5
the pole “b” differs in the switch position. For sector 1, the switching pattern in
Fig. 7-4 shows that pole-a is in “up” position during the sum of xTs , yTs , and
z7Ts intervals, and hence for the longest interval of the three poles. Next in the
length of duration in the “up” position is pole-b for the sum of yTs , and z7Ts
intervals. The smallest in the length of duration is pole-c for only z7Ts interval.
Each transition requires a change in switch state in only one of the poles, as
shown in Fig. 7-4. Similar switching patterns for the three poles can be generated
for any other sector (see Problem 7-2).
7-3
COMPUTER SIMULATION OF SV-PWM INVERTER
vcontrol ,a
vtri
vcontrol ,b
vcontrol ,c
0
Vd
vaN
0
Vd
Ts
vbN
0
Vd
vcN
0
z0
2
x
2
y
2
z7
y
2
x
2
z0
2
Ts
Figure 7-4 Waveforms in Sector 1 ; z  z0  z7
In computer simulations, for example using Simulink, as well as in hardware
implementation using rapid prototyping tools such as from DSPACE [4], the
above described pulse-width modulation of the stator voltage space vector can be
carried out by comparing control voltages with a triangular waveform signal at the
7-6
switching-frequency to generate switching functions. It is similar to the
sinusoidal PWM approach only to the extent of comparing control voltages with a
triangular waveform signal. However, in SV-PWM, the control voltages do not
have a purely sinusoidal nature as those in the sinusoidal PWM.
In an induction machine with an isolated neutral, the three phase voltages sum to
zero (see Problem 7-3)
van (t )  vbn (t )  vcn (t )  0
(7-11)

To synthesize an average space vector vsa with phase components va , vb and vc
(the dc-bus voltage Vd is specified), the control voltages can be written in terms
of the phase voltages as follows, expressed as a ratio of Vˆtri (the amplitude of the
constant switching-frequency triangular signal vtri used for comparison with
these control voltages):
vcontrol ,a van vk 1

 
Vd Vd 2
Vˆtri
vcontrol ,b vbn vk 1

 
Vd Vd 2
Vˆtri
(7-12)
vcontrol ,c vcn vk 1

 
Vd Vd 2
Vˆtri
where,
vk 
max(van , vbn , vcn )  min(van , vbn , vcn )
2
(7-13)
Deriving Eqs. 7-12 and 7-13 is left as a homework problem (Problem 7-5).

7-7
7-4
LIMIT ON THE AMPLITUDE Vˆs OF THE STATOR VOLTAGE

SPACE VECTOR vsa
First we will establish the absolute limit on the amplitude Vˆs of the average stator
voltage space vector at various angles. The limit on the amplitude equals Vd (the
dc-bus voltage) if the average voltage vector lies along a non-zero basic voltage
vector. In between the basic vectors, the limit on the average voltage vector
amplitude is that its tip can lie on the straight lines shown in Fig. 7-7 forming a
hexagon (see Problem 7-6).

However, the maximum amplitude of the output voltage vsa should be limited to
the circle within the hexagon in Fig. 7-7 to prevent distortion in the resulting
currents. This can be easily concluded from the fact that in a balanced sinusoidal

steady state, the voltage vector vsa rotates at the synchronous speed with its
constant amplitude. At its maximum amplitude,
j t

vsa,max (t )  Vˆs,maxe syn
(7-14)
Therefore, the maximum value that Vˆs can attain is
600
3
Vˆs,max  Vd cos(
)  Vd
2
2
(7-15)
Vd
Vˆs,max
0
30
Vd
Figure 7-7 Limit on amplitude Vˆs .
7-8
From Eq. 7-15, the corresponding limits on the phase voltage and the line-line
voltages are as follows:
V
2
Vˆphase,max  Vˆs,max  d
3
3
(7-16)
and
VLL,max (rms)  3
Vˆphase,max
2
V
 d  0.707Vd
2
(7-17)
The sinusoidal pulse-width modulation in the linear range discussed in the
previous course on electric drives and power electronics results in a maximum
voltage
VLL,max (rms) 
3
Vd  0.612Vd (sinusoidal PWM)
2 2
(7-18)
Comparison of Eqs. 7-17 and 7-18 shows that the SV-PWM discussed in this
chapter better utilizes the dc bus voltage and results in a higher limit on the
available output voltage by a factor of (2/ 3) , or by approximately 15 percent
higher, compared to the sinusoidal PWM.
SUMMARY
In this chapter, an approach called SV-PWM is discussed, which is better than the
sinusoidal PWM approach in utilizing the available dc-bus voltage. Its modeling
using Simulink is described.
REFERENCES
1. N. Mohan, Electric Drives – An Integrative Approach, year 2001 edition,
published by MNPERE (WWW.MNPERE.COM).
7-9
2. H. W. van der Broek et al, “Analysis and Realization of a Pulse Width
Modulator based on Voltage Space Vectors,” IEEE Industry Applications
Society Proceedings, pp. 244-251, 1986
3. J. Holtz, Pulse Width Modulation for Electric Power Converters, Chapter 4 in
a book Power Electronics and Variable Frequency Drives, edited by B. K.
Bose, IEEE Press, 1997.
4. WWW.DSPACE.DE
PROBLEMS
7-1
7-2
7-3
In a converter Vd  700V . To synthesize an average stator voltage vector

vsa  563.38 e j 0.44 V , calculate x , y and z
a
v
 563.38 e j 2.53 V . Plot results similar to those in Fig. 7-4.
Repeat if s
Show that in an induction machine with isolated neutral, at any instant of
v (t )  vb (t )  vc (t )  0 .
time, a
7-4
7-5
7-6
7-10

Given that vsa  563.38 e j 0.44 V , calculate the phase voltage components.
Derive Eqs. 7-11 and 7-12.
Derive that the maximum limit on the amplitude of the space vector forms
the hexagonal trajectory shown in Fig. 7-7.