INTERNATIONAL JOURNAL OF PROFESSIONAL ENGINEERING STUDIES Volume V /Issue 5 /SEP 2015 SPACE VECTOR PULSEWIDTH AMPLITUDE MODULATION FOR A BUCK– BOOST VOLTAGE/CURRENT SOURCE INVERTER BASED ON SOLAR POWER HEV 1 T. NAGA SUJITHA MR. M. PURUSHOTHAM.2 1 2 PG Scholar, Shree Institute Of Technical Education JNTU Anantapur University Associate Professor, Shree Institute Of Technical Education JNTU Anantapur University Abstract: This paper proposes a new INTRODUCTION Hybrid Electric Vehicle (HEV) which works with In recent years, photovoltaic (PV) systems Solar power and battery based on Buck-Boost have received unprecedented attention due to the Voltage/Current Source Inverter using Space concerns about adverse effects of extensive use of Vector Modulation fossil fuels on the environment and energy security. (SVPWAM) technique. It mainly focuses on control Also, these have got more attention in Electric technique for an VSI/CSI. The switching losses are vehicles. reduced by 87% for VSI, 60% for CSI with topologies are used for electric vehicles (EVs), they SVPWAM technique compared to conventional are the conventional three-phase inverter with a Sinusoidal PWM technique. In both cases power high voltage battery and a three-phase pulse width density is increased by 2 to 3 times. It is also modulation (PWM) inverter with a dc/dc boost verified that the output harmonic distortions of front end. The conventional PWM inverter imposes SVPWAM is lower than SPWM, by using only one- high stress on switching devices and motor thus third of switching frequency of latter one. A limits the motor’s constant power speed range Maximum (MPPT) (CPSR), which can be overcame through the dc–dc technique is used to track maximum power from boosted PWM inverter. A typical configuration of solar panel and store the energy in battery. It is the Solar Hybrid electric vehicle (SHEV) is shown obtained that it is feasible to use SVPWAM to make in Fig. 1. The inverter is required to inject low the buck–boost inverter suitable for applications harmonic current to the motor, in order to reduce that require high efficiency, high power density, the winding loss and core loss. For this purpose, the high temperature, and low cost the simulation switching frequency of the inverter is designed results are carried out for which the result shows within a high range from 15 to 20 kHz, resulting in its reliability and performance. the switching loss increase in switching device and Pulse Width Power Amplitude Point Tracking Currently, two existing inverter Index Terms: Solar panels, Buck- also the core loss increase in the motor stator. To Boost converter, SVPWAM, Total Harmonic solve this problem, various soft-switching methods Distortion. have been proposed [1]–[3]. Active switching rectifier or a diode rectifier with small DC link capacitor has been proposed in [4], [5], [8]–[12]. IJPRES 130 INTERNATIONAL JOURNAL OF PROFESSIONAL ENGINEERING STUDIES Volume V /Issue 5 /SEP 2015 can be achieved in VSI and CSI, respectively. If a unity power factor is assumed, an 87% switching loss reduction can be implemented in VSI, and a 74% reduction can be implemented in CSI. Therefore, a high-efficiency, high-power density, high-temperature, and low-cost inverter is achieved by using an SVPWAM method. CHARACTERISTICS OF PV ARRAY AND CORRESPONDING MPPT Fig 1 Typical configuration of a Solar HEV. ALGORITHM Various types of modulation methods such as optimized pulse-width-modulation [13], improved Space-Vector-PWM control for different The PV array – characteristic is described by the optimization targets and applications [14]–[16], following and discontinuous PWM (DPWM) [17]have been [9]: proposed previously. Different switching sequence arrangement can also affect the harmonics, power = − −1 loss and voltage/current ripples [18]. DPWM has (1) been widely used to reduce the switching frequency, by selecting only one zero vector in one Equation (1) is the unit charge, the Boltzmann’s sector. It results in 50% switching frequency constant, the p-n junction ideality factor, and Tc the reduction. However, if an equal output THD is cell temperature. Current irsis the cell reverse required, DPWM cannot reduce switching loss than saturation current, which varies with temperature SPWM. Moreover, it will worsen the device heat according to transfer because of the temperature variation. A double 120 flattop modulation method has been = − (2) cell reference proposed in [6] and [7] to reduce the period of PWM switching to only 1/3 of the whole In (2), Tref is the fundamental period. However, these papers didn’t temperature, the reverse saturation current at Tref. compare the spectrum of this method with others, and EG the band-gap energy of the cell. The PV which is not fair. In addition, the method is only current iph depends on the insolation level and the specified to a fixed topology, which cannot be cell temperature according to applied widely. This paper proposes a novel generalized space vector pulse width amplitude modulation (SVPWAM) method for the buck/boost = 0.01 + − (3) voltage source inverter (VSI) and current source inverter (CSI). By eliminating the conventional In (3), iscr is the cell short-circuit current at zero vector in the space vector modulation, two- the reference temperature and radiation, Kv a third and one-third switching frequency reduction temperature coefficient, and the insulation level in IJPRES 131 INTERNATIONAL JOURNAL OF PROFESSIONAL ENGINEERING STUDIES Volume V /Issue 5 /SEP 2015 kW/m . The power delivered by the PV array is calculated by multiplying both sides of (2) by vpv. In this algorithm, PV-output voltage (Vk) and PV output current (Ik) are sensed. Then power is calculated (Pk) and compared with the power vale = calculated in the previous sample (Pk1) in order to − − get Pk . If the results of Pk is zero the system is working in MPP. Otherwise and according to the 1 (4) sign of Pk and to the sign of Vk the command voltage to control the duty cycle of the converter Substituting iph from (3) in (4), Ppv becomes = 0.01 + − (let’s say the perturbation), will be decreased or 0 increased in order to force the working point of the PV module towards the MPP. The algorithm is − −1 (6) illustrated in the flowchart shown in Fig. 2. VSI EMPLOYING SVPWAM Based on (6), it is evident that the power delivered by the PV array is a function of insulation level at any given temperature. Since the inverter employed in the PV system of this paper is of current-source type, the power-versus-current characteristic of the PV array has to be examined. A. SVPWAM Control Principle in VSI The principle of an SVPWAM control is to eliminate the zero vectors in each sector. The modulation principle of SVPWAM is shown in Fig. 3. MPPT Control algorithm There are many MPPT methods available in the literature; the most widely-used technique is described in the following section. Perturbation and Observation (P&O) Perturb and Observe (P&O) technique has been selected to implement a MPPT control algorithm due to its simplicity and the possibility to introduce improvements. Fig3. SVPWAM for VSI. In each sector, only one phase leg is doing PWM switching; thus, the switching frequency is reduced by two-third. This imposes zero switching for one phase leg in the adjacent two sectors. For example, in sector VI and I, phase leg A has no switching at all. The dc-link voltage thus is directly generated from the output line-to-line voltage. Fig. 2: Flowchart of P&O method IJPRES 132 INTERNATIONAL JOURNAL OF PROFESSIONAL ENGINEERING STUDIES Fig 4 DC-link voltage of SVPWAM in VSI . Volume V /Issue 5 /SEP 2015 Fig 6 Theoretic waveforms of dc-link voltage, In sector I, no zero vectors are selected. Therefore, S1andS2keep constant ON, andS3and S6are doing PWM switching. As a result, if the output voltage is kept at the normal three-phase sinusoidal voltage, the dc-link voltage should be equal to line- output line-to-line voltage and switching signals. Where θ∈[0,π/3]is relative angle from the output voltage vector to the first adjacent basic voltage vector like in Fig. 3. If the time period for each vector maintains the same, the switching frequency to-line voltage Vac at this time. Consequently, the will vary with angle, which results in a variable dc-link voltage should present a6ωvaried feature to inductor current ripple and multi frequency output maintain a desired output voltage. The corresponding waveform is shown in solid line in Fig. 4. harmonics. Therefore, in order to keep the switching period constant but still keep the same pulse width as the original one, the new time A dc–dc conversion is needed in the front stage periods can be calculated as to generate this 6ωvoltage. The topologies to implement this method will be discussed later. The original equations for time periodT1andT2are = √ − = ; √ ′ / = /( + ) (8) The vector placement within one switching cycle ( ) (7) in each sector is shown in Fig. 5. Fig. 6 shows the output line-to-line voltage and the switching signals ofS1. B. SWITCHING LOSS REDUCTION FOR VSI For unity power factor case, the inverter switching loss is reduced by 86% because the voltage phase for PWM switching is within [−60◦ ,60◦], at which the current is in the zero-crossing region. In VSI, the device voltage stress is equal to dclink voltage VDC, and the current stress is equal to Fig 5 Vector placement in each sector for VSI. output current ia. Thus the switching loss for each switch is IJPRES 133 INTERNATIONAL JOURNAL OF PROFESSIONAL ENGINEERING STUDIES Volume V /Issue 5 /SEP 2015 As indicated, the worst case happens when = | 1 2 | + √ = sin( sin( power factor is equal to zero, where the switching )|. . loss reduction still reaches 50%. In conclusion, SVPWAM can bring the switching loss down by )|. . 50–87%. CSI EMPLOYING SVPWAM . . . (9) A. Principle of SVPWAM in CSI Where ESR,Vref, Iref are the references The principle of SVPWAM in CSI is also to eliminate the zero vectors. As shown in Fig. 8, for each sector, only two switches are doing PWM switching, since only one switch in upper phase legs and one switch in lower phase legs are conducting together at any moment. Thus, for each switch, it only needs to do PWM switching in two sectors, which is one-third of the switching period. Compared to SVPWM with single zero vectors selected in each sector, this method brings down the switching frequency by one-third. Similarly, the dc-link current in this case is a6ωvaried current. It is the maximum envelope of six output currents Fig 7 Conventional CSI and its corresponding SVPWAM diagram. :Ia,Ib,Ic,−Ia,−Ib,−Ic,. For example, in sector I,S1 always keeps ON, so the dc-link current is equal to Ia. The difference between dc-link current in CSI Since the SVPWAM only has PWM switching in and dc-link voltage in VSI is dc-link current in CSI two 60◦sections, the integration over 2πcan be is overlapped with the phase current, but dc-link narrowed down into integration within two 60◦ voltage in VSI is overlapped with the line voltage, not the phase voltage. The time intervals for two _ = √ . . . (10) adjacent vectors can be calculated in the same way as (7) and (8). According to diagram in Fig. 8, the The switching loss for a conventional SPWM method is _ ′ = . vector placement in each switching cycle for six switches can be plotted in Fig. 10.The SVPWAM . . is implemented on conventional CSI through (11) In result, the switching loss of SVPWAM over SPWM is f=13.4%. However, when the power factor decreases, the switching loss reduction amount decreases because the switching current simulation. Fig.8 shows the ideal waveforms of the dc current Idc, the output phase ac current and the switching signals of S1. The switching signal has two sections of PWM in positive cycle, but no PWM in negative cycle at all. increases as Fig. 7 show. IJPRES 134 INTERNATIONAL JOURNAL OF PROFESSIONAL ENGINEERING STUDIES B. Switching Loss Reduction for CSI Volume V /Issue 5 /SEP 2015 proposed SVPWAM, a spectrum analysis is In CSI, the current stress on the switch is equal to conducted to be compared with other methods on the dc link current, and the voltage stress is equal to the basis of an equal average switching frequency, output line-to-line voltage, as shown the shadow which has not been considered in paper [16]. area in Fig. 9 Thus, the switching loss for a single A. switch is determined by SVPWAM, SPWM, and SVPWM Spectrum Comparison between The object of spectrum analysis is the output = _ √ . _ . . (12) voltage or current before the filter. The reason is that certain orders of harmonics can be eliminated by sum of switching functions in VSI or subtraction of switching functions in CSI. The comparison is between SVPWAM, DPWM, and continuous SVPWM in VSI/CSI. The switching frequency selected for each method is different, because the comparison is built on an equalized average switching frequency over a whole fundamental cycle, in order to make the harmonics Fig 8 Theoretic waveforms of dc-link current, output line current and switching signals. comparable at both low modulation and high modulation range. Assume that the base frequency When compared to discontinuous SVPWM, if is f0 =10.8 kHz. Thus, 3f0 should be selected for the half switching frequency is utilized, then the SVPWAM, andf0should be selected for continuous switching loss of it becomes half of the result in SVPWM in VSI. In CSI, 3f0,2f0, andf0should be (12). The corresponding switching loss ratio selected for SVPWAM, discontinuous SVPWM, between SVPWAM and discontinuous SVPWM is and shown in Fig. 11. modulation index selected here is the maximum continuous SVPWM, respectively. The modulation index 1.15, since the SVPWAM always SPECTRUM ANALYSIS OF SVPWAM only has the maximum modulation index. Theoretically, the THD varies with modulation index. The dc-link voltage is designed to be a A fair comparison in switching loss should be based on an equal output harmonics level. Thus, the switching loss may not be reduced if the switching frequency needs to be increased in order to compensate the harmonics. For example, discontinuous SVPWM has to have double switching frequency to achieve the same THD as constant for SVPWM and an ideal6ωenvelope of the output six line-to-line voltages for SVPWAM. Thus, the harmonic of the SVPWAM here does not contain the harmonics from the dc–dc converter output. It is direct comparison between two modulation methods from mathematics point of view. continuous PWM. So the switching loss reduction is much smaller than 50%. Therefore, for the newly IJPRES 135 INTERNATIONAL JOURNAL OF PROFESSIONAL ENGINEERING STUDIES B Analytical Double Fourier Expression for Volume V /Issue 5 /SEP 2015 TOPOLOGIES FOR SVPWAM SVPWAM Basically, The expression of double Fourier coefficient is the topologies that can utilize SVPWAM have two stages: dc–dc conversion + which converts a dc voltage or current into () = () 1 a6ωvaried dc-link voltage or current; VSI or CSI ( 2 () ) for which SVPWAM is applied. One typical () (13) example of this structure is the boost converter inverter discussed previously. However, the same the function can also be implemented in a single stage, one such as Z/quasi-Z/trans-Z source inverter [37]– switching cycle. The double Fourier expression [40]. The front stage can also be integrated with coefficients can be derived as long as the rising inverter to form a single stage. Take current-fed edge of each PWM waveform is known. The output quasi-Z-source inverter as an example. Instead of line-to-line voltage Vab is used as an illustrative controlling the dc-link current Ipn to have a constant example. It is a function of switching function average value, the open zero state duty cycle Dop Where fundamental y∈[0,2π] cycle; represents x∈[0,2π] represents will be regulated instantaneously to control Ipm to ( )= ( ( )− ( )) (14) TABLE I INTEGRATIONLIMIT FORLINE-TO-LINE VOLTAGE Vab(t) have a 6ω fluctuate average value, resulting in a pulse type 6ωwaveform at the real dc-link current Ipn, sinceI1is related to the input dc current Iin by a transfer function = (15) CASE STUDY:1-KW BOOSTCONVERTER FOR EV MOTOR DRIVE APPLICATION A. Basic Control Principle The circuit schematic and control system for a 1kW boost converter inverter motor drive system is So its double Fourier equation is equal to the shown in Fig. 15. A 6ωdc-link voltage is generated subtraction of two double Fourier equations for from a solar PV array by a boost converter, using switching functions. The integration limits for open-loop control. Inverter Vab (t)is shown in Tables I. The coefficients finally modulated by SVPWAM could be simplified into a closed-form expression specifications for the system are input voltage is in terms of Bessel functions, which will not be 100–200 V; the average dc-link voltage is 300 V; discussed here. output line-to-line voltage rms is 230 V; and a then could method. be The frequency is from 60 Hz to 1 kHz. IJPRES 136 INTERNATIONAL JOURNAL OF PROFESSIONAL ENGINEERING STUDIES Volume V /Issue 5 /SEP 2015 Fig 10 Operation region of boost-converter-inverter EV traction drive . In SVPWAM control of boost mode, dc-link voltage varies with the output voltage, in which the modulation index is always kept maximum. So, when dc-link voltage is above the battery voltage, dc-link voltage level varies with the output voltage. The voltage utilization increased and the total power stress on the devices has been reduced. Fig 9 SVPWAM-based MPPT boost-converter motor drive system. B. Voltage Constraint and Operation Region It is worth noting that the SVPWAM technique Fig.11(a) after filter can only be applied when the batteries voltage falls into the region ≤ √ √ due to the step-up nature of boost converter. The constraint is determined by the minimum point of the6ω dc-link voltage. Beyond this region, conventional SPWM can be implemented. However, the dc-link voltage in this case still varies with6ωbecause of the small (b) before filter film capacitor we selected. Thus, a modified SPWM with varying dc-link voltage will be adopted during the motor start up as shown in Fig. 16. Hence, the system will achieve optimum efficiency when the motor is operating a little below or around nominal voltage. When the motor demands a low voltage during start up, efficiency is Fig.12 (a) after filter the same as the conventional SPWM-controlled inverter. (b) before filter IJPRES 137 INTERNATIONAL JOURNAL OF PROFESSIONAL ENGINEERING STUDIES Volume V /Issue 5 /SEP 2015 1. C. Variable DC-Link SPWM Control at The switching power loss is reduced by 90% compared with the conventional High Frequency SPWM inverter system. When the output needs to operate at a relative 2. high frequency, like between 120 Hz and 1 kHz, it of 2 because of reduced dc capacitor (from is challenging to obtain a6ω dc-link voltage 40 to 6 μF) and small heat sink is needed. without increasing the switching frequency of a 3. boost converter because the controller does not switching loss. The reason is because it switches at a complete current region. Also a normal SPWM cannot be used in this range because the capacitor is designed to be small that it cannot hold a passives, heat sink, and semiconductor stress. boost converter switching frequency would cause a because it takes up more than 75% of the total The cost is reduced by 30% because of reduced have enough bandwidth. Furthermore, increasing substantial increase of the total switching loss, The power density is increased by a factor A high-efficiency, high-power density, hightemperature, and low-cost 1-kW inverter engine drive system has been developed on matlab software. The effectiveness of the proposed method in reduction of power losses has been validated by the simlation results. constant dc link voltage. Therefore, the optimum REFERENCES option is to control the dc link voltage to be 6ωand do a variable dc link SPWM modulation, as [1] D. M. Divan and G. Skibinski, “Zero- explained in Fig. 17. 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NAGA SUJITHA currently pursuing M.Tech in Power Electronics at Shree Institute of Technical Education Affiliated to JNTU Anantapur University. Email:sujitha.tummalapalli@gmail.com Mr. M. PURUSHOTHAM Associate Professor and Head Of Department at Shree Institute Of Technical Education Affiliated to JNTU Anantapur University. E-mail: purush239@gmail.com IJPRES 139