A NOVEL CONTROL SCHEME FOR FIVE LEVEL FIVE PHASE
DIODE CLAMPED INVERTER
1
PAGIDIPALLI SURESHKUMAR, 2N.NAGENDRA
1,2
Department of EEE, Sasi Institute of Technology &Engineering, Tadepalligudem, A.P, India@sasi.ac.in
E-mail:1153sureshkumar@gmail.com, 2nagendra232@sasi.ac.in
Abstract— In this paper the five level five phase diode clamped inverter dc link capacitor voltages are balanced by
combination of TLBC and the additional balancing circuit at high power factor and modulation index.
Keywords— DC-link capacitor voltage balancing, diode clamped, multilevel inverter, three-level boost converter (TLBC).
it can applied in
certain cases where proper
conditions in converter exit. This method is based on
load current but it is independent on load and
additional passive circuit. For diode clamped
inverters more than three levels a passive frond-end
capacitor voltage balancing method is only
achievable, if the modulation index is limited to
above 60%of its maximum value for loads of
0,8power factors. If the modulation index is more
than this values then the central capacitor start to
discharging, and finally the inverter output becomes
at three levels.
To overcome the problem an inverter can be
equipped with an external isolated dc sours, this
circuit acting as a active front end solution to balance
the capacitor voltages,[7] [8].Many authors proposed
PWM strategies for capacitor voltage balancing to
avoid extra cost when using active front-end or
balancing circuit. This method is found to have
limitation on the range of operation with the changing
of the power factor and modulation index [9], [10],
[11]. Once a PWM strategy is employed for dc-link
capacitor voltage balancing, solving problems such as
total harmonic distortion, common-mode voltage
cancellation, and leakage current elimination with the
same strategy is not feasible.
I. INTRODUCTION
The multi level inverter can be classified into three
catego- ries according to their topologies, they are
neutral point clam- ped, flying capacitor and cascade
H-bridge.[1] an inverter is applied to an ac motor
system harmonics are injected in the drive systems.
Due to this the performance of the motor is reduced
to its specific value. To overcome this problem many
authors proposes so many techquenics.pwm is the one
of the technology is used to reduce the harmonics and
to improve the performance of the motor.[2]
A multi level technology is very effective in ac drive
sys- tems by using proper pwm techniques to improve
the control of output voltage from the harmonic
content in the system. The multi level inverter has the
advantage over the convent- ional inverter is the
possibility of low switching frequency, and low
electromagnetic interference.[3] Three highly popular voltage-source multilevel inverters can be
divided into three categories according to their
topology: neutral point clamped, flying capacitor, and
cascade H-bridge [4]–[5], [6],
The flying-capacitor converter was introduced as
viable multi level converter topology it has some
distinct advantages over the diode clamped inverter
including the absence the diodes and ability to
regulate the voltage across the fc through redundant
state selection (rss) even when the number of voltage
level is greater than three. The main disadvantage of
the active voltage balancing method is the need for
measuring the voltage of the flying capacitor which
Leeds to using extra hardware The neutral point
clamed converters are still investigated to solve the
problem of dc link capacitor voltage balancing.
Improper voltage sharing on dc link capacitor leads to
an over voltage on switches and finally a frailer of the
converter. This problem is solved in npc converter in
some alternative methods; it can be achieved by
natural balancing.
Method that control the neutral point current has
some limitations because they are only efficient at
specific load conditions and method with additional
circutery increase the expense of the inverter. The
natural balancing methods assures the dc link
capacitor voltage balance any additional circuitry but
II. DESCRIPTION OF THE SYSTEM
In this paper, a five-level boost converter (TLBC) is
used t- o supply a five-level diode-clamped inverter
as shown in Fig.2
Fig 1. five level five phase diode clamped inverter with
TLBC and balancing circuit.
Proceedings of 11th IRF International Conference, 8th May 2016, Hyderabad, India, ISBN: 978-93-86083-09-8
42
A Novel Control Scheme For Five Level Five Phase Diode Clamped Inverter
inductor starts disc- harge and which is flowing
through the two capacitors C2 and C3 and the voltages
VC2 and Vc3 gradually rises. The inductor current
flowing direction is shown in thick solid line. during
the time interval t3 to t4 are also both the switches are
turned off.
Fig 2. Switching signals and inductor current wave forms of
TLBC.
TLBC is used to control the two inner capacitors C1,
C2 . Because it is in simple structure. it is also use to
reduce the switching losses and the reverse recovery
losses. The inter leaving technique is utilized for for
three level boost conver- ter to reduce the input filter
size by input current cancellation. Five level five
phase diode clamped inverter dc link capacitor
voltages are balanced by the combination of both
TLBC and additional balancing circuit. The TLBC is
used to control the both inner capacitor C2, C3 and the
balancing circuit is used to control both outer
capacitors C1 C4 by transferring the charge. All
control functions are implemented fully in software
with a single chip microprocessor.
C. SWITCH S2 IS TURN ON
III. INNER CAPACITORS BALANCING WITH
TLBC
A. SWITCH S1 TURN ON
Fig 3. The inner capacitor voltage balancing using TLBC.
During the interval t2 to t3 switch S2 is turn on and the
switch S1 is turn off. and again the inductor LS is start
to char- ge and the the capacitor C2 voltage (Vc2)
gradually rises. The voltage across the capacitor C2 is
increased by increasing duty ratio (D) and the time
duration from t0 to t1. And the voltage across the
capacitor C3 is increased by increasing the duty ratio
(D) and the time duration from t2 to t3.
The TLBC can be operated in different algorithms but
here we can use only
The output voltage of TLBC is written as follows
V0 = VC2 + VC2 = 2VS/ (2 – D )
(1)
Where
D = duty ratio ( 2t1/ T )
D is varied from 0 to 1
The current ripple for conventional boost inverter can
be written as
When switch S1 is closed during the interval t0 to t1.
The inductor LS start to charge and the voltage (VC3)
across the capacitor C3 gradually rises. the inductor
current flowing in the circuit is shown in solid line. In
this interval switch S2 is turn off
B. BOTH THE SWITCHES S1 AND S2 TURN
OFF
During the time interval t1 to t2 both the switches S1
and S2 are turn off. And the energy stored in the
Proceedings of 11th IRF International Conference, 8th May 2016, Hyderabad, India, ISBN: 978-93-86083-09-8
43
A Novel Control Scheme For Five Level Five Phase Diode Clamped Inverter
∆I = VSDTSW / LS
(2)
Where
TSW = switching frequency
The current ripple for TLBC
∆I = V0 (1 – VS/V0 ) (2 VS/V0 –1 )/2LSfsw ( 3 )
Where
fsw = switching frequency of conventional boost
converter
The control diagram of balanced circuit is shown in
fig 6.a PID controller is used to control the duty ratio
of the two switches.and it designed to have a
propotional gain (kp) of 0.001, an integral gain (ki) of
0.01, and derivative gain of (kd) of 0.
From the equations ( 2 ) and ( 3 ) the currnt ripple
produced by the TLBC is half of the current ripple
produced by the conve- ntional conveter. That’s way
we can use small size inductor.
Now to obtained the equal voltages across the
two inner capacitors C2 and C3 the voltage balancing
controller callad PID is used. The duty ratio of the
switches S1 and S2 is contr- olled and to get the
reference voltage Vref across the two capa- citors.fig
4. The PID controller is designed to have a propotional gain (Kp) of 0.003 , an integral gain (Ki) of 0.02,
and a derivative gain (Kd) of 0.the below fig shows
the control diagram of TLBC.
Fig 6. Control diagram Fig for balancing circuit.
Increasing the duty ratio of S3 and S4 will reduce the
charging time of VC1 and VC4, respectively.
However, if the duty ratio is too high, the middle
capacitors will over disch- arge and reduce the
voltage at the capacitors.to reduce this problem the
contrller must be oprated slower then the TLBC
controller.
V. SIMULATION RESULTS
The simulation results of five level five phase diode
clamp- ed inverter is shown in the fig by using matlab
simulink softw- are.here the dc link capacitor
voltages are controlled by the TLBC and additional
circuit.the input voltage to the TLBC is 136 volts and
the voltage across the balancing the capacitors 82
volts, and the RL load is 150Ω and 28.7 mh. The
frequ- ence of the load voltage is 50 hz.
Fig 4. Control diagram of TLBC chopper.
IV. THE OUTER CAPACITORS BALANCING
PARAMETERS OF THE SIMULATION
CIRCUIT
The two outer capacitors C1 and C4 is controlled by
the add- itional balancing circuit which is shown in
the fig 5.the two capacitors are connectd across the
two balancing circuits. .the voltages across the
capacitors are controlled by the two swi- tches S1 and
S2 by varying the duty ratio D.
Fig 7. Dc link capacitor voltages VC1, VC2, VC3, VC4 at 82 volts at
high resistive load ( power factor 0.99 )
Fig 5. Outer capacitor balancing circuit.
Proceedings of 11th IRF International Conference, 8th May 2016, Hyderabad, India, ISBN: 978-93-86083-09-8
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A Novel Control Scheme For Five Level Five Phase Diode Clamped Inverter
[4]
[5]
[6]
[7]
Fig 8. Inverter five phase output voltages VAM, VBM, VCM, VDM,
VEM. At high resistive load ( power factor 0.99 )
[8]
CONCLUSION
[9]
The dc link capacitor voltages of the five level five
phase diode clamped inver is controlled by
connecting the three level boost converter at the two
inner capacitors C2, C3 and the balancing circuit at
the two outer capacitors C1, C4 at high power factor
and and high modulation index.
[10]
[11]
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Proceedings of 11th IRF International Conference, 8th May 2016, Hyderabad, India, ISBN: 978-93-86083-09-8
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