United States Patent [191
[11] Patent Number:
Lipo et al.
[45]
L
[54] STATIC POWER CONVERSION
APPARATUS USING A HIGH FREQUENCY
SERIES RESONANT DC LINK
648-656.
D. M. Divan and G. L. Skibinski, “Zero Switching Loss
Inverters for High Power Applications,” IEEE-IAS
Annual meeting Conference Record, Feb. 1987, pp.
627-634.
D. M. Divan, “Diodes as Pseudoactive Elements in
High-Frequency DC/DC Converters,” PESC 1988,
Kyoto, Japan, Apr. 1988.
Sep. 28, 1989
[51]
Int. Cl.5 .......................................... .. H02M 7/521
[52]
US. Cl. .................................... .. 363/136; 363/37;
[58]
Field of Search ..................... .. 363/34, 37, 95, 96,
D. M. Divan, “Power Converter Topologies for High
Performance Motion Control Systems,” 1987 CAMC
Conference Report, Jun. 1987.
D. M. Divan, “Design Consideration for Very High
—Frequency Resonant Mode DC/DC Converters,”
1986 IAS Conference Report, Oct. 1986.
363/137
363/136, 137
[56]
References Cited
Primary Examiner-Mark O. Budd
U.S. PATENT DOCUMENTS
3,222,587 12/1965
3/ 1988
Divan
363/ 137
363/37
........... ...
. . . ..
4,805,082 2/ 1989 Heinrich et a1.
4,864,483
9/1989
Assistant Examiner-Jeffrey Sterrett
Attorney, Agent, or Firm-Lathrop & Clark
Lichowsky ......................... .. 363/37
3,940,669 2/ 1976 Tsuboli et a1.
4,638,138 l/1987 Rosa et a1.
4,730,242
Jul. 17, 1990
New Concept in Static Power Conversion,” IEEE-IAS
Annual Meeting Conference Record, Mar. 1986, pp.
[75] Inventors: Thomas A. Lipo, Madison, Wis.;
Yoshihiro Murai, Seki, Japan
[73] Assignee: Wisconsin Alumni Research
Foundation, Madison, Wis.
[21] Appl. N0.: 414,202
[22] Filed;
Date of Patent:
4,942,511
[57]
363/ 37
ABSTRACT
A high ef?ciency power converter is achieved which
363/37
eliminates the needs for self-commutated devices and
Divan .................................. .. 363/37
requires only twelve thyristors for full double bridge
OTHER PUBLICATIONS
Pradeep K. Sood and Thomas A. Lipo, “Power Con
version Dibstribution System Using a Resonant High
AC/AC power conversion. The system utilizes a series
resonant DC link between the AC/DC and DC/AC
-Frequency AC Links”, IEEE-IAS Annual Meeting
Conference Record, Mar. 1986, pp. 533-541.
mutating circuit which ensures turn off of all twelve
converters. The DC resonant circuit functions as a com
Hian K. Lauw et al., “Variable-Speed Generation with
thyristors by providing the necessary zero current in
stants. A signi?cantly improved sinusoidal current
the Series-Resonant Converter,” IEEE Transaction on
waveform can be obtained on both the input and the
Energy Conversion, vol. 3, No. 4, Dec. 1988, pp.
755-764.
Sjoerd W. H. de Haan and J. D. Lodder, “A Formalis
tic Approach to Series-Resonant Power Conversion,”
EPE Conference Record, May 1987, pp. 231-238.
D. M. Divan, “The Resonant DC Link Converter-A
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US. Patent
Jul. 17, 1990
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Jul. 17, 1990-
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Jul.17, 1990
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Jul. 17, 1990
Sheet 12 of 16
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the AC/DC and DC/A_C converters which provides a
natural commutation capability and allows for inter
STATIC POWER CONVERSION APPARATUS
USING A HIGH FREQUENCY SERIES RESONANT
DC LINK
ruptible switching. By using pulse density modulation
this circuit enables the realization of low distortion
sinusoidal current as well as unity power factor on both
TECHNICAL FIELD
the AC/DC and DC/AC side converters.
The invention further provides a power conversion
system utilizing a series resonant DC-link which elimi
nates oscillation in the output through the use of deriva
tive feed-back and damping circuits.
Further objects, features, and advantages of the in
vention will be apparent from the following detailed
description when taken in conjunction with the accom
This invention pertains generally to the ?eld of static
power converters and systems for the control of static
power converters.
BACKGROUND OF THE INVENTION
In the past few years remarkable progress has been
made in the development of high power density
_ AC/DC converters using resonant-link‘ schemes which
utilize high speed devices such as fast recovery transis 15
panying drawings.
tors and GTO’s. These new converters not only have
BRIEF DESCRIPTION OF THE DRAWINGS
high power density but also possess very low switching
In the drawings:
losses because switching of the devices takes place at
zero-voltage instants and thus the total system is able to
operate at very high frequency compared to conven
tional DC link transistorized converters. Although
these resonant-link converters are intended to operate at
high power density, almost all the systems require self
commutated switching devices and have some di?iculty
performing conversion at very high power levels be
cause of the relatively low voltage and current margins
that self commutated devices, such as transistors, typi
FIG. 1 is a schematic circuit diagram of a prior art
parallel resonant AC-link power converter.
FIG. 2 is a schematic circuit diagram of a prior art
series resonant AC-link power converter.
FIG. 3 is a schematic circuit diagram of a prior art
parallel resonant DC-link power converter.
FIG. 4 is a schematic circuit diagram showing a series
25
resonant circuit, with parallel inductance Ld.
FIG. 5 are graphs illustrating the current waveforms
in the circuit of FIG. 4.
FIG. 6 is a graph illustrating the source current
In general, switching schemes for resonant convert
waveform for the circuit of FIG. 4.
ers can be classi?ed according to their resonant AC-link
FIG. 7 is a schematic circuit diagram showing an
and resonant DC-link modes. The resonant AC circuits
alternate con?guration of the series resonant compo
utilize either a parallel resonant circuit (FIG. 1) or a
nents shown in the circuit of FIG. 4.
series resonant circuit (FIG. 2). The AC resonant cir
FIG. 8 is a graph illustrating the source current
cuit impresses both polarities of AC voltage and current
on the link so that the switches of the input and output 35 waveform for the circuit of FIG. 7.
FIG. 9 is a schematic circuit diagram illustrating a
side converters are required to carry both positive and
series resonant circuit with a circulating current thy
negative currents as well as block both polarities of
voltage. The converter switches must therefore be bi
ristor.
directional switches which are usually realized by two
FIG. 10 are graphs illustrating circuit behavior of the
cally have.
inverse-parallel transistors or thyristors for the parallel 40 circuit of FIG. 9 without the circulating current thy
and series resonance circuits, respectively.
ristor.
DC-link circuits have been developed which realize
FIG. 11 are graphs illustrating the circuit behavior of
pulsating DC currents in the link by adding DC offsets
the circuit of FIG. 9 with the circulating current thy
to the AC resonant current. The resonant DC-link con
ristor.
verters reported in the past have been parallel resonant 45
FIG. 12 are graphs illustrating link current wave
types, as shown in FIG. 3. See also, U.S. Pat. No.
forms without regulation of current through the DC
4,730,242 to Divan, which discloses parallel resonant
bias inductor.
link converter systems wherein the switching devices
FIG. 13 are graphs illustrating link current wave
are switched at times of zero voltage to minimize
forms with regulation of current through the DC bias
switching losses.
inductor.
FIG. 14 is a schematic circuit diagram of a current
SUMMARY OF THE INVENTION
control scheme to control current through the DC bias
A power conversion system in accordance with the
inductor.
present invention utilizes a series resonant DC-link in
volving a con?guration which employs only unidirec 55 FIG. 15 is a schematic circuit diagram of an AC/DC
converter in a motoring mode.
FIG. 16 is a schematic circuit diagram of an AC/DC
converter
in a circulating mode.
occurs at zero-crossing instants of voltage, the present
FIG. 17 is a schematic circuit diagram of an AC/DC
invention utilizes switching of the converter switches
only at the zero-crossing instants of the link current. 60 converter in a regenerating mode.
tional switches. Unlike the DC parallel resonant con
verters in which switching of the converter switches
Since the current drops below the holding current, the
natural tum-off ability of a conventional thyristor is
utilized for commutation. Thus, high power thyristors
FIG. 18 is a schematic circuit diagram illustrating the
formation of a series resonant DC-link power con
verter.
FIG. 19 is a schematic circuit diagram showing the
link current is unidirectional, only the usual six thy 65 detailed circuit implementing the series resonant DC
can be utilized with minimal switching loss. Since the
ristors are needed per converter bridge.
-
The present invention provides a power conversion
system which utilizes a series resonant DC-link between
link scheme.
FIG. 20 are graphs illustrating the distribution of
current pulses to a three-phase load.
3
4,942,5l l
4
FIG. 21 are graphs illustrating current reference
waveforms.
FIG. 22 is a schematic circuit diagram of a current
feed~back selection circuit.
FIG. 23 is a current and thyristor selection table.
FIG. 24 is a table illustrating the polarity of current
-continued
error for each of the operating modes.
Assume the load thyristor 43 shown in FIG. 4 is
FIG. 25 is a schematic circuit diagram of the control
circuit for the overall system.
FIG. 26 is a schematic circuit diagram showing a ?rst
load circuit.
FIG. 27 is a graph illustrating current waveforms for
switched to the conducting state at t=0. If the DC bias
inductor 42 and load capacitor 44 are sufficiently large
to maintain the current idand voltage VL constant, then
the current is is easily solved by de?ning the intial condi
tions,
a ?rst set of load conditions.
FIG. 28 is a graph illustrating current waveforms for
a second set of load conditions.
15
FIG. 29 is a block diagram of the power converter
system illustrating the use of a current feed-back loop
with a derivative element.
FIG. 30 is a graph illustrating output current without 20 where 14 and V4) are constants. The solution to these
the use of derivative feed-back.
equations is
FIG. 31 is a graph illustrating output current with
derivative feed-back.
FIG. 32 is a schematic circuit diagram of a single
phase damping circuit.
25
FIG. 33 is a schematic circuit diagram of a three
phase R-C damping circuit.
FIG. 34 is a graph illustating the dissipated energy in
damping resistor RP.
FIG. 35 is a graph illustrating output current employ 30
and
ing damping circuit only.
FIG. 36 is a graph illustrating output current employ
ing both derivative feed-back and damping circuit.
i0 + id
Co
FIG. 37 is a graph illustrating output current without
ll
.
76-- E' sinmt + Id(l — coswt)
the use of either a damping circuit or derivative feed 35
back.
-
FIG. 38 is a block diagram of another control system
for the conversion apparatus.
Letting,
FIG. 39 is an illustrative graph of motor current
utilizing the control system of FIG. 38.
ix = Id(l - coswt), iv =
FIG. 40 is an illustrative graph of motor voltage
utilizing the control system of FIG. 38.
‘ -%
C
E’ sinmt
the current in the link can be written as,
DESCRIPTION OF THE PREFERRED
EMBODIMENT
45
To illustrate the principles of the present invention, a
series resonant circuit 38 is shown in FIG. 4 which can
be controlled to function as a DC resonant link. The
circuit 38 includes a direct current (DC) voltage source
is=io+id.
Typical waveforms for the currents i0, id, and is are
shown in graphs 45, 46, and 47 respectively, in FIG. 5.
As long as the voltage E’ remains positive, the link
current reaches zero and the load thyristor 43 is able to
commutate at t=t1. Unfortunately, however, in an ac
tual circuit with a ?nite inductor 42 and ?nite capacitor
power supply 39, a series resonant capacitor 40 (of
capacitance Co), a series resonant inductor 41 (of induc‘
tance L0), a DC bias current inductor 42 (of inductance
44, the current id continues to increase if E’ is positive
Ld), a load thyristor 43, and a load capacitor 44. The
and makes the commutation of load thyristor 43 very
capacitor 40 and inductor 41 are the resonant elements 55 dif?cult, as shown by graph 48 in FIG. 6. Because the
selected to resonate at a frequency consistent with the
resonant link current fails to reach zero during any
turn off capability of the load thyristor 43 and are rela
portion of the resonant cycle, it is impossible to turn off
tively small. The DC bias inductor 42 is a larger induc
the load thyristor 43.
tor which is controlled to support the DC bias current.
FIG. 7 shows an improved connection in which the
The currents in FIG. 4 are obtained from the following 60 DC bias inductor 42 is connected in parallel with the
equations:
resonant capacitance 40. As the voltage across the in
ductor 42 changes according to the capacitor voltage
V0, commutation of the thyristor'becomes possible be
cause the resonant current has an oscillation which is
0
did
E = LdT + VL
65
not growing, as shown by graph 49 in FIG. 8.
In order to prevent overcharging of the resonant
capacitor 40 during the zero current intervals, a circu
lating thyristor 50 and tapped inductor 41 can be uti
4,942,51 l
5
6
lized as shown in FIG. 9. The thyristor 50 is triggered to
circulate the current i0 whenever is becomes zero. This
zero current condition is also required to regulate the
output current of the inverter for pulse density modula
tion and will be described below.
'
FIGS. 10 and 11 show the current is and voltage VL
waveforms with and without use of the circulating
current thyristor 50, respectively. When a signal to stop
.
Thus far, it has been assumed that the source voltages
are essentially constant. Since the source voltages are,
in fact, alternating, the identity of the most positive and
most negative phase must be established before switch
ing of the source side bridge can commence. The selec
tion of the source voltages, utilizing a common three
phase bridge, are easily accomplished as shown in
FIGS. 15, 16, and 17. When positive, a large positive
?ring the load thyristor 43 occurs, a dead zone appears
in the source current waveform as shown by graph 50 in
FIG. 10. As a result, the average output voltage VL
does not change substantially and a large pulse of cur
rent appears when conduction of the load thyristor 43
commences again. Alternatively, for the case with the
voltage E’ is needed to cause the current is to increase.
The bridge thyristors 60-65 are triggered as shown in
circulating thyristor 50 present, the current is is readily
interrupted while the load thyristor 43 triggering signal
always positive, the con?guration of FIG. 17 regener=
is set to zero and a current im- ?ows during this period,
as shown by graphs 51 and 52 of FIG. 11.
heavy lines in FIG. 15 and supply positive voltage Vd to
the resonant current. FIG. 16 shows the zero voltage
mode and FIG. 17 shows the negative voltage mode.
These modes are used to decrease the current id. As is is
ates back to the AC source.
When the DC series resonant link circuit is used in a
three phase front end bridge circuit in conjunction with
In practice, the circulating thyristor 50 can be ?red
a three phase inverter circuit as shown in FIG. 18, and
not only when a stop signal for is appears, but can also 20 in further detail in FIG. 19, the pulses generated in the
function as a clipper for is and VL, in which case the
resonant circuit must be distributed to each inverter
resonance of the LC tank becomes quite stable. The tap
phase. The thyristors 66-71 in FIG. 19 function as a
ratio 11 (n< l) of the resonant inductance 41, shown in
distributor to switch or redirect the link current at the
FIG. 9, affects the sensitivity of the clipping ability of
instants where the current is is equal to zero. Since the
the circulating thyristor 50. If n is set to a large value, 25 circuit is resonant, this instant occurs when nearly zero
the overshoot of current is and the voltage VL increase
voltage exists across the thyristor so that the losses in
and the resonance tends to become unstable. On the
the thyristors are relatively small. Graphs 72, 73, and 74
other hand, when n is chosen very small (nearly zero),
in FIG. 20 show the pulse density distribution for each
the current is goes to zero rapidly whenever the voltage
phase in the output of the DC/AC side converter.
V; becomes equal to E and the necessary zero current 30
The distribution of the pulses to each phase as illus
cannot be attained.
trated
in FIG. 20 is automatically determined by com
In order to maintain control of the amplitude of the
pulses as illustrated by graph 49 in FIG. 8, regulation of
paring the current pulses with the instantaneous phase
as shown by graphs 53 and 55 in FIG. 12. Hence, cur
operated sychronized to the triggering signal of the
DC/AC converter thyristor ?ring instants.
currents. FIG. 21 shows the current references i1, and
the DC link current is is required. Graph 53 in FIG. 12
and graph 54 in FIG. 13 illustrate how the link current 35 izs, FIG. 22 shows the corresponding phase currents isa,
isb, and iss and the conducting thyristors in the con
is varies without and with regulation, respectively. In
verter. For example, the current references in and i2,
general, the average value of the current pulse is ap
correspond to is” and isb within the ?rst 60 degrees, at
proximately proportional to id. When E’ is large, is
which point thyristors 66, 67, and 71 are triggered. In
increases and id also increases, as shown by graphs 53
the
next 60 degrees, these currents correspond to --iss
40
and 55 in FIG. 12. After is reaches zero at t=t1, the load
and —iss and thyristors 71, 69, and 67 are triggered and
thyristor 43 turns off and the current id charges up the
so on. Accordingly, the same reference table is repeti
resonant capacitor 40 generally to a larger value than
tively used and makes the ROM table very small. The
that which existed on the capacitor before the previous
currents i1 and i; are detected from a current sensor 79
pulse. After each subsequent turn on of the load thy~
ristor 43, the current idand is pulses continue to increase 45 with sampling switch 80, as shown in FIG. 22, which is
rent regulation for this type of converter is mandatory.
Regulation of the DC inductor current is is accom
plished very easily by current feedback as shown in
The DC/AC converter thyristors are triggered to
reduce the maximum error of the three phase currents.
FIG. 14. A circuit 56 includes a three pole switch 57 50 Errors es, ch, as are obtained from e1, e2 depending upon
which may be connected to either a positive voltage
source 58, negative voltage source 59, or to a short
the chart shown in FIG. 23. FIG. 24 shows the possible
combinations of the e,,, e;,, and es for iss, isb, iss, respec
circuit condition for which the voltage E is equal to
zero. After comparing id with the current reference
Idref, the source voltage E is adjusted via the switch 57
to make the error small. For example, if the error ed=I
[inf-Id is positive, E is switched from V4 to zero or
—V,{; if ed is negative, it goes from —V,; to zero or Vd.
As the ability to control id also depends on E’
(=E—VL), the measured value of VL is used for this
purpose. While the load thyristor 43 is off, the DC bias
inductor 42 charges up the resonant capacitor 40 to a
negative polarity to prepare for conduction of the load
thyristor 43. The current is carries the energy from the
tively.
resonant circuit to the load or AC source depending
be triggered;
upon the polarity of V[_ and B. When E is negative,
(ii) the phase corresponding to the error with the
opposite polarity error is selected as the other trigger
energy ?ows back to the source and when VL is positive
the energy ?ows to the load.
As the sum of the errorssmust satisfy the relation
all the three errors clearly cannot have the same polar
ity. As the output circuit does not have any neutral line,
the current pulse should flow into the postive error
phase and ?ow out from the negative error phase.
Hence, the triggering principle is
(i) the thyristor in the phase having the larger error
out of the two phases of the same polarity is chosen to
ing phase.