190
ACTA ELECTROTEHNICA
Three-Level NPC Rectifier/Inverter Backto-Back Cascade with Capacitor Voltage
Balancing Circuit
R. CHIBANI, E.M. BERKOUK and M.S. BOUCHERIT
Abstract: An inductive clamping bridge for input DC voltages of multilevel inverter is proposed in this paper to eliminate capacitor
balancing problems in conventional three-level Neutral Point Clamped (NPC) Voltage Source Inverter (VSI). The proposed
configuration requires only one inductance and two series-connected switches and freewheeling diodes. It provides a fast and
flexible control of the inverter capacitor voltages, leads to a simpler implementation, and present high equalization efficiency.
Simulation results show the effectiveness of our methods.
Keywords- Multilevel inverter, NPC VSI, Lyapunov function control, Voltage balancing, Permanent Magnet Synchronous Machine.
1.
INTRODUCTION
The diode-clamped multilevel converter, also
called the neutral point clamped (NPC) converter,
prevailed in the 1980's and found its applications in
power factor correction, reactive power compensation,
adjustable speed motor drives, and unified power flow
control.
One of the drawbacks of this topology is the need
to control the neutral-point potential or the difference
between both capacitors’ voltages, to maintain a
balanced operation [1]. This imbalance causes
distortion in the output voltage and results in an
overvoltage across the switching. The causes of NP
potential drift can be non uniform switching device or
DC link capacitor characteristics or fluctuation due to
the irregular and charging and discharging in each
capacitor [2] [3] [4].
The voltage across the capacitor may grow or
decay so that the NP voltage fails to keep the half of the
DC link voltage. Therefore, an excessive high voltage
may be applied to the switching devices of DC link
capacitors and this affects the converter performance
due to the generation of uncharacteristic harmonics and
the presence of overvoltages across the semiconductor
switches.
Therefore, the choice of appropriate modulation
techniques and the development of advanced neutral
point potential control techniques are necessary to
overcome the NP potential problems.
Some solutions have been proposed, which are
based on redundant switching configurations [1], [5][12] or on the addition of zero-sequence voltage
components to the output voltage [6].
However, all these methods seem to be not always
useful in no-load or low-load operations, when the
supplied current tends to zero. In real systems, no-load
conditions determine almost always the loss of dc-link
capacitors voltages balance, owing to converter non
ideality. Unfortunately, these methods modify the
output voltage waveform. As the number of inverterlevels increases, the problem of capacitor balancing
becomes more complex and the solution very drastic.
The unbalance DC voltage problem can also be
solved by separate DC sources [3] or by adding
electronic circuitry. In [13] and [14], clamping bridges
based on transistors and resistors are proposed as a
solution to this problem. Disadvantages of this method
are the requirement for large power dissipating
resistors, high current switches, and thermal
management requirements. This method is best suited
for systems that are charged often with small currents.
This paper introduces a new voltage balancing
circuit for the DC capacitor voltage to compensate DClink capacitors voltages fluctuations in a NPC VSI,
when conventional balancing methods fail. The
organization of this paper is as follows. Section 2
develops the mathematical modelling of the DC-AC
converter (three-level NPC-VSI) and its Pulse Width
Modulation control strategy (PWM) using two bipolar
carriers. Section 3, provides the speed control of a
Permanent Magnet Synchronous Machine based on
sliding mode. The control of the three-level PWM
current rectifier by Lyapunov function using feedback
loops to regulate the average value of DC voltages and
the network currents are discussed in section 4.
Therefore, a clamping bridge control is introduced to
improve the performance of voltage balance strategy in
section 5. Finally, in the section 6, simulations will be
implemented to present a study of the phenomenon, to
Manuscript received June 27, 2010.
© 2010 – Mediamira Science Publisher. All rights reserved.
Volume 51, Number 3, 2010
⎧VAM = F11b .U c1 − F10b .U c 2
⎪
b
b
⎨VBM = F21 .U c1 − F20 .U c 2
⎪
b
b
⎩VCM = F31 .U c1 − F30 .U c 2
demonstrate the proposed method and to report the
effectiveness of this solution.
2.
THREE-LEVEL CASCADE
The proposed main circuit configuration of the
three-phase three-level double converter is shown in
Fig. 1. It consists of the three-level rectifier, the DC
link, and the three-level inverter.
191
(2)
The input currents of the three phases three-level
inverter using the load currents are given by the
following relations:
⎧id 1 = F11b .i1 + F21b .i2 + F31b .i3
⎪
b
b
b
⎨id 2 = F10 .i1 + F20 .i2 + F30 .i3
⎪i = i + i + i − i − i
⎩ d 0 1 2 3 d1 d 2
(3)
2.2. Control strategy of the inverter
This strategy uses two bipolar carriers ( U p1 , U p 2 ).
It is characterised by two parameters m the index
modulation and r the modulation rate. The complete
algorithm for the PWM method is described below:
Step 1: Determination of the intermediate voltages
⎧If Vrefk
⎪
⎪If Vrefk
⎨
⎪If Vrefk
⎪
⎩If Vrefk
Fig. 1. Structure of the three-level cascade.
2.1. Three-level NPC-VSI modelling
Figure 2 presents the basic structure of a threelevel neutral-point-clamped converter. Each of three
legs of the converter consists of four power switches,
four freewheeling diodes and two clamping diodes that
limit the voltage excursions across each device to half
the input DC-bus voltage.
≥ U p1 ⇒ Vk 1 = U c
< U p1 ⇒ Vk 1 = 0
≥ U p 2 ⇒ Vk 0 = 0
(4)
< U p 2 ⇒ Vk 0 = −U c
Step 2: Determination of the output voltage
VkM = Vk1 + Vk 0
3.
(5)
PERMANENT MAGNET SYNCHRONOUS
MACHINE MODELLING
In this part, we present the PMSM modelling and
its speed control by sliding mode.
The permanent magnet synchronous machine
model can be described by the following state equations
in the synchronous reference frame whose axis d is
aligned with the rotor reference frame as follows [13]
[14] [15] [16]:
Vds
Rs + Ld s − pΩ.Lq id
0
=
⋅ +
Vqs
pΩ.Ld
Rs + Lq s iq
pΦ f .Ω
(6)
Fig. 2. General structure of the three-phase three-level NPC VSI.
The optimal control law is given below:
⎧⎪ Bk1 = Bk 4
⎨
⎪⎩ Bk 2 = Bk 3
(1)
Bks is the control signal of TDks . TDks represent every
pair transistor-diode by one bi-directional switch.
The voltage of the three phases A, B, C relatively
to the middle point M and using the half leg connection
b
functions FkM
are given by VXM with x = A, B or C.
Fig. 3. Permanent Magnet Synchronous Machine speed control
scheme based on sliding mode.
ACTA ELECTROTEHNICA
192
Electromagnetic torque expressed
components of the currents is given as:
in
dq
Cem = p.Φ f .iq + ( Ld − Lq ).id .iq
(7)
J .( sω ) = Cem − Cr − Fc .Ω
(8)
The vector control of PMSM (fig.3) allows
separate closed loop control of both the speed and
currents, hence, achieving a similar control structure to
that of a separately excited DC machine [17] [18].
4.
THREE-LEVEL PWM CURRENT
RECTIFIER
The control system block of the three-level PWM
current rectifier by Lyapunov function is presented
below. It is composed of a network current controller
and the DC voltage control loop, which keeps the
average DC bus voltage constant and equal to a given
reference value.
The general structure of the three-level PWM
current rectifier is given on the fig.4.
Fig. 5. Control algorithm of the output DC voltage of the threelevel PWM current rectifier.
If we suppose the sinusoidal currents of the
network in phase with the corresponding voltages Vresk
and we neglect the rectifier losses and the Joule effect
in the network resistors R, we can write:
P = 3.Vr .I e = 2.U c .I red
I red =
(11)
3.Vr .I e
2.U c
(12)
We define the next values as follows:
Uc =
U c1 + U c 2
2
(13)
ic =
ic1 + ic 2
2
(14)
ich =
ich1 + ich 2
2
(15)
I red = ich + ic
(16)
For the voltage tracking objective, we define the
tracking error as:
εU = U C − U Cref
(17)
In order to ensure the convergence of the tracking
error to zero the Lyapunov function is chosen as:
V (ε U ) =
Fig. 4. Structure of the three-level PWM current rectifier.
1 2
εU
2
(18)
The derivative of the Lyapunov function is
computed as:
4.1. Voltage feedback control
•
For each phase k (k=1, 2 or 3) of the three-phase
network feeding, the rectifier considered can be
represented by a R,L circuit. Vresk is the voltage of one
phase k of the three-phase network and Vk is the
voltage of the leg k of the rectifier.
The voltage loop imposes the effective value of
the reference current of the network corresponding to
the power exchanged between the network and the
continue load (Fig.5).
For the voltage loop modelling, we use the
instantaneous power conservation principle. In this
principle, Pin is the input power of the rectifier and Pout
the output one.
3
1 dI 2
2
Pin = ∑ (Vresk .I resk − R.I resk
− L. resk )
dt
2
k =1
(9)
Pout = U c1 .(ich1 + ic1 ) + U c 2 .(ich 2 + ic 2 )
(10)
V ( ε U ) = (U C − U Cref )
1
( I red − I ch )
C
(19)
To guarantee the global asymptotic stability in the
voltage loop, we have:
Ie =
2.U C
. ⎡ I ch − K U .C .(U C − U C ref ) ⎤⎦
3.Ve ⎣
(20)
4.2. Current feedback control
We control the network current of the phase 1 and
2 by a sliding mode regulator. The algorithm of this
current loop is given on the fig.6. In this scheme, the
transfer function H ( s ) is expressed as follows:
H ( s) =
I resk
1
=
V
R + L.s
(21)
Volume 51, Number 3, 2010
Fig. 6. Control algorithm of the network current iresk of the threelevel PWM rectifier.
For the network currents tracking objective, we
define the tracking error ε i as:
ε i = iresk − irefk
(22)
In order to ensure the convergence of the tracking
error to zero, the Lyapunov function is chosen as:
1 2
(23)
εi
2
The derivative of the Lyapunov function is
computed as:
V (ε i ) =
•
•
193
By using a separate supply for each DC-link level,
the balancing issues are solved [3]. However, this
solution is expensive especially for more then threelevel. Another solution consists of adding electronic
circuitry. In [13] and [14], clamping bridges based on
transistors and resistors are proposed as a solution to
this problem.
Advantages are low cost and low complexity.
Disadvantages are high energy losses, high current
switches and costly design thermal management
requirements for large values. This method is best
suited for systems that are charged often with small
currents.
In order to remedy to the unbalance problem, we
suggest a solution which consists in establish a bridge
balancing between the rectifier and the intermediate
filter (fig.7). The aim of this use is to limit and stabilise
variations of the input DC voltages of the inverter.
•
V (ε i ) = (iresk − irefk ).(iresk − irefk )
(24)
To guarantee the global asymptotic stability in the
current loop, we have:
N
gk
=
1
2.U
2.π
⎡
⎤
⎢Vresk − R.I resk − I eω L 2 cos(ωt − (k − 1) 3 + Ki L(iresk − irefk ) ⎥
⎣
⎦
C
(25)
5.
CLAMPING BRIDGE
In this section, a clamping bridge control is
introduced to balance the two DC input voltages, avoid
NP potential drift and improve the performances of the
speed control of the permanent magnet synchronous
machine.
Several publications have discussed ways to solve
this balancing problem in three-level NPC-VSI [5-14].
The multitude of proposals (selection of appropriate
voltage vectors) implemented to ensure DC voltage
balancing can be broadly divided into two categories. In
the first category based on space vector realization,
redundant switching states of the converter are used
while in the second category using carrier-based pulse
width modulation (PWM) scheme, a zero sequence
voltage signal is added to the modulation signals. In
some schemes using zero sequence voltage to balance
DC capacitor voltages, knowledge of load power factor
(or direction of instantaneous power flow) is required
which is difficult to implement under transient
conditions, and in others, measurements of both
capacitor voltages and load currents (magnitudes or
polarities) are required.
Unfortunately, these methods modify the output
voltage waveform. However, as the number of inverterlevels increases, the problem of capacitor balancing
becomes more complex and the solution very drastic
and the voltage balancing through redundant state
selection limits the output voltage.
Fig. 7. Structure of the clamping bridge.
The capacitor voltage equalization clamping
bridge scheme has many advantages such as higher
equalization efficiency and a modular design approach.
The balancing algorithms search to efficiently
remove energy from a strong capacitor and transfer that
energy into a weak one until the capacitor voltage is
equalized across all capacitors.
Every switch T x (x=1,2,3,4) represent a pair
transistor-diode.
5.1. Switch control strategy of the clamping
bridge
Step 1: Deduction of the sign of the differences.
We use the following equations:
C.
d (U c 1 − U c 2 )
= ( i L 1 + ic 2 + i d 0 − i c 1 )
dt
(26)
Step 2: Deduction of the command of the transistors
⎧U c 2 > U c1 ⇒ T2 = 1; T1 = 0
⎨
⎩U c1 > U c 2 ⇒ T2 = 0; T1 = 1
6.
(27)
SIMULATION RESULTS
In order to validate the solution proposed
previously, we present simulation results for the threelevel PWM current rectifier – three-level NPC-VSI –
ACTA ELECTROTEHNICA
194
PMSM cascade. In the first case, the clamping bridge
will not be used in order to show the instability problem
of the two input DC voltages. In the second one, the
solution proposed is introduced to improve the
performances of DC voltages and PMSM.
7.
RESULTS AND DISCUSSIONS
Figure 8 shows the reference voltages and the two
carriers used for this strategy. We can see on this figure
that the voltage VAM has three levels (fig.9). Fig.10
show the output voltage VA and its harmonic spectrum
for m=12 (fig.11). The harmonics appear in carrier
bands with a frequency multiple of 2.m.f where m is the
index modulation and f is the frequency of the carrier
signal.
Fig.12 shows the voltage Uc and its reference
obtained by controlling the three-level PWM rectifier
controlled by sliding mode. This voltage follows
perfectly its reference (200V). The network current ires1
is in phase with the network voltage Vres1 (fig.13).
We show perfectly the problem of the unbalance
of the two DC voltages of the intermediate capacitors
bridge. The voltage Uc1 (fig.14) is increasing and the
voltage Uc2 (fig.15) is decreasing.
The characteristics of the drive of the PM
synchronous machine (Speed (fig.16), torque(fig.17)
and different currents (fig.18 and fig.19)) fed by a
three-level PWM current rectifier – three-level NPC
VSI cascade show that the undulations of the currents
id, iq and the electromagnetic torque are very important.
These results show the importance of the stability
of the input DC voltages of the inverter to have good
performances for the speed control of the PM
synchronous machine.
Fig.20 to 24 show the different input DC voltages
obtained by using the stabilisation bridge. We can see
that the output voltages of the rectifier (Uc1 and Uc2
(fig.20) stabilise around 200V. By using this technique
of stabilisation, we can remark that the undulations on
the performances (Speed (fig.21), Torque (fig.22) and
currents id (fig.23) and iq (fig.24)) of the PMSM
disappear and those performances are improved by
using the Clamping bridge.
Fig. 9. Voltage VAM.
Fig. 10. Output voltage VA.
Fig. 11. Harmonic spectrum of VA.
Fig. 8. Reference voltages and bipolar carriers.
Fig. 12. Voltage Uc and its reference.
Volume 51, Number 3, 2010
Fig. 13. Vres1, ires1 and its reference iref1.
Fig. 14. Voltage Uc1.
Fig. 15. Voltage Uc2.
195
Fig. 17. Electromagnetic torque.
Fig. 18. d axis current (id).
Fig. 19. q axis current (iq).
Fig. 20. Voltages Uc1 and Uc2.
Fig. 16. Speed and its reference.
ACTA ELECTROTEHNICA
196
8.
Fig. 21. Speed and its reference.
CONCLUSION
The present contribution intends to demonstrate
that permanent magnet synchronous machine control
based on sliding mode control when applied with a
three-level PWM current rectifier – Three-level PWM
NPC-VSI may contribute both for functional
performances improvement and attenuation of some
technological limitations. With a high number of semiconducting devices, current and voltage quality are
improved and weight reduced by avoiding heavy filters.
The input DC voltages are generated by a threelevel PWM current rectifier controlled by Lyapunov
function control. By this study, we have particularly
shown the problem of the stability and its effects on the
speed control of PMSM and the input DC voltages
sources of the inverter.
In the proposed topology, the voltage fluctuations
of the neutral point of a conventional NPC three level
inverter fed drive are avoided by switching the voltage
source between the two capacitors. The voltage
fluctuations of neutral point can be completely eliminated.
Furthermore, it has been demonstrated that the
proposed control scheme works well in maintaining an
equal voltage among the dividing capacitors used in the
converter. This can also be extended further to NPC VSI
of level more than three.
Fig. 22. Electromagnetic torque.
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197
Redha CHIBANI
Prof. El Madjid BERKOUK
Prof. Mohamed Seghir BOUCHERIT
Laboratoire de commande des processus
ECOLE NATIONALE POLYTECHNIQUE
10, Rue Hassen BADI
ELHarrach 16200
BP182, ALGER, ALGERIE
Fax:
(213) 21-52-29-73
E-mail: redha29@yahoo.fr, emberkouk@yahoo.fr,
ms_Boucherit@yahoo.fr
CHIBANI Rédha was born in Algiers, Algeria, in 1970. He received
the Engineer degree in 1993 from the National School of engineers
and technicians of Algeria, the Magister degree in electrical
engineering in 1999 and the Doctorate in 2007 from National
Polytechnic School of Algiers, Algeria. His current research interests
are in the area of electrical drives, power electronics and process
control.
BERKOUK El Madjid was born in 1968 in Algiers. He obtained
Engineer degree in Electrical Engineering from National Polytechnic
School of Algiers in 1991. He obtained respectively Master and PhD
in France in 1992 (Toulouse) and in 1995 (Paris). Since 1996, he is
with National Polytechnic School of Algiers. He is full professor in
Electrical Engineering. His researchers are in power electronics,
electrical drives and renewable energies. He is Author or Co-author
of more than three hundreds papers.
BOUCHERIT Mohamed Seghir was born in 1954 in Algiers. He
received the Engineer degree in Electrotechnics, the Magister degree
and the Doctorat d’Etat (PhD) in electrical engineering, from the
National Polytechnic School of Algiers, Algeria, in 1980, 1988 and
1995 respectively. Upon graduation, he joined the Electrical
Engineering Department of Polytechnic National School. He is a
Professor, member of Process Control Laboratory and his research
interests are in the area of electrical drives and process control.