Benha University 2st Semester Exam
Faculty of Engineering‐ Shoubra 25 ‐ May 2013
ECE 121: Electronics (I) Electrical Engineering Department Exam Model Answer
Duration : 3 hours
First Year Communications.  No. of questions: 5  Answer all the following questions  Total Mark: 100 Marks  Illustrate your answers with sketches when necessary.  The exam consists of three pages.  Examiners: Dr. Ehsan Abaas – Dr. Abdallah Hammad Question 1 (15 marks) Answer this question in the form of table. Choose the correct answer (only one answer is accepted). 1‐ The collector‐ emitter voltage is usually (a) Less than the collector supply voltage (b) Equal to the collector supply voltage (c) More than the collector voltage (d) Cannot answer 2‐ A small collector current with zero base current is caused by the leakage current of the (b) Collector diode (a) Emitter diode (c) Base diode (d) transistor 3‐ For the base biased circuit, if the transistor operates at the middle of the load line, a decrease of the base resistance will move the Q point (a) Down (b) Up
(c) Nowhere (d) Off the load line 4‐ When the Q point moves along the load line, VCE decreases when the collector current (a) Decreases (b) Stay the same
(c) Increases (d) Non of the above
5‐ For the emitter biased circuit, when the current gain increases from 50 to 300, the collector current (a) Decreases by factor of 6 (b) Increases by a factor of 6 (c) Remains almost the same (d) Is zero 6‐ For the emitter biased circuit, if the emitter resistance increases, the collector voltage VC (a) Decreases (b) Stay the same (c) increases (d) Break down the transistor 7‐ The collector voltage of the voltage divider bias circuit is not sensitive to the change of (a) Emitter resistance (b) Supply voltage
(c) Collector resistance (d) Current gain 8‐ If the emitter resistance doubles with the TSEB the collector current will (a) Stay the same (b) Increases (d) Drop in half
(c) Doubles 9‐ A coupling capacitor is (a) An dc open and ac short (b) An dc short (c) A dc short and an ac open (d) An ac open 10‐ The output voltage of CE amplifier is (a) Amplified (b) Inverted (c) 180o out of phase with the input (d) All of the above 11‐ When the emitter resistance RE doubles the ac emitter resistance re’ (a) Remains the same (b) Decrease
(d) Increases (c) Cannot be determined 12‐ The input impedance of the base decreases when (a) β decreases (b) β increases (c) Supply voltage increases (d) Into the base supply 13‐ If the load resistance increases in a zener regulator, the zener current (a) Decreases (b) Stays the same (c) Increases (d) = the source voltage/series resistance 14‐ The diode with a forward voltage drop of approximately 0.25 V is the (a) Step Recovery diode (b) Light emitting diode (c) Schottky diode (d) Photo diode 15‐ For the varactor diode, when the reverse voltage decreases, the capacitance (a) Stays the same (b) Decreases (d) Increases (c) Has more band with Page 1 of 12 Question 2 (20 marks) a‐ (6 marks) Explain, how could you implement AND and OR gates using diodes. 2 inputs AND gate: Truth Table Assume a diode barrier voltage of VD = 0.7 V.
There are four possible states, depending on the combination of input voltages. If at
least one input is at zero volts, then at least one diode is conducting and VO = 0.7 V. If
both V1 = V2 = 5 V
2 inputs OR gates Truth table The four conditions of operation of this circuit depend on various combinations of
input voltages. If V1 = V2 = 0, there is no excitation to the circuit so both diodes are off
and VO = 0. If at least one input goes to 5 V, for example, at least one diode turns on
and VO = 4.3 V, assuming VD = 0.7 V.
(The students may assume that the diode voltage drop = 0 V (ideal diode)) Page 2 of 12 b‐ (7 marks) A certain voltage doubler has 20 V rms on its input. What is the output voltage? Draw the circuit, indicating the output terminals and PIV rating for the diode. Vrms  20V
Vm  20 2  28.28V Vout  2Vm  56.56V
Full wave voltage doubler PIV = 2Vm Half Wave voltage doubler PIV = 2 Vm (7 marks) Design a clamper to perform the function indicated in figure (1). The design should be the following circuit: with arbitrary values of the R and C values Page 3 of 12 Question 3 (20 marks) a‐ (6 marks) For the zener circuit shown in figure (2). Given that , VZ1 = VZ2 = 5 V (assume that both zener diodes have a voltage drop of 0.7 V when they are forward bias. Explain the operation of the circuit, and then draw the o/p voltage waveform . Two back-to-back Zeners can also be used as an ac regulator.
For the positive half cycle
For the negative half
vi  (VZ 2  VD )
vi  (VZ 1  VD )
Z2 will be in the reverse bias region
(open circuit) so Z1 open as well
Z1 will be in the reverse bias region
(open circuit) so Z2 open as well
vo  vi
vi  (VZ 1  VD )
vo  vi
vi  (VZ 2  VD )
vi  (VZ 1  VD )
Z2 will operate in the reverse break
down region (battery model VZ2 = 5),
and Z1 is forward bias (0.7)
Then
Z1 will operate in the reverse break
down region (battery model VZ2 = 5),
and Z1 is forward bias (0.7)
Then
vo  (VZ 2  0.7)  5.7
vo  (VZ 1  0.7)  5.7
Page 4 of 12 b‐ (6marks) Drive an expression for the ac resistance of the diode Page 5 of 12 c‐
c (8 marks) For each of tthe followingg special purppose diodes, Explain the pphysical consstruction [nott more than
n 4 lines], how could you bias them, sstate some ap
pplications , aand finally drraw the IV characterristics LED, p
photo diode,, varactor an
nd Schottky diode LED Photodiode ● LED
D is a PN junction fabricate
ed from semiconductor materrials such as G
GaAs and GaP
P ● LED
D is connected in forward bias to emit light ● Wh
hen the diode
e is connected
d in forward b
bias , ele
ectrons and h
holes recombiine and release energy in the
e form of ligh
ht (Photons) ● Thee photon eneergy depends on the energgy gap of the materrial that fabricate the LED ● Thee output lightt from LED is directly proportional to th
he forwaard current LED vo
oltage drop iss in the rangee 1.5 → 2.5 ● The ph
hotodiode is aa PN junction
n that operatees in reverse b
bias ● The ph
hotodiode has a small tran
nsparent wind
dow that allow the light to sstrike the PN jjunction ● Normaal diode has aa constant revverse saturation current , but p
photodiode h
has a reverse current that iis directly propo
ortional to thee light intensiity 
Applications: Pho
oto detection , Optical switching m system applications and Burglar alarm
Appliccations: Indiccating ON/OFF conditions, Optical switch
hing applicatiions, 7 Segme
ents, Burglar aalarm system
m, Remote co
ontrol Schottky dio
ode 

It is formed byy joining a dop
ped semicond
ductor region
n (u
usually N typee) with a metaal such as (Silver , Platinum
m orr Gold)  The Schotttky diode has a very little junction capacitancce and it can o
operate at much higher frequenciees of 20 GHz o
or more  The reduceed junction caapacitance also results in aa much higher switching time Ap
pplication: Reectify high freequency signaals, sw
witching devicce in digital computers, an
nd low vo
oltage power supplies (VD = 0.25 V) Varctor 

A varactor diode is basically a reverse biaseed pn junction The capacitance p
parameters aare controlled
d by the method of dopingg Doping Level
Dop
ping Level
Distance from juncttion
Distance from jjunction
Abrupt
doping profile
Tunning range 4: 1
Hyper abru
upt
doping pro
ofile
Tunning rangee 10:1
li
i
di d i
di
i
i
i
Question 4 (20 marks) a‐ (10 marks) For the circuit shown in figure (3) Determine: (1) RC (2) RE
(3) RB
(4) VB VCE  VC  V E  7.6  2.4  5.2
VCE  0.2
The transistor operates in the active region. VBE  0.7  VB  VE
VB  VE  0.7  2.4  0.7  3.1V
VCC  VC  IC RC
RC 
VCC  VC 12  7.6

 2.2k
IC
2mA

80
 0.987
  1 81
I
2
IE  C 
 2.025mA
 0.987
VE  I E RE

RE 

VE
2.4

 1.185k
I E 2.025mA
Ic
2
 25 A
80
VCC  VB  I B RB
V  V 12  3.1
 356k
RB  CC B 
25 A
IB
IB 


Page 7 of 12 b‐ (10 marks) The signal source switch of figure (4) is closed, and the transistor base current becomes The collector characteristic of the transistor is displayed in figure (5). If VCC = 14 V and RDC = 1 kΩ. Graphically Determine: (1) ICQ and VCEQ (2) ic and vce (3) hFE at the Q point Page 8 of 12 Question 5 (25 marks) a‐ (15 marks) Drive the expression for Av, rin , rin stage , ro and ro stage for (1) Common emitter amplifier (2) Common collector amplifier 1‐ Common emitter: Finding the input resistance
∥
∥ Finding the voltage gain
∥
∥
Finding the output resistance
∞
(The student may also use the T model – It will give the same results) Page 9 of 12 2‐
2 Common collector ∥
∥
∥
∥
∥
∥
∥
∥
≅1 The stu
udents may aalso add the e
effect of Rs in
n calculation of ro and ro staage. (It will be
e ok as well)
b‐
b (10 markss) Based on the derivation
ns in part (a),, For the multti stage amplifier circuit sh
hown in fig (6
6), Calculate the numerical values for:: (1) Th
he overall vo
oltage gain (2) Th
he input impedance of this multistagee amplifier. DC A
Analysis Stage
e 2 Solving using approximatio
on 25 2..7
6.2 2.7
7
7.58 V 1 7
7.58 0.7
1.5
4.58 mA 26 mV
4
4.58 mA
5.6
668 Stage
e 1 proximation Solvving using app
25 56
56
56
. 1 7
12.5 0.7
12
.
26 mV
0
0.983 mA
.
AC Analysis Second Stage First Stage 680
5.668 Ω
∥
Stage 2
Stage 2
120 or ∥
∥
6.2 ∥ 2.7 ∥ 0.566 Stage 2
453 Ω Stage 2
119.9 ∥
26.4
12000 ∥ 453
12000 ∥ 453
436.52
26.4 436.52
.
Total gain ≅
.
Input Impedance Tr 1
Tr 1
∥
100 26.44
Tr 1
12000 ∥ 453 46.296 K ∥
Stage 1
∥
Tr 1
56 ∥ 56 ∥ 46.296 Stage 1
Stage 1
15.366 K Page 12 of 12