Freescale Semiconductor Application Note AN1907 Rev. 1, 6/2006 Solder Reflow Attach Method for High Power RF Devices in Plastic Packages By: Wendi Stemmons, Jerry Mason, Rich Wetz, Tom Woods, Mahesh Shah and David Runton INTRODUCTION This application note describes a process to solder attach the TO - 270 - 2 (Case 1265) as well as the TO - 270 WB - 4 (Case 1486) RF power plastic packages to a printed circuit board and heatsink assembly. There are several issues that are of concern that will be addressed here: semiconductor packages. The technology and material used (such as lead frame, die attach, wire bond and mold compounds) have been used in many applications and are known to provide robust semiconductor packages. These plastic packages have been used for power devices in harsh environments such as under - the - hood applications, without any reliability degradation. 1. Establishing a good thermal path between the device and heatsink by providing high quality solder joint between the device heat spreader and the power amplifier (PA) heatsink. 2. Obtaining a high quality solder joint between the device leads and the pads on the printed circuit board (PCB). 3. Maintaining the package integrity so that the leads or molded plastic are not overstressed. DISCUSSION A number of RF power devices are assembled in packages with standard JEDEC designations such as TO - 270. RF power packages, such as TO - 270 - 2 shown in Figure 1, were developed using technology similar to that used in low frequency power plastic packages. It is designed for an RF power device utilizing either silicon (LDMOS) or GaAs technology. The packaging technology is a conventional over - molded plastic process, commonly used in most © Freescale Semiconductor, Inc., 2006. All rights reserved. RF Application Information Freescale Semiconductor Figure 1. Typical RF Power Plastic Device Compatible for Solder Reflow Process (Case 1265, TO - 270 - 2) AN1907 1 PCB ASSEMBLY PROCESS For better electrical and thermal performance, Freescale highly recommends that the RF power device should be soldered to a PCB and the heatsink, as shown in Figure 2. The soldered interface at the heat spreader or the source contact provides a better heat dissipation path from the device to the heat spreader and then to the power amplifier (PA) heatsink, resulting in a lower junction temperature. The reduction in junction temperature typically is associated with an increased Mean - Time - to - Failure (MTTF) for the semiconductor devices. In addition, a soldered interface tends to provide improved grounding for the RF power device and, thus, improved electrical performance. For this kind of assembly process, two types of special PCB technologies are available. Figure 2. Reflow Pallet Assembly with Components and Soldering Fixture In one type of PCB assembly, the conventional PCB is attached to a full metal carrier or pallet that is the same size or slightly larger than the PCB. This is known as an Integrated Metal Carrier (IMC). The metal carrier is made from mostly copper or aluminum material. The metal is plated to provide a solderable surface. A copper pallet is typically plated with Ni followed by Au. The Au thickness is fairly small and is commonly known as Au flash. The aluminum material is typically plated with some type of zinc, followed by a Ni and Au top layer to prevent the Ni from oxidizing. The second type of PCB assembly is a forged or machined copper coin that is also plated with Ni and Au. The coin is usually designed to be larger than the RF power device and has two bolt holes on each side of the RF power device to bolt the coin to the PA heatsink. Both the coin and the pallet are attached to the under side of the PCB using either a high temperature solder or a conductive epoxy such as Ag- filled epoxy. If solder is used to attach the coin or the pallet to the PCB, the solder selected must have a higher melting temperature than the solder used for the components on the PCB. In either case, the PCB supplier will provide the PCB with either the IMC or coin already attached to it. The typical process flow is shown in Figure 3. The assembly shown in Figure 2 was created using the typical mounting process flow for a solder reflow process described in Figure 3. The gate and drain leads of the device are soldered to the pads on the top of the printed circuit board. The heat spreader of the device (source contact for an LDMOS device) is soldered to a machined cavity in the copper plate through a hole in the PCB. The bottom of the PCB is tin lead plated and attached to the copper plate. The biggest challenge in assembling any device is to overcome the accumulated tolerances in the stack - up between the device, PCB and copper plate and to maintain good thermal and electrical contact where necessary. If the device leads are too high above the PCB surface, they may not contact the solder paste, resulting in a weak or possibly non - existent solder joint. If the device is placed too low, the leads can be bent in an upward direction, resulting in possible delamination in the device. AN1907 2 RF Application Information Freescale Semiconductor PROCURE PCB WITH COIN OR PALLET ALREADY ATTACHED. ALTERNATIVELY, PROCURE PCB, PALLET OR COIN AND ATTACH TO PCB. SIZE THE CAVITY DEPTH OR PEDESTAL HEIGHT. INCORPORATE IT IN THE PALLET OR COIN DESIGN. SCREEN PRINT SOLDER PASTE ON THE PCB SOLDER PADS. (SCREEN PRINT) PLACE SOLDER PREFORM(S) IN THE CAVITY THROUGH PCB SLOTS. DISPENSE FLUX IF NECESSARY. (PICK AND PLACE) PLACE RF POWER DEVICE IN THE PCB SLOT, WHILE POPULATING THE PCB. (PICK AND PLACE) ADD THE FIXTURE TO KEEP THE RF DEVICE IN PLACE WHILE SOLDERING. (PICK AND PLACE) REFLOW THE SOLDER IN A CONVECTION REFLOW FURNACE. (REFLOW) REMOVE THE REFLOW FIXTURE AND EXAMINE THE SOLDER JOINTS. Figure 3. Process Flow for Board Assembly Mechanical tolerances for this device are tightly controlled. The manufacturing process results in a seating plane height of 0.041 ± 0.001″ (1.04 ± 0.03 mm). The seating plane height is defined as the distance from the bottom of the device lead to the bottom of the package case. There is also a co- planarity specification on these devices that indicates how level the leads must be with respect to the flange. The co- planarity limit is typically 0.041 ± 0.003″ (1.04 ± 0.07 mm). These tolerances are much tighter than those for any of the metal ceramic devices common in the industry for RF power application. It is also important to note that the leads of the plastic packages are made from 8 mil (0.20 mm) thick Cu- alloy rather than the 5 mil (0.13 mm) thick Fe- Ni alloy used in most metal ceramic packages. The increased thickness makes the leads for TO - 270 packages slightly stiffer than metal ceramic package leads. Typical tolerances of the PCB manufacturing process are ±10% of the PCB thickness. The tolerances of the machined cavity in the copper plate can be kept to ±0.003″ (0.08 mm) or better. The recess in the copper plate must be designed so that the device leads are not assembled in a bent- up position. We recommend using the square root of sum of squares method to define the cavity depth rather than using the worst - case tolerance stack - up analysis. Care should be taken in the design of the heatsink so that the leads are not bent to the point where this can contribute to delamination of the plastic mold compound from the leads. Tests were conducted to show that 0.015″ (0.38 mm) of lead tip deflection during three solder reflow operations will not cause any delamination of the mold compound from the lead frame. In addition to the cavity depth, the next important consideration is to ensure that the device is held in place with the device heat spreader in contact with the solder preform in the cavity and the leads are in contact with the solder paste on the PCB solder pads. The PCB solder pads are designed to be a minimum of 0.010″ (0.25 mm) larger than the corresponding lead sizes as shown in Figure 4. In multi - lead packages, where the lead spacing is very close, this distance may have to be reduced to ensure that the device leads can be soldered without getting shorted by solder bridging between two pads. AN1907 RF Application Information Freescale Semiconductor 3 Device Lead ÍÍÍÍÍÍÍÍÍ ÍÍÍÍÍÍÍÍÍ ÍÍÍÍÍÍÍÍÍ ÍÍÍÍÍÍÍÍÍ Solder Pad 3X 10 mils minimum Figure 4. Pad Size and Spacing for Gate and Drain Leads For the solder reflow process, a fixture is usually needed to (a) keep the device in place while running though the reflow furnace, (b) prevent the device from lifting off due to buoyancy forces when the solder melts and (c) keep the leads in contact with the solder paste so it forms a good solder joint. The fixture may also be required to apply force on the device to hold it in place and to prevent it from lifting off. The amount of force needed depends on the amount and type of solder used and the soldering process. RF power packages with the suffix “M” in the device part number are provided with SnPb plating on all of the exposed metal surfaces (source pad and gate and drain leads). Packages with the suffix “N” in the device part number are provided with matte- Sn finish on all exposed metal surfaces. These devices are RoHS compliant. RF power devices can be soldered using either SnPb - based solder or most of the Pb - free solders in use. In general, Freescale’s RF power devices are all being qualified to meet the JEDEC J - STD - 20 requirements of MSL 3 at 260°C package peak temperature. Each device data sheet identifies the package peak temperature and corresponding MSL rating of the device. Devices with an MSL rating below 1 are normally shipped in a vacuum pack. The handling, storage and use of such devices on the customer’s assembly floor should strictly adhere to JEDEC J - STD - 33. This standard defines the shelf life of the devices after they are removed from their vacuum pack. It also defines the conditions for drying such devices to reset the floor life after moisture exposure. It should be noted that the drying is typically specified at either 40°C, 90°C or 125°C. The baking time for an MSL 3 rated part at 40°C is in months, which is not very practical. In addition, the tape and the reel material in which RF power devices are shipped cannot withstand temperatures higher than 70°C. If such devices must be dried to reset the floor life, they should be removed from the tape and reel and dried in a tray that can handle a drying temperature of 125°C. In our experiment, we designed a PCB capable of powering the device in DC mode. In addition, we also machined a copper pallet with a cavity to accommodate the power transistor. The copper pallets were plated with approximately 1,000 to 1,500 micro - inches (25 to 38 micrometers) of electroless nickel. The pallets contain a recessed cavity that is overplated with 0.0003″ to 0.0005″ (8 to 13 micrometers) of tin plating to promote solder reflow. We used Sn plating because the pallets were going to be soldered very quickly after being received from the plating shop. For long - term storage and use, we recommend using Au plating over electroless Ni instead of Sn plating. In addition, we used a special fixture to push the leads down at the tips so that the lead tips were at a fixed distance above the top surface of the PCB and the leads were in contact with the solder paste during the reflow process. The cross-section of the assembly through the fixture and the TO-270-2 device is shown in Figure 5. To solder multiple components at one time, a simple fixture can be designed to secure all of the components during the reflow operation. In the soldering process, the PCB was first attached to the pallet. After that, the PCB was screen printed with Sn/Pb/Ag solder paste using a 0.006″ (0.15 mm) - thick stainless steel stencil. Prior to placing the device, two 0.002″ (0.05 mm)- thick solder preforms and two drops of no clean flux were set into the cavity. The device was then placed in the cavity through the slot in the PCB. The solder reflow fixture was then attached over the part. Finally, the entire assembly was placed in a convection reflow furnace. Clamp Deformed Copper Lead TO−270−2 Device Solder Paste Solder Preform PCB Figure 5. Concept of Fixture Holding the Leads Down on the PCB AN1907 4 RF Application Information Freescale Semiconductor In the reflow step, the board is preheated to 150_C and held constant for a minimum of one minute to stabilize the board temperature. A “spike” above the 183_C liquidus temperature achieves the best reflow characteristics. In order to achieve the appropriate temperature profile, the peak temperature and belt speed of the reflow furnace are determined based on the total mass of the assembly going through soldering. Maximum time above the liquidus temperature is 90 seconds with 30 to 60 seconds typical. Maximum time above 150_C is 5.5 minutes. Figure 6 shows a typical reflow profile used in the reflow of SnPb eutectic or similar solder. Similarly, Figure 7 shows the typical reflow profile for Pb- free solder. We want to emphasize that these profiles are shown here only as an example. The solder supplier should specify the required profile. After the reflow operation, the fixture is removed. The fixture can then be reused. An actual board assembly is shown in Figure 8. 250 Temperature ( C) 200 ° 150 100 50 0 0 100 200 300 Time (seconds) Figure 6. Typical Solder Reflow Profile for Sn63 or Similar Solder Figure 7. Typical Solder Reflow Profile for Pb - free (SnAgCu) Solder AN1907 RF Application Information Freescale Semiconductor 5 Figure 8. Complete PCB Assembly with TO - 270 - 2 (Case 1265) Package on a Cu Pallet RESULTS As mentioned earlier, the lead tips can be pushed down by 0.015″ (0.38 mm) maximum to provide a good solder joint. An evaluation was performed to determine whether bending the lead and then reflowing the components caused any delamination on the lead to plastic interface. The leads to plastic interface of several TO - 270 packages were examined using acoustic microscopy. The leads were then pushed down at the tips by 0.015″ (0.38 mm) using a fixture similar to the one used for the soldering operation. The assembly was then exposed to the standard reflow temperature profile three times. Figures 9 and 10 show sonoscan images of the interface on two typical parts before the reflow exposure. Figures 11 and 12 show sonoscan images of the interface on the same parts after three reflow exposures. There is no evidence of delamination in the parts caused by combined stresses of the soldering temperature exposure (a maximum of three times) and lead deflection of 0.015″ (0.38 mm). The device MRF9045NR1 in the TO - 270 - 2 package has a typical junction to case resistance (θ JC ) of 0.85_C/W. For the installation described here, the device is soldered down in the cavity of a copper pallet. The difference between the maximum temperature in the solder joint at the source contact and the maximum temperature in the die will be equal to 0.8 times the dissipated power (in watts). Once the ambient temperature in the base station is known, the system design can be evaluated to determine the temperature at the solder joint at the source contact of the device. The temperature rise, calculated above based on the power dissipation, can be added to determine the junction temperature. AN1907 6 RF Application Information Freescale Semiconductor Figure 9. Lead to Plastic Interface of Part A Prior to Lead Bending and Reflow as Viewed Using an Acoustic Microscope Figure 10. Lead to Plastic Interface of Part B Prior to Lead Bending and Reflow as Viewed Using an Acoustic Microscope Figure 11. Lead to Plastic Interface of Part A After Bending and Reflow (Three Times) as Viewed Using an Acoustic Microscope Figure 12. Lead to Plastic Interface of Part B After Bending and Reflow (Three Times) as Viewed Using an Acoustic Microscope AN1907 RF Application Information Freescale Semiconductor 7 How to Reach Us: Home Page: www.freescale.com E - mail: support@freescale.com USA/Europe or Locations Not Listed: Freescale Semiconductor Technical Information Center, CH370 1300 N. Alma School Road Chandler, Arizona 85224 +1 - 800 - 521 - 6274 or +1 - 480 - 768 - 2130 support@freescale.com Europe, Middle East, and Africa: Freescale Halbleiter Deutschland GmbH Technical Information Center Schatzbogen 7 81829 Muenchen, Germany +44 1296 380 456 (English) +46 8 52200080 (English) +49 89 92103 559 (German) +33 1 69 35 48 48 (French) support@freescale.com Japan: Freescale Semiconductor Japan Ltd. Headquarters ARCO Tower 15F 1 - 8 - 1, Shimo - Meguro, Meguro - ku, Tokyo 153 - 0064 Japan 0120 191014 or +81 3 5437 9125 support.japan@freescale.com Asia/Pacific: Freescale Semiconductor Hong Kong Ltd. Technical Information Center 2 Dai King Street Tai Po Industrial Estate Tai Po, N.T., Hong Kong +800 2666 8080 support.asia@freescale.com For Literature Requests Only: Freescale Semiconductor Literature Distribution Center P.O. Box 5405 Denver, Colorado 80217 1 - 800 - 441 - 2447 or 303 - 675 - 2140 Fax: 303 - 675 - 2150 LDCForFreescaleSemiconductor@hibbertgroup.com Information in this document is provided solely to enable system and software implementers to use Freescale Semiconductor products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. Freescale Semiconductor reserves the right to make changes without further notice to any products herein. Freescale Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters that may be provided in Freescale Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”, must be validated for each customer application by customer’s technical experts. Freescale Semiconductor does not convey any license under its patent rights nor the rights of others. Freescale Semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer purchase or use Freescale Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold Freescale Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Freescale Semiconductor was negligent regarding the design or manufacture of the part. Freescalet and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2006. All rights reserved. AN1907 AN1907 8Rev. 1, 6/2006 RF Application Information Freescale Semiconductor