Dynamical Modeling for Series-Parallel Resonant
Converter under Optimized Modulation
Zhiyu Cao, Junbing Tao, Norbert Fröhleke and Joachim Böcker
University of Paderborn
Power Electronics and Electrical Drives
33095 Paderborn, Germany
E-mail: {cao, tao, froehleke, Boecker}@lea.upb.de
Abstract — The series-parallel resonant converter is one of the
most popular topologies among resonant converters. In order to
achieve a further reduction of transistor switching losses, an
optimized modulation strategy was proposed and implemented
full digitally. This yields zero-current switching on one full
bridge leg and zero-voltage switching on the other leg. Costs of
the optimized modulation are the increased complexities in
modeling and controller design, because the state-of-the-art
extended describing function method is not suitable anymore.
In this contribution a novel dynamical modeling for seriesparallel resonant converters under optimized modulation is
presented, which is based on the sampled-data method. The
dynamic interaction between power circuit and the digital
optimized modulation control unit is considered properly. Dutyratio-to-output-voltage small-signal behaviors predicted by the
proposed model are verified by circuit simulation and
experimental results.
Index Terms — DC-DC power converters, modeling, pulse
frequency modulation, pulse width modulation
I.
INTRODUCTION
Due to the zero-voltage switching (ZVS) character and the
ability of utilizing parasitics, an increasing interest in
resonantly operated DC-DC converters in super-resonant
operation mode has been shown since it was introduced in the
1980s. Among the most applied two- and three-element
resonant converters, the series-parallel resonant converter
with LC output-filter (SPRC-LC) (Fig. 1.a) is one of the most
popular converter topologies because it takes on the desirable
characteristics of the series resonant converter (SRC) and the
parallel resonant converter (PRC), while removing their main
disadvantages [1].
The output voltage of a SPRC-LC is usually regulated by
switching frequency while keeping the duty ratio at one (Fig.
2.a), or regulated by phase shift while keeping the switching
frequency constant (Fig. 2.b). In this paper the both
modulation strategies mentioned above are called frequency
modulation (FM) and phase-shift modulation (PM),
respectively. In order to achieve a further switching loss
reduction, a novel modulation strategy combining switching
frequency and phase-shifted controls, which is called
optimized modulation (OM) in this paper, was developed and
implemented with an analog circuit in 1999 [2] [3] [4] and
full digitally on a single FPGA chip in 2012 [5], respectively.
Under OM ZVS is achieved on the leading leg and zero
current switching (ZCS) is achieved on the lagging leg (Fig.
978-1-4673-4355-8/13/$31.00 ©2013 IEEE
Fig. 1: (a) Circuit diagram of SPRC-LC and (b) its current and voltage
waveforms under optimized modulation.
1.b). Hence, the only remaining switching loss is the turn-off
loss of the ZVS leg. However, under OM the modeling and
control complexities are higher than SPRC-LC under FM or
PM [6].
As shown in Fig. 2 the plant dynamics under FM or PM are
determined only by the switching-frequency-to-outputvoltage transfer function or duty-ratio-to-output-voltage
transfer function of the power circuit, which can be deduced
by means of the extended describing function (EDF) method
1391
Fig. 2: Control structure of SPRC-LC under (a) frequency modulation, (b)
phase-shifted modulation and (c) optimized modulation
Fig. 3: Current and voltage waveforms of SPRC-LC in CVMs
[7] [8] and its extension [9]. Under OM (Fig. 2.c) the
switching frequency is automatically adapted to the resonant
current. Hence, the plant dynamics depend not only on the
power circuit, but also on digital OM control unit, the stateof-the-art EDF method cannot be applied.
In this contribution a straight forward dynamical model
based on the sampled-data method [10] [11] with
consideration of the interaction between power circuit and the
digital OM control unit [5] is introduced. A more detailed
introduction of the proposed dynamical model of SPRC-LC
under optimized modulation is given in Section II. In Section
III simulative and experimental verifications are provided.
Final conclusions are given in Section IV.
II.
DYNAMICAL MODEL OF SPRC-LC UNDER
OPTIMIZED MODULATION
The proposed dynamical modeling of SPRC-LC under OM
is set up according to the following five steps:
• Step 1: Define operation modes and constraints
• Step 2: Deduce equivalent circuit diagrams
(ECDs) and state space models for all time
intervals of each operation mode
• Step 3: Define boundary conditions between time
intervals
• Step 4: Calculate state variables and time instants
of boundary conditions under steady-state
operation
• Step 5: Injection of small-signal perturbation and
deducing the dynamical model
In the following subsections, the dynamical model of the
SPRC-LC under optimized modulation is deduced according
to this procedure.
A. Definition of Operation Modes and Constraints
As illustrated in Fig. 3 and Fig. 4, the SPRC-LC shows
under optimized modulation two continuous voltage modes
(CVM) and six discontinuous voltage modes (DVM).
Constraints of CVM1 are as follows:
• The switching instant τ1 is located before the
instant of voltage zero-crossing τ2
• At the instant of the voltage zero-crossing τ2:
|iLs(τ2)| ≥ niLf (τ2)
In DVM1, due to the discontinuous voltage across Cp, there
are four time intervals. Constraints of DVM1 are:
• The switching instant τ1 is located before the
instant of voltage zero-crossing τ2
• At the instant of the voltage zero-crossing τ2:
|iLs(τ2)| < niLf (τ2)
Constraints for other CVM and DVMs are deduced in a
similar way.
B. ECDs and State Space Model for Each Time Intervals
ECDs of SPRC-LC in CVM1 are given in Fig. 5.a to Fig.
5.c for the time intervals [0, τ1], [τ1, τ2] and [τ2, τ3],
respectively. In DVM1, the ECDs in time intervals [0, τ1], [τ1,
τ2] and [τ3, τ4] are identical to CVM1. During the time interval
[τ2, τ3] the parallel capacitor and the rectifier are shorted. In
order to avoid a division by zero in state equations, a very
small in series connected short-circuit resistance Rst is used
for this time interval in practical calculation (Fig. 5.d). The
subscript “p” in Lf,p, Cf,p, Rp, iLf,p, uCf,p, and Uout,p denotes the
transformation to the primary side of the transformer.
Inspection of the ECDs, state space models for each time
interval can be easily built in the linear form
1392
,
(1)
0
0
0 .
0
0
1/
where
0
0
0
0
,
,
,
,
2
,
The subscripts of “Cm,n” or “Dm,n” denote the nth time
interval of the mth continuous or discontinuous voltage mode.
Second time interval [τ1, τ2] of CVM1:
,
,
.
,
UTon and UDon denote equivalent voltage sources of the
linearized output characteristic of IGBT and forward
characteristic of freewheeling diodes (FWD) (Fig. 6). Rs
consists of the parasitic resistances of the series inductor, the
series capacitor, the transformer and the on-state equivalent
resistances of transistors (Fig. 6).
First time interval [0, τ1] of CVM1:
1
1
1
1
0
0
0
0
0
0
0
0
1
0
0
0
0
,
0
1
||
1
1/
0
0
0
0
(3)
.
(2)
1
1
0
0
0
0
0
0
0
0
1
0
,
,
,
||
,
,
1
0
||
0
0
0
0
0
Third time interval [τ2, τ3] of CVM1:
,
1
,
,
||
0
0
,
0
0
||
1
,
,
1393
,
||
0
||
,
,
Fig. 4: Current and voltage waveforms of SPRC-LC in DVMs
||
1
,
,
.
(4)
Fig. 6: Linearization of the IGBT output characteristic and forward
characteristic of FWD
The output matrix
and the feedforward matrix
are
identical for all time intervals and for all modes of operation:
0, 0, 0,
||
,1
,
(7)
0.
Fig. 5: ECDs of SPRC-LC in CVM1 and DVM1
In time intervals [0, τ1], [τ1, τ2], and [τ3, τ4] of DVM1, the
system matrix and the input matrix are identical to CVM1:
,
,
,
,
,
,
,
,
and
(5)
,
,
,
,
,
,
,
.
,
Third time interval [τ2, τ3] of DVM1:
1
1
0
0
0
0
0
0
0
0
0
0
1
0
,
0
0
0
0
0
,
,
||
0
,
||
1
||
||
,
0
0
0
0
0
1/
0
0
0
0
,
(6)
C. Boundary Conditions between Time Intervals
As shown in Fig. 3 the boundary conditions between time
intervals in CVM1 are as follows:
• τ1: Inverter output voltage changes from Udc to
zero due to the switching actions
• τ2: uCp(τ2) = 0
• τ3: iLs(τ3) = 0
In DVM1, as shown in Fig. 4, due to the discontinuous
voltage across Cp, there are four time intervals. Boundary
conditions of DVM1 are:
• τ1: Inverter output voltage changes from Udc to
zero due to the switching actions
• τ2: uCp(τ2) = 0
• τ3: |iLs(τ3)| = niLf(τ3)
• τ4: iLs(τ4) = 0
In other modes of operation boundary conditions between
time intervals can be deduced analogously.
D. Steady-State Solution
Due to the page limitation only the steady-state solution in
this section and the dynamical models in Section E and
Section F are deduced only for CVM1. For other modes of
operation the steady-state solution and dynamical models are
deduced identically.
The linear differential equations in (1) can be solved in a
time-domain using the general form:
e
.
We obtain
1394
e
.
(8)
e
e
Φ
,
(9)
,
where
(10)
.
Hence, in CVM1 the state variables at time instant τ1, τ2, τ3
and τ6 can be obtained as follows:
Φ
,
,
,
Φ
,
,
Φ
where
(12)
,
(13)
,
,
,
.
1
0
0
0
0
0
1
0
0
0
0
0
1
0
0
(14)
0
,
(17)
(18)
Solving the equation with the boundary conditions
where
,
0 0
0 0
0 0 .
1 0
0 1
.
,
,
(16)
Substituting (15) into (16) we obtain the steady-state
expression of the state variables at the beginning of a
switching period
Substituting (11) and (12) into (13) we obtain
,
,
,
,
(11)
,
,
,
,
Due to the symmetry of the current and voltages in the
resonant tank and the voltage-time and capacitor charge
balances of the output filter at steady-state condition we get
the equation
e
Φ
Φ
,
Φ
Φ
,
(15)
Fig. 7: Signals for pulse generation under digital OM control unit
1395
(19)
the relationship of the time instants
expressed as:
iLs
Digital OM
Contro Unit
D
PLECS circuit
simulation model
Scope
(uout)
1
∆d
,
Scope
(fs)
Time-domain dynamical model
,
(a)
Digital OM
Contro Unit
D
∆d
PLECS circuit
simulation model
,
frequency analyzer
model
,
Φ
dSPACE
FPGA Controller
Φ
Fig. 9: Experimental setup for small-signal measurement
,
,
,
,
,
,
,
(20)
,
,
,
,
,
,
3,
,
,
,
(25)
,
(26)
,
,
,
1
(27a)
,
,
1,
,
2,
,
3,
,
(27b)
where , denotes the state variables at the beginning of the
half switching period
(21)
numerically, the time instants , , and the state variable
under steady-state conditions are obtained [12].
The duty radio under steady-state condition is simply
calculated by
.
Φ
,
,
uout
,
(24)
,
SPRC-LC
Gate
signals
0
∆
,
small-signal measurement
Δd
are
According to analysis in Section D the state variables at the
time instants , , , , , are calculated by:
uout
Fig. 8: Simulation setup for (a) large-signal verification and (b)
D
,
(23)
,
,
(b)
Venable
Impedance Analyzer
and
,
0
.
,
(28)
Solving the equations (25) to (28) with the boundary
conditions
,
0
(29)
0
(30)
(22)
,
E. Dynamical Model of SPRC-LC with Ideal OM-Control Unit
Under optimized modulation, as shown in Fig. 7.a and Fig.
7.b, the plant dynamics can be deduced using the following
assumptions:
• The SPRC-LC is at steady-state condition before the
small signal injection
• The small perturbation of duty radio ∆ is injected at
, , .
time interval ,
• The operation mode is unchanged after the smallsignal injection.
As shown in Fig. 7.a the OM control unit is first assumed
in the
to be ideal, i.e. the amplitude of the sawtooth signal
half period (
,
1, …) equals always exactly one.
Under this assumption the slope of the sawtooth signal and
the time instants , , , and the state variables at the time
and
are obtained
instants
, ,
,
,
numerically.
Obviously the idealized OM control unit cannot be
physically implemented, because it is not causal. Hence, it is
only used as a reference for evaluating the distortion
introduced by the digital OM control unit.
F. Dynamical Model of SPRC-LC with Digital OM-Control Unit
With a digital OM control unit the slope of the sawtooth
of the last half
signal is calculated by the time duration ,
period (Fig. 7.b):
1396
102
101.5
Output voltage / V
101
100.5
100
99.5
Model (ideal OM)
Model (digital OM)
Simulation
99
98.5
0
0.5
1
1.5
Time / s
2
2.5
3
-3
x 10
Fig. 10: Step responses of the output voltage at the operation point
(3.87 Ω, 99 V) in the operation mode DVM3
Bode plot
|H(f)| / dB
50
40
30
Model
Simulation
Measurement
20
2
10
3
4
10
f / Hz
10
arg{H} / degrees
0
-100
-200
Model
Simulation
Measurement
-300
2
10
3
4
10
f / Hz
10
Fig. 11: Bode diagrams of the duty-ratio-to-output-voltage transfer
function at the operation point (3.87 Ω, 99 V) in the operation mode DVM3
(normalized to 1 V)
1
(31)
,
,
,
IV.
∆
,
(32)
Replacing (24) by (32) the dynamical behavior of the
SPRC-LC with the digital OM control unit is obtained by
means of an identical procedure introduced in the last section.
The final duty-cycle-to-output transfer function is obtained
via linearizing equation (27) and its boundary conditions.
III.
The simulation setups for large- and small-signal
measurements are illustrated in Fig. 8. The SPRC-LC is
modeled by the power electronic toolbox PLECS. The digital
OM control unit and the frequency analyzer are modeled by
Simulink.
In order to verify the proposed model with measurements
an experimental setup is built. As shown in Fig. 9 the real
power circuit is applied in the experimental test bed. A
dSPACE® rapid control prototyping system (RCP) is applied
for pulse generation. The steady-state operation point is set by
switching frequency and duty radio directly. The smallsignal perturbation ∆
∆ cos
is generated by a
Venable impedance analyzer and input to the RCP via a high
speed analog-digital converter (ADC) with a conversion time
of 100 ns. In order to minimize the measurement error
introduced by the computing latency of the RCP, synthesis of
the final duty radio
∆ and generation of the gate
signals are implemented on the FPGA card. Hence the total
time latency from input of the analog signal ∆ to output of
the gate signals is less than 200 ns, which introduces no
visible phase delay in a measurement range from 100 Hz to
10 kHz. Due to the constraints of the available load resistors
the experimental measurements are performed with a
204 V.
downscaled converter input voltage of
As an example time-domain small-signal step response and
the Bode plots of duty-ratio-to-output-voltage transfer
functions at the operation point (3.87 Ω, 99 V) in DVM3 are
given in Fig. 10 and Fig. 11, respectively. Comparison results
show:
• The output voltage small-signal step responses of
SPRC-LC with ideal and with digital OM control
unit have a good agreement (Fig. 10). That means no
additional dynamical distortion is introduced by
means of the digital OM control unit proposed in [5].
• Good agreement among the proposed model,
simulation and measurement, i.e. high modeling
accuracy.
SIMULATIVE AND EXPERIMENTAL VALIDATION
For validation of the time-domain steady-state modeling
and comparison with frequency-domain modeling techniques,
a SPRC-LC prototype with a rated input voltage of 400 VAC,
a rated output voltage of 500 V and a rated output current of
80 A is applied.
CONCLUSION
SPRC-LC under OM reduces the switching losses and
required switching frequency range for output voltage
regulation. However its dynamic characteristics cannot be
modeled by means of the state-of-the-art EDF method or its
extension.
In this contribution a novel dynamical model for SPRC-LC
with consideration of the interaction between the power
circuit and digital OM control unit is introduced and verified
by simulation and experimental measurements. Validation
results indicate high modeling accuracy. By means of the
proposed dynamical model the control design for SPRC-LC
under optimized modulation can be easily performed by
means of standard frequency-domain design methods.
The comparison of the output voltage step responses of the
SPRC-LC in Fig. 10 indicates, that the behavior of the in [5]
proposed digital OM control unit is near to an ideal OM
1397
control unit: low distortion in the sawtooth signal and high
response to resonant current frequency variation are achieved
at the same time. The behavior of the proposed digital OM
control unit is identical as an ideal one.
converter, in 'Power Electronics Specialists Conference, 2004.
PESC 04. 2004 IEEE 35th Annual', pp. 2461 - 2466.
[12] C. T. Kelley, 'Solving Nonlinear Equations with Newton’s
Method', Society for Industrial and Applied Mathematics,
2003.
ACKNOWLEDGMENT
The research leading to these results has received funding
from the European Union Seventh Framework Programme
(FP7/2007-2013) under grant agreement number 232377.
Particularly, the authors would like to thank C. Gmünder, R.
Dörig (Regatron AG, Rorschach, Switzerland), our student
assistants and all project partners.
REFERENCES
[1]
R. Steigerwald, 'A comparison of half-bridge resonant
converter topologies', IEEE Transactions on Power
Electronics 3 (2), pp. 174-182, 1988.
[2]
H. Pinheiro, P. Jain and G. Joos, 'Self-sustained oscillating
resonant converters operating above the resonant frequency',
IEEE Transactions on Power Electronics 14 (5), pp. 803 -815,
1999
[3]
H. Aigner, 'Method for Regulating and/or Controlling a
Welding Current Source with a Resonance Circuit', US Patent
(No. US 6,849,828 B2), 2005.
[4]
F. Cavalcante, 'High Output Voltage Series-Parallel Resonant
DC-DC Converter for Medical X-Ray Imaging Applications',
PhD thesis, Swiss Federal Institute of Technology Zurich,
2006.
[5] J. Tao, Z. Cao, M. Sun, N. Fröhleke, J. Böcker, "Full Digital
Implementation of an Optimized Modulation Strategy for
Series-Parallel Resonant Converter," in Proc. of the PCIM
Europe Conf., Nürberg, Germany, 2012
[6]
Z. Cao, F. H. Nzeugang, N. Fröhleke and J. Böcker, "A
comparative study of series-parallel resonant converter by
using different modulation strategies", in Proc. of 37th Annual
Conference of the IEEE Industrial Electronics Society
(IECON 2011), Melbourne, Australia, 2011
[7]
E. X. Yang, F. C. Lee and M.M. Jovanovic, 'Small-Signal
modeling of LCC resonant converter', in Proc. of Power
Electronics Specialists Conference, pp. 941-948, 1992.
[8]
E. X. Yang, Extended Descrbing Function Method for SmallSignal Modeling of Resonant and Multi-Resonant Converters,
Ph.D. Thesis, Virginia Polytechnic Institute and State
University, 1994..
[9]
Z. Cao, F. H. Nzeugang, J. Tao, N. Fröhleke and J. Böcker,
"Novel Dynamical Modeling for Series-Parallel Resonant
Converter", in Proc. of 21th IEEE International Symposium
on Industrial Electronics (ISIE2012), Huangzhou, China, 2012
[10] G. C. Verghese, M. E. Elbuluk, and J. G. Kassakian, A
General Approach to Sampled-Data Modeling for Power
Electronic Circuits, IEEE Transactions on Power Electronics,
PE-1(2), pp. 76 -89, 1986.
[11] M. Youssef, P. Jain and H. Pinheiro, A reduced order
sampled-data dynamic model for a series-parallel resonant
1398