Load-Rejection Overvoltage Test Plan1 Purpose

Load-Rejection Overvoltage Test Plan
The purpose of this test is to verify the effects of the DR system on overvoltage on the Area EPS when
switching action creates a generation-load island. The EUT is tested at various output power and load
combinations including the minimum expected load in field applications.
This test procedure is designed to be universally applicable to all DRs, regardless of output power factor.
Any default reactive power compensation by the EUT should remain on during the test. Where the EUT
manufacturer requires an external or separate transformer, the transformer is to be connected between
the EUT and the resistive load specified in figure 1 and is to be considered part of the product being
tested. Alternatively, a mutually-coupled inductor with the equivalent impedance matching that of the
specified transformer could be connected between the EUT and the resistive load.
Figure 1: Test Circuit
a) For a single-phase EUT, the test circuit shall be configured as shown in Figure 1. The neutral
connection (grounded conductor) of the resistive load, the simulated area EPS, and the EUT shall
be unaffected by the operation of switch S3. For a multiphase EUT, the balanced load circuit
shown in figure 1 is to be applied between each phase to neutral for a four-wire configuration or
between phases for a three-wire configuration. Switch S3 shall be gang-operated and multi-pole.
Switches S1 and S2 are for setup purposes only, and not required.
b) Connect the EUT according to the instructions and specifications provided by the manufacturer.
c) Set all EUT input source parameters to the nominal operating settings or as necessary, to provide
the desired output power ±2%. Set the input source to the highest operating or Vmpp(max) value
for the EUT. For tests requiring less than 100% EUT nameplate output power, reduce the power
at the EUT, if the capability is available. Alternatively, the DC power to the EUT may be limited.
d) Set (or verify) all EUT parameters to the nominal operating settings.
e) Set the EUT (including the input source as necessary) to provide the desired output power ± 2%.
f) Adjust to the load resistance so that the load power is within 2% of the desired value. See Table
g) Record all applicable settings.
h) Set the Simulated EPS to the EUT nominal voltage ± 2% and nominal frequency ± 0.1 Hz.
i) Close switch S1, switch S2, and switch S3, and wait until the EUT produces the desired power
j) Open switch S3 and record the voltage over time values across the load until the EUT ceases to
energize the load. Measure the voltage measurement as close to the inverter output terminals as
possible. This test is to be performed for the following combinations of EUT output and load. For
This test plan is based on and derived from the load rejection overvoltage test plan in development by the Forum for
Inverter Grid Integration Issues (FIGII), and refined based on NREL/SolarCity CRADA testing.
all of these combinations, a value of 100% is taken to mean 100% of the EUT’s nameplate rating.
The “Yes” or “No” entries indicate whether that test is to be performed.
k) The tests for each output/load combination should be repeated for a total of 5 samples each,
ensuring that switch S3 is opened at different portions on the line cycle.
Note: For the purposes of this test procedure only, the 300 second countdown timer for the inverter to
return to service may be turned off in order to accelerate testing time.
Table 1: Tests to be performed
Load power (%
of EUT rated
EUT output▼
Where the EUT requires a separate test input source to conduct this test, that source shall be capable of
supplying at least 150% of the maximum input power rating of the EUT over the entire range of EUT input
The test and measurement equipment shall record each phase current and each phase-to-neutral or
phase-to-phase voltage, as appropriate, to determine fundamental frequency real and reactive power flow
over the duration of the test. Anti-aliasing filters and sampling frequencies appropriate to the
measurement of the fundamental frequency component and higher harmonics shall be applied. A
sampling frequency of at least 15 kHz is required for load voltage and current measurements. The
minimum measurement accuracy shall be 1% or less of rated EUT nominal output voltage and 1% or less
of rated EUT output current.
Non-inductive resistors shall be utilized in the test circuit. Power ratings of resistors should be
conservatively chosen to minimize thermally induced drift in resistance values during the course of the
The EUT shall be programmed with the Companies’ interim or full voltage and frequency disturbance
settings, if able.
A voltage-duration curve will be created using sampled instantaneous voltage measurements during the
complete trip time of the inverter. The voltage-duration curve, as shown in Figure 2, is a plot of all points
(voltage, duration) derived from this process.
Method 1 – Total Duration Above Voltage Levels
The number of voltage measurements above those provided in Table 2 is multiplied by the sample
interval, resulting in that voltage level's total duration.
Method 2 – Total Continuous Duration Above Voltage Levels
The number of voltage measurements above those provided in the following table until the voltage
measurements remain below the voltage level for at least ¼ of a cycle, multiplied by the sample interval,
resulting in that voltage level’s total continuous duration.
Hawaiian Electric, Maui Electric, and Hawai’i Electric Light are collectively “the Companies”. Manufacturer should
consult each Company for grid specific settings that may or may not supersede requirements defined in Rule 14H.
Table 2: Voltage Levels
Instantaneous Voltage
(% of nominal peak
Figure 2 Method 1 is derived by summing t1, t2, t3 for the "redline" voltage level. Method 2 is derived by the duration
of tcontinuous
An area EPS source means any source capable of maintaining an island within the recommended voltage
and frequency window. An engine-generator with voltage and frequency control and without islanding
protection can be considered an area EPS source for the purpose of this test. However, because of the
uncertainty associated with the need to sink both real and reactive power from the DR, this test can be
performed most conveniently with an area EPS connection, rather than a simulated area EPS. Tests at
NREL will be conducted using a unidirectional power electronic AC voltage source. A shunt resistive load
bank will be connected between the AC source and switch S3 to absorb the EUT power.
The maximum recorded voltages may prove useful in area EPS system protection coordination studies
and should be presented with other EUT product literature.