OPA211-EP
www.ti.com.cn
ZHCS969 – JUNE 2012
1.1nV/√Hz噪
噪声、低功耗、精准
运算放大器
查询样品: OPA211-EP
特性
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低电压噪声：1kHz 时为 1.1nV/√Hz
输入电压噪声：
80nVPP（0.1Hz 至 10Hz）
）
总谐波失真 (THD)+N：
：-136dB (G=1,f=1kHz)
偏移电压：180μV（
（最大值）
偏移电压漂移：0.35μV/°C（
（典型值）
低电源电流：每通道 3.6mA（
（典型值）
单位增益稳定
增益带宽产品：
80MHz (G=100)
45MHz (G=1)
转换率：27V/μs
16 位稳定时间：700ns
宽电源范围：
±2.25V 至 ±18V，
，或者 +4.5V 至 +36V
轨至轨输出
输出电流：30 mA
应用范围
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锁相环路 (PLL) 环路滤波器
低噪声、低功耗信号处理
16 位模数转换器 (ADC) 驱动器
数模转换器 (DAC) 输出放大器
有源滤波器
低噪声仪器放大器
超声波放大器
专业音频前置放大器
低噪声频率合成器
红外检测器放大器
水诊器放大器
地音探听器放大器
医疗应用
支持国防、航空航天、和医疗应用
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(1)
受控基线
一个组装/测
测试场所
一个制造场所
军用温度范围 (-55°C/125°C) 内可用
延长的产品使用寿命周期
延长产品的变更通知
产品追溯性
(1)
可提供额外温度范围-请与厂家联系
说明
OPA211 系列精准运算放大器用一个只有 3.6mA 的电源电流实现极低 1.1nV/√Hz噪声密度。 这个系列产品还提供
轨到轨输出摆幅，这大大增加了动态范围。
OPA211 系列产品极低的电压和低电流噪声、高速度、和宽输出摆幅使得这些器件成为 PLL 应用中环路滤波放大
器的出色选择。
在精准数据采集应用中，OPA211 运算放大器系列产品在整个 10V 输出摆幅内实现 16 位精度所需的稳定时间为
700ns。 这个交流性能，与温度范围内只有 125μV 的偏移和 0.35μV/°C 的漂移组合在一起，使得 OPA211 成为驱
动高精度 16 位模数转换器 (ADC) 或者缓冲高分辨率数模转换器 (DAC) 输出的理想选择。
OPA211 可在 ±2.25V 至 ±18V 的宽双电源范围，或者 +4.5V 至 +36V 的单电源范围内运行。
OPA211 采用小型微型小外形尺寸 (MSOP)-8 封装。 这个运算放大器的额定温度范围 TA=-55°C 至 +125°C。
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
UNLESS OTHERWISE NOTED this document contains
PRODUCTION DATA information current as of publication date.
Products conform to specifications per the terms of Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
版权 © 2012, Texas Instruments Incorporated
English Data Sheet: SBOS638
OPA211-EP
ZHCS969 – JUNE 2012
www.ti.com.cn
INPUT VOLTAGE NOISE DENSITY vs FREQUENCY
Voltage Noise Density (nV/ÖHz)
100
10
1
0.1
1
10
100
1k
10k
100k
Frequency (Hz)
PACKAGE/ORDERING INFORMATION (1)
(1)
TA
PACKAGE
ORDERABLE PART
NUMBER
PACKAGE MARKING
VID NUMBER
-55°C to 125°C
MSOP-8 - DGK
OPA211MDGKTEP
OBCM
V62/12619-01XE
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or visit the
device product folder at www.ti.com.
PIN CONFIGURATIONS
OPA211
MSOP-8
NC
2
(1)
NC denotes no internal connection.
(2)
Shutdown function:
(1)
1
8
Shutdown
-IN
2
7
V+
+IN
3
6
OUT
V-
4
5
NC
•
Device enabled: (V–) ≤ VSHUTDOWN ≤ (V+) – 3V
•
Device disabled: VSHUTDOWN ≥ (V+) – 0.35V
(2)
(1)
Copyright © 2012, Texas Instruments Incorporated
OPA211-EP
www.ti.com.cn
ZHCS969 – JUNE 2012
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ABSOLUTE MAXIMUM RATINGS (1)
Over operating free-air temperature range (unless otherwise noted).
Supply Voltage
VS = (V+) – (V–)
Input Voltage
Input Current (Any pin except power-supply pins)
VALUE
UNIT
40
V
(V–) – 0.5 to (V+) + 0.5
V
±10
mA
Output Short-Circuit (2)
Continuous
Operating Temperature
(TA)
–55 to +125
°C
Storage Temperature
(TA)
–65 to +150
°C
Junction Temperature
(TJ)
200
°C
Human Body Model (HBM)
3000
V
Charged Device Model (CDM)
1000
V
ESD Ratings
(1)
(2)
Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not supported.
Short-circuit to VS/2 (ground in symmetrical dual supply setups), one amplifier per package.
THERMAL INFORMATION
OPA211
THERMAL METRIC (1)
DGK
UNITS
8 PINS
θJA
Junction-to-ambient thermal resistance (2)
θJCtop
Junction-to-case (top) thermal resistance (3)
71.2
θJB
Junction-to-board thermal resistance (4)
104.9
ψJT
Junction-to-top characterization parameter (5)
11.5
ψJB
Junction-to-board characterization parameter (6)
103.4
θJCbot
Junction-to-case (bottom) thermal resistance (7)
N/A
(1)
(2)
(3)
(4)
(5)
(6)
(7)
184.9
°C/W
有关传统和全新热度量的更多信息，请参阅 IC 封装热度量 应用报告 （文献号：SPRA953）。
在 JESD51-2a 描述的环境中，按照 JESD51-7 的规定，在一个 JEDEC 标准高 K 电路板上进行仿真，从而获得自然对流条件下的结至环
境热阻抗。
通过在封装顶部模拟一个冷板测试来获得结至芯片外壳（顶部）的热阻。 不存在特定的 JEDEC 标准测试，但可在 ANSI SEMI 标准 G3088 中找到内容接近的说明。
按照 JESD51-8 中的说明，通过在配有用于控制 PCB 温度的环形冷板夹具的环境中进行仿真，以获得结至电路板的热阻。
结至顶部的特征参数，( ψJT)，估算真实系统中器件的结温，并使用 JESD51-2a（第 6 章和第 7 章）中描述的程序从仿真数据中提取出该
参数以便获得 θJA。
结至电路板的特征参数，(ψJB)，估算真实系统中器件的结温，并使用 JESD51-2a（第 6 章和第7 章）中描述的程序从仿真数据中提取出该
参数以便获得 θJA 。
通过在外露（电源）焊盘上进行冷板测试仿真来获得结至芯片外壳（底部）热阻。 不存在特定的 JEDEC 标准测试，但可在 ANSI SEMI
标准 G30-88 中找到了内容接近的说明。
Copyright © 2012, Texas Instruments Incorporated
3
OPA211-EP
ZHCS969 – JUNE 2012
www.ti.com.cn
ELECTRICAL CHARACTERISTICS: VS = ±2.25V to ±18V
BOLDFACE limits apply over the specified temperature range, TA = –55°C to +125°C.
At TA = +25°C, RL = 10kΩ connected to midsupply, VCM = VOUT = midsupply, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
±20
±100
μV
OFFSET VOLTAGE
Input Offset Voltage
VOS
VS = ±15V
Over Temperature
Drift
vs Power Supply
±180
dVOS/dT
PSRR
VS = ±2.25V to ±18V
0.1
Over Temperature
µV
μV/°C
0.35
0.5
μV/V
3
μV/V
INPUT BIAS CURRENT
Input Bias Current
Offset Current
IB
VCM = 0V
±50
±200
nA
IOS
VCM = 0V
±20
±150
nA
en
f = 0.1Hz to 10Hz
80
nVPP
f = 10Hz
2
nV/√Hz
f = 100Hz
1.4
nV/√Hz
f = 1kHz
1.1
nV/√Hz
f = 10Hz
3.2
pA/√Hz
f = 1kHz
1.7
pA/√Hz
NOISE
Input Voltage Noise
Input Voltage Noise Density
Input Current Noise Density
In
INPUT VOLTAGE RANGE
VS ≥ ±5V
(V–) + 1.8
(V+) – 1.4
VS < ±5V
(V–) + 2
(V+) – 1.4
VS ≥ ±5V, (V–) + 2V ≤ VCM ≤ (V+) – 2V
114
120
dB
VS < ±5V, (V–) + 2V ≤ VCM ≤ (V+) – 2V
108
120
dB
Differential
20k || 8
Ω || pF
Common-Mode
109 || 2
Ω || pF
Common-Mode Voltage Range
Common-Mode Rejection Ratio
VCM
CMRR
V
V
INPUT IMPEDANCE
OPEN-LOOP GAIN
Open-Loop Voltage Gain
Over Temperature
AOL
(V–) + 0.2V ≤ VO ≤ (V+) – 0.2V,
RL = 10kΩ
114
130
dB
AOL
(V–) + 0.6V ≤ VO ≤ (V+) – 0.6V,
RL = 600Ω
110
114
dB
AOL
(V–) + 0.6V ≤ VO ≤ (V+) – 0.6V,
IO ≤ 15mA
110
dB
AOL
(V–) + 0.6V ≤ VO ≤ (V+)–0.6V,
15mA < IO ≤ 30mA
103
dB
FREQUENCY RESPONSE
Gain-Bandwidth Product
G = 100
80
MHz
G=1
45
MHz
27
V/μs
VS = ±15V, G = –1, 10V Step, CL = 100pF
400
ns
0.0015% (16-bit)
VS = ±15V, G = –1, 10V Step, CL = 100pF
700
ns
Overload Recovery Time
G = –10
500
ns
G = +1, f = 1kHz,
VO = 3VRMS, RL = 600Ω
0.000015
%
–136
dB
Slew Rate
Settling Time, 0.01%
Total Harmonic Distortion + Noise
4
GBW
SR
tS
THD+N
Copyright © 2012, Texas Instruments Incorporated
OPA211-EP
www.ti.com.cn
ZHCS969 – JUNE 2012
ELECTRICAL CHARACTERISTICS: VS = ±2.25V to ±18V (continued)
BOLDFACE limits apply over the specified temperature range, TA = –55°C to +125°C.
At TA = +25°C, RL = 10kΩ connected to midsupply, VCM = VOUT = midsupply, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
RL = 10kΩ, AOL ≥ 114dB
RL = 600Ω, AOL ≥ 110dB
IO < 15mA, AOL ≥ 110dB
TYP
MAX
UNIT
(V–) + 0.2
(V+) – 0.2
V
(V–) + 0.6
(V+) – 0.6
V
(V–) + 0.6
(V+) – 0.6
OUTPUT
Voltage Output
VOUT
Short-Circuit Current
ISC
Capacitive Load Drive
+30/–45
CLOAD
Open-Loop Output Impedance
See Typical Characteristics
ZO
f = 1MHz
V
mA
pF
Ω
5
SHUTDOWN
Shutdown Pin Input Voltage (1)
Device disabled (shutdown)
(V+) – 0.35
V
Device enabled
(V+) – 3
V
Shutdown Pin Leakage Current
1
μA
Turn-On Time (2)
2
μs
Turn-Off Time (2)
3
Shutdown Current
Shutdown (disabled)
1
μs
20
μA
±18
V
4.5
mA
6
mA
+125
°C
POWER SUPPLY
Specified Voltage
VS
Quiescent Current
(per channel)
IQ
±2.25
IOUT = 0A
3.6
Over Temperature
TEMPERATURE RANGE
Operating Range
TA
–55
Thermal Resistance
θ JA
(1)
(2)
200
°C/W
When disabled, the output assumes a high-impedance state.
See Typical Characteristic curves, Figure 42 through Figure 44.
1000000
Estimated Life (Hours)
100000
10000
1000
125
130
135
140
145
150
Continuous TJ (°C)
A.
See datasheet for absolute maximum and minimum recommended operating conditions.
B.
Silicon operating life design goal is 10 years at 105°C junction temperature (does not include package interconnect
life).
Figure 1. OPA211-EP Wirebond Life Derating Chart
Copyright © 2012, Texas Instruments Incorporated
5
OPA211-EP
ZHCS969 – JUNE 2012
www.ti.com.cn
TYPICAL CHARACTERISTICS
At TA = +25°C, VS = ±18V, and RL = 10kΩ, unless otherwise noted.
INPUT VOLTAGE NOISE DENSITY
vs FREQUENCY
INPUT CURRENT NOISE DENSITY
vs FREQUENCY
100
Current Noise Density (pA/ÖHz)
Voltage Noise Density (nV/ÖHz)
100
10
10
1
1
0.1
1
10
100
1k
10k
0.1
100k
1
10
100
Frequency (Hz)
Figure 2.
G= 1
RL = 5kW
G=1
RL = 600W
-140
0.00001
100
1k
10k 20k
Total Harmonic Distortion + Noise (%)
Total Harmonic Distortion + Noise (%)
-120
G = 11
RL = 600W
0.1
-60
0.01
-80
G = 11
0.001
-100
0.0001
-120
G=1
VS = ±15V
RL = 600W
1kHz Signal
0.00001
-140
Measurement BW = 80kHz
0.000001
0.01
0.1
1
Figure 4.
Measurement BW > 500kHz
G = 11
RL = 600W
-120
G= 1
RL = 5kW
RL = 600W
0.00001
10
100
1k
Frequency (Hz)
10k
-140
100k
-80
Channel Separation (dB)
VS = ±15V
VIN = 3.5VRMS
Total Harmonic Distortion + Noise (dB)
Total Harmonic Distortion + Noise (%)
CHANNEL SEPARATION vs FREQUENCY
-100
G=1
-160
100
Figure 5.
THD+N RATIO vs FREQUENCY
0.0001
10
Output Voltage Amplitude (VRMS)
Frequency (Hz)
0.001
G = -1
Total Harmonic Distortion + Noise (dB)
Measurement BW = 80kHz
Total Harmonic Distortion + Noise (dB)
VS = 15V
VOUT = 3VRMS
10
100k
THD+N RATIO vs OUTPUT VOLTAGE AMPLITUDE
-100
0.0001
10k
Figure 3.
THD+N RATIO vs FREQUENCY
0.001
1k
Frequency (Hz)
VS = ±15V
-90 V = 3.5V
IN
RMS
-100 G = 1
RL = 600W
-110
-120
-130
-140
RL = 2kW
-150
-160
RL = 5kW
-170
-180
10
100
1k
10k
100k
Frequency (Hz)
Figure 6.
6
Figure 7.
Copyright © 2012, Texas Instruments Incorporated
OPA211-EP
www.ti.com.cn
ZHCS969 – JUNE 2012
TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = ±18V, and RL = 10kΩ, unless otherwise noted.
POWER-SUPPLY REJECTION RATIO
vs FREQUENCY (Referred to Input)
0.1Hz TO 10Hz NOISE
160
140
20nV/div
PSRR (dB)
120
100
-PSRR
80
+PSRR
60
40
20
0
Time (1s/div)
1
10
100
1k
10k
100k
1M
10M
100M
Frequency (Hz)
Figure 8.
Figure 9.
COMMON-MODE REJECTION RATIO
vs FREQUENCY
OPEN-LOOP OUTPUT IMPEDANCE
vs FREQUENCY
140
10k
120
1k
80
ZO (W)
CMRR (dB)
100
60
100
10
40
1
20
0
0.1
10k
100k
10M
1M
100M
10
100
1k
Frequency (Hz)
10k
Figure 10.
GAIN AND PHASE vs FREQUENCY
4
135
Phase
90
60
40
Gain
45
0
Phase (°)
80
Open-Loop Gain (mV/V)
120
Gain (dB)
10M
100M
NORMALIZED OPEN-LOOP GAIN vs TEMPERATURE
5
180
20
1M
Figure 11.
140
100
100k
Frequency (Hz)
RL = 10kW
3
2
300mV Swing From Rails
1
0
-1
200mV Swing From Rails
-2
-3
-4
-20
100
1k
10k
100k
1M
Frequency (Hz)
Figure 12.
Copyright © 2012, Texas Instruments Incorporated
10M
0
100M
-5
-75 -50 -25
0
25
50
75 100 125 150 175 200
Temperature (°C)
Figure 13.
7
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ZHCS969 – JUNE 2012
www.ti.com.cn
TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = ±18V, and RL = 10kΩ, unless otherwise noted.
OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION
112.5
125.0
87.5
100.0
62.5
75.0
37.5
50.0
25.0
0
12.5
-12.5
-37.5
-25.0
-62.5
-50.0
-87.5
-75.0
-112.5
-100.0
-125.0
Population
Population
OFFSET VOLTAGE PRODUCTION DISTRIBUTION
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5
Offset Voltage Drift (mV/°C)
Offset Voltage (mV)
Figure 14.
Figure 15.
OFFSET VOLTAGE vs COMMON-MODE VOLTAGE
200
2000
150
1500
100
1000
+IB
50
IOS
500
VOS (mV)
IB and IOS Bias Current (nA)
IB AND IOS CURRENT
vs
TEMPERATURE
0
-50
0
-500
-IB
-100
-1000
-150
-1500
-200
-2000
-50
-25
0
25
50
75
100
125
150
(V-)+1.0 (V-)+1.5 (V-)+2.0
(V+)-1.5 (V+)-1.0 (V+)-0.5
Ambient Temperature (°C)
VCM (V)
Figure 16.
Figure 17.
VOS WARMUP
12
10
INPUT OFFSET CURRENT vs SUPPLY VOLTAGE
100
20 Typical Units Shown
80
40
2
0
-2
20
0
-20
-4
-6
-40
-8
-60
-80
-10
-12
0
8
5 Typical Units Shown
60
6
4
IOS (nA)
VOS Shift (mV)
8
10
20
30
40
50
60
-100
2.25
4
6
8
10
Time (s)
VS (±V)
Figure 18.
Figure 19.
12
14
16
18
Copyright © 2012, Texas Instruments Incorporated
OPA211-EP
www.ti.com.cn
ZHCS969 – JUNE 2012
TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = ±18V, and RL = 10kΩ, unless otherwise noted.
INPUT OFFSET CURRENT vs COMMON-MODE VOLTAGE
INPUT BIAS CURRENT vs SUPPLY VOLTAGE
100
150
VS = 36V
3 Typical Units Shown
75
3 Typical Units Shown
100
Unit 1
Unit 2
50
25
IB (nA)
IOS (nA)
50
0
0
Unit 3
-25
Common-Mode Range
-50
-50
-100
-IB
-75
+IB
-150
2.25
-100
1
5
10
15
20
25
30
35
6
8
10
12
VS (±V)
Figure 20.
Figure 21.
INPUT BIAS CURRENT vs COMMON-MODE VOLTAGE
14
16
18
QUIESCENT CURRENT vs TEMPERATURE
6
150
VS = 36V
3 Typical Units Shown
50
-IB
+IB
5
4
Unit 2
Unit 1
IQ (mA)
100
IB (nA)
4
VCM (V)
0
3
2
-50
Unit 3
1
-100
Common-Mode Range
0
-150
1
5
10
15
20
25
30
-75 -50 -25
35
0
25
50
75 100 125 150 175 200
Temperature (°C)
VCM (V)
Figure 22.
Figure 23.
QUIESCENT CURRENT vs
SUPPLY VOLTAGE
NORMALIZED QUIESCENT CURRENT
vs TIME
4.0
0.05
3.5
0
3.0
IQ Shift (mA)
-0.05
IQ (mA)
2.5
2.0
1.5
-0.10
-0.15
1.0
-0.20
0.5
-0.25
0
-0.30
Average of 10 Typical Units
0
4
8
12
16
20
VS (V)
Figure 24.
Copyright © 2012, Texas Instruments Incorporated
24
28
32
36
0
60
120 180 240 300 360 420 480 540
600
Time (s)
Figure 25.
9
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ZHCS969 – JUNE 2012
www.ti.com.cn
TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = ±18V, and RL = 10kΩ, unless otherwise noted.
60
50
40
30
20
10
0
-10
-20
-30
-40
-50
SMALL-SIGNAL STEP RESPONSE
(100mV)
G = -1
CL = 10pF
Sourcing
CF
5.6pF
20mV/div
ISC (mA)
SHORT-CIRCUIT CURRENT
vs TEMPERATURE
RI
604W
RF
604W
+18V
OPA211
CL
Sinking
-18V
-60
-75 -50 -25
0
25
50
75
Time (0.1µs/div)
100 125 150 175 200
Temperature (°C)
Figure 26.
Figure 27.
SMALL-SIGNAL STEP RESPONSE
(100mV)
SMALL-SIGNAL STEP RESPONSE
(100mV)
G = +1
RL = 600W
CL = 10pF
G = -1
CL = 100pF
RI
604W
20mV/div
20mV/div
CF
5.6pF
RF
604W
+18V
OPA211
+18V
OPA211
-18V
RL
CL
CL
-18V
Time (0.1ms/div)
Time (0.1µs/div)
Figure 28.
Figure 29.
SMALL-SIGNAL STEP RESPONSE
(100mV)
SMALL-SIGNAL OVERSHOOT
vs CAPACITIVE LOAD (100mV Output Step)
60
+18V
OPA211
-18V
G = +1
50
Overshoot (%)
20mV/div
G = +1
RL = 600W
CL = 100pF
RL
40
G = -1
30
G = 10
20
CL
10
0
Time (0.1ms/div)
0
200
400
600
800
1000
1200
1400
Capacitive Load (pF)
Figure 30.
10
Figure 31.
Copyright © 2012, Texas Instruments Incorporated
OPA211-EP
www.ti.com.cn
ZHCS969 – JUNE 2012
TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = ±18V, and RL = 10kΩ, unless otherwise noted.
LARGE-SIGNAL STEP RESPONSE
LARGE-SIGNAL STEP RESPONSE
G = -1
CL = 100pF
RL = 600W
G = +1
CL = 100pF
RL = 600W
RF = 100W
2V/div
2V/div
RF = 0W
Note: See the
Applications Information
section, Input Protection.
Figure 33.
LARGE-SIGNAL POSITIVE SETTLING TIME
(10VPP, CL = 100pF)
LARGE-SIGNAL POSITIVE SETTLING TIME
(10VPP, CL = 10pF)
1.0
0.010
0.008
0.8
0.008
0.6
0.006
0.6
0.006
0.4
0.004
16-Bit Settling
0.2
0.002
0
0
-0.2
(±1/2 LSB = ±0.00075%)
-0.4
-0.002
-0.004
0
0.004
0.002
0
-0.2
(±1/2 LSB = ±0.00075%)
-0.4
-0.002
-0.004
-0.006
-0.8
-0.008
-0.010
700 800 900 1000
-1.0
-0.8
-1.0
400 500 600
Time (ns)
16-Bit Settling
0.2
-0.008
-0.006
200 300
0.4
-0.6
-0.6
100
D From Final Value (mV)
0.010
0.8
0
100
200 300
400 500 600
Time (ns)
-0.010
700 800 900 1000
Figure 34.
Figure 35.
LARGE-SIGNAL NEGATIVE SETTLING TIME
(10VPP, CL = 100pF)
LARGE-SIGNAL NEGATIVE SETTLING TIME
(10VPP, CL = 10pF)
0.010
0.8
0.008
0.6
0.006
0.6
0.006
0.4
0.004
16-Bit Settling
0.002
0
0
-0.2
(±1/2 LSB = ±0.00075%)
-0.4
-0.002
-0.004
-0.6
-0.006
-0.8
-1.0
0
100
200 300
400 500 600
Time (ns)
D From Final Value (mV)
1.0
0.008
0.4
16-Bit Settling
0.2
0
0.004
0.002
0
-0.2
(±1/2 LSB = ±0.00075%)
-0.4
-0.002
-0.004
-0.6
-0.006
-0.008
-0.8
-0.008
-0.010
700 800 900 1000
-1.0
Figure 36.
Copyright © 2012, Texas Instruments Incorporated
0
100
200 300
400 500 600
Time (ns)
D From Final Value (%)
0.010
0.8
D From Final Value (%)
1.0
0.2
D From Final Value (%)
1.0
0
D From Final Value (mV)
Time (0.5ms/div)
Figure 32.
D From Final Value (%)
D From Final Value (mV)
Time (0.5ms/div)
-0.010
700 800 900 1000
Figure 37.
11
OPA211-EP
ZHCS969 – JUNE 2012
www.ti.com.cn
TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = ±18V, and RL = 10kΩ, unless otherwise noted.
NEGATIVE OVERLOAD RECOVERY
POSITIVE OVERLOAD RECOVERY
G = -10
VIN
G = -10
10kW
VOUT
1kW
0V
VOUT
OPA211
VIN
5V/div
5V/div
10kW
1kW
OPA211
VOUT
VIN
0V
VOUT
VIN
Time (0.5ms/div)
Time (0.5ms/div)
Figure 38.
Figure 39.
OUTPUT VOLTAGE vs OUTPUT CURRENT
NO PHASE REVERSAL
20
0°C
15
5
5V/div
VOUT (V)
Output
+85°C
+125°C
10
+125°C
0
-55°C
0°C
+150°C
-5
+18V
-10
Output
+85°C
-15
37VPP
(±18.5V)
-20
0
10
20
30
40
IOUT (mA)
50
60
-18V
0.5ms/div
70
Figure 40.
Figure 41.
TURN-OFF TRANSIENT
TURN-ON TRANSIENT
20
20
15
15
10
10
Output Signal
Shutdown Signal
5
5V/div
5
5V/div
OPA211
0
-5
0
Output Signal
-5
-10
-10
Shutdown Signal
-15
VS = ±15V
-20
VS = ±15V
-20
Time (2ms/div)
Figure 42.
12
-15
Time (2ms/div)
Figure 43.
Copyright © 2012, Texas Instruments Incorporated
OPA211-EP
www.ti.com.cn
ZHCS969 – JUNE 2012
TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = ±18V, and RL = 10kΩ, unless otherwise noted.
TURN-ON/TURN-OFF TRANSIENT
20
1.6
15
1.2
10
0.8
5
0.4
0
-5
0
Output
-0.4
-10
-0.8
-15
Output Voltage (V)
Shutdown Pin Voltage (V)
Shutdown Signal
-1.2
VS = ±15V
-20
-1.6
Time (100ms/div)
Figure 44.
Copyright © 2012, Texas Instruments Incorporated
13
OPA211-EP
ZHCS969 – JUNE 2012
www.ti.com.cn
APPLICATION INFORMATION
The OPA211 is a unity-gain stable, precision op amp
with very low noise. Applications with noisy or highimpedance power supplies require decoupling
capacitors close to the device pins. In most cases,
0.1μF capacitors are adequate. Figure 45 shows a
simplified schematic of the OPA211. This die uses a
SiGe bipolar process and contains 180 transistors.
OPERATING VOLTAGE
OPA211 series op amps operate from ±2.25V to
±18V
supplies
while
maintaining
excellent
performance. The OPA211 series can operate with as
little as +4.5V between the supplies and with up to
+36V between the supplies. However, some
applications do not require equal positive and
negative output voltage swing. With the OPA211
series, power-supply voltages do not need to be
equal. For example, the positive supply could be set
to +25V with the negative supply at –5V or viceversa.
The common-mode voltage must be maintained
within the specified range. In addition, key
parameters are assured over the specified
temperature range, TA = –55°C to +125°C.
Parameters that vary significantly with operating
voltage or temperature are shown in the Typical
Characteristics.
V+
Pre-Output Driver
IN-
OUT
IN+
V-
Figure 45. OPA211 Simplified Schematic
14
Copyright © 2012, Texas Instruments Incorporated
OPA211-EP
www.ti.com.cn
ZHCS969 – JUNE 2012
INPUT PROTECTION
-
OPA211
Input
Output
+
Figure 46. Pulsed Operation
NOISE PERFORMANCE
Figure 47 shows total circuit noise for varying source
impedances with the op amp in a unity-gain
configuration (no feedback resistor network, and
therefore no additional noise contributions). Two
different op amps are shown with total circuit noise
calculated. The OPA211 has very low voltage noise,
making it ideal for low source impedances (less than
2kΩ). A similar precision op amp, the OPA227, has
somewhat higher voltage noise but lower current
noise. It provides excellent noise performance at
moderate source impedance (10kΩ to 100kΩ). Above
100kΩ, a FET-input op amp such as the OPA132
(very low current noise) may provide improved
performance. The equation in Figure 47 is shown for
the calculation of the total circuit noise. Note that en =
voltage noise, In = current noise, RS = source
impedance, k = Boltzmann’s constant = 1.38 × 10–23
J/K, and T is temperature in K.
Copyright © 2012, Texas Instruments Incorporated
EO
1k
RS
OPA227
OPA211
100
Resistor Noise
10
2
2
2
EO = en + (in RS) + 4kTRS
1
100
1k
10k
100k
1M
Source Resistance, RS (W)
Figure 47. Noise Performance of the OPA211 and
OPA227 in Unity-Gain Buffer Configuration
BASIC NOISE CALCULATIONS
RF
RI
10k
Votlage Noise Spectral Density, EO
The input terminals of the OPA211 are protected from
excessive differential voltage with back-to-back
diodes, as shown in Figure 46. In most circuit
applications, the input protection circuitry has no
consequence. However, in low-gain or G = 1 circuits,
fast ramping input signals can forward bias these
diodes because the output of the amplifier cannot
respond rapidly enough to the input ramp. This effect
is illustrated in Figure 33 of the Typical
Characteristics. If the input signal is fast enough to
create this forward bias condition, the input signal
current must be limited to 10mA or less. If the input
signal current is not inherently limited, an input series
resistor can be used to limit the signal input current.
This input series resistor degrades the low-noise
performance of the OPA211, and is discussed in the
Noise Performance section of this data sheet.
Figure 46 shows an example implementing a currentlimiting feedback resistor.
VOLTAGE NOISE SPECTRAL DENSITY
vs SOURCE RESISTANCE
Design of low-noise op amp circuits requires careful
consideration of a variety of possible noise
contributors: noise from the signal source, noise
generated in the op amp, and noise from the
feedback network resistors. The total noise of the
circuit is the root-sum-square combination of all noise
components.
The resistive portion of the source impedance
produces thermal noise proportional to the square
root of the resistance. This function is plotted in
Figure 47. The source impedance is usually fixed;
consequently, select the op amp and the feedback
resistors to minimize the respective contributions to
the total noise.
Figure 47 depicts total noise for varying source
impedances with the op amp in a unity-gain
configuration (no feedback resistor network, and
therefore no additional noise contributions). The
operational amplifier itself contributes both a voltage
noise component and a current noise component.
The voltage noise is commonly modeled as a timevarying component of the offset voltage. The current
noise is modeled as the time-varying component of
the input bias current and reacts with the source
resistance to create a voltage component of noise.
Therefore, the lowest noise op amp for a given
application depends on the source impedance. For
low source impedance, current noise is negligible and
voltage noise generally dominates. For high source
impedance, current noise may dominate.
15
OPA211-EP
ZHCS969 – JUNE 2012
Figure 48 illustrates both inverting and noninverting
op amp circuit configurations with gain. In circuit
configurations with gain, the feedback network
resistors also contribute noise. The current noise of
the op amp reacts with the feedback resistors to
create additional noise components. The feedback
resistor values can generally be chosen to make
these noise sources negligible. The equations for
total noise are shown for both configurations.
TOTAL HARMONIC DISTORTION
MEASUREMENTS
OPA211 series op amps have excellent distortion
characteristics. THD + Noise is below 0.0002% (G =
+1, VOUT = 3VRMS) throughout the audio frequency
range, 20Hz to 20kHz, with a 600Ω load.
The distortion produced by OPA211 series op amps
is below the measurement limit of many commercially
available distortion analyzers. However, a special test
circuit illustrated in Figure 49 can be used to extend
the measurement capabilities.
Op amp distortion can be considered an internal error
source that can be referred to the input. Figure 49
shows a circuit that causes the op amp distortion to
be 101 times greater than that normally produced by
the op amp. The addition of R3 to the otherwise
standard noninverting amplifier configuration alters
the feedback factor or noise gain of the circuit. The
closed-loop gain is unchanged, but the feedback
available for error correction is reduced by a factor of
16
www.ti.com.cn
101, thus extending the resolution by 101. Note that
the input signal and load applied to the op amp are
the same as with conventional feedback without R3.
The value of R3 should be kept small to minimize its
effect on the distortion measurements.
Validity of this technique can be verified by
duplicating measurements at high gain and/or high
frequency where the distortion is within the
measurement capability of the test equipment.
Measurements for this data sheet were made with an
Audio Precision System Two distortion/noise
analyzer, which greatly simplifies such repetitive
measurements. The measurement technique can,
however, be performed with manual distortion
measurement instruments.
SHUTDOWN
The shutdown (enable) function of the OPA211 is
referenced to the positive supply voltage of the
operational amplifier. A valid high disables the op
amp. A valid high is defined as (V+) – 0.35V of the
positive supply applied to the shutdown pin. A valid
low is defined as (V+) – 3V below the positive supply
pin. For example, with VCC at ±15V, the device is
enabled at or below 12V. The device is disabled at or
above 14.65V. If dual or split power supplies are
used, care should be taken to ensure the valid high
or valid low input signals are properly referred to the
positive supply voltage. This pin must be connected
to a valid high or low voltage or driven, and not left
open-circuit. The enable and disable times are
provided in the Typical Characteristics section (see
Figure 42 through Figure 44). When disabled, the
output assumes a high-impedance state.
Copyright © 2012, Texas Instruments Incorporated
OPA211-EP
www.ti.com.cn
ZHCS969 – JUNE 2012
Noise in Noninverting Gain Configuration
Noise at the output:
R2
2
2
EO
R1
= 1+
R2
R1
2
2
2
2
2
2
en + e1 + e2 + (inR2) + eS + (inRS)
EO
R2
Where eS = Ö4kTRS ´ 1 +
R1
2
1+
R2
R1
= thermal noise of RS
RS
e1 = Ö4kTR1 ´
VS
R2
R1
= thermal noise of R1
e2 = Ö4kTR2 = thermal noise of R2
Noise in Inverting Gain Configuration
Noise at the output:
R2
2
2
EO = 1 +
R1
R2
R1 + RS
2
EO
RS
Where eS = Ö4kTRS ´
2
2
2
2
en + e1 + e2 + (inR2) + eS
R2
R1 + RS
= thermal noise of RS
VS
e1 = Ö4kTR1 ´
R2
R1 + RS
= thermal noise of R1
e2 = Ö4kTR2 = thermal noise of R2
For the OPA211 series op amps at 1kHz, en = 1.1nV/ÖHz and in = 1.7pA/ÖHz.
Figure 48. Noise Calculation in Gain Configurations
R1
R2
SIG. DIST.
GAIN GAIN
R3
Signal Gain = 1+
OPA211
VOUT
R2
R1
Distortion Gain = 1+
R2
R1 II R3
Generator
Output
R1
R2
R3
1
101
¥
1kW
10W
11
101
100W
1kW
11W
Analyzer
Input
Audio Precision
System Two(1)
with PC Controller
(1)
Load
For measurement bandwidth, see Figure 4, Figure 5, and Figure 6.
Figure 49. Distortion Test Circuit
Copyright © 2012, Texas Instruments Incorporated
17
OPA211-EP
ZHCS969 – JUNE 2012
www.ti.com.cn
ELECTRICAL OVERSTRESS
An ESD event produces a short duration, highvoltage pulse that is transformed into a short
duration, high-current pulse as it discharges through
a semiconductor device. The ESD protection circuits
are designed to provide a current path around the
operational amplifier core to prevent it from being
damaged. The energy absorbed by the protection
circuitry is then dissipated as heat.
Designers often ask questions about the capability of
an operational amplifier to withstand electrical
overstress. These questions tend to focus on the
device inputs, but may involve the supply voltage pins
or even the output pin. Each of these different pin
functions have electrical stress limits determined by
the voltage breakdown characteristics of the
particular semiconductor fabrication process and
specific circuits connected to the pin. Additionally,
internal electrostatic discharge (ESD) protection is
built into these circuits to protect them from
accidental ESD events both before and during
product assembly.
When an ESD voltage develops across two or more
of the amplifier device pins, current flows through one
or more of the steering diodes. Depending on the
path that the current takes, the absorption device
may activate. The absorption device has a trigger, or
threshold voltage, that is above the normal operating
voltage of the OPA211 but below the device
breakdown voltage level. Once this threshold is
exceeded, the absorption device quickly activates
and clamps the voltage across the supply rails to a
safe level.
It is helpful to have a good understanding of this
basic ESD circuitry and its relevance to an electrical
overstress event. Figure 50 illustrates the ESD
circuits contained in the OPA211 (indicated by the
dashed line area). The ESD protection circuitry
involves several current-steering diodes connected
from the input and output pins and routed back to the
internal power-supply lines, where they meet at an
absorption device internal to the operational amplifier.
This protection circuitry is intended to remain inactive
during normal circuit operation.
When the operational amplifier connects into a circuit
such as that illustrated in Figure 50, the ESD
protection components are intended to remain
inactive and not become involved in the application
circuit operation. However, circumstances may arise
where an applied voltage exceeds the operating
voltage range of a given pin. Should this condition
occur, there is a risk that some of the internal ESD
protection circuits may be biased on, and conduct
current. Any such current flow occurs through
steering diode paths and rarely involves the
absorption device.
RF
+V
+VS
OPA211
RI
ESD CurrentSteering Diodes
-In
+In
Op-Amp
Core
Edge-Triggered ESD
Absorption Circuit
ID
VIN
Out
RL
(1)
-V
-VS
(1) VIN = +VS + 500mV.
Figure 50. Equivalent Internal ESD Circuitry and Its Relation to a Typical Circuit Application
18
Copyright © 2012, Texas Instruments Incorporated
OPA211-EP
www.ti.com.cn
Figure 50 depicts a specific example where the input
voltage, VIN, exceeds the positive supply voltage
(+VS) by 500mV or more. Much of what happens in
the circuit depends on the supply characteristics. If
+VS can sink the current, one of the upper input
steering diodes conducts and directs current to +VS.
Excessively high current levels can flow with
increasingly higher VIN. As a result, the datasheet
specifications recommend that applications limit the
input current to 10mA.
If the supply is not capable of sinking the current, VIN
may begin sourcing current to the operational
amplifier, and then take over as the source of positive
supply voltage. The danger in this case is that the
voltage can rise to levels that exceed the operational
amplifier absolute maximum ratings. In extreme but
rare cases, the absorption device triggers on while
+VS and –VS are applied. If this event happens, a
direct current path is established between the +VS
and –VS supplies. The power dissipation of the
absorption device is quickly exceeded, and the
extreme internal heating destroys the operational
amplifier.
Another common question involves what happens to
the amplifier if an input signal is applied to the input
while the power supplies +VS and/or –VS are at 0V.
Again, it depends on the supply characteristic while at
0V, or at a level below the input signal amplitude. If
Copyright © 2012, Texas Instruments Incorporated
ZHCS969 – JUNE 2012
the supplies appear as high impedance, then the
operational amplifier supply current may be supplied
by the input source via the current steering diodes.
This state is not a normal bias condition; the amplifier
most likely will not operate normally. If the supplies
are low impedance, then the current through the
steering diodes can become quite high. The current
level depends on the ability of the input source to
deliver current, and any resistance in the input path.
THERMAL CONSIDERATIONS
The primary issue with all semiconductor devices is
junction temperature (TJ). The most obvious
consideration is assuring that TJ never exceeds the
absolute maximum rating specified for the device.
However, addressing device thermal dissipation has
benefits beyond protecting the device from damage.
Even modest increases in junction temperature can
decrease op amp performance, and temperaturerelated errors can accumulate. Understanding the
power generated by the device within the specific
application and assessing the thermal effects on the
error tolerance lead to a better understanding of
system performance and thermal dissipation needs.
19
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
(3)
(4)
OPA211MDGKTEP
ACTIVE
VSSOP
DGK
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-55 to 125
OBCM
V62/12619-01XE
ACTIVE
VSSOP
DGK
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-55 to 125
OBCM
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF OPA211-EP :
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
• Catalog: OPA211
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
Addendum-Page 2
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客户应提供充分的设计与操作安全措施。
TI 不对任何 TI 专利权、版权、屏蔽作品权或其它与使用了 TI 组件或服务的组合设备、机器或流程相关的 TI 知识产权中授予 的直接或隐含权
限作出任何保证或解释。TI 所发布的与第三方产品或服务有关的信息，不能构成从 TI 获得使用这些产品或服 务的许可、授权、或认可。使用
此类信息可能需要获得第三方的专利权或其它知识产权方面的许可，或是 TI 的专利权或其它 知识产权方面的许可。
对于 TI 的产品手册或数据表中 TI 信息的重要部分，仅在没有对内容进行任何篡改且带有相关授权、条件、限制和声明的情况 下才允许进行
复制。TI 对此类篡改过的文件不承担任何责任或义务。复制第三方的信息可能需要服从额外的限制条件。
在转售 TI 组件或服务时，如果对该组件或服务参数的陈述与 TI 标明的参数相比存在差异或虚假成分，则会失去相关 TI 组件 或服务的所有明
示或暗示授权，且这是不正当的、欺诈性商业行为。TI 对任何此类虚假陈述均不承担任何责任或义务。
客户认可并同意，尽管任何应用相关信息或支持仍可能由 TI 提供，但他们将独力负责满足与其产品及在其应用中使用 TI 产品 相关的所有法
律、法规和安全相关要求。客户声明并同意，他们具备制定与实施安全措施所需的全部专业技术和知识，可预见 故障的危险后果、监测故障
及其后果、降低有可能造成人身伤害的故障的发生机率并采取适当的补救措施。客户将全额赔偿因 在此类安全关键应用中使用任何 TI 组件而
对 TI 及其代理造成的任何损失。
在某些场合中，为了推进安全相关应用有可能对 TI 组件进行特别的促销。TI 的目标是利用此类组件帮助客户设计和创立其特 有的可满足适用
的功能安全性标准和要求的终端产品解决方案。尽管如此，此类组件仍然服从这些条款。
TI 组件未获得用于 FDA Class III（或类似的生命攸关医疗设备）的授权许可，除非各方授权官员已经达成了专门管控此类使 用的特别协议。
只有那些 TI 特别注明属于军用等级或“增强型塑料”的 TI 组件才是设计或专门用于军事/航空应用或环境的。购买者认可并同 意，对并非指定面
向军事或航空航天用途的 TI 组件进行军事或航空航天方面的应用，其风险由客户单独承担，并且由客户独 力负责满足与此类使用相关的所有
法律和法规要求。
TI 已明确指定符合 ISO/TS16949 要求的产品，这些产品主要用于汽车。在任何情况下，因使用非指定产品而无法达到 ISO/TS16949 要
求，TI不承担任何责任。
产品
应用
数字音频
www.ti.com.cn/audio
通信与电信
www.ti.com.cn/telecom
放大器和线性器件
www.ti.com.cn/amplifiers
计算机及周边
www.ti.com.cn/computer
数据转换器
www.ti.com.cn/dataconverters
消费电子
www.ti.com/consumer-apps
DLP® 产品
www.dlp.com
能源
www.ti.com/energy
DSP - 数字信号处理器
www.ti.com.cn/dsp
工业应用
www.ti.com.cn/industrial
时钟和计时器
www.ti.com.cn/clockandtimers
医疗电子
www.ti.com.cn/medical
接口
www.ti.com.cn/interface
安防应用
www.ti.com.cn/security
逻辑
www.ti.com.cn/logic
汽车电子
www.ti.com.cn/automotive
电源管理
www.ti.com.cn/power
视频和影像
www.ti.com.cn/video
微控制器 (MCU)
www.ti.com.cn/microcontrollers
RFID 系统
www.ti.com.cn/rfidsys
OMAP应用处理器
www.ti.com/omap
无线连通性
www.ti.com.cn/wirelessconnectivity
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www.deyisupport.com
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