Digitally Assisted Analog Circuits
Bernhard E. Boser
University of California, Berkeley
Department of Electrical Engineering and Computer Sciences
http://www.eecs.berkeley.edu/~boser
Integrated Circuit Trends
•
Moore’s Law
– Transistor count doubles every 2 years
•
Rapidly improving circuit performance:
– E.g. microprocessors:
• Clock rate doubles in 2.3 years
• Performance doubles every 1.5 years
– Enables new functions, e.g.
• digital video,
• wireless LAN, WAN, 3G, …
•
Analog circuit performance trends?
– Present trends
– Challenges
– Opportunities
Digitally Assisted Analog Circuits
© 2004
B. Boser
2
Analog Circuit Applications
Cellular telephony
Networking
Optical communication
Disk drives
Digital Signal Processing
Fiberoptics
Cameras
Audio
Air bag sensors
Video
Digitally Assisted Analog Circuits
© 2004
B. Boser
3
Analog Circuit Performance (ADC)
Resolution
X Sampling
FOM1
[Hz-LSB] Rate
1.0E+13
1.0E+12
80-MS/sec
12-Bits
1.0E+11
5-GS/sec
6-Bits
1.0E+10
All ADCs: 2x in 6.5 years
1.0E+09
Lead ADCs: 2x in 4.7 years
1.0E+08
1987
1992
Digitally Assisted Analog Circuits
1997
2002
Year
© 2004
B. Boser
4
ADC Performance Projection
2032
1.0E+13
FOM1 [Hz-LSB]
1.0E+12
1.0E+11
“Software Radio”
16-Bit
1GHz
1.0E+10
1.0E+09
1.0E+08
1987
1992
1997
Digitally Assisted Analog Circuits
2002
© 2004
B. Boser
5
Analog-Digital Performance Comparison
Relative Performance
10000
1000
100
µP
10
1
1987
PS
I
M
/
(2x
1.
rs)
a
e
5y
150x
years)
7
.
4
/
2x
ADC (
1995
2003
15 years
Digitally Assisted Analog Circuits
© 2004
B. Boser
6
Analog-Digital Power Comparison
1987
1995
2003
1
Lead
µP
Better
0.1
0.01
Pow
er/M
IPS
(
AD
En
CP
0.5x
er
ow
/ 3. 4
gy
e
r/C
year
/Lo
onv
s)
gic
ers
ion
Tr
(0.5
an
x/
sit
2.7
ion
yea
rs)
(0 .
5x
/1
.7y
ea
rs
)
2.5x
14x
0.001
Digitally Assisted Analog Circuits
© 2004
B. Boser
7
Analog-Digital Power Comparison
Analog
Digital
Pdig ∝ CV
C
VDD
fCLK
•
•
2B
2
DD CLK
f
gate, wiring capacitance
supply voltage
clock speed
Reducing VDD lowers power
Power = f(scaling, C)
Digitally Assisted Analog Circuits
Pana
B
VDD
fCLK
•
•
2
f CLK
∝
VDD
resolution [Bits]
supply voltage
clock speed
Reducing VDD inreases power
Power = f(resolution, B)
© 2004
B. Boser
8
Analog Circuit Challenges
Speed
Precision
Noise
Matching
Linearity
Power Dissipation
Digitally Assisted Analog Circuits
© 2004
B. Boser
9
Analog Precision Techniques
Feedback
C
2C
Vid
Vod = 2 Vid
2C
C
Gain = 2
Gain = 100,000
Digitally Assisted Analog Circuits
© 2004
B. Boser
10
Intrinsic Transistor Gain
45
40
25
35
0.5µm
g m ro
30
0.35µm
25
20
0.25µm
15
0.18µm
10
5
Channel length L ↓
Gain ↓
Scaling “hurts”
0
0.0
0.1
0.2
5
0.3
0.4
VDS [V]
Digitally Assisted Analog Circuits
© 2004
B. Boser
11
Consequences …
•
[Annema, TCAS99]:
– “The overall effect is that power consumption decreases with newer
CMOS processes down to about 0.25 or 0.35 µm.”
– “The trend that power consumption increases with decreasing
supply voltage was shown to be fundamental …”
•
[Annema, PlanetAnalog, 2004, http://www.planetanalog.com/printableArticle.jhtml?articleID=17701355]
– “In conclusion, analog circuits can benefit from technology scaling if
the supply voltages are not scaled down, unlike in their digital
counterparts.”
•
[Bult, ISSCC99]:
– “Power dissipation generally increases if a circuit operates under
reduced signal swing conditions to maintain performance.”
•
Scaling has no benefits?
Digitally Assisted Analog Circuits
© 2004
B. Boser
12
Scaling Benefits
60
Intrinsic speed (fT)
50
0.18µm
30
0.25µm
20
30
10
25
0
-0.1
0.0
0.1
20
0.2
gm/ID [1/V]
fT [GHz]
40
VGS-VTH [V]
15
0.35µm
0.5µm
0.5µm
Square Law
0.3
0.4
0.5
0.35µm
0.25µm
0.18µm
10
5
Efficiency gm/ID
0
-0.1
0.0
0.1
0.2
0.3
0.4
© 2004
B. Boser
0.5
VGS-VTH [V]
Digitally Assisted Analog Circuits
13
Transistor Performance
400
0.18µm
350
fT⋅ g m/ID [GHz/V]
300
250
200
0.25µm
150
0.35µm
100
0.5µm
50
0
-0.1
0.0
0.1
0.2
0.3
0.4
0.5
V G S -V TH [V]
Scaled transistor:
Significantly better performance at lower voltage
Digitally Assisted Analog Circuits
© 2004
B. Boser
14
Technology Scaling
•
Device performance improves
– Speed (fT)
– Power efficiency (gm / ID)
•
Digital circuits
– Capitalize on improved devices
– Clock rate doubles every 2.3 years
– Performance (MIPS, SPECint) doubles every 1.5 years
•
Analog circuits
–
–
–
–
•
Low supply, intrinsic device gain negatively impacts precision
Relative performance increasingly lags that of digital circuits
Performance doubles in 5 years
Over 15 years, analog/digital performance gap is ~ 150x
Is this also a “law”
Digitally Assisted Analog Circuits
© 2004
B. Boser
15
Analog Circuit Challenges
Speed
Precision
Noise
Matching
Matching and
linearity constraints
are not fundamental
Linearity
Power Dissipation
Digitally Assisted Analog Circuits
© 2004
B. Boser
16
Analog Circuit Nonlinearity
Dout,raw
Dout
Vin
Vin
Nonlinear
Analog-to-Digital
Converter
Dout ,raw = f (Vin )
Dout,raw
Dout,raw
Digital Signal
Processor
(DSP)
Dout
Dout = f −1 (Dout ,raw )
= f −1 ( f (Vin ))
= Vin
Digitally Assisted Analog Circuits
© 2004
B. Boser
17
Open-Loop Amplification
Precision Amplifier
“Open loop“
+
+
+
+
Faster
Lower Power
Lower Noise
Increased Signal
Range
– Nonlinear
! Use DSP to
linearize!
Practical?
Digitally Assisted Analog Circuits
© 2004
B. Boser
18
Experimental Verification
LOGIC
CLK
REFERENCE
AND BIAS
PIPELINE
BACKEND
STAGE1
SHA
• 12bit, 75MHz, 0.35µm, post-processor off chip
• Based on commercial part (Analog Devices AD9235)
Digitally Assisted Analog Circuits
© 2004
B. Boser
19
Measured INL
20
Post-Proc. OFF
INL [LSB]
10
0
-10
-20
0
1000
Digitally Assisted Analog Circuits
2000
Code
Code
3000
4000
© 2004
B. Boser
20
Measured INL
20
Post-Proc. OFF
Post-Proc. ON
INL [LSB]
10
0
-10
-20
0
1000
Digitally Assisted Analog Circuits
2000
Code
Code
3000
4000
© 2004
B. Boser
21
INL Zoom (Post-Proc. ON)
1
INL [LSB]
0.5
0
-0.5
-1
0
1000
Digitally Assisted Analog Circuits
2000
Code
3000
4000
© 2004
B. Boser
22
Stage1 Amplifier Power
60
Power [mW]
50
40
-62% (33mW)
30
20
10
0
[Kelly, ISSCC 01]
(Closed-Loop)
Digitally Assisted Analog Circuits
This Work
(Open-Loop)
© 2004
B. Boser
23
Digital Nonlinearity Correction
Analog
Nonlinearity
Vin
Digital
Inverse
Dout
Dout,corr
Parameters
Modulation
•
•
System
ID
System ID determines optimum post distortion
Background operation tracks variations over time without
interrupting normal circuit operation
Digitally Assisted Analog Circuits
© 2004
B. Boser
24
Digital Post-Processor
• 8400 Gates, 64 bytes RAM, 64kBit ROM
• Implementation in 0.35µm technology
Area=1.4mm2 (18%)
Power=10.5mW (3.6%)
Pipelined ADC
(7.9 mm2)
Power [mW]
40
30
20
10
0
Post-Processor
Digitally Assisted Analog Circuits
Amplifier
PostSavings Processor
© 2004
B. Boser
25
Analog / Digital Power Comparison
"Number of logic gates with same energy consumption as a state-of-the-art B-bit ADC"
Number of Gates
1,000,000
800,000
600,000
0.13µm
400,000
0.35µm
200,000
1.2µm
0
6
7
8
9
Digitally Assisted Analog Circuits
10
11
12
ADC Resolution [B]
13
14
© 2004
15
B. Boser
16
26
Number of Gates
Analog / Digital Area Comparison
4,000
0.13µm
3,000
2,000
8080 µP
Core
1,000
0.35µm
1.2µm
0
0
0.005
0.01
0.015
2
0.02
Area [mm ]
Area of a 10pF integrated (linear) capacitor
Digitally Assisted Analog Circuits
© 2004
B. Boser
27
Circuit Issues
Precision Amplifier
Digitally Assisted Analog Circuits
“Open loop“
© 2004
B. Boser
28
Self-Heating
Vo2
Vo1
•
Signal dependent current
•
Signal dependent device
temperature & characteristics
•
Background calibration too
slow to track changes
Vi1
Vi2
Digitally Assisted Analog Circuits
© 2004
B. Boser
29
Device Interleaving
Vo2
Interleaved layout
" uniform temperature distribution
Vo1
Vi1
Vi2
Digitally Assisted Analog Circuits
© 2004
B. Boser
30
Tchip [oC]
Reduced Temperature Sensitivity
50
45
p1 [LSB]
0
8
2
4
-4
0
8
10
Constant Bias
4
0
6
Replica Bias
2
Digitally Assisted Analog Circuits
4
6
Time
Time [sec]
[sec]
8
© 2004
10
B. Boser
31
Conclusion
•
Technology scaling trends are only conditionally beneficial for
analog circuit performance
•
Analog circuit improvements lag progress of digital functions
•
Digitally assisted analog circuits offload accuracy constraints to
digital processor
•
Benefits:
– Improved analog circuit performance
– Profit from future technology scaling
Digitally Assisted Analog Circuits
© 2004
B. Boser
32
Acknowledgements
•
Boris Murmann, Mike Scott, Dimitrios Katsis, Anshi Liang
•
Katsu Nakamura, Dan Kelly, Larry Singer
•
Analog Devices for design re-use
•
Funding from Analog Devices and UC MICRO
Digitally Assisted Analog Circuits
© 2004
B. Boser
33
Book
http://www.wkap.nl/prod/b/1-4020-7839-0
Hardbound, May 2004, 175 pp.
ISBN 1-4020-7839-0
eBook, April 2004
ISBN 1-4020-7840-4
Digitally Assisted Analog Circuits
© 2004
B. Boser
34