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Laboratory #6
Single-stage MOSFET Amplifiers
I. Objectives
1.
2.
Understand three basic configurations of single-stage MOSFET
amplifiers.
Understand the characteristics and applications of single-stage
MOSFET amplifier.
II. Components and Instruments
1.
Components
(1) MOSFET array CD4007
(2) Resistor: 4.7kΩx1, 10kΩx1, 100kΩx3, 330KΩx1
(3) Capacitor: 10μFx2
2.
Instruments
(1) Function generator
(2) DC power supply
(3) Digital multimeter
(4) Oscilloscope
III. Reading
1.
Section 5.4-5.9 and 8.1-8.9 of the Textbook “Microelectronic circuits,
6th edition, Sedra/Smith”.
IV. Preparation
1.
The purpose of this laboratory is to acquaint students with a collection
of related single-stage MOSFET amplifiers. There are three basic
configurations for single-stage MOSFET amplifiers: common-source
(CS) amplifier, common-drain (CD, or source follower) amplifier and
common-gate (CG) amplifier will be introduced individually. Each one
of the three basic amplifiers has its own characteristics and
applications. The details will be discussed in the following sections.
2.
Single-stage MOSFET amplifiers
All kinds of single-stage MOSFET amplifiers are combined with two
parts: 1) driving MOSFET and 2) load. The driving MOSFET provides
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voltage-to-current conversion (trans-conductance, gm), then the output
current flowing through the load will induce a voltage signal at output node.
Besides, the voltage gain of amplifier depends on the DC bias point. Fig.
6.1 represents three basic configurations of single-stage MOSFET
amplifiers.
VDD
VDD
VDD
IN
OUT
VDD
VDD
IN
IN
OUT
VDD
OUT
OUT
OUT
IN
IN
OUT
IN
(a)
(c)
(b)
Fig. 6.1 Three basic single-stage MOSFET amplifiers.
(a) common-source (b) common-gate (c) common-drain
(1) Common-source (CS) amplifier
As shown in Fig. 6.1 (a), input node of CS amplifier is at gate,
small-signal common node is at source, and output node is at drain.
VDD
VDD
RD
Vo
Rb1
Rsig
Cc1
Vsig
Cc2
RL
Rb2
Fig. 6.2 Classical CS amplifier
In Fig. 6.2, Rb1 and Rb2 provide DC bias voltage. Two capacitors
Cc1 and Cc2 are used to block the DC signal component so that
operating point won’t be affected. When input signal swing increases
(small signal on DC bias point), the output current will increase, too.
Because of the increasing output current, the voltage drop on RD
becomes larger, which causes the output voltage decrease, and vice
versa. This leads that input and output are out of phase.
Next, small-signal analysis of CS amplifier will be derived based
on Fig. 6.3.
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Rsig
vsig
G
vi
D
Rb1//Rb2
gmvgs
vgs
vo
ro
RD
RL
S
Rin
Rout
Fig. 6.3 Small-signal model of CS amplifier
The analysis process list as follows:
Let R b1//R b2  R sig
R in  Rb1 // Rb 2
vi  vsig 
Rin
Rb1 // Rb 2
 vsig 
 vsig
Rin  Rsig
Rb1 // Rb 2  Rsig
R out  RD // ro
vo  io  Rout   g m  v gs  Rout   g m  v gs  RD // ro 
Avo 
vo vo

  g m  RD // ro 
vi v gs
Av   g m  RD // ro // RL 
Gv 
v gs vo
vo
Rb1 // Rb 2



 Av  Av   g m  RD // ro // RL 
vsig vsig v gs Rb1 // Rb 2  Rsig
(2) Common-source (CS) amplifier with source degeneration
Usually, a degenerating resistor can be added at source node to
maintain the stability of bias points and reduce the distortion resulted
from too-large input signal. A CS amplifier with source degeneration is
shown in Fig. 6.4, and the small-signal model is depicted in Fig.6.5.
VDD
VDD
RD
Vo
Rb1
Rsig
Cc1
Vsig
Cc2
RL
Rb2
RS
Fig. 6.4 CS amplifier with source degeneration
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D
gmvgs
Rsig
vsig
ro
vo
RD
RL
G
vi
Rb1//Rb2
1/gm
Ro
S
RS
Ri
Fig. 6.5 Small-signal model of CS amplifier with source degeneration
The analysis after adding source resistor is also derived as
follows:
Assume ro  
R in  Rb1 // Rb 2
vi  vsig 
v gs  vi 
id 
Rin
Rb1 // Rb 2
 vsig 
 vsig
Rin  Rsig
Rb1 // Rb 2  Rsig
1
gm
1
 RS
gm
vi
1
 RS
gm

g m RD
 vi
1  g m RS
vo
g R
 m D
vi
1  g m RS
Av  
Gv 
vi
1  g m RS
g m vi
1  g m RS
vo  id  RD  
Avo 

g m RD // RL 
1  g m RS
v gs vo
vo
Rb1 // Rb 2
g R // RL 



 Av  Av   m D
vsig vsig v gs Rb1 // Rb 2  Rs i g
1  g m RS
From the analysis, we can see that after adding the source
resistor RS, the gate-to-source range is 1  g m RS times of the original
CS amplifier, but the overall gain Gv is
1
times smaller at the
1  g m RS
same time.
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(3) Common-gate (CG) amplifier
As shown in Fig. 6.1 (b), input node of CG amplifier is at source,
small-signal common node is at gate, and output node is at drain.
VDD
RD
Cc2
Vo
RL
Cc1
Rsig
Vsig
Fig. 6.6 Classical CG amplifier
In Fig. 6.6, the gate node of CG amplifier is connected to a DC
bias voltage. Two capacitors Cc1 and Cc2 are used to block the DC
signal component so that the operating point won’t be affected. In
most of the single-stage MOSFET amplifier applications, CG amplifier
features a good current buffer.
D
i
vo
RD
RL
G
1/gm
Rsig
S
vsig
Ro
vi
Rin
Fig. 6.7 Small-signal model of CG amplifier
The small-signal model is depicted in Fig. 6.7. The small-signal
analysis is as follows:
vgs  vi
Rin 
1
 small value
gm
R out  RD
 ig  0  io  -i  -
vi
 - g m  vi
1
gm
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vo  io  RD  g m  RD  vi
Avo 
vo
 g m  RD
vi
Av  g m  RD // RL 
Gv 
1
gm
vo
v v
v
g  RD // RL 
 i  o 
 o  m
1
vsig vsig vi
1  g m Rsig
 Rsig vi
gm
Compared with CS amplifier, the output voltage of CG amplifier
is in-phase to input signal and CG amplifier has low input
1
impedance
. Owing to its low impedance character CG amplifier
gm
can be also called “unity-gain current amplifier” or “current follower”.
(4) Common-drain (CD) amplifier
As shown in Fig. 6.1 (c), input node of CD amplifier is at gate,
small-signal common node is at drain, and output node is at source.
VDD
VDD
Rb1
Rsig
Cc1
Cc2
Vsig
Vo
Rb2
RL
Fig. 6.8 Classical CD amplifier
In Fig. 6.8, gate node of CD amplifier is connected to a DC bias
voltage. Two capacitors Cc1 and Cc2 are used to block the DC signal
component so that operating point won’t be affected. The CD
amplifier is also called “source follower”.
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D
i
Rsig
ro
G
vsig
Rb1//Rb2
1/gm
S
vo
RL
Fig. 6.9 Small-signal model of CD amplifier
Now using Fig. 6.9 to analyze the small-signal operation, the
derivation is shown as below:
Rb1 // Rb 2
vi 
 vsig  vsig
Rb1 // Rb 2  Rsig
vo 




Avo 
Av 
Gv 
RL // ro 
1
RL // r 
gm

o
 vi
vo
ro

1
vi ro  1 / g m


RL // ro 
1

R // ro  
 L
gm







assume ro 
RL
1
RL 
gm


1 
g m 
assume ro  RL 

R // r 
Rb1 // Rb 2
  L o 1
Rb1 // Rb 2  Rsig  R // r   1
o
 L
gm


1
 when R b1//R b2  R sig , ro 
, ro  RL 
gm


1
1
R out 
// ro 
gm
gm
From the results derived above, CD amplifier has high input
1
impedance (Rb1//Rb2) and low output impedance (
) which means
gm
that it can be a good candidate for voltage buffer.
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V. Explorations
The layout and connections of CD4007 MOS array are shown in Fig. 6.10.
CD4007 consists of 6 transistors, 3 are p-channel and the other 3 are
n-channel, which are connected in some nodes in order to reduce the number
of IC pins required, but otherwise fairly flexible.
1
14
2
13
3
12
4
11
5
10
6
9
7
8
Fig. 6.10 CD4007 MOSFET array
NOTE: Pin14 must be connected to the most positive voltage, and pin
7 to the most negative. For the sake of safety, maintain the voltage
between pin 7 and pin 14 at or below 16V to avoid internal voltage
breakdown. Make sure you turn off the power supply before
changing any circuit connection.
DVM: Digital Voltage Meter
DCM: Digital Current Meter
DMM: Digital Multi-Meter
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1.
Common-source MOSFET amplifier
+5V
RD
RB1
Vo
Vi
C2
C1 RB2
RL
Fig. 6.11 Common-source MOSFET amplifier
(1) Assemble the circuit in Fig. 6.11, using the CD4007 array. The
parameters are: C1=10μF, C2=10μF, RD=4.7kΩ, RL=100kΩ,
RB1=100kΩ, and RB2=330kΩ. Be sure to connect the substrates
correctly to the supplies (pin14 to +5V, pin7 to the ground) as
indicated.
(2) Measure the DC voltage at gate and drain node.
(3) Inject a 200 mVpp sine wave at 100 Hz into Vi. Use your
oscilloscope to measure Vi and Vo. Find the voltage gain of
(Vo/Vi).
(4) Repeat (3) with injecting different frequencies listed in Table 6.2.
2.
Common-gate MOSFET amplifier
RB2
RB1
+5V
RD
Vo
C2
RL
Vi
C1
RB3
Fig. 6.12 Common-gate MOSFET amplifier
(1) Assemble the circuit as shown in Fig. 6.12, using the CD4007
array. The parameters are: C1= 10μF, C2= 10μF, RD = 4.7kΩ,
RL=100kΩ, RB1 = 100kΩ, RB2 = 330kΩ, and RB3 = 10kΩ. Be sure
to connect the substrates correctly to the supplies (pin14 to +5V,
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3.
pin7 to the ground) as indicated.
(2) Measure the DC voltage at gate and drain nodes.
(3) Inject a 200 mVpp sine wave at 100 Hz into Vi. Use your
oscilloscope to measure Vi and Vo. Find the voltage gain of
(Vo/Vi).
(4) Repeat (3) with injecting different frequencies listed in Table 6.3.
Common-drain MOSFET amplifier
+5V
RB1
Vi
C2
Vo
C1
RB2
RS
RL
Fig. 6.13 Common-drain MOSFET amplifier
(1) Assemble the circuit as shown in Fig. 6.13, using the CD4007
array. The parameters are: C1= 10μF, C2= 10μF, RL=100kΩ,
RS =100kΩ, RB1=100kΩ, and RB2=330kΩ. Be sure to connect the
substrates correctly to the supplies (pin14 to +5V, pin7 to the
ground) as indicated.
(2) Measure the DC voltage at gate and source node.
(3) Inject a 200 mVpp sine wave at 100 Hz into Vi. Use your
oscilloscope to measure Vi and Vo. Find the voltage gain of
(Vo/Vi).
(4) Repeat (3) with injecting different frequencies listed in Table 6.4.
VI. Reference
1.
2.
3.
“Laboratory manual for microelectronic circuits”, third edition.
“Microelectronic circuit”, fifth edition.
“CD4007UBE” datasheet, Texas Instruments.
(http://focus.ti.com/lit/ds/symlink/cd4007ub.pdf)
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Laboratory #6 Pre-lab
Class:
Name:
Student ID:
 Problem 1 (Datasheet reading)
Download the datasheet of CD4007 (the website is listed in Ref [3]),
then read and answer the following questions:
1) What’s the maximum supply voltage?
2) What’s the typical and maximum input capacitance?
3) Point out the drain current ID when VGS=5V and VDS=5V according
to the iD-vDS curve in datasheet.
 Problem 2 (PSPICE simulation)
Assemble the circuit as shown in Fig. 6.11, and apply a sine wave to
input with 200 mVpp amplitude and 100 kHz frequency. Plot the waveforms
at input and output terminals. Observe Vi and Vo, are they in-phase?
 Problem 3 (PSPICE simulation)
Assemble the circuit as shown in Fig. 6.12. Then apply a sine wave at
input node which has 200 mVpp amplitude and 100 kHz frequency. Plot the
waveform of input and output terminals.
 Problem 4 (PSPICE simulation)
Assemble the circuit as shown in Fig. 6.13. Then apply a sine wave at
input node which has 200 mVpp amplitude and 100 kHz frequency. Plot the
waveform of input and output terminals.
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Laboratory #6 Report
Class:
Name:
 Exploration 1
Student ID:
Measure the VG=
input frequency
(Hz)
Vi,pp
(V)
V, VD=
V.
V 
Gain= 20  log  o 
 Vi 
Vo,pp
(V)
(dB)
100
1k
10k
100k
500k
1Meg
3Meg
5Meg
7Meg
10Meg
Table 6.2
 Exploration 2
Measure the VG=
input frequency
(Hz)
Vi,pp
(V)
V, VD=
Vo,pp
(V)
V.
V 
Gain= 20  log  o 
 Vi 
(dB)
100
1k
10k
100k
500k
1Meg
3Meg
5Meg
7Meg
10Meg
Table 6.3
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 Exploration 3
Measure the VG=
input frequency
(Hz)
Vi,pp
(V)
V, VS=
Vo,pp
(V)
V.
V 
Gain= 20  log  o 
 Vi 
(dB)
100
1k
10k
100k
500k
1Meg
3Meg
5Meg
7Meg
10Meg
Table 6.4
 Problem 1
Use MATLAB or Excel to plot the frequency vs. gain figures according
to your measurement results and address the 3-dB bandwidth on result
figure. (Exploration 1, 2 and 3 are required)
 Problem 2
Compare your experimental results with the derivations in the
section of “IV. Preparation”. Explain why your experimental results are
different from or matched to the derivations.
 Problem 3
Explain the function of each component in common-source MOSFET
amplifier as shown in Fig. 6.11.
 Conclusion
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