A 15 GHz Bandwidth 20 dBm PSAT
Power Amplifier
with 22% PAE in 65 nm CMOS
Junlei Zhao, Matteo Bassi, Andrea Mazzanti
and Francesco Svelto
University of Pavia, Italy
Outline
• Wideband Power Amplifier Design Challenges
• Coupled Resonators to Improve GBW
• Wideband Power Combining/Splitting
• Circuit Design and Measurement
• Conclusions
Zhao et al., A 15 GHz-Bandwidth 20 dBm PSAT Power Amplifier with 22% PAE in 65 nm CMOS
2
Wideband Power Amplifier Design Challenges
• High efficiency requires high gain
POut  PIn POut  1 
PAE 

1  
PDC
PDC  G 
• Bandwidth trades with gain and efficiency
• Improving GBW is the key to achieve high
efficiency over large bandwidth
Zhao et al., A 15 GHz-Bandwidth 20 dBm PSAT Power Amplifier with 22% PAE in 65 nm CMOS
3
GBW of Power Amplifiers
• Active devices
• Maximum gain is limited by technology
• Class AB biasing further reduces gain
• Large layouts determine significant parasitics
• Passive matching networks
• High-order networks can enhance GBW
• Compact layout to minimize loss
Zhao et al., A 15 GHz-Bandwidth 20 dBm PSAT Power Amplifier with 22% PAE in 65 nm CMOS
4
Outline
• Wideband Power Amplifier Design Challenges
• Coupled Resonators to Improve GBW
• Wideband Power Combining/Splitting
• Circuit Design and Measurement
• Conclusions
Zhao et al., A 15 GHz-Bandwidth 20 dBm PSAT Power Amplifier with 22% PAE in 65 nm CMOS
5
Coupled Resonators
• Simple topology and low loss
• Two peaking frequencies:
L 
1
L
, H  1  2
L
LC
LC
• LC used to control the bandwidth
Zhao et al., A 15 GHz-Bandwidth 20 dBm PSAT Power Amplifier with 22% PAE in 65 nm CMOS
6
GBW Enhancement
50
CR
LC
|Zt| [dBOhm]
45
40
35
30
25
20
15
20
40
60
80
Frequency [GHz]
100
ZtCR  2 Zt LC , BWCR  2 BWLC
Coupled resonators allow 2x GBW enhancement (GBWEN)
Zhao et al., A 15 GHz-Bandwidth 20 dBm PSAT Power Amplifier with 22% PAE in 65 nm CMOS
7
Transformation of Coupled Resonators
Split Lc
Norton
transformation
Transformer
n 1
GBWEN 
2
n
Zhao et al., A 15 GHz-Bandwidth 20 dBm PSAT Power Amplifier with 22% PAE in 65 nm CMOS
8
Effect of Layout Parasitics
50
|Zt| [dBOhm]
40
30
20
Decreasing Q
10
Q=100
0
30
40
Q=30
50
60
70
Frequency [GHz]
Q=10
80
90
• Limited inductor Q leads to asymmetric response
• Network needs to be smart to accommodate parasitics
Zhao et al., A 15 GHz-Bandwidth 20 dBm PSAT Power Amplifier with 22% PAE in 65 nm CMOS
9
Restoring Flat Response
35
|Zt| [dBOhm]
30
ZT (H )
L1

ZT (L )
L3
25
Increasing L1/L3
20
15
10
5
30
Q=10
40
50
60
70
Frequency [GHz]
80
90
• Coupled resonator can be conveniently tuned to
achieve flat response
Zhao et al., A 15 GHz-Bandwidth 20 dBm PSAT Power Amplifier with 22% PAE in 65 nm CMOS
10
Outline
• Wideband Power Amplifier Design Challenges
• Coupled Resonators to Improve GBW
• Wideband Power Combining/Splitting
• Circuit Design and Measurement
• Conclusions
Zhao et al., A 15 GHz-Bandwidth 20 dBm PSAT Power Amplifier with 22% PAE in 65 nm CMOS
11
Power Combing
• Power combining is mandatory to achieve high
Pout for CMOS PAs
• Transformer based combiner/splitter is popular
• Compact size
• Low insertion loss
• Generally narrow bandwidth
Wideband combining through coupled resonators
Zhao et al., A 15 GHz-Bandwidth 20 dBm PSAT Power Amplifier with 22% PAE in 65 nm CMOS
12
Wideband Combiner
2x
4x
2x
• Easy to transform
• Divide the left network into two equal portions
Zhao et al., A 15 GHz-Bandwidth 20 dBm PSAT Power Amplifier with 22% PAE in 65 nm CMOS
13
Wideband Splitter
• Easy to transform
• Divide the right network into two equal portions
Zhao et al., A 15 GHz-Bandwidth 20 dBm PSAT Power Amplifier with 22% PAE in 65 nm CMOS
14
Comparison with Transformer Splitter
40
|Zt| [dBOhm]
35
30
25
20
15
(a) transformer based splitter
10
20
Proposed Splitter
Transformer based Splitter
40
60
80
Frequency [GHz]
100
More than two
times GBW
enhancement.
(b) proposed splitter
Zhao et al., A 15 GHz-Bandwidth 20 dBm PSAT Power Amplifier with 22% PAE in 65 nm CMOS
15
Outline
• Wideband Power Amplifier Design Challenges
• Coupled Resonators to Improve GBW
• Wideband Power Combining/Splitting
• Circuit Design and Measurement
• Conclusions
Zhao et al., A 15 GHz-Bandwidth 20 dBm PSAT Power Amplifier with 22% PAE in 65 nm CMOS
16
PA Design
• A prototype has been designed in ST 65nm CMOS
•
•
•
•
Bandwidth >13 GHz
Gain > 25dB
P1dB > 15dBm
PAE > 20%
120u/60n
120u/60n
240u/60n
120u/60n
240u/60n
Zhao et al., A 15 GHz-Bandwidth 20 dBm PSAT Power Amplifier with 22% PAE in 65 nm CMOS
17
Layout of Splitter
a
b
(a) splitter network
(b) 1st topology
(c) 2nd topology
• Two different layout topologies for splitter
Zhao et al., A 15 GHz-Bandwidth 20 dBm PSAT Power Amplifier with 22% PAE in 65 nm CMOS
18
Stability Analysis
(a) 1st topology
(b) 2nd topology
• Proposed splitter can suppress differential-mode
common-mode oscillation
Zhao et al., A 15 GHz-Bandwidth 20 dBm PSAT Power Amplifier with 22% PAE in 65 nm CMOS
19
Chip Photomicrograph
ST 65nm CMOS
Chip area: 0.57 mm2
Core area: 0.11 mm2
Zhao et al., A 15 GHz-Bandwidth 20 dBm PSAT Power Amplifier with 22% PAE in 65 nm CMOS
20
Measured S-Parameters
S-Parameters [dB]
40
20
0
-20
S21
S12
S11
S22
-40
-60
40
50
60
70
80
Frequency [GHz]
90
Gain≈30dB, BW3dB: 58.5-73.5GHz
Zhao et al., A 15 GHz-Bandwidth 20 dBm PSAT Power Amplifier with 22% PAE in 65 nm CMOS
21
Pout [dBm] / Gain [dB] / PAE [%]
Large Signal Performances at 65GHz
35
Pout
Gain
PAE
30
25
20
15
10
5
0
-20
-15
-10
-5
0
Input Power [dBm]
5
PSAT≈20dBm, P1dB≈16dBm, PAE≈22%
Zhao et al., A 15 GHz-Bandwidth 20 dBm PSAT Power Amplifier with 22% PAE in 65 nm CMOS
22
Pout [dBm] / P1dB [dBm] / PAE [%]
Large Signal Performances over Frequency
25
Peak PAE
Pout
P1dB
22
19
16
13
10
55
60
65
Frequency [GHz]
70
75
PSat>19dBm, P1dB>15dBm, PAE>15% over the bandwidth
Zhao et al., A 15 GHz-Bandwidth 20 dBm PSAT Power Amplifier with 22% PAE in 65 nm CMOS
23
Performance Summary and Comparison
Reference
Tech.
& Vdd
CICC13 [5]
28nm / 1V
24
11
174
16.5
11.7
13
JSSC13 [3]
40nm / 1V
17
6
42
17
13.8
30
RFIC14 [2]
65nm / 1.2V
17.7
12
92
16.8
15.5
15
ISSCC14 [8] 40nm / 1.8V
22.4
n/a
n/a
16.4
13.9
19
ISSCC15 [1] 28nm SOI/ 1V
35
8
450
18.9
15
18
30
15
474
20
16
22
This Work
65nm / 1V
Gain BW GBW PSAT P1dB PAE
(dB) (GHz) (GHz) (dBm) (dBm) (%)
State-of-the-art PSAT and PAE with the largest GBW
Zhao et al., A 15 GHz-Bandwidth 20 dBm PSAT Power Amplifier with 22% PAE in 65 nm CMOS
24
Conclusions
• High GBW is critical for high efficient, wideband
PAs
• Coupled resonators can improve PA GBW while
keeping compact layout
• A methodology has been proposed to design
wideband combiner/splitter using coupled
resonators
• A three-stage two-path PA with 20dBm PSAT,
22% PAE, and 15GHz bandwidth in 65nm
CMOS was demonstrated
Zhao et al., A 15 GHz-Bandwidth 20 dBm PSAT Power Amplifier with 22% PAE in 65 nm CMOS
25
Acknowledgements
• Studio di Microelecttronica,
Pavia, Italy
• Prof. Yann Deval and
Magali de Matos,
University of Bordeaux
Zhao et al., A 15 GHz-Bandwidth 20 dBm PSAT Power Amplifier with 22% PAE in 65 nm CMOS
26
Thank You!
References
[1] A. Larie et al., “A 60 GHz 28 nm UTBB FD-SOI CMOS
reconfigurable power amplifier with 21% PAE, 18.2 dBm P1dB and
74mW PDC,” in ISSCC15
[2] P. Farahabadi and K. Moez, “A dual-mode highly efficient 60 GHz
power amplifier in 65 nm CMOS,” in RFIC14
[3] D. Zhao and P. Reynaert, “A 60-GHz dual-mode class AB power
amplifier in 40-nm CMOS,” in JSSC13
[4] K.-Y. Wang, T.-Y. Chang, and C.-K. Wang, “A 1V 19.3dbm 79GHz
power amplifier in 65nm CMOS,” in ISSCC12
[5] S. Thyagarajan, A. Niknejad, and C. Hull, “A 60 GHz linear
wideband power amplifier using cascode neutralization in 28 nm
CMOS,” in CICC13
[8] S. Kulkarni and P. Reynaert, “A Push-Pull mm-Wave Power
Amplifier with <0.8° AM-PM Distortion in 40nm CMOS,” in ISSCC14
Zhao et al., A 15 GHz-Bandwidth 20 dBm PSAT Power Amplifier with 22% PAE in 65 nm CMOS
28