Metal‐oxide‐semiconductor Field Effect Transistors (MOSFET)
Control of carrier concentration at the oxide/semiconductor interface
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Metal‐oxide‐semiconductor Field Effect Transistors (MOSFET)
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MOSFETs: the scaling‐down issue
EOT: effective oxide thickness
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Resonant tunnelling diodes
Diodes (two terminal electrical devices) are the simplest of the active elements of electronic circuits. Diodes show non‐linear current‐voltage characteristics.
The double barrier resonant‐tunnelling diode is a nanoscale quantum diode.
Consider a double‐barrier heterostructure
A quantum well is prepared by embedding a GaAs layer between two AlGaAs layers (with or without spacer layers)
Inside the well, several quantized levels can exist. → quasi‐bound states: finite probability for the e‐ to tunnel out of the well
The resonant‐tunnelling diode can be thought of as a system with two contacts (with 3D electron states) and a QW (with 2D electron states). The three subsystems are weakly coupled through tunnelling.
141
Resonant tunnelling diodes
Negligible thermal transfer of electrons over the barriers
a) Equilibrium case (no applied voltage). ε1 is the bottom of the 2D subband. The QW parameters are chosen such that in equilibrium, ε1 > EF, contacts
b) Applying a potential between the contacts can induce a downward shift of the level in the well. Eventually, ε1 < EF, left contact → electron transmission.
Electrons from the emitter (left contact) whose kinetic energy on in‐plane motion (perpendicular) [E⊥=ħ2kz2/2m*] coincides with ε1 are transmitted with finite probability
resonant tunnelling
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Resonant tunnelling
4nm‐thick AlAs barriers
5nm‐thick GaAs well
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Resonant tunnelling diodes
(a) Before the level of the well reaches the resonant position, the current is controlled by non‐resonant tunnelling and transport over barriers
(b) when the bias allows resonant tunnelling, the transmission coefficient and the current increases sharply
Resonant tunnelling characteristics
diode current‐voltage (c) when the resonant level is below the bottom of the CB of the emitter, there is a current decrease despite the voltage increase → negative differential resistance
⎛ dI ⎞
Rd = ⎜
⎟
d
Φ
⎠
⎝
−1
(d) At large bias, further increase of the current can be realized either by the contribution of other localized states in the QW in resonance with the emitter, or by non‐resonant transport through and over the barrier 144
Heterostructures and quantum wires
In a quantum wire, electron transport is constrained primarily to be along a single direction → 1‐dimensional electron system
How to confine the electrons in the other two directions? ∙ heterointerface potentials
∙ externally applied electrostatic potentials
a) Quantum wire formed by etching a quantum well structure b) Quantum wire induced by an electrostatic potential that is applied to a metallic split gate placed on top of the heterostructure
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Heterostructures and quantum wires
Split‐gate technique: used to reduce the electron‐gas dimensionality, provided a two‐
dimensional electron gas on an interface. A metal strip ‐ a gate ‐ is deposited onto the 2DEG structure. Using the proper gate bias (negative, for electrons), 2D‐
electrons are repelled from the region beneath the metal strip. Using two closely parallel metal strips, a quantum wire (1D electrons) can be induced by the gate potential. 146
Heterostructures and quantum dots
In a quantum dot, electrons (or holes) are confined in all three directions → 0‐
dimensional electron system
As in the case of quantum wires, there are two ways to fabricate a quantum dot starting from a 2DEG system:
∙ using an etching process to impose geometrical restrictions on the two additional directions
∙ using metal gates (split‐gate technique) to confine the 2DEG. 147
Heterostructures and quantum dots
Patterning of 2DEG for single‐electron applications. OC: ohmic contacts
R: reservoir of electrons QD: quantum dot
TB: tunnel barrier
Rev. Mod. Phys, 64, 849 (1992)
J. Appl. Phys. 97, 031101 (2005)
Gate voltage (mV)
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Semiconductor technology
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Film Deposition methods (from the vapour phase)
Physical methods are characterized by a locally well defined particle source, and generally a free flight in vacuum to the substrate. Chemical methods: precursor molecules fill the reactor as a vapour, dissociate at the hot substrate, and release the atoms of interest.
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Molecular Beam Epitaxy (MBE)
Typical MBE chamber
Ultra‐high vacuum (pressure ∼ 10‐10 mbar)
Molecular or atomic beams are delivered onto the substrate
The sources of the elements are contained in separately heated crucibles
The evaporated elements form beams, which are separately and closely controlled, collimated, and directed onto the substrate (typical flux densities ∼ 1014 ‐ 1016 atoms cm‐2 s‐1)
The slow growth rate (∼ 1ML/s) allows very high quality material
By using shutters for each beam, it is possible to produce abrupt changes in composition, with a resolution of 1 ML (especially interesting for heterostructures and superlattices), and also introduce dopants
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Chemical vapour deposition (CVD)
Schematic representation of a hot‐wall multiple‐wafer CVD reactor Growth occurs through chemical reactions of the component chemicals (precursors) which are transported to the vicinity of the substrate
The chemical reactions are enabled by, for instance, the heated substrate
Typically, the process pressure is > 0.1 mbar.
SiH4 + O2 ↔ SiO2 + 2H2 at 450ºC
(high vapour pressure → vapour‐phase mixing of components and transport of reactants to the surface)
SiH4 ↔ Si + 2H2 at 580‐650ºC ; 1mbar
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Lithography
“Lithography” comes from two Latin words, derived from the Greek, "lithos” (stone) & “graphia” (to write) and means the art of writing from stone. In our context, it refers to a key technology of semiconductor fabrication which allows the definition of lateral structures. Lithography describes the method with which a pattern is defined on a sample. A lithographic system consist of a radiation source, a resist‐coated sample, and an image control system regulating which part of the sample is illuminated.
The resist is changed by illumination; depending of the resist, the exposed (positive resist) or the unexposed (negative resist) areas can be removed selectively by a developing process. 153
Lithography
∙ mask‐based lithography: the image control system uses a mask to transfer the pattern onto the sample using, for instance, optical or x‐ray illumination
∙ direct writing: the patterns are directly written into the resist by a focussed beam (laser, electron or ion beam lithography)
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Optical & X‐ray lithography
Typically, the maximum resolution (minimum feature size) is limited by the wavelength of the radiation source
Optical lithography UV‐source (365 ‐ 436 nm)
deep UV (DUV) (157‐250 nm) extreme UV (EUV) (11‐14nm)
X‐ray lithography (1 nm) 155