IOP PUBLISHING
JOURNAL OF MICROMECHANICS AND MICROENGINEERING
doi:10.1088/0960-1317/20/5/055005
J. Micromech. Microeng. 20 (2010) 055005 (9pp)
Investigating ESD sensitivity in
electrostatic SiGe MEMS
Sandeep Sangameswaran1,2 , Jeroen De Coster1 , Dimitri Linten1 ,
Mirko Scholz1,3 , Steven Thijs1,2 , Guido Groeseneken1,2 and
Ingrid De Wolf1,4
1
2
3
4
IMEC vzw, Kapeldreef 75, 3001 Heverlee, Belgium
Department of Electrical Engineering (ESAT), KU Leuven, Belgium
Department of Electrical Engineering, Vrije Universiteit, Brussels, Belgium
Department of Metallurgy and Applied Materials (MTM), KU Leuven, Belgium
E-mail: sangames@imec.be
Received 14 December 2009, in final form 1 February 2010
Published 23 March 2010
Online at stacks.iop.org/JMM/20/055005
Abstract
The sensitivity of electrostatically actuated SiGe microelectromechanical systems to
electrostatic discharge events has been investigated in this paper. Torsional micromirrors and
RF microelectromechanical systems (MEMS) actuators have been used as two case studies to
perform this study. On-wafer electrostatic discharge (ESD) measurement methods, such as the
human body model (HBM) and machine model (MM), are discussed. The impact of HBM
ESD zap tests on the functionality and behavior of MEMS is explained and the ESD failure
levels of MEMS have been verified by failure analysis. It is demonstrated that electrostatic
MEMS devices have a high sensitivity to ESD and that it is essential to protect them.
(Some figures in this article are in colour only in the electronic version)
MEMS reliability has been widely studied and reported
in recent years. A good description of the major failure
mechanisms in MEMS can be found from the literature [2].
While ESD has for long been known as a big reliability
threat to CMOS technology, and ESD protection for ICs is
well established [3], ESD effects on MEMS have received
comparatively little attention. A number of the commercially
available MEMS such as the Analog Devices accelerometer
or the Texas Instruments DMD micromirror arrays use CMOS
drivers for the MEMS. Thus, the present protection strategy
is to use the ESD protection from CMOS technology, also for
the MEMS.
In this context, it would be very useful to investigate
the ESD sensitivity of MEMS and understand their failure
mechanisms. This in turn would help in designing more
‘ESD-robust’ MEMS and also better ESD protection, thus
helping to cross the reliability hurdle on the path toward
commercialization. Very little is known about the ESD failure
levels in MEMS devices and almost nothing is available in the
literature about ESD protection of stand-alone MEMS. ESD
as a new failure mode in MEMS devices was first reported in
2000 by Walraven et al [4]. Pioneering studies on the ESD
1. Introduction
This paper addresses the impact of electrostatic discharge
(ESD) on microelectromechanical systems (MEMS). ESD is
the sudden transfer of electrical charge between two objects
at different electric potentials. The human body or other
conductive objects can become electrostatically charged if not
properly grounded. If this charge comes in contact with, or
passes near an ESD-sensitive (ESDS) device, ESD damage
can occur. This type of ESD event can be simulated by
the well-known human body model (HBM) and the machine
model (MM) [1]. In addition, grounding a device that has
become charged in an external electrostatic field can cause
high discharge currents of up to a few Amperes to flow with
a rise time of picoseconds. This type of ESD stress causes
severe damage and can be simulated by the charged device
model (CDM). Very small charges accumulated on conductive
elements of a device can exceed the breakdown potential of
the insulating layers or the air gaps between them, causing the
device to destroy itself. Thus, it is very important to study
the effect of ESD when designing for the reliability of any
microelectronic device or system.
0960-1317/10/055005+09$30.00
1
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J. Micromech. Microeng. 20 (2010) 055005
S Sangameswaran et al
(a)
(b)
Figure 1. Schematic cross-section of the micromirror when not actuated (a) and when actuated between the mirror and the left bottom
electrode (b).
• individual 8 μm × 8 μm mirrors with 300 nm thickness;
• 5 × 5 array of 8 μm × 8 μm mirrors with 300 nm
thickness;
• 100 × 100 array of 16 μm × 16 μm mirrors with 300 nm
thickness.
effects on RF MEMS ohmic and capacitive switches have been
carried out by Tazzoli et al [5] whereas Ruan et al also report
the behavior of capacitive RF MEMS switches under ESD
stress based on the HBM and the transmission line pulsing
(TLP) method [6]. Detailed studies on ESD sensitivity in SiGe
torsional micromirrors have been reported for the first time in
the literature as a forerunner of the present work [7].
Accordingly, the aim of this work is to investigate
the intrinsic ESD sensitivity of electrostatically actuated
SiGe MEMS devices and to understand what factors affect
their sensitivity in any particular manner. Considering that
electrostatic actuation is one of the most preferred operating
mechanisms for MEMS devices in general, the two case
studies on unprotected MEMS devices discussed in this paper
represent a much wider class of MEMS devices. The first
case study is based on electrostatically actuated torsional
micromirrors and the second case study on capacitive radio
frequency (RF) MEMS switches.
During normal operation, the mirrors are actuated by a
square wave pulse which, when ramped up, increases the
dynamic tilt angle (α) of the micromirror. In terms of
functionality, a good micromirror would tilt by an angle of
5 mrad for an actuation pulse of 12 V. For functionality test
measurements, the mirror is actuated by a triangular ramp to
plot the dynamic tilt angle versus actuation voltage. A laser
Doppler scanning vibrometer (LDV) which can measure outof-plane displacements optically was used for this purpose
and the measurement [9] is shown in figure 2. Scan points
defined on each individual mirror give information about the
individual tilt angles of each mirror in the case of an array.
For the array test structures used in the measurements, all the
mirrors are connected in parallel so that they can be actuated
all at once from a single pair of bond pads. The behavior of
the torsional micromirror is explained very well by Zhao et al
[10].
Figure 2 shows the tilt angle versus actuation voltage
measurements done for a 5 × 5 array of 8 μm × 8 μm mirrors
with a dc voltage sweep from −13 V to 14 V. The tilt angles
of all the mirrors in the array are plotted on top of each other.
Figure 2 also shows a micrograph of the mirror array with
the measured maximum tilt angle given on the layout of each
mirror. The mean tilt angle of the array at the maximum
actuation voltage is about 5.3 mrad.
Since there is no electrical contact between the mirror
and the bottom electrode during normal operation, the device
behaves electrically like an open circuit. The leakage current
is a few tens of pA for a 1 V dc bias.
2. Description of the devices
2.1. Case study 1—electrostatically actuated torsional SiGe
micromirrors
Electrostatically actuated polycrystalline silicon germanium
(poly-SiGe) torsional square micromirrors which are
fabricated on a silicon substrate have been used as a test
vehicle to study ESD effects on MEMS devices. SiGe has
been previously shown to be a very good material to fabricate
reliable and stable micromirrors [8]. A schematic diagram
illustrating the operation of the micromirror with and without
the actuation voltage is shown in figure 1. The mirror has
two poly-SiGe bottom electrodes, one on either side of the
torsional axis of the mirror whereas the mirror itself is the third
electrode. When electrostatically actuated, the micromirror
tilts on its axis and the dynamic tilt angle α is a function of
the magnitude of the actuation potential applied between the
SiGe bottom electrode and the mirror. Depending on which
electrode is actuated, the mirror can tilt on either side like a
seesaw. The gap between the bottom electrode and the mirror,
when the mirror is flat, is approximately 300 nm.
The devices used for this case study fall in one of the
following three types:
2.2. Case study 2—electrostatically actuated capacitive
radio frequency (RF) MEMS switches
As a second case study, ESD tests have been performed on RF
MEMS capacitive test structures which consist of aluminum
bridges fabricated on a highly resistive silicon substrate. A
simple cross-sectional schematic of a test structure is shown
in figure 3(a). On the bottom electrode, there is a 200 nm
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J. Micromech. Microeng. 20 (2010) 055005
S Sangameswaran et al
Figure 2. Tilt angle measurements (in mrad) of the micromirrors as a function of electrostatic actuation with a triangular wave.
(b)
(a)
(c)
Figure 3. Schematic of the device used for the test: (a) cross-section, (b) micrograph and (c) C-V characteristic.
thick AlN dielectric layer. The bridges are 1 μm thick with
an air gap of 3 μm between the bridge and the AlN dielectric.
Figure 3(b) shows a micrograph of the RF MEMS actuator
in the upstate. The functionality of the RF actuators can
be characterized by the capacitance versus actuation voltage
(C-V) plot. One such characteristic is shown in figure 3(c).
The CV and operating principle of these test structures have
been previously described in great detail [11]. Alternately,
by using the LDV as in the case of the micromirrors, the
actuators can be characterized by measuring their out-of-plane
displacement versus the actuation voltage. The latter approach
is used in this paper.
The typical pull-in voltages are around 10 V, depending
on the length and width of the actuator. Devices with various
dimensions have been used for the work presented in this paper
[12].
MEMS (micromirror or switch) and checking if the devices
used for ESD testing satisfy these criteria is the first part.
Performing ESD tests well within the framework of the
accepted test standards [1] and examining the damage caused
due to ESD after the tests form the second part. Finally,
analyzing the failures and obtaining information about the
behavior of the MEMS devices during ESD is the third part.
All these steps are shown in a sequential measurement process
flowchart in figure 4.
Functionality tests were first performed using the LDV to
measure the displacement versus actuation voltage for these
devices. The devices were actuated with a triangular wave
at a frequency well below their natural resonance frequency.
Following this, ESD testing was performed on the devices
using a wafer-level HBM tester as described in section 3.2
below.
Optical topography and functionality measurements were
repeated after the ESD in order to assess the impact of ESD on
the functionality. The good devices were used for ESD testing
at higher zap levels. Testing was continued until failure.
The criterion for failure of a micromirror is based on its
dynamic tilt angle since mirrors with a tilt angle less than
3. Measurement techniques
3.1. Test methodology
A systematic test methodology was followed for the ESD
testing of MEMS. Defining the functionality criteria for the
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Entity
Description
Functionality
test
Out-of-plane
Displacement/Velocity
measurement with Laser
Doppler Vibrometer
ESD test
Wafer level HBM ESD
test
MEMS
DeviceUnder-Test
Micromirrors OR RF
capacitive switches
Failure
Analysis
Microscopic inspection
after ESD-induced failure
Figure 4. Flowchart of the measurement process flow.
Figure 5. Simple schematic of a human body model.
Figure 6. Comparison of voltage discharge waveforms measured
across a micromirror after a 20 V zap during HBM and MM tests;
MEMS show similar behavior for MM and HBM events because of
their high impedance.
4 mrad are considered to be failed for the targeted specific
application. A scanning electron microscope (SEM) was used
after the ESD tests for failure analysis and to examine damage.
A digital microscope was also used for this purpose.
automated, assembly, packaging or testing. Therefore in the
model schematic for MM, the 1500 RHBM shown in figure 5
is replaced by a short (0 ).
The voltage discharge waveform across the MEMS during
ESD and the failure levels are very similar to those during an
HBM event as shown in figure 6. This can be attributed to
the high impedance of the capacitive MEMS devices. Since
the equivalent resistance of the MEMS exceeds the value of
RHBM by several orders of magnitude, the difference of 1500 between the resistances in the HBM and MM tester models is
quite insignificant. Consequently, for MEMS devices, HBM
tests are sufficient to obtain the required information regarding
the reliability during both MM and HBM stress events.
3.2. Wafer level HBM ESD tests
To study the ESD sensitivity for micromirrors, wafer-level
ESD testing was performed on 5 × 5 sized micromirror
arrays and individual micromirrors using a wafer-level ESD
tester [13]. The human body model (HBM) gives the most
commonly used approximation of a real-life ESD event.
The simple RC model of the HBM tester with CHBM =
100 pF and RHBM = 1500 as shown in figure 5 simulates
the practical scenario where a charged human (operator), on
making contact with an ESD-sensitive device, discharges all
the charge in his body through the device to the ground [1].
For the HBM ESD tests on the MEMS, the CHBM in the HBM
tester was first charged up to the desired ESD zap level and
then discharged through the RHBM and the MEMS DUT to the
ground. The voltage discharge across the MEMS during ESD
was measured and used to study the behavior of the device
under the ESD stress.
4. Results of measurements
4.1. HBM tests on micromirrors
As described in section 3.2, HBM zap voltages starting at
10 V and increasing in steps of 10 V were applied across
the mirror and one of the bottom electrodes. The voltage
discharge measured across an individual micromirror after
a 30 V HBM zap is shown in figure 7(a). It was found
that the discharge time of the voltage waveform measured
across the MEMS device during an HBM stress is in the order
of milliseconds, which is very long. In comparison, HBM
discharge times in most ESD-protected CMOS devices are less
than a microsecond. At the point of failure, it was observed
3.3. Machine model versus human body model tests
Machine model (MM) testing was also done on the
electrostatic SiGe MEMS. The MM represents the real-life
ESD event where a charged machine or instrument, instead of
a human as in the case of HBM, discharges through a device
to the ground. In real life, this is a typical scenario during
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J. Micromech. Microeng. 20 (2010) 055005
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(a)
(b)
Figure 7. Voltage discharge waveform measured across the micromirror after an HBM-ESD zap of (a) 30 V (mirror is still functional) and
(b) 60 V (mirror is failed and the discharge is fast); note the different time scales of both the figures.
is thus limited by the leakage inside the HBM tester itself
which is why all the three waveforms show a similar and long
exposure time of several milliseconds. It is significant to note
that this tester leakage is not a limitation normally while doing
tests on active CMOS circuits which conduct current (and
have low impedance) during operation. It is thus concluded
that for high impedance open capacitive MEMS devices, the
discharge time durations are only limited by the leakage in the
ESD tester.
4.2. HBM tests on RF MEMS actuators
Figure 8. Voltage discharge waveforms measured across the MEMS
after 50 V HBM zap, across the substrate when no MEMS device is
connected, and from the ESD tester with the probe needles lifted.
Wafer-level ESD testing has also been done on the RF MEMS
actuators to determine their ESD failure levels. HBM zaps
have been given to the device at various levels till failure.
The HBM voltage discharge waveform across a test device
after a 50 V zap is shown in figure 9(a). The electrostatically
actuated switches used for the present test are also capacitive
(open) MEMS devices. Hence, a similar waveform can be
expected as in the case of the micromirrors.
A large number of identical devices were tested for
consistency of measurement results. The ESD failure levels
for these devices were measured to be in the range of
120–160 V. During failure, multiple large and fast current
spikes were observed during the first microsecond as shown in
figure 9(b). These were accompanied by simultaneous drops
in the voltage discharge waveform which coincided with the
current peaks. It is concluded that during failure, the electrical
breakdown occurs across the narrowing air gap between the
bridge and the bottom electrode of the closing switch. Very
often, this stage of failure is succeeded by a contact formation
which results in high current flow and welding damage.
that the voltage measured across the MEMS decayed faster
by nearly three orders of magnitude—during a few tens of
microseconds—as shown in figure 7(b). Most of the arrays
tested showed failure levels of 40 V whereas the failure level
for the individual mirrors was about 60 V. The HBM zap tests
were stopped on seeing signs of failure [7].
4.1.1. Long discharge after ESD in capacitive MEMS—the
tester effect. The long voltage discharge waveform measured
across the MEMS after a low pre-charge level HBM zap can
be explained by the following three tests. First, HBM ESD
zaps were applied across a poly-SiGe micromirror at a zap
level lower than the ESD failure level. Next, HBM zaps were
applied across a set of identical and adjacent bond pads with no
MEMS device connected in between. In the third test, HBM
zaps were applied while the probe needles of the tester were
lifted high away from the substrate. The probe needles were
also well separated from each other to avoid sparking between
the needles.
The respective voltage discharge waveforms which were
all measured for a 50 V HBM zap are shown in figure 8. All
the three observed discharge waveforms are similar and they
have an RC time constant of 1.3 ms.
When the mirror is not pulled in, it behaves like an open
circuit. Consequently, the charge that is transferred to the
mirror during the ESD zap cannot leak away through the
mirror. The time duration of the observed discharge waveform
4.3. Position-dependent failure in large micromirror arrays
Experiments on arrays of 100 × 100 micromirrors show that
the damage is limited to the first few rows closest to the
actuation electrodes as shown in figure 10. The first few
mirrors fail under the impact of the ESD stress and this causes
the voltage seen across the mirrors in the next rows to reduce.
Thus, these mirrors do not suffer sufficient voltage stress to
fail.
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J. Micromech. Microeng. 20 (2010) 055005
S Sangameswaran et al
(a)
(b)
Figure 9. Voltage discharge waveform across the actuator after an HBM-ESD zap of (a) 50 V and (b) 160 V (current spikes seen at failure;
current measurements were limited to 160 mA.).
Figure 10. Position-selective failure in large sized micromirror arrays and schematic to demonstrate the effect of device capacitance on the
ESD failure level.
ESD failure in large micromirror arrays can be explained
in terms of their capacitance. Since all the mirrors in the
array described above are ganged electrically in parallel to
each other, the total capacitance of the array is the sum of the
capacitances of all the mirrors. Due to this large capacitance,
the ESD zap will result in a relatively lower peak voltage stress.
The higher the number of mirrors in the array, the lower will
be the peak voltage for a given ESD zap. In other words,
the micromirror array will reach the failure level at higher
ESD zap amplitudes when zapped by an HBM tester as shown
in figure 10. Therefore, MEMS with larger capacitance are
likely to be more ESD robust.
5. Failure analysis
5.1. Visual inspection with optical profilometry
Optical profilometry is a key tool in failure analysis of MEMS
because it allows studying the topography of the MEMS with
high accuracy. Figure 12 shows the optical profiles of a 5 ×
5 micromirror array both before and after ESD stress. As can
be seen, micromirrors got pulled-in as a result of ESD stress.
A similar result is observed for the RF MEMS actuators.
5.2. Specs comparison with functionality measurements
Functionality tests were done on the MEMS both before and
after ESD zapping in order to quantify the impact of ESD on
the device specifications. The 5 × 5 sized micromirror array
discussed in figure 2 is a good example to illustrate this point.
All the mirrors in the array were found to be functional before
the ESD test with an average tilt angle of 5.3 mrad as shown
in figure 2.
After ESD stress at a zap level of 40 V, functionality
measurements were repeated. The result is shown in figure 13.
Many mirrors in the array are pulled in and show hardly any
movement for the same range of actuation voltages. The array
is clearly out-of-specs. It should be noted that not all the
mirrors of the array suffer damage in the same way. Some
of the mirrors remain stuck after pull-in. These are shown
4.4. Impact of mechanical stiffness on the ESD failure level
It is observed that mechanical properties such as the stiffness
constant of the MEMS DUT influence the ESD sensitivity.
In order to illustrate this, ESD measurements were done on
micromirrors with hinge widths of W = 350 nm and W =
250 nm. Since the rotational stiffness of a rectangular
cross-section torsion beam varies approximately with W 4 , the
350 nm hinge is expected to be four times stiffer than the
250 nm hinge. In turn, this fourfold increase in stiffness
gives rise to a twofold increase in the pull-in voltage. From
figure 11, a similar increase in the ESD failure level is seen
for the 350 nm hinge.
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J. Micromech. Microeng. 20 (2010) 055005
S Sangameswaran et al
Figure 11. Dependence of ESD failure levels on mechanical stiffness (torsional hinge width of micromirrors).
(a)
(b)
Figure 12. Optical profilometry on the surface of a micromirror array (a) before ESD tests and (b) after a 40 V ESD zap shows pull-in of
mirrors due to ESD.
Figure 13. Tilt-angle measurements on a micromirror array after ESD stress show failure and loss of functionality: ESD failure level
∼40 V; mean tilt angle before ESD ∼5.3 mrad (refer to figure 2).
in black in figure 13 and have very low tilt angles. Some
other mirrors do not get pulled in but merely show reduced tilt
angles. It is inferred that this is due to the permanent leakage
in the pulled-in mirrors and the corresponding voltage drop in
the damaged array which causes a lower actuation potential to
be seen across these mirrors.
of the mirrors in the array were blown away as shown in
figure 14. A lot of welding damage between the bottom
electrodes of adjacent mirrors was observed. In the tested
devices, these electrodes were placed very close to each other
(∼300 nm) which can potentially cause sparking across the
air gap between them. Designing a wider gap between these
electrodes is possibly a good way of avoiding gap breakdown
and current flow between them. New test structures have been
designed with wider electrode spacing and wider gaps between
adjacent mirrors in the array.
RF MEMS actuators also show ESD failure for low zap
levels and the failure is studied by inspecting them under a
5.3. Verifying failure modes with a scanning electron
micrograph
Scanning electron micrographs (SEM) were taken after the
ESD reliability tests to examine damage with a high level
of resolution and accuracy. The SEM showed that most
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J. Micromech. Microeng. 20 (2010) 055005
S Sangameswaran et al
Figure 14. SEM of the micromirror array after ESD shows two things: (1) most mirrors are blown away and (2) welding damage is
commonly seen between electrodes of adjacent mirrors.
Figure 15. SEM of RF MEMS capacitive switches after ESD shows the most probable point of failure. Damage is seen along the edge of
the bottom electrode. Ripping the switch off shows evidence of hot-spot formation in the electrode.
thus there is a real need to protect these devices in applications.
HBM ESD failure voltage levels of 40 V for micromirror
arrays and around 120 V for RF capacitive switches have been
obtained. This puts them in the class 0 level of ESD-sensitive
devices, i.e., the ultra-sensitive category [1].
Secondly, it has been shown that the high impedance of
electrostatic MEMS makes the ESD stress voltage discharge
over a very long time (∼ms) often resulting in an overstresscaused failure and high EOS/ESD sensitivity. Leakage
in conventional ESD testers has been shown to limit this
discharge duration to a few milliseconds.
Most often the failure is seen in the form of an electrical
short. This is also accompanied by current-related damage and
welding around the spot of contact. On the other hand, higher
capacitance in MEMS devices helps toward ESD robustness
by limiting the maximum amplitude of the voltage stress.
Contact breakdown followed by current flow resulting in
hot spots and welding has been identified as a potential failure
mode in MEMS during ESD events. RF actuators are found
scanning electron microscope. Figure 15 shows an actuator
after failure at a zap level of 160 V. Current-caused damage is
indicated by the bright spot and damage seen on the actuator
bridge. Ripping the bridge off and examining the electrode
underneath shows localized damage that suggests current flow
through a contact breakdown. It is also observed with the help
of profilometry that such damages are seen along the edge of
the bottom electrode which is in contact with the pulled in
actuator.
6. Conclusions
Wafer-level HBM ESD reliability tests on electrostatic SiGe
MEMS devices are discussed in this paper. Two representative
test vehicles in the form of torsional micromirrors and
capacitive switches were chosen. It has been demonstrated
that unprotected electrostatic MEMS are very sensitive to ESD
stress. The observed ESD failure levels are extremely low and
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J. Micromech. Microeng. 20 (2010) 055005
S Sangameswaran et al
to suffer this damage at those locations where they come into
contact with the bottom electrode under ESD stress.
Apart from designing MEMS with better ESD
performance, it is also essential to have ESD protection on the
MEMS devices before they go into a package. ESD protection
for MEMS is very essential not only for stand-alone MEMS
applications but also where the MEMS and CMOS are placed
side-by-side on the same package and are connected to each
other, for e.g., by wire bonds. In this case the MEMS itself can
be subjected to ESD during handling and bonding processes.
Also, MEMS co-integrated on top of CMOS is not always a
cost-effective or area-effective alternative. MEMS actuation
voltage levels are often much higher than the voltage levels
seen in many CMOS devices and as such not all MEMS can
be easily integrated with CMOS. Therefore, ESD protection
for MEMS may not always be CMOS based but also merits a
lot of attention along a MEMS-based approach.
To summarize, ESD is a real threat to the reliability of
electrostatic SiGe MEMS devices and needs to be investigated
in depth to understand the failure mechanisms. ESD protection
for MEMS is a highly relevant and challenging task, especially
important from the reliability perspective.
[2] Walraven J A, Waterson B A and De Wolf I 2002 Failure
analysis of MEMS Microelectronic Failure Analysis
(Materials Park, OH: ASM International) pp 75–98
(Desk Reference Supplement)
[3] Amerasekera A and Duvvury C 2002 ESD in Silicon
Integrated Circuits 2nd edn (New York: Wiley)
[4] Walraven J A, Soden J M, Tanner D M, Tangyunyong P,
Cole E I Jr, Anderson R R and Irwin L W 2000 Electrostatic
discharge/electrical overstress susceptibility in MEMS: a
new failure mode Proc. SPIE 4180 30–9
[5] Tazzoli A, Peretti V and Meneghesso G 2007 Electrostatic
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RF-MEMS switches IEEE Trans. Device Mater. Reliab.
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[6] Ruan J, Nolhier N, Bafleur M, Bary L, Coccetti F, Lisec T
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[7] Sangameswaran S, De Coster J, Linten D, Scholz M, Thijs S,
Haspeslagh L, Witvrouw A, Van Hoof C, Groeseneken G
and De Wolf I 2008 ESD reliability issues in MEMS: a case
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[8] Gromova M et al 2007 Highly reliable and extremely stable
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pp 759–62
[9] De Coster J, Haspeslagh L, Witvrouw A and De Wolf I 2008
Long-term reliability measurements on MEMS using a
laser-Doppler vibrometer Proc. SPIE 7155 71550G
[10] Zhao J P, Chen H L, Huang J M and Liu A Q 2005
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[11] Czarnecki P et al 2008 New insights into charging in
capacitive RF MEMS switches Proc. 46th IRPS Int. Symp.
(Phoenix, USA, 2008) pp 496–505
[12] ESA Endorfins Project Nr: 18613/05/NL/1 A
[13] Scholz M, Thijs S, Linten D, Trémouilles D, Sawada M,
Nakaei T, Hasebe T, Natarajan M I and Groeseneken G
2007 Calibrated wafer-level HBM measurements for
quasi-static and transient device analysis Proc. 29th
EOS/ESD Symp. (Anahiem, USA) pp 89–94
Acknowledgments
The authors would like to thank Dr Ann Witvrouw and Dr Luc
Haspeslagh of IMEC for processing the micromirror samples
and providing them for testing. The authors would also like to
thank Piotr Czarnecki of IMEC for providing the RF MEMS
actuator samples from the ESA Endorfins project.
References
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9