Design and Development of an ADC/DAC Evaluation
Board for NIJ Public Safety Radio
S.M. Shajedul Hasan∗ and S.W. Ellingson
November 20, 2007
Contents
1 Introduction
2
2 ADC/DAC Board Overview
2
3 Description of the ADC Section
4
4 Description of the DAC Section
5
5 Description of the Power Supply Section
5
6 Description of the Settings
6
7 Summary
6
A Pin List
A.1 ADC Pin List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A.2 DAC Pin List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10
10
10
B Bill of Materials
12
C Schematic
15
D Layout
19
∗
Bradley Dept. of Electrical & Computer Engineering, 432 Durham Hall, Virginia Polytechnic Institute
& State University, Blacksburg, VA 24061 USA. E-mail: hasan@vt.edu
1
1
Introduction
An experimental multi-band/multi-mode radio for public safety applications is being developed in Virginia Tech under a project sponsored by the U.S. Department of Justice [1]. The
goal of this project is to develop and demonstrate a single radio which can operate in all
the public safety frequency bands presented in [2, 3]. To provide context, Figure 1 shows a
Board of
Level
Plan of of
Public
Safety Radio
conceptual “board-level” overview
a prototype
the proposed
radio, consisting of multiplexer boards, RFIC transceiver board, ADC/DAC board and baseband processing board.
The description of RFIC board is already presented in [4]. The design and development of
the ADC/DAC board is described here.
I
Rx
Q
Rx
Multiplexer
Board
Rx/Tx Board
with
Motorola RFIC
ADC/DAC
Board
Tx Multiplexer
Board
FPGA Board
Baseband
Processing
I
Q
Tx
SPI
Figure 1: Conceptual board-level overview.
Figure 2 shows the completed ADC/DAC board.
This report is organized as follows. Section 2 presents the summary of the input/output
ports of ADC/DAC board. Section 3 and 4 describe the circuit topology for the ADC and
DAC section respectively. Section 5 presents the circuit description of the power supply and
Section 6 describes the various jumper settings. Section 7 concludes the report presenting the
total cost. Finally, four appendices present the pin list of ADC and DAC, bill of materials,
complete schematic and layout images.
2
ADC/DAC Board Overview
Figure 3 and Table 1 present all the input/output ports of the ADC/DAC board.
2
A PROGRAM OF THE NATIONAL INSTITUTE OF JUSTICE
DAC
evices AD9248
4b, 20 MSPS
ourced by system
over 1-20 MSPS
evices AD9761
0b, 40 MSPS
ith ADC
at least 12 bits
Rx/Tx Board Overview
130 mA @
9V, running
4 MSPS
Figure
2: Image of
ADC/DAC board.
2
< 50 cm to implement on a 4-layer PCB
ADC ~ $21 (1k), DAC ~ $10 (1k)
EXT_CLK_DAC
Multiband/Multimode Radio
Ellingson – Oct 24, 2007
IB
IA
DAC Output
QB
QA
ADC/DAC Board
IA
IB
ADC Input
QB
QA
CLK_ADC
Figure 3: Summary of ADC/DAC board.
3
ADI Interface to
FPGA Board
Function
DAC Output
ADC Input
CLK ADC Input
CLK DAC Input
ADI Interface
Port Name
IB
IA
QB
QA
IA
IB
QB
QA
CLK ADC
EXT CLK
ADI
Conn. Name
J19
J18
J16
J17
J2
J3
J4
J5
J6
J15
J1, J12
Characteristics
Differential Output
of I-Channel
Differential Output
of Q-Channel
Differential Input
of I-Channel
Differential Input
of Q-Channel
ADC Reference Clock
External DAC Clock
ADI interface to FPGA
Table 1: Input/Output ports of the ADC/DAC board.
3
Description of the ADC Section
AD9248 dual 14-bit A/D converter from Analog Devices has been selected to convert the
analog signal to digital signal in our design to operate the receiver section [5]. The differential
in-phase (I) and quadrature-phase (Q) inputs are supplied to the input ports of the ADCs.
Multiplexed data output option enables to get the multiplexed digitized I and Q signals
from the Data Port B. One single external clock is used to supply the reference clock for
both of the A/D converters in this IC. The output of the Data Port B is connected to a
40-pin connector (J1) through a couple of octal bus buffer ICs (74VHC541) and some 22 ohm
resistor pads. The unused output Data Port A is terminated with some 22 ohm resistors and
connected to a 40-pin header connector (J11). Figure 4 shows the circuit diagram example
for the differential input of the ADC. Detailed circuit diagrams of the ADC section can be
found in the “ADC/DAC Board/ADC Circuits” sheet in Appendix C.
Figure 4: ADC input circuit diagram (the unconnected lines in the figure go to the VIN+ A
and VIN- A pins).
4
4
Description of the DAC Section
AD9761 dual 10-bit D/A converter from Analog Devices has been selected to convert the
digital signal to analog signal in our design for the transmission operation [6]. Similar to
the ADC section, the DAC provides the differential in-phase (I) and quadrature-phase (Q)
analog output signals from the digital interleaved I and Q input signal. One single external
clock is used to supply the reference clock for the D/A converters in this IC. The input of
the Data Port is connected to a 40-pin connector (J12) through some 22 ohm resistor pads.
Figure 5 shows the circuit diagram example for the differential output of the DAC. Detailed
circuit diagrams of the DAC section can be found in the “ADC/DAC Board/DAC Circuits”
sheet in Appendix C.
Figure 5: DAC output circuit diagram (the unconnected lines in the figure go to the IA and
IB pins).
5
Description of the Power Supply Section
Three separate 3V supply voltages and one 2.5V supply voltage for ADC, and two separate
5V supply voltages for DAC have been created from a single 10V power source. First, the
main 10V input voltage is fed into a 3A low dropout regulator IC LT1529 to create a 5V
positive voltage. This 5V voltage is supplied to the input of the four low dropout regulator
ICs ADP3339, which provides the required output voltage of 3V and 2.5V. Two positive voltage regulator ICs MC78M05 generate the 5V supply voltages for the DAC directly from the
10V power supply. Fig. 6 shows the circuit diagram example for the power supply. Detailed
circuit diagrams for all other power supply pins can be found in “ADC/DAC Board/Power
Supply Circuits” sheet in Appendix C.
5
Figure 6: Power supply section circuit diagram (the unconnected lines in the right hand side
of the figure go to the “MC78M05” ICs and “ADP3339” ICs to generate the supply voltages
for ADC and DAC respectively).
6
Description of the Settings
Table 2 shows the jumper settings of the PCB.
Jumper
J21
J22
J23
J24
J25
J26
J8
J9
J10
J7
J14
Description
Power
Power
Power
Power
Power
Power
Mux Select
Mux Select
Mux Select
Clock Polarity
DAC Clock Select
Normal Setting
In
In
In
In
In
In
Out
Out
In
A
A
Comment
3V supply to ADC
2.5V supply to ADC
3V supply to ADC
3V supply to ADC
5V supply to DAC
5V supply to DAC
Connect MUX SEL pin to Clock
Connect MUX SEL pin to VDD
Connect MUX SEL pin to GND
Position B select the opposit polarity
‘A’ selects the ADI clock and ‘B’ selects the
external clock
Table 2: PCB Jumper Settings.
7
Summary
A summary of the cost for one ADC/DAC board is given in Table 3. Since we prepared just
two boards for the present study using the quickest manufacturing time, the PCB fabrication
and assembly cost is not representative of the cost to build the same device in large quantities.
6
Component
ADC & DAC ICs
Other ICs
Capacitor
Inductor
Resistor
MMCX Connector
Other Connectors
Other Components
PC Board
PC Board Assembly
Quantity
2
10
68
4
41
10
16
17
Subtotal
1
1
Total
Price(US $)
43.20
26.00
5.00
1.00
4.00
60.30
23.50
3.50
166.50
450.00
925.00
1541.50
Table 3: Summary of the cost for one ADC/DAC board.
7
References
[1] NIJ project web site, http://www.ece.vt.edu/swe/chamrad/.
[2] S. W. Ellingson, “Phase I Technical Report,” Virginia Tech, VA, Tech. Rep. 15, Oct.
2006. [Online]. Available: http://www.ece.vt.edu/swe/chamrad/.
[3] S. W. Ellingson, S.M. Hasan, M. Harun, and C.R. Anderson, “Phase II Technical Report,” Virginia Tech, VA, Tech. Rep. 23, Oct. 2007. [Online]. Available:
http://www.ece.vt.edu/swe/chamrad/.
[4] S.M. Hasan and S.W. Ellingson, “Design and Development of an Evaluation Board
with RFIC Ver. 4,” Virginia Tech, VA, Tech. Rep. 22, Sep. 2007. [Online]. Available:
http://www.ece.vt.edu/swe/chamrad/.
[5] Datasheet of AD9248 Dual 14-bit Analog-to-Digital Converter, Rev. A, Mar. 2005. [Online]. Available: http://www.analog.com/UploadedFiles/Data Sheets/AD9248.pdf.
[6] Datasheet of AD9761 10-bit Dual Transmit D/A Converter, Rev. C, Jun. 2005. [Online].
Available: http://www.analog.com/UploadedFiles/Data Sheets/AD9761.pdf.
8
Appendices
9
A
Pin List
This section presents the pin description of the ADC and DAC ICs.
AD9248
A.1
ADC Pin List
Fig. 7 shows the pin function of AD9248 ADC.
Table 6. Pin Function Descriptions (64-Lead LQFP and 64-Lead LFCSP)
Pin No.
1, 4, 13, 16
2
3
5, 12, 17, 64
6
7
8
9
10
11
14
15
18
19
20
21
Mnemonic
AGND
VIN+_A
VIN−_A
AVDD
REFT_A
REFB_A
VREF
SENSE
REFB_B
REFT_B
VIN−_B
VIN+_B
CLK_B
DCS
DFS
PDWN_B
22
OEB_B
23 to 27,
30 to 38
28, 40, 53
29, 41, 52
D0_B (LSB) to
D13_B (MSB)
DRGND
DRVDD
39
42 to 51,
54 to 57
58
59
OTR_B
D0_A (LSB) to
D13_A (MSB)
OTR_A
OEB_A
60
PDWN_A
61
MUX_SELECT
62
63
SHARED_REF
CLK_A
Description
Analog Ground.
Analog Input Pin (+) for Channel A.
Analog Input Pin (−) for Channel A.
Analog Power Supply.
Differential Reference (+) for Channel A.
Differential Reference (−) for Channel A.
Voltage Reference Input/Output.
Reference Mode Selection.
Differential Reference (−) for Channel B.
Differential Reference (+) for Channel B.
Analog Input Pin (−) for Channel B.
Analog Input Pin (+) for Channel B.
Clock Input Pin for Channel B.
Enable Duty Cycle Stabilizer (DCS) Mode.
Data Output Format Select Pin (Low for Offset Binary, High for Twos Complement).
Power-Down Function Selection for Channel B.
Logic 0 enables Channel B. Logic 1 powers down Channel B (outputs static, not High-Z).
Output Enable Pin for Channel B.
Logic 0 enables Data Bus B. Logic 1 sets outputs to High-Z.
Channel B Data Output Bits.
Digital Output Ground.
Digital Output Driver Supply. Must be decoupled to DRGND with a minimum 0.1 µF capacitor.
Recommended decoupling is 0.1 µF capacitor in parallel with 10 µF capacitor.
Out-of-Range Indicator for Channel B.
Channel A Data Output Bits.
Out-of-Range Indicator for Channel A.
Output Enable Pin for Channel A.
Logic 0 enables Data Bus A. Logic 1 sets outputs to High-Z.
Power-Down Function Selection for Channel A
Logic 0 enables Channel A. Logic 1 powers down Channel A (outputs static, not High-Z).
Data Multiplexed Mode.
(See Data Format section for how to enable; high setting disables output data multiplexed mode.)
Shared Reference Control Pin (Low for Independent Reference Mode, High for Shared Reference Mode).
Clock Input Pin for Channel A.
Figure 7: ADC Pin List [5].
A.2
DAC Pin List
Fig. 8 shows the pin function of AD9761 DAC.
Rev. A | Page 10 of 48
10
PIN CONFIGURATION
28 RESET/SLEEP
(MSB) DB9 1
DB8 2
27 COMP1
DB7 3
26 IOUTA
DB6 4
DB5 5
DB4 6
25 IOUTB
AD9761
24 ACOM
TOP VIEW 23 AVDD
DB3 7 (Not to Scale) 22 COMP2
DB2 8
21 FSADJ
DB1 9
20 REFIO
(LSB) DB0 10
19 REFLO
CLOCK 11
18 QOUTB
WRITE 12
17 QOUTA
SELECT 13
16 COMP3
DVDD 14
15 DCOM
PIN FUNCTION DESCRIPTIONS
Pin No.
Mnemonic
Description
1
DB9
Most Significant Data Bit (MSB).
2–9
DB8–DB1
Data Bits 1–8.
10
DB0
Least Significant Data Bit (LSB).
11
CLOCK
Clock Input. Both DACs’ outputs updated on positive edge of clock and digital filters read respective
input registers.
12
WRITE
Write Input. DAC input registers latched on positive edge of write.
13
SELECT
Select Input. Select high routes input data to I DAC; select low routes data to Q DAC.
14
DVDD
Digital Supply Voltage (2.7 V to 5.5 V).
15
DCOM
Digital Common.
16
COMP3
Internal Bias Node for Switch Driver Circuitry. Decouple to ACOM with 0.1 µF capacitor.
17
QOUTA
Q DAC Current Output. Full-scale current when all data bits are 1s.
18
QOUTB
Q DAC Complementary Current Output. Full-scale current when all data bits are 0s.
19
REFLO
Reference Ground when Internal 1.2 V Reference Used. Connect to AVDD to disable internal reference.
20
REFIO
Reference Input/Output. Serves as reference input when internal reference disabled. Serves as 1.2 V
reference output when internal reference activated. Requires 0.1 µF capacitor to ACOM when internal
reference activated.
21
FSADJ
Full-Scale Current Output Adjust. Resistance to ACOM sets full-scale output current.
22
COMP2
Bandwidth/Noise Reduction Node. Add 0.1 µF to AVDD for optimum performance.
23
AVDD
Analog Supply Voltage (3 V to 5.5 V).
24
ACOM
Analog Common.
25
IOUTB
I DAC Complementary Current Output. Full-scale current when all data bits are 0s.
26
IOUTA
I DAC Current Output. Full-scale current when all data bits are 1s.
27
COMP1
Internal Bias Node for Switch Driver Circuitry. Decouple to AGND with 0.1 µF capacitor.
28
RESET/SLEEP
Power-Down Control Input if Asserted for Four Clock Cycles or Longer. Reset control input if
asserted for less than four clock cycles. Active high. Connect to DCOM if not used. Refer to RESET/
SLEEP Mode Operation section.
Figure 8: DAC Pin List [6].
–6–
11
REV. C
B
Bill of Materials
This section presents the bill of materials.
12
Bill of Materials
NIJ ADC_DAC Board, Ver. 1.0
MPRG/Virginia Tech
Prepared By: S.M. Hasan, Date: OCT 01, 2007
Item
Qty
Reference
Part Name
Package
Manufacturer
Manufacturer Part#
Distributor
Distributor Part#
Description
1
2
U2-3
74VHC541
20-SOL
TOSHIBA
TC74VHC541FW
Digikey
TC74VHC541FW-ND
OCTAL BUS BUFFER
2
1
U4
74VHC04MTC
14-TSSOP
FAIRCHILD
SEMICONDUCTOR
74VHC04MTC
Digikey
74VHC04MTC-ND
HEX INVERTER
3
1
U8
AD3339,2.5V
SOT-223
Analog Devices
ADP3339AKCZ-2.5-R7
Digikey
ADP3339AKCZ-2.5-R7CT-ND
Low Dropout Regulator
4
3
U7 U9-10
AD3339,3V
SOT-223
Analog Devices
ADP3339AKCZ-3-RL7
Digikey
ADP3339AKCZ-3-RL7CT-ND
Low Dropout Regulator
5
1
U1
AD9248
64-LQFP
Analog Devices
AD9248BSTZ-20
Digikey
AD9248BSTZ-20-ND
14-Bit Dual A/D
Converter
6
1
U5
AD9761
28-SSOP
ANALOG DEVICES
AD9761ARSZ
Digikey
AD9761ARSZ-ND
DUAL 10-BIT DAC
7
7
C7 C9 C12 C14 C16 C18
C21
8
19
9
CAP_0603
Panasonic-ECG
ECJ-1VB1H102K
Digikey
PCC1772CT-ND
SURFACE MOUNT
CAPACITOR 0603 Size
C8 C10-11 C13 C17 C1920 C25-27 C29-31 C33
0.1uF
C37-38 C41-42 C45
CAP_0603
Murata Electronics
GRM188R71H104KA93D
Digikey
490-1519-1-ND
SURFACE MOUNT
CAPACITOR 0603 Size
1
C36
1uF
CAP_0603
Panasonic-ECG
ECJ-1VB1C105K
Digikey
PCC2224CT-ND
10
6
C23-24 C39-40 C43-44
20pF
CAP_0603
Murata Electronics
GRM1885C2A200JA01D
Digikey
490-1334-1-ND
11
5
C3-6 C35
0.1uF
CAP_0805
Kemet
C0805C104K5RACTU
Digikey
399-1170-1-ND
12
4
C63 C65-66 C68
0.1uF
CAP_1206
Kemet
C1206C104K5RACTU
Digikey
399-1249-1-ND
13
21
C1-2 C15 C22 C28 C32
C34 C46-47 C49-60
10uF 16V
CAP_3216
Rohm
TCA1C106M8R
Digikey
511-1473-1-ND
CAP TANTALUM
14
5
C48 C61-62 C64 C67
22uF 10V
CAP_3216
Rohm
TCA1A226M8R
Digikey
511-1465-1-ND
CAP TANTALUM
15
9
J8-10 J21-26
1-87215-0
Digikey
A26564-ND
2-Pin Dual Header
16
2
J7 J14
17
1
J13
18
2
J1 J12
0.001uF
CONN_DUAL_HDR
Straight Header Tyco Electronics
_2PIN
CONN_HEADER_3
Straight Header Tyco Electronics
PIN
CONN_SINGLEHEA
Straight Header Tyco Electronics
DER_4PIN
DUAL_HEADER_40 Female Header Sullins Electronics
SURFACE MOUNT
CAPACITOR 0603 Size
SURFACE MOUNT
CAPACITOR 0603 Size
SURFACE MOUNT
CAPACITOR 0805 Size
SURFACE MOUNT
CAPACITOR 1206 Size
87220-3
Digikey
A26544-ND
3-pin Single Row 0.100
Header
87220-4
Digikey
A26546-ND
4-Pin Single Row Header
PPPC202LFBN-RC
Digikey
S7123-ND
Header Female
Item
Qty
Reference
Part Name
Package
Manufacturer
Manufacturer Part#
Distributor
Distributor Part#
Description
19
1
R15
Pot 10K
SMT
PANASONIC
EVN-5ESX50B14
Digikey
P5E103CT-ND
TRIMMER
POTENTIOMETER
20
1
D1
LED, Green
SMT
LITE-ON
LTST-C190GKT
Digikey
160-1183-1-ND
LIGHT EMITTING DIODE
21
4
L1-4
10uH
L-1210
Panasonic-ECG
ELJ-FA100JF
Digikey
PCD1817CT-ND
22
2
U11-12
MC78M05
TO-252
ON SEMICONDUCTOR
MC78M05BDTRKG
Digikey
MC78M05BDTRKGOSCT-ND
23
10
J2-6 J15-19
MMCX_CONN
MMCX
Amphenol Connex
262104
Digikey
ACX1275-ND
Surface Mount Inductor
1210 Size
500mA POSITIVE
VOLTAGE REGULATORS
MMCX CONNECTOR
SURFACE MOUNT
RESISTOR 0603 Size
SURFACE MOUNT
RESISTOR 0603 Size
SURFACE MOUNT
RESISTOR 0603 Size
SURFACE MOUNT
RESISTOR 0603 Size
SURFACE MOUNT
RESISTOR 0805 Size
SURFACE MOUNT
RESISTOR 0805 Size
SURFACE MOUNT
RESISTOR 0805 Size
SURFACE MOUNT
RESISTOR 1206 Size
SURFACE MOUNT
RESISTOR 1206 Size
SURFACE MOUNT
RESISTOR 1206 Size
24
2
R36 R40
100 1/10W
RES-0603
Panasonic-ECG
ERJ-3GEYJ101V
Digikey
P100GCT-ND
25
1
R37
2K 1/10W
RES-0603
Panasonic-ECG
ERJ-3GEYJ202V
Digikey
P2.0KGCT-ND
26
1
R41
392 1/10W
RES-0603
Panasonic-ECG
ERJ-3EKF3920V
Digikey
P392HCT-ND
27
5
R31 R34-35 R38-39
49.9 1/10W
RES-0603
Panasonic-ECG
ERJ-3EKF49R9V
Digikey
P49.9HCT-ND
28
1
R5
22 1/8W
RES-0805
Panasonic-ECG
ERJ-6GEYJ220V
Digikey
P22ACT-ND
29
2
R11-12
499 1/8W
RES-0805
Panasonic-ECG
ERJ-6ENF4990V
Digikey
P499CCT-ND
30
7
R16-22
4.99K 1/8W
RES-0805
Panasonic-ECG
ERJ-6ENF4991V
Digikey
P4.99KCCT-ND
31
1
R13
0 1/4W
RES-1206
Panasonic-ECG
ERJ-8GEY0R00V
Digikey
P0.0ECT-ND
32
5
R6-9 R14
33 1/4W
RES-1206
Panasonic-ECG
ERJ-8GEYJ330V
Digikey
P33ECT-ND
33
1
R10
49.9 1/4W
RES-1206
Panasonic-ECG
ERJ-8ENF49R9V
Digikey
P49.9FCT-ND
CTS
741X163103JP
Digikey
741X163103JPCT-ND
RESISTOR PAK 8- 0402
CTS
741X163220JP
Digikey
741X163220JPCT-ND
RESISTOR PAK 8- 0402
FAIR-RITE PRODUCTS
CORP
2743019447
Mouser
623-2743019447LF
SM BEADS DIFFERENTIAL
RES_PAK_8_0402,
RES-0402
10K
RES_PAK_8_0402,
RES-0402
22 ohm
34
6
R25-26 R29-30 R32-33
35
8
R1-4 R23-24 R27-28
36
1
E1
SM_BEADS_DIFF
37
1
J20
TERMINAL_BLOCK
Through Hole
_2PIN
PHOENIX CONTACT
1729018
Digikey
277-1236-ND
2-PIN TERMINAL BLOCK
38
1
U6
VREG_LT1529
Linear Technology
LT1529CQ-5#PBF
Digikey
LT1529CQ-5#PBF-ND
Linear Regulator
39
1
J11
DUAL_HEADER_40 Male Header
Sullins Electronics
PBC20DFAN
Digikey
S2211E-20-ND
Header Male
SMT
DD-PAK
C
Schematic
This section presents the schematic of the RFIC board. This schematic contains the following
three pages• ADC Circuits
• DAC Circuits
• Power Supply Circuits
15
D
Layout
This section presents the layout and component placement of the ADC/DAC board. The
pages are added in the following order • Top layer (primary component side)
• Bottom layer (secondary component side)
• First inner layer (power layer)
• Second inner layer (ground layer)
• Component placement in top layer, and
• Component placement in bottom layer.
19