CV - allenwaters.net

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Allen Waters
Phone:
email:
web:
503-432-7872
watersal5@gmail.com
allenwaters.net
Education
Corvallis, OR
March 2015
Oregon State University
Ph.D. in Electrical and Computer Engineering
Thesis: Automated Verilog-to-Layout Synthesis of ADCs Using Custom Analog Cells
Advisor: Dr. Un-Ku Moon
Corvallis, OR
March 2014
Oregon State University
Bachelor of Science in Economics
Option: Mathematical Economics
Corvallis, OR
June 2010
Oregon State University
Honors Bachelor of Science in Electrical and Computer Engineering
Minors: Mathematics, Physics, Computer Science
GPA: 3.98 (base 4.0)
Work Experience
Nov. 2015 Present
Intel Corporation
System on a Chip (SoC) Design Engineer
• Research and design of high-speed I/O.
• Transistor-level design of DDR in ultra-modern CMOS process.
• Target application is processors for mobile devices.
March 2015 Nov. 2015
University of Washington
Visiting Researcher
• Post-doc appointment in Silicon Systems Research Laboratory.
• Design and layout of interleaved, noise-shaped SAR ADC.
• Mentoring graduate students throughout their research projects.
Oct. 2012 Oct. 2014
Amoryphyx Inc.
Consultant
• Startup company with alternative method to thin-film transistors for LCD pixel drivers.
• Amorphous metal nonlinear resistor (AMNR) provides high-yield, low-cost backplanes.
• Responsibilities included research, circuit design and simulation for LCD display drivers.
June 2010 March 2015
Oregon State University
Graduate Research Assistant
• Design of analog-to-digital converters, from architecture simulation through layout and measurement.
• Two successful tapeouts in 130nm CMOS and one in 65nm CMOS. Included pipeline and ∆Σ architectures.
• Simulation of SAR and stochastic ADCs for publication in CAS community.
June 2009 Aug. 2009
NASA Jet Propulsion Laboratory
Space Grant Summer Intern Program
• Writing Python test scripts for flight software to be implemented on Mars Science Lab.
• Documented anomalies to be fixed by senior software engineers.
Waters 2/4
Jan. 2009 June 2009
OSU Nanomaterials and Devices Laboratory
Lab Assistant
• Operating equipment used in semiconductor manufacturing, for synthesis of ZnO nanowires.
• Running experiments and collecting data to assist graduate students in their research.
June 2007 Aug. 2008
TekBots: Platforms for Learning
Summer Intern Program
• Development of instructional materials for freshman- through senior-level undergraduate lab courses.
• Hardware and software development for DSP chip on embedded Linux device.
• Running summer camps intended to increase children’s interest in programming and robotics.
Publications
1. [Under Review] A. Waters, J. Muhlestein, and U. Moon, “Analysis of Metastability Errors in Conventional, LSB-First,
and Asynchronous SAR ADCs,” in IEEE Trans. on Circuits and Syst. I, submitted February 2016.
2. [In Progress] A. Waters, A. Wang, and C.-J. R. Shi, “Highly Time-Interleaved Noise-Shaped SAR ADC with Reconfigurable Order,” in IEEE Trans. on Circuits and Syst. I, manuscript in progress.
3. [Accepted] A. Waters, A. Wang, and C.-J. R. Shi, “Highly Time-Interleaved Noise-Shaped SAR ADC with Reconfigurable Order,” to apppear in Proc. IEEE Int. Symp. on Circuits and Syst. (ISCAS), May 2016.
4. [Accepted] A. Wang, A. Waters, and C.-J. R. Shi, “A Sub-nW mV-Range Programmable Threshold Comparator for
Near-Zero-Energy Sensing,” to appear in Proc. IEEE Int. Symp. on Circuits and Syst. (ISCAS), May 2016.
5. A. Waters, J. Muhlestein, and U. Moon, “Analysis of Metastability Errors in Asynchronous SAR ADCs,” in 2015 IEEE
22nd International Conference on Electronics, Circuits, and Systems (ICECS), Dec. 2015.
6. J. Muhlestein, H. Venkatram, J. Guerber, A. Waters, and U. Moon, “Bit-Error-Rate Analysis and Mixed Signal Triple
Modular Redundancy Methods for Data Converters,” in 2015 IEEE 22nd International Conference on Electronics, Circuits, and Systems (ICECS), Dec. 2015.
7. A. Waters and U. Moon, “A Fully Automated Verilog-to-Layout Synthesized ADC Demonstrating 56dB-SNDR with
2MHz-BW,” in IEEE Asian Solid-State Circuits Conference (A-SSCC), Nov. 2015.
8. A. Waters and U. Moon, “Practical Modeling of Comparator Metastability for Conventional and LSB-first SAR
ADCs,” in Midwest Symp. on Circuits and Syst., August 2015.
9. A. Waters, J. Leung, M. Gande, and U. Moon, “A Delta-Sigma ADC Using an LSB-First SAR Quantizer,” in Proc. IEEE
Int. Symp. on Circuits and Syst. (ISCAS), May 2015.
10. J. Leung, A. Waters and U. Moon, “Selectable Starting Bit SAR ADC,” in Proc. IEEE Int. Symp. on Circuits and Syst.
(ISCAS), May 2015.
11. A. Waters, S. Leuenberger, F. Farahbakhshian, and U. Moon, “Analysis and Performance Trade-Offs of Linearity
Calibration for Stochastic ADCs,” in 2014 IEEE 21st International Conference on Electronics, Circuits, and Systems
(ICECS), Dec. 2014, pp. 207-210.
12. A. Waters, J. Leung, and U. Moon, “LSB-First SAR ADC with Bit-Repeating for Reduced Energy Consumption,” in
2014 IEEE 21st International Conference on Electronics, Circuits, and Systems (ICECS), Dec. 2014, pp. 203-206.
13. S. Leuenberger, A. Waters, and U. Moon, “Resistive Correction of Low Output Impedance High-Speed CurrentSteering DACs,” in 2014 IEEE 21st International Conference on Electronics, Circuits, and Systems (ICECS), Dec. 2014, pp.
459-462.
14. F. Farahbakhshian, A. Waters, J. Muhlestein, and U. Moon, “Stochastic Approximation Register ADC,” 2014 IEEE 12th
International New Circuits and Systems Conference (NEWCAS), June 2014, pp. 189-192. [Best Paper Award]
15. J. Guerber, M. Gande, H. Venkatram, A. Waters, and U. Moon, “A 10b Ternary SAR ADC with Quantization Time
Information Utilization,” IEEE J. of Solid-State Circuits, vol. 47, no. 11, pp. 2604-2613, Nov. 2012.
16. J. Guerber, M. Gande, H. Venkatram, A. Waters, and U. Moon, “A 10b Ternary SAR ADC with Decision Time Quantization Based Redundancy,” 2011 IEEE Asian Solid-State Circuits Conf. (A-SSCC), Nov. 2011, pp. 65-68.
Waters 3/4
Teaching Experience
Fall 2014,
Fall 2010
(2 terms)
Fall 2013
(1 term)
ECE 473/573: Microprocessor System Design
Graduate Teaching Assistant
Taught weekly lab sections to help students build radio alarm clock using embedded microcontroller system. Graded lab reports and quizzes. Prepared and delivered one lecture. Approximate
class size: 50 students (∼12 per lab section).
ECE 322: Electronics I
Graduate Teaching Assistant
Taught weekly lab sections to help students build DC power supply. Graded homework, lab
reports, and exams. Prepared and delivered two lectures. Prepared additional help sessions to
teach students how to use Spice simulator. Approximate class size: 100 students (∼20 per lab
section).
Spring 2011
(1 term)
ECE 323: Electronics II
Graduate Teaching Assistant
Taught weekly lab sections to help students build audio amplifiers. Graded homework, lab
reports, and exams. Brought the hammer down on cheaters. Approximate class size: 100 students
(∼20 per lab section).
Winter 2011
(1 term)
ECE 423/523: CMOS Integrated Circuits II
Graduate Teaching Assistant
Held weekly office hours to help students with topics in analog circuit design: differential amplifier design, common-mode feedback, noise, and distortion. Graded homework, exams, and final
projects. Prepared and delivered two lectures about analog circuit layout. Approximate class
size: 25 students.
Fall 2007 Winter 2009
(5 terms)
ENGR 201: Electrical Fundamentals I
Undergraduate Teaching Assistant
Taught weekly lab sections to help students with various DC circuit activities using passive
components, sensors and amplifiers. No grading responsibilities as undergraduate TA. Prepared
and delivered two lectures. Approximate class size: 200 students (∼25 per lab section).
Service and Involvement
IEEE Service
• MWSCAS Session Chair . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
• NEWCAS Reviewer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
• TCAS Reviewer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2015
2015
May 2015 - present
IEEE Membership
• Student Member . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
• Member . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
• Solid-State Circuits Society Member . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
• Circuits and Systems Society Member . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
• OSU Chapter Vice-President . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
• OSU Chapter Component Store Manager . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Jan. 2009 - Dec. 2015
Jan. 2016 - Present
Jan. 2012 - Present
Jan. 2015 - Present
Oct. 2008 - June 2009
Oct. 2008 - June 2009
Eta Kappa Nu (HKN) Honor Society . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Inducted Jan. 2009
OSU Cheerleading and Stunt Team . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
• Team Captain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
April 2009 - April 2014
Aug. 2010 - April 2011
Waters 4/4
Software Tools
Experienced
Intermediate
Basic
Cadence, Spectre, MATLAB
HSpice, LaTeX
Advanced Design System
Programming Languages
Experienced
Intermediate
Basic
C, Verilog-A, Bash, Csh
C++, Perl, Python, HTML
Assembly Language (AVR and MIPS)
Awards and Honors
Academic Awards
(2015)
Analog Devices Outstanding Student Designer Award
Awarded at ISSCC each year for excellence in analog IC design with the potential for outstanding
industrial contribution
(2010-2012)
Achievement Rewards for College Scientists (ARCS) Fellowship
Three-year awards of unrestricted funding for doctoral students.
(2008)
School of EECS Sophomore of the Year Award
Awarded each spring by the HKN Honor Society to the most outstanding second-year EECS
student.
(2006-2010)
Oregon State University Honors College
Provides an honors curriculum, featuring co-curricular programming with global, leadership,
and service opportunities. Culminates with an undergraduate research/thesis experience.
(2006-2009)
Drucilla Shephard Smith Scholastic Award
Awarded to OSU students who maintain a 4.0 GPA throughout an entire academic year.
(2006)
Finalist, National Merit Scholarship Competition
Awarded based on a combination of SAT scores, PSAT scores and application materials demonstrating high academic performance in grades 9-12.
(2006)
Multnomah Education Service District Academic All-Star
2nd Place, Mathematics Category
Honors outstanding students who have attained the highest levels of academic and community
achievements. Judged based on portfolios of aacademic work, extracurriculars, personal essay
and letters of recommendation.
References
Dr. Un-Ku Moon
Jim DeFuria
Dr. Bill Cowell
John Brewer
[Ph.D. thesis advisor]
[direct manager at Intel]
[Amorphyx Founder and CTO]
[Amorphyx Founder, CEO, and President]
moon@eecs.oregonstate.edu
james.p.defuria@intel.com
bcowell@amorphyx.com
jbrewer@amorphyx.com
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