# Electronics Homework Set #4

```Electronics Homework Set #4
Chapter 2: # 14, 15, 22, 25, 44, 47, 51, 75
Problem 2.14
Determine the closed-loop gain of the circuit shown below, assuming an ideal op amp. All of the
resisors are equal in value.
Solution: Let's number the resitors and their corresponding currents from left to right in the feedback loop of this circuit. The
summing point constraint requires that the voltage at the (-) and (+) inputs are both 0.
The current through the input resistor is iin =
Vin - 0
R
Hfrom left to rightL.
Since no current goes into or out of the (-) input, we will have i1 = iin Hboth are left to rightL.
To be consistant, I have chosen direction of the &quot;horizontal&quot; currents as left-to right (&Oslash;) and the &quot;vertical&quot; currents as upward (&AElig;).
Then Kirchhoff's Current Law applied to the two junctions gives i1 + i2 = i3 , and i3 + i4 = i5 .
Kirchhoff's Voltage Law applied to a loop containing resistors 1 and 2 and the (-) and (+) terminals of the op amp gives:
i1 R - i2 R + 0 = 0 &iuml; i1 = i2 . Then i1 + i2 = i3 = 2 i1 .
Using KVL on the loop containing resistors 2, 3, and 4, gives:
i2 R + i3 R - i4 R = 0 &iuml; i2 + i3 = i4 = i1 + 2 i1 = 3 i1 .
Substituting into i3 + i4 = i5 gives (2 i1 ) + (3 i1 ) = 5 i1 = i5
Finally use KVL on the loop containing resistors 1, 3, 5, vo , and the (-) and (+) terminals of the op amp.
i1 R + i3 R + i5 R + v0 + 0 = 0 &iuml; vo = -R @i1 + 2 i1 + 5 i1 D = -8 R i1 .
If we substitute iin = i1 =
Vin
,
R
and solve, we get Av =
Vo
Vin
= -8.
2
HW_02b.08.nb
Problem 2.15
The resistors in an inverting amplifier have a tolerance of &plusmn;1%. What is the tolerance of the gain?
Solution: The worst cases are Av =
Rf H1+.01L
Ri H1-.01L
= 1.02 and Av =
Rf H1-.01L
Ri H1+.01L
= 0.98, so the tolerance of &plusmn;2%
Problem 2.22
Analyze the ideal op-amp circuit shown below to find an expression for vo in terms of vA , vB and the
resistor values.
At the (-) input the voltage is V- = Vo
R1
.
R1 +R2
This must match the voltage at the (+) input because of the summing point con-
straint.
Using KVL around a loop containing both voltage sources, we find VA - I RA - I RB - VB = 0.
Solving for I, gives I =
VA -VB
.
RA +RB
Then V+ = VA - I RA = VA Solving, Vo =
VA RB - VB RA R1 +R2
RA +RB
R1
VA -VB
RA +RB
=
RA =
V A RB - VB R A
RA +RB
V A RB - VB R A
RA +RB
Or Vo = AA VA - AB VB , where AA = R
RB
A +RB
J1 +
J1 +
= Vo
R1
.
R1 +R2
R2
N
R1
R2
N
R1
and AB = R
RA
A +RB
J1 +
R2
N
R1
HW_02b.08.nb
Problems 2.25
For the circuit above:
a) Find an expression for the output voltage in terms of the source current and resistor values.
b) What is the output impedance of this circuit?
c) What is the input impedance of this circuit?
d) This circuit can be classified as an ideal amplifier. What type of amplifier is it?
a) Using KVL: iin R f + Vo = 0 &Oslash; Vo = - iin R f .
b) Because Vo is independant of RL , this acts like an ideal voltage source with an output impedance of zero.
c) The input voltage is zero (because of the summing point constraint) &Oslash; Rin = 0.
d) From Table 1.1, we see that this is a transresistance amplifier.
Problems 2.44
A certain op amp has a unity-gain bandwidth of 15 MHz. If this op amp is used in a noninverting
amplifier having a dc gain of 10, what is the 3 dB bandwidth? Repeat for a dc gain of 100.
The unity-gain bandwidth, ft , is 15 MHz. The &quot;closed-loop&quot; gain is Aocl = 10 .
The -3 dB bandwidth is given by: fbcl =
ft
Aocl
=
15 MHz
10
For Aocl = 100, we have a -3 dB bandwidth of fbcl =
= 1.5 MHz.
ft
Aocl
=
15 MHz
100
= 150 kHz.
Problems 2.51
Suppose we want to design an amplifier that can produce a 100 kHz sine wave output voltage
having a peak output voltage of 5.0 Volts. What is the minimum slew-rate specification for the op
amp?
f = 100 kHz (sine wave) = fFP , the full-power bandwidth. 5.0 V = peak voltage = Vo max .
Then, from (2.46), fFP =
SR
2 p Vo max
&Oslash; SR = H2 p Vo max L fFP = 2 p (5 V) 100,000 Hz = p x 106 V &ecirc; s = 3.14 V &ecirc; &micro;s
3
4
HW_02b.08.nb
Problems 2.75
Sketch the output voltage of the circuit shown below to scale against time. Sometimes an integrator
circuit is used as an (approximate) pulse counter. Suppose that the output voltage is -10V. How
many input pulses have been applied? (Assume that the pulses have an amplitude of 5V and a
duration of 2 ms, as shown in the other figure.)
For this integrator, with R = 10,000W, and C = 2.0 x 10-6 F, the output voltage is given by:
Vo HtL = -
1
RC
t
t
Ÿ 0 V p Ht 'L „ t ' = -50Ÿ 0 V p Ht 'L „ t '.
When V p = 5 V, the integral is proportional to t (it's equal to 5 t).
Then (-50) x 5 t
2 ms
0
= -0.5 Volt for each pulse.
In other words, at the end of each pulse, the integrator output thas decreased by 0.50 Volt.
-10V = (-0.5V/pulse) x n pulses &iuml; n = 20 pulses
&uuml; Here is a graph of how the output evolves:
5
-0.5
-1.0
Out[52]=
-1.5
-2.0
-2.5
10
15
20
```