1 ISD-VM1110A - Electrocomponents

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12.DataBook_VM1110A Dsht Page 129 Wednesday, September 25, 1996 3:52 PM
®
ISD-VM1110A
Chip-On-Board Module
10-Second Duration
FEATURES
• Easy-to-use single-chip voice Record/Play-
• Fully addressable to handle multiple
messages
back chip-on-board module
• High-quality, natural voice/audio
reproduction
• Push-button interface
– Playback can be edge- or levelactivated
• Automatic power-down mode
– Enters standby mode immediately
following a Record or Playback
cycle
•
•
•
•
•
100-year message retention (typical)
100,000 record cycles (typical)
1
On-chip clock source
No algorithm development required
Single +5 volt power supply (4.5 V to
5.5 V VCC)
• Available in printed circuit board form with
COB Chip-On-Board construction
– 0.5 µA standby current (typical)
• Zero-power message storage
– Eliminates battery backup circuits
ISD-VM1110A DEVICE SUMMARY
Part
Number
ISD-VM1110A
Information Storage Devices, Inc.
Minimum Duration
(Seconds)
Input Sample Rate
(KHz)
Typical Filter
Pass Band (KHz)
10
6.4
2.6
1–129
12.DataBook_VM1110A Dsht Page 130 Wednesday, September 25, 1996 3:52 PM
ISD-VM1110A
GENERAL DESCRIPTION
DETAILED DESCRIPTION
Information Storage Devices’ ISD-VM1110A ChipOn-Board™ module provides high-quality, singlechip record/playback solutions to short-duration
messaging applications. The ISD-VM1110A module integrates the ISD1110 ChipCorder™ die,
which contains an on-chip oscillator, microphone
pre-amplifier, automatic gain control, antialiasing
filter, smoothing filter, and a speaker amplifier,
along with passive components on a single PC
board. The ISD-VM1110A enables a minimum
record/playback subsystem to be configured easily with a microphone, a speaker, two push-buttons, and a power source. All connections are
provided via a multi-pin edge connector or
through-holes for a 100-mil header or wire connections.
Speech Quality
Recordings are stored in on-chip nonvolatile
memory cells, providing zero-power message
storage. This unique, single-chip solution is made
possible through ISD's patented multilevel storage technology. Voice and audio signals are
stored directly into memory in their natural form,
providing high-quality, solid-state voice reproduction.
ISD’s patented ChipCorder technology provides
natural speech Record and Playback. The input
voice signals are stored directly in nonvolatile
EEPROM cells and are reproduced without the
synthetic effect often heard with digital solid-state
speech solutions. A complete sample is stored in
a single cell, minimizing the memory necessary to
store a recording of a given duration.
Basic Operation
The ISD-VM1110A module is controlled by a single signal, REC, and either of two push-button
control Playback signals, PLAYE (edge-activated
Playback), and PLAYL (level-activated Playback).
Module operation is explained on page 1-139.
Automatic Power-Down Mode
At the end of a Playback or Record cycle, the ISDVM1110A module automatically returns to a lowpower standby mode, consuming typically 0.5 µA.
During a Playback cycle, the device powers down
automatically at the end of the message. During a
ISD-VM1110A CHIP-ON-BOARD MODULE
R1
R4
R3
C4
31.5
mm
38.5
mm
27
26
25
24
23
22
21
20
19
4
5
6
7
8
9
10
11
12
13
4.49
mm
+
3.75 mm
19
20
21 22
23
24
25
26
27
13
12
11
9
8
7
6
5
10
3
4
–
+
7.0
mm
14
15
REC/
BATT+
11
12
13
6
7
8
9
10
BATT–
SPKR+
SPKR–
MIC–
3
4
5
MIC+
ANA IN
PLAYL/
PLAYE/
RECLED/
3
(NOT TO SCALE)
Board Thickness
with Components
= 8 mm (typ)
BATT+
XCLK
A0
A1
A2
A3
A4
A5
A6
A7
BATT–
C5
–
1–130
BACK SIDE
R7 C7
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
4.7 uF
C2
U1
ISD1110
R6 R9 R8
C6
R2 C3 R5
C1
220 uF
27 mm
1
2
-1
Product Data Sheets
15 Equal spaces
at 1.27 mm pitch
19.5 mm
Mounting holes
for header or
wire connections
12.DataBook_VM1110A Dsht Page 131 Wednesday, September 25, 1996 3:52 PM
ISD-VM1110A
Product Data Sheets
Record cycle, the device powers down immediately after REC is released and immediately pulled
HIGH.
Although the module powers down automatically
to conserve power consumption, the typical drain
on the battery when driving 16-ohm speakers to
full volume averages 30 to 40 mA. This must be
taken into consideration when selecting batteries
with their inherent internal resistance.
Mounting Options
The ISD-VM1110A module is designed with several mounting options. The edge connector has
been designed to use a standard 15 dual position
0.050 series connector (AMP 650712 or equivalent). Additionally, a series of through holes are
placed in the board to accept standard 100-mil
grid headers (Molex 8624 or equivalent). These
holes may also be used for hard-wire connection
to the board.
Addressing (Optional)
In addition to providing simple message playback, the ISD-VM1110A module provides a full
addressing capability.
The ISD-VM1110A module has 80 distinct addressable segments providing 125 ms resolution per
segment. See the ISD Application Notes and
Design Manual in this book for ISD1110 device
address tables.
Pins 13, 18: Voltage Inputs (VCC , BATT+)
Analog and digital circuits internal to the ISD1110
chip use separate power buses on the module to
minimize noise on the chip. These power buses
are on separate traces and are decoupled on the
module. The power buses are tied together at the
BATT+ pin.
Pins 3, 28: Ground Inputs (VSS/GND, BATT-)
Similar to VCC, the analog and digital circuits internal to the chip use separate ground buses on the
module to minimize noise. These pins are tied
together at the BATT– pin.
Pin 12: Record (REC)
The REC input is an active-LOW Record signal.
The device records whenever REC is LOW. This
signal must remain LOW for the duration of the
Recording. REC takes precedence over either
Playback (PLAYE or PLAYL) signal. If REC is
pulled LOW during a Playback cycle, the playback immediately ceases and Recording begins
at the beginning of the device.
A Record cycle is completed when REC is pulled
HIGH. An end-of-message (EOM) marker is internally recorded, enabling a subsequent Playback
cycle to terminate appropriately. The device automatically powers down to standby mode when
REC goes HIGH. This pin has an on-board pull-up
resistor.
PIN DESCRIPTIONS
NOTE
The REC signal is debounced for 50 ms.
on the rising edge to prevent a false retriggering from a push-button switch. REC,
PLAYL, PLAYE, A6, and A7 have internal
pull-ups to VCC. Holding one of these pins
LOW will increase standby current consumption. A0, A1, A2, A3, A4, A5, and
XCLK have internal pull-down to Vss.
Holding one of these pins HIGH will
increase standby current consumption.
1–131
1
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ISD-VM1110A
Pin 10: Playback, Edge-Activated (PLAYE)
When a LOW-going transition is detected on this
input signal, a Playback cycle begins. Playback
continues until an end-of-message marker is
encountered or the end of the memory space is
reached. Upon completion of the Playback cycle,
the device automatically powers down into
standby mode. Taking PLAYE HIGH during a Playback cycle will not terminate the current cycle.
This pin has an on-board pull-up resistor.
Pin 9: Playback, Level-Activated (PLAYL)
-1
When this input signal transitions from HIGH to
LOW, a Playback cycle is initiated. Playback continues until PLAYL is pulled HIGH, an end-ofmessage marker is detected, or the end of the
device space is reached. The device automatically powers down to standby mode upon
completion of the playback cycle. This pin has an
on-board pull-up resistor.
NOTE
In Playback, if either PLAYE or PLAYL is
held LOW during EOM or OVERFLOW, the
device will still enter standby and the
internal oscillator and timing generator will
stop. However, the rising edge of PLAYE
and PLAYL are not debounced, and any
subsequent falling edge present (particularly switch bounce) on the input pins will
initiate another Playback.
Pin 11: Record LED Output (RECLED)
The output RECLED is LOW during a Record
cycle. It can be used to drive an LED to provide
feedback that a Record cycle is in progress. In
addition, RECLED pulses LOW momentarily when
an end-of-message marker is encountered in a
Playback cycle.
Pin 7: Microphone Input (MIC+)
An electret microphone (the positive terminal) is
connected to this pin with a maximum input signal
of 20 mV peak-to-peak.
1–132
Product Data Sheets
The microphone input (MIC+) provides an Automatic Gain Control (AGC) to dynamically adjust
the preamplifier gain, and therefore extend the
range of input signals which can be applied to the
microphone input without causing distortion. The
AGC considerably extends the dynamic range of
recordable sound from whispers to loud noises.
Pin 6: Microphone Reference (MIC-)
This pin is the negative connection for the two-terminal electret microphone.
Pin 8: Analog Input (ANA IN)
The ANA IN pin may be used to input alternative
sources of analog signals (instead of the microphone signal) at a maximum of 50 mV peak-topeak. IF THIS PIN IS NOT USED, IT MUST NOT BE CONNECTED TO ANY SIGNAL OR VOLTAGE. IT MUST FLOAT.
Pin 19: Optional External Clock (XCLK)
This pin is held LOW by an internal pulldown; however, if greater timing precision is desired, the
chip can be externally clocked through this pin.
The internal clock has a ± 2.25% tolerance over
temperature and voltage range.
Pins 4, 5: Speaker Outputs (SPKR+, SPKR–)
The SPKR+ and SPKR– pins provide direct drive
for loudspeakers with impedances as low as 16
ohms. A single output may be used, but, for
direct-drive loudspeakers, the two opposite-polarity outputs provide an improvement in output
power of up to four times over a single-ended connection. Furthermore, when SPKR+ and SPKR–
are used, a speaker-coupling capacitor is not
required. A single-ended connection will require
an AC-coupling capacitor between the SPKR pin
and the speaker. The speaker outputs are in a
high-impedance state during a Record cycle, and
held at VSSA/GND (BATT–) during Power Down.
Pins 20-27: Address Inputs (A0-A7)
The Address Inputs have two functions, depending upon the level of the two Most Significant Bits
(MSB) of the address (A6 and A7).
12.DataBook_VM1110A Dsht Page 133 Wednesday, September 25, 1996 3:52 PM
ISD-VM1110A
Product Data Sheets
If either of the two MSBs is LOW, the inputs are all
interpreted as address bits and are used as the
start address for the current Record or Playback
cycle. The address pins are inputs only and do not
output internal address information as the operation progresses. Address inputs are latched by
the falling edge of PLAYE, PLAYL or REC. A6 and
A7 have internal pull-up devices. A0, A1, A2, A3,
A4 and A5 have internal pull-down devices.
Address Termination
The ISD-VM1110A was designed with internal terminating resistors for all the addresses and control lines. This allows the signals to be left floating
if not used. A0, A1, A2, A3, A4, A5 and XCLK are
pulled LOW and A6, A7, PLAYL, PLAYE and REC
are pulled HIGH. Each of these internal pull-up or
pull-down resistors have a value of 50K to 100K
ohms.
OPERATIONAL MODE
The ISD-VM1110A module is designed with a
built-in operational mode that enables the continuous repetition of a single message. This operational mode uses the address pins on the ISDVM1110A module, but is mapped outside the
valid address range. When the two Most Significant Bits (MSBs) are HIGH, the remaining address
signals are interpreted as mode bits and NOT as
address bits. Therefore, the operational mode and
direct addressing are not compatible and cannot
be used simultaneously.
Looping Capability
The ISD-VM1110A Module has a built-in looping
function enabling it to continuously repeat a single
message. This is accomplished by taking A3
HIGH to continuously loop from the end of the
message to the beginning of the message space.
Looping is initiated by a negative transition on
PLAYE pin with A7, A6 and A3 held HIGH. Then
PLAYE is brought back HIGH. Looping will continue indefinitely with all three control pins (PLAYL,
PLAYE, REC) remaining HIGH.
To stop the looping, PLAYL pin is momentarily
taken LOW, then back HIGH. As long as A7, A6
and A3 remain HIGH, a new playback loop will
begin with the next negative transition on the
PLAYE pin.
Another way to control looping is to use PLAYL pin
alone. Taking this pin LOW begins the looping and
it continues until the pin is taken HIGH again. This
is a continuous control rather than the pulsed control of the previous paragraph.
1–133
1
12.DataBook_VM1110A Dsht Page 134 Wednesday, September 25, 1996 3:52 PM
ISD-VM1110A
Product Data Sheets
ISD1110 DEVICE BLOCK DIAGRAM
Internal Clock
XCLK
Timing
Sampling Clock
R
5-Pole Active
Antialiasing Filter
ANA OUT
MIC
MIC REF
AGC
Analog Transceivers
Decoders
Amp
ANA IN
PreAmp
64K Cell
Nonvolatile
Multilevel Storage
Array
VCCA VSSA VSSD VCCD
1–134
SP+
Amp
Automatic
Gain Control
(AGC)
Power Conditioning
-1
5-Pole Active
Smoothing Filter
Device Control
A0 A1 A2 A3 A4 A5 A6
A7
REC PLAYE PLAYL RECLED
SP–
12.DataBook_VM1110A Dsht Page 135 Wednesday, September 25, 1996 3:52 PM
ISD-VM1110A
Product Data Sheets
TIMING DIAGRAMS
Record
TREC
TREC
REC
TLED1
TLED2
RECLED
TSET
THOLD
THOLD
TSET
A0-A7
MIC
ANA IN
TRPUD
TRPDD
1
Playback
REC
TPLAY
PLAYL
PLAYE
TSET
THOLD
TSET
THOLD
TSET
THOLD
A0-A7
SP+/TPPUD
TPPDD
TPPDD
TPPUD
RECLED
T EOM
T EOM
NOTES: 1. REC must be HIGH for the entire duration of a Playback cycle.
2. RECLED functions as an EOM during Playback.
1–135
12.DataBook_VM1110A Dsht Page 136 Wednesday, September 25, 1996 3:52 PM
ISD-VM1110A
Product Data Sheets
PIN/PAD DESIGNATIONS
Pin Name
Connector Pin No.
-1
Pin Function
1
Not Used
Not Used
2
Not Used
Not Used
3
BATT–
Power Source and Negative Terminal
(Module’s Sig. Ref.)
4
SPKR+
Speaker Driver Positive Output
5
SPKR–
Speaker Driver Negative Output
6
MIC–
Electret Microphone Negative Terminal
7
MIC+
Electret Microphone Positive Terminal
8
ANA IN
Analog Input to Array
9
PLAYL
Play Level Control
10
PLAYE
Play Edge Control
11
RECLED
Record LED Output Ind.
12
REC
Record Control
13
BATT+
Positive Source and Positive Terminal
14
Not Used
Not Used
15
Not Used
Not Used
16
Not Used
Not Used
17
Not Used
Not Used
18
BATT+
Positive Source and Positive Terminal
19
XCLK
External Clock Input
20
A0
Address 0
21
A1
Address 1
22
A2
Address 2
23
A3
Address 3
24
A4
Address 4
25
A5
Address 5
26
A6
Address 6
27
A7
Address 7
28
BATT–
Power Source and Negative Terminal
(Module’s Sig. Ref.)
29
Not Used
Not Used
30
Not Used
Not Used
NOTE: Pins 3 and 28 are the same connection, and Pins 13 and 18 are the same connection.
1–136
12.DataBook_VM1110A Dsht Page 137 Wednesday, September 25, 1996 3:52 PM
ISD-VM1110A
Product Data Sheets
ABSOLUTE MAXIMUM RATINGS
OPERATING CONDITIONS
Condition
Value
Junction temperature
0 to +50° C
Commercial operating
Storage temperature range
–40° C to +85° C
temperature range(1)
Voltage applied to any pin
(VSS – 0.3 V) to
(VCC + 0.3 V)
Voltage applied to any pin
(Input current limited to ± 20 mA)
(VSS – 1.0 V) to
(VCC + 1.0 V)
NOTE:
Condition
Stresses above those listed may cause permanent
damage to the device. Exposure to the absolute
maximum ratings may affect device reliability.
Functional operation is not implied at these
conditions.
Value
0° C to +50° C
Supply voltage (VCC)(2)
+4.5 V to +5.5 V
Ground voltage (VSS)(3)
0V
NOTES: 1. Case temperature.
2. VCC = VCCA = VCCD.
3. VSS = VSSA = VSSD.
1
DC PARAMETERS
Symbol
Parameters
Min(2)
Typ (1)
VIL
Input Low Voltage
VIH
Input High Voltage
VOL
Output Low Voltage
VOH
Output High Voltage
ICC
VCC Current (Operating)
15
ISB
VCC Current (Standby)
0.5
IIL
Input Leakage Current
IILPU
Max(2)
Units
0.8
V
2.4
Conditions
V
0.4
2.4
35
V
IOL = 2.5 mA
V
IOH = –1.6 mA
mA
REXT = ∞
µA
(3)
10
µA
Input Current LOW w/Pull Up
–195
µA
Force VSS (4)
IILPD
Input Current HIGH w/Pull
Down
195
µA
Force VCC (5)
REXT
Output Load Impedance
Ω
Speaker Load
AARP
ANA IN to SP+/- Gain
16
22
dB
NOTES: 1. Typical values @ TA = 25° C and 5.0 V.
2. All Min/Max limits are guaranteed by ISD via electrical testing or characterization.
Not all specifications are 100% tested.
3. REC, PLAYL, PLAYE, A6, and A7 must be HIGH/Floating and A0, A1, A2, A3, A4, A5, and XCLK must be
LOW/Floating.
4. REC, PLAYL, and PLAYE, A6, and A7.
5. A0, A1, A2, A3, A4, A5, and XCLK.
1–137
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ISD-VM1110A
Product Data Sheets
AC PARAMETERS
Symbol
-1
Characteristic
Min(2)
Typ (1)
Max(2)
Units
6.4
KHz
Internal Oscillator(3)
KHz
3 dB Roll-Off Point(3)(4)
Conditions
FS
Sampling Frequency
6.2
FCF
Filter Pass Band
2.6
TREC
Record Duration
TPLAY
Playback Duration
TLED1
RECLED ON Delay
5
µsec
TLED2
RECLED OFF Delay
48.5
msec
TSET
Address Setup Time
300
nsec
THOLD
Address Hold Time
0
nsec
TRPUD
Record Power-Up Delay
32
msec
TRPDD
Record Power-Down Delay
32
msec
TPPUD
Play Power-Up Delay
32
msec
TPPDD
Play Power-Down Delay
8.1
msec
TEOM
EOM Pulse Width
15.625
msec
THD
Total Harmonic Distortion
1
%
POUT
Speaker Output Power
12.2
mW
REXT = 16 Ω(3)
VOUT
Voltage Across Speaker Pins
1.25
2.5
V p–p
REXT = 600 Ω(3)
VIN1
MIC Input Voltage
20
mV
Peak-to-Peak(3)
VIN2
ANA IN Input Voltage
50
mV
Peak-to-Peak(3)
10
10
sec
sec
NOTES: 1. Typical values @ TA = 25° C and 5.0 V and 6.2 KHz sample rate.
2. All Min/Max limits are guaranteed by ISD via electrical testing or characterization.
Not all specifications are 100% tested.
3. Measurements made with power supply with output impedance of <20Ω.
4. Filter specification applies to the antialiasing filter and the smoothing filter.
1–138
@ 1 KHz(3)
12.DataBook_VM1110A Dsht Page 139 Wednesday, September 25, 1996 3:52 PM
ISD-VM1110A
Product Data Sheets
ISD-VM1110A APPLICATION EXAMPLE (SINGLE MESSAGE MODE)
R7
RECLED
PLAYL
PLAYL
VCC
1
2
R8
27
11
3
R9
4
5
9
100 KΩ
REC
LED
(Optional)
20
100 KΩ
A0
•
•
•
A7
6
9
10
23
PLAYE
PLAYE
24
10
27
R6
REC
RECORD
XCLK
25
26
12
1 KΩ
100 KΩ
C7
.001 µF
A0
VCCD
A1
VCCA
A2
VSSD
A3 ISD1110 VSSA
A4
SP+
A5
SP–
A6
ANA IN
A7
PLAYL
ANA OUT
PLAYE
REC
MIC REF
RECLED
MIC
XCLK
AGC
VCC
C2
16
0.1 µF
12
BATT–
3, 28
14
15
4
20
5
21
R2
5.1 KΩ
0.1 µF
18
C4
17
VSS
0.1 µF
SPKR+
SPKR–
16 Ω
SPEAKER
R3
10 KΩ
C1
8
ANA IN
220 µF
7
19
C6
4.7 µF
R5
470 KΩ
19
R1
1 KΩ
13
C3
VCC
BATT+
13,18
28
MIC+
R4
10 KΩ
C5
0.1 µF
6
MIC–
ELECTRET
MICROPHONE
ISD-VM1110A SCHEMATIC
NOTES: 1. R7, R8, and R9 are installed on the board to ensure commonality between other modules using the ISD printed
circuit board. These resistors are not expressly needed for the VM1110A module, but are included.
2. Components outside shaded areas must be supplied by customer.
MODULE OPERATION EXAMPLE
operation. If a Recording has filled the message space, the entire message is played.
When the device reaches the EOM marker,
it automatically powers down. A subsequent falling edge on PLAYE initiates a new
Play cycle from the beginning of the memory.
The following example operating sequence demonstrates the functionality of the ISD-VM1110A
module.
1.
Record a message filling the memory.
Pulling the REC signal LOW initiates a
Record cycle from the beginning of the
message space. If REC is held LOW, the
Recording continues until the message
space has been filled. Once the message
space is filled, Recording ceases. The device will automatically power down after
REC is released HIGH (disconnected).
2.
Edge-activated Playback.
Pulling the PLAYE signal LOW initiates a
Playback cycle from the beginning of the
message memory or a selected location.
The rising edge of PLAYE has no effect on
3.
Level-activated Playback.
Pulling the PLAYL signal LOW initiates a
Playback cycle from the beginning of the
message memory or a selected location. If
Recording has filled the message space,
the entire message is played. When the
device reaches the EOM marker, it automatically powers down. A subsequent
falling edge on PLAYL initiates a new Play
cycle from the beginning of the message
memory.
1–139
1
12.DataBook_VM1110A Dsht Page 140 Wednesday, September 25, 1996 3:52 PM
ISD-VM1110A
4.
Level-activated Playback
(truncated).
Product Data Sheets
7.
If PLAYL is pulled HIGH any time during the
Playback cycle, the device stops playing
and enters the power-down mode (i.e.,
useful for push-button interface).
5.
6.
-1
Pulling the PLAYE or PLAYL signal LOW initiates a Playback cycle, which is then
completed when the EOM marker is
encountered. Playback ceases and the
device powers down.
Record (interrupting Playback).
The REC signal takes precedence over
other operations. Any LOW-going transition
on REC initiates a new Record operation
from the beginning of the memory or a selected location, regardless of any current
operation in progress.
Record a message, partially filling
the memory.
A Record operation need not fill the entire
memory. Releasing the REC signal HIGH
before filling the message space causes
the recording to stop and an EOM marker
to be placed. The device powers down
automatically.
1–140
Play back a message that partially
fills the memory.
8.
RECLED operation.
The RECLED output pin provides an activeLOW signal which can be used to drive an
LED as a “Record-in- progress” indicator. It
returns to a HIGH state when the REC pin is
released HIGH or when the recording is
completed due to the memory being filled.
The module has a 1 KΩ resistor in series
with this pin for LED current limiting. This
pin also pulses LOW to indicate an EOM at
the end of a message being played.
12.DataBook_VM1110A Dsht Page 141 Wednesday, September 25, 1996 3:52 PM
ISD-VM1110A
Product Data Sheets
ORDERING INFORMATION
Product Number Descriptor Key
ISD-VM11 _ _ A _
ISDVoice Module
ISD1100 Series
Special Temperature Field:
Blank = Commercial Temperature (0˚C to +50˚C)
Duration:
10 = 10 Seconds
1
When ordering ISD-VM1110A Chip-On-Board modules, please refer to the following valid part number.
Part Number
ISD-VM1110A
For the latest product information, access ISD’s worldwide website at http://www.isd.com.
1–141
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-1
1–142
Product Data Sheets
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