ADL}OO/ADAI2OO
UsertsManual
Real Time Devices, Inc.
"Accessing
theAnalogWorld',,
ISO9001 and AS9100 Certified
ADLaOO/ADA12OO
UsertsManual
ffi
REALTIMEDEVICES,
INC.
820 NorthUniversity
Drive
PostOfficeBox906
StateCollege,
Pennsylvania
16804USA
Phone:(8141234A087
FAX:(81a)234-5218
Publishedby
RealTime Devices,Inc.
820N. UniversityDr.
P.O.Box 906
StateCollege,PA 16804USA
Copyright@ 1992by RealTime Devices,Inc.
All rightsreserved
Printedin U.S.A.
Rev.A 9234
Tableof Contents
INTRODUCTION
Digital-to-Analog
(ADA1200Only)...........
Conversion
i-l
..........................t-3
What ComesWith Your
ApplicationsSoftwareandToolkit
............i4
CHAPTER 1 - BOARD SBTTINGS
Factory-Configured
SwitchandJumperSettings
...............1-3
P3- AnalogInputVoltageRange(FacrorySetring:t0 Volrs)......
.......................
14
P4- AnalogInputVoltagePolarity(FacorySeuing:+/-) ..............
.....................14
P5- DMA Request
Channel(FactorySetting:Disabled).....
...........
14
P6- DMA AcknowledgeChannel(FactorySening: Disabled)
......14
P7 -8254 Timer/Counrer
ClockSources
@acorySerings:CLKI-XTAL, CLK2-OT1,pCK) ...................1-5
P8 - IntemrptSourceandChannel(FactorySetting:Jumperson OT2 & G; InremrptChsDisabled).........l-6
P9- DAC I OutputVoltageRange(FacorySeuing:+5 to -5 volts) ..........
.........1_7
P10- DAC 2 OutputVolrageRange(FactorySening:+5 o -5 volts)............
......1_g
Pl I - A/D DataWordBit StateSet(FacorySetting:+/-) .............
.....................
l_g
Plz - A/D ConverterStatus,/External
Gate2 Monitor @actorySetting:EOC (A/D ConverterStatus)).......l-9
Sl - BaseAddress(FacorySetting:300hex(268decimal) .................
..............1_9
Pull-up/Pull-down
Resistors
on DigitalI/O Lines.....
.......1_10
CHAPTER 2 _ BOARD INSTALLATION
Connecting
theAnalogInputPins
Connecting
theTriggerIn andTriggerOutpins,Cascading
8oards.........
Connecting
theAnalogOutpurs(ADAI200 Only)...........
Connecting
theTimer/Counters
andDigitalVO ...............
Runningthe 1200DIAGDiagnostics
Prrogram
CHAPTER 3 -
HARDWARE DESCRIPTION ...........
2-l
............24
..............24
..................2-s
..................2_5
...................2_s
.............3-1
D/A Converte
Di$tal I/O, Programmable
Peripheral
Interface
.................3_5
CHAPTER 4 - BOARD OPERATION AND PROGRAMMING
BA + 0: ReadSntus/SrartConvert(Readl'\Mrire)
BA + l: ReadA/D Data/Update
DAC Outputs(Read/Write)
BA + 2: Reset(WriteOnly) ..........
BA + 4: PPIPortA - DigitalVO (ReadAMrire)
................
BA + 5: PPI Port B - Channel8oardFunctionsSelect(Readflilrite)
BA + 6: PPIPortC - DigitalVO (Readflilrire)................
BA + 7: 8255PPIConrol Word (WriteOnly) ...........
BA + 8: SZl4TimerlCounrer0
(ReadAMrite)
BA + 9: 8254Timer/Countor
I (Read/lMri9
BA+ l0: 8254Timer/Counr€r2(ReadAMrite)
BA+ 11: S254ConrolWord(WriteOnly)...........
BA + 12: D/A Converter1 LSB: ADA1200(WrireOnly) ..........
BA + 13: D/A Converter1 MSB: ADAI200 (WrireOnly) ...........
BA + 14: D/A Converter
2 LSB: ADAI200 (WrireOnly) ..........
BA + 15: D/A Converter
2 MSB: ADA12200(WriteOnly) ...........
.........44
...........44
...........44
...............4-5
..................4-5
................4-5
.......................4-5
...............4-7
...............4-7
.............4-7
.......4-7
......4-g
.........................4-g
......4-g
.......................4-g
ClearingandSettingBits in
Initializing
EnablingandDisablingtheExtemalTrigger .....
EnablingandDisablingIntemrprs
Conversion
Modes/Triggering
............
Startingan A/D Conversion
MonitoringConversion
Status@MA Doneor End-of-Convert)
ReadingtheConverted
Data............
Programming
thePacerClock ..................
....................4-12
......4-12
.....................4-12
..........,.....4-13
......................4-13
...4-13
...............4-14
8259Programmable
IntemrptController
IntemrptMaskRegister(IMR) ..........
End-of-Interrupt(EOI) Command
WhatExactlyllappensWhenanIntemrptOccurs?
UsingIntemrptsin YourPrograms..........
Writingan InterruptServiceRoutine(ISR)
Savingthe startupIntemrptMaskRegister(IMR) andIntemrptvector
Restoringthe StartupIMR andInterruptVector
CommonInterruptMistakes
.................4-16
......................4-16
......4-16
.....................4-16
................4-16
.............4-17
..........4-tg
.....4-lg
...............4-19
Choosinga DMA Channel
Allocatinga DMA Buffer
CalculatingthePageandOffsetof a Buffer
SettingtheDMA PageRegister...................
TheDMA
DMA SingleMaskRegister
ProgrammingtheDMA Controller
Programming
the 1200for DMA.....
..................4-19
...................4-19
............4-20
............4-2t
................4-Zz
.....4-23
.,4-23
Monitoringfor DMA Done............
CommonDMA Problems
...............
(ADA1200Only)
D/A Conversions
.....4-23
....4-24
........4-2,4
ExampleProgramsandFlow Diagrams
......4-27
SingleConvertFlow Diagram(Figure44) .............
DMA FlowDiagram(Figure4-5)..............
Interrupts
Flow Diagram(Figure4-6) .............
D/A Conversion
Flow Diagram(Figure4-7).
.....................4-29
..............4-30
........4-3I
..........4-32
CHAPTER 5 _ CALIBRATION ......
APPENDIX A - 12OO
SPECIFICATIONS
APPENDIX B - P2 CONNECTORPIN ASSIGNMENTS....
APPENDIX C - COMPONENTDATA SHEETS
APPENDIX D _ CONFIGURING THE 12OO
FOR SIGNAL MATH
APPENDIX E _ CONFIGURINGTHE 12OO
FOR ATLANTIS.........
APPENDIX F - WARRANTY
A-l
.........8-1
D-1
.......E.T.
F-1
ul
iv
LIST OF ILLUSTRATIONS
l-l
t-2
t-3
T4
1-5
r-6
r-7
t-8
r-9
l-10
l-l I
t-12
l-13
l-t4
l-15
1-16
t-17
l-18
2-r
2-2
2-3
3-1
3-2
4-I
4-2
4-3
4-4
4-5
4-6
+-t
5-1
BoardLayoutShowingFactory-Configured
Settings...................
AnalogInputVoltageRangeJumper,P3 ...............
AnalogInputVoltagePolarityJumper,P4 ................
DMA Request
ChannelJumper,P5
DMA Acknowledge
ChannelJumper,P6................
&254Timer/Counter
ClockSourceJumpers,
P7................
8254Timer/Counter
CircuitBlockDiagram.....................
IntemrptChannel
P8 ...............
Jumper,
PullingDowntheIntemrptRequest
Line ............
DAC I OutputVoltageRangeJumper,P9 ................
DAC 2 OutputVoltageRangeJumper,P10..............
A/D DataWord Bit StateSetJumper,Pll
A/D Converter
StatuslExternal
Gate2 MonitorJumper,P12..............
BaseAddress
Switch,Sl ................
Pull-up/Pull-down
ResistorCircuitry....
AddingPull-upsandPull-downsto DigitalVO Lines
GainCircuinyandFormulasfor Calculating
Gainandf ............
Diagramfor Removalof SolderShort...........
n UO Connector
Pin Assignmens.............
AnalogInputConnections
............
Two Boardsfor Simultaneous
Cascading
Sampling
ADI200/ADA1200BlockDiagram
S2l4TimerlCounterCircuit Block Diagram
A/D Conversion
TimingDiagram,All Modes....
PacerClockBlockDiagram
8254Timer/Counter
Circuit Block Diagram
SingleConversion
Flow Diagram
DMA Flow Diagram
Interrupts
Flow Diagram.................
D/A Conversion
Flow Diagram(ADA1200Only)...........
..................
1-3
...................14
................14
.....................14
..................1-5
........1-5
........1-6
................1-6
......................1-z
................1-8
................1-8
...........
l-9
...........1-9
......................1-9
..............
l-l I
.............1-12
..................1-13
.....1-14
.........2-3
........................24
.................2-6
.....................3-3
........34
.....................4-12
...........4-15
......4-25
.......................4-Zg
....................4-31
.......4-32
INTRODUCTION
The ADl200 andADA1200AdvancedIndusrial Contol boardsturn your IBM PC/XT/AT or compatibleinto
high-performance
a high-speed,
dataacquisitionandcontrolsystem.Installedwithin a singleexpansionslot in the
computer,each1200seriesboardfeatures:
. 16 single-ended
analoginput channels,
. l2-bit,5 microsecond
analog+o-digitalconverterwith 125kl{z throughput,
. 15, tl0, or 0 to +10 volt inputrange,
. Resistorconfigurablegain,
. Threeconversionmodes,
. DMA transfer,
. Triggerin andtriggerout for externaltriggeringor cascading
boards,
. 16TTL/CMOS 8255-based
digital I/O lineswhich canbe configuredwith pull-upor pull-downresisrors,
' Threel6-bit timer/counters
(two cascaded
for pacerclock),
. Two 12-bitdigital-to-analog
outputchannelswith dedicatedgrounds(ADA1200only),
. +5, +10,0 to +5, or 0 to +10 volt analogoutputrange(ADA1200only),
. TurtroPascal,TurboC, andBASIC sourcecode;diagnostics
program.
The following paragraphs
briefly describethemajorfunctionsof theboard.A moredetaileddiscussionof board
functionsis includedin Chapter3, HardwareOperation,andChapter4, Board OperationandProgramming.Tlte
boardsetupis describedin Chapterl, BoardSettings.
gital Conversion
Analog-to-Di
(AlD) circuitryreceivesup to 16single-ended
The analog-to-digital
analoginputsandconvertstheseinpus
into l2-bit digital datawordswhichcantien be readand/ortransferred
to pc memory.
The analoginput voltagerangeis jumper-selectable
for bipolarrangesof -5 to +5 volts or -10 to +10 volts,or a
unipolarrangeof 0 to + l0 volts.Theboardis factorysetfor -5 to +5 volts.Overvoltageprotectionto +35 volts is
providedat theinputs.The high-perforrnance
A,/Dconvertersupportsresistorconfigurablegain circuiry so thatyou
cancustomize
theinputgain.
A,/Dconversions
areperformedin 5 microseconds,
andthe maximumthroughputrateis 125kllz. Conversions
arecontrolledthroughsoftware,by an on-boardpacerclock,or by an externaltriggerbroughtontotheboard
throughtheI/O connector.
The converteddatacanbe Eansferred
throughttrePC databusto PC memoryin oneof two ways: by usingthe
microprocessor
or by usingdirectmemoryaccess@MA). The modeof transferis software-selectable
andthe DMA
channelis chosenby jumper settingson theboard.ThePC databusis usedto readand/ortransferdatao pC
memory.In theDMA transfermode,you canmakecontinuoustransfersdirectlyo PC memorywittroutgoing
throughtheprocessor.
Digital-to-AnalogConversion(ADA1200Onty)
(D/A) circuitryon theADA1200featurestwo independentl2-bit analogoutputchannels
The digiral-to-analog
with individuallyjumper-selectable
oulputrangesof -5 to +5 volts,-10 to +10 volts,0 to +5 volts,or 0 to +10 volts.
Datais programmedinto theD/A converteranda conversionis automaticallytriggeredfor a channelthrougha
singlewriteoperation.
AccessttrroughDMA is not available.
8254Timer/Counter
An 8254programmable
intervaltimer containsthreel6-bit, 8-MHz timer/counters
to supporta wide rangeof
timing andcountingfunctions.Two of thetimerrcounters
arecascaded
andcanbe usedinternallyfor thepacer
clock.The third is availablefor countingapplications,
or it canbe cascaded
to theothertwo timer/counters.
i-3
DigitalVO
The 1200has16TTL/CMOS-compatible
digitalI/O lineswhichcanbe directlyinterfacedwith externaldevices
or signalsto senseswitchclosures,triggerdigital events,or activatesolid-staterelays.Theselinesareprovidedby
peripheralinterfacechip.Padsfor installingandactivatingpull-up or pull-down
theon-board8255programmable
resistorsareincludedon theboard.Installationprocedures
aregivenneartheendofChapter l,Board Settings.
What ComesWith Your Board
You receivethefollowing itemsin your 1200package:
. ADl200 or ADAI200 interfaceboard
. Softwareanddiagnosticsdiskettewith TurboPascal,TurboC, andBASIC sourcecode
. User'smanual
If any item is missingor damaged,
pleasecall RealTime Devices'CustomerServiceDepartmentat
(814)234-8087.If you requireserviceoutsidetheU.S.,contactyour local disnibutor.
Board Accessories
In additionto theitemsincludedin your 1200package,RealTime Devicesoffersa full line of softwareand
hardwareaccessories.
Call your local distributoror our mainoffice for moreinformationabouttheseaccessories
and
for helpin choosingthebestitemsto supportyour board'sapplication.
ApplicationSoftwareand Drivers
provideexcellentdataacquisitionandanalysissupport.Use
Our customapplicationsoftwarepackages
SIGNAL*MATH for integrateddaraacquisitionandsophisticated
digital signalprocessingandanalysis,or
ATLANTIS for real-timemonitoringanddataacquisition.rtdlinx andrtdlinx/ablinx driversprovidefull-featured
high level interfacesbetweenthe 1200andcustomor third partysoftware,includingLABTECH NOTEBOOK,
NOTEBOOK/XE,andLTICONTROL.rtdlinx sourcecodeis availablefor a one-timefee.Our PascalandC
Programmer'sToolkit providesroutineswith documented
sourcecodefor cuslomprogrcmming.
HardwareAccessories
Hardwareaccessories
for the 1200includetheMX32 analoginputexpansionboardwhich canexpanda single
input channelon your 1200to 16differentialor 32 single-ended
inputchannels,MR seriesmechanicalrelayoutput
boards,OP seriesoptoisolateddigiualinputboards,theT516 temperature
sensorboard,theTB50 terminalboardand
XB50 prototype/terminal
boardfor easysignalaccessandprototypedevelopment,
ttreEX-XT andEX-AT extender
boardsfor simplifiedtestinganddebuggingof prototypecircuitry,andXP50twistedpair wire flat ribboncable
assemblyfor extemalinterfacing.
UsingThis Manual
This manualis intendedto helpyou installyour newboardandget it runningquickly,while alsoproviding
enoughdetailabouttheboardandits functionsso that you canenjoymaximumuseof its featuresevenin themost
complexapplications.
We assumethatyou alreadyhavean understanding
of dataacquisitionprinciplesandthatyou
cancustomizetheexamplesoftwareor write your own applicationsprograms.
When You NeedHelp
This manualandtheexampleprogramsin thesoftwarepackageincludedwith your boardprovideenough
informationto properlyuseall of theboard'sfeatures.If you haveany problemsinstallingor usingttrisboard,
(814)234-8087,duringregularbusinesshours,easternsandardtime or
contact,
our TechnicalSupportDepartment,
easterndaylighttime,or senda FAX requestingassistance
to (814)234-52L8.Whensendinga FAX request,please
includeyour company'snameandaddress,your name,your telephonenumber,anda brief descriptionof the
problem.
CHAPTER 1
BOARD SETTINGS
The AD1200andADA1200boardshavejumper andswitch
settingsyou canchangeif necessary
for your application.The
1200is factory-configured
with the mostoftenusedsettings.The
factorysettingsarelistedandshownon a diagramin the beginning
of this chapter.Shouldyou needto changethesesettings,usethese
easy-to-followinstructionsbeforeyou installtheboardin your
computer.
Notethatby installingresistorpacksat threelocationsaround
the 8255PPI andsolderingjumpersin thedesiredlocationsin the
pads,you canconfigurethe 16availabledigital VO
associated
linesto bepulled up or pulleddown.This procedureis explained
nearthe endof this chapter.
Also notethatby installingcomponents
at RL, R2, TR4, and
you
C36,
canaddyour own resistorconfigurablegain.The gain
circuiuy is describedat the endof this chapter.
Fa
bo:
exl
avl
P3 - Analog Input VoltageRange(Factory Setting: 10 Votts)
This headerconnector,shownin Figure 1-2, setsthe analoginput voltagerangefor 10 or 20 volts. Note that if
thejumper is installedon 20V, thenP4 canonly be setfor bipolar (+/-). The inpur rangesallowed by the 1200are
15,110,and0 to +10volts.
P3
l-l
taol
t-l
cro
N
Fig.1-2- AnalogInputVoltageRangeJumper,P3
P4 - Analog Input VoltagePolarity (Factory Setting: +/-)
This headerconnector,shownin Figure1-3,setstheanaloginput voltagepolarityfor unipolar(+) or bipolar
(+/-). Note thatif thejumperon P3 is installedon 20V, thenP4 canonly be setfor bipolar(+/). The inpurranges
allowedby the 1200are15, +10,and0 to +10 volts.
Fig. 1-3 -Analog Input Voltage PolarityJumper, p4
P5 - DMA RequestChannel(Factory Setting: Disabled)
This headerconnector,shownin Figure14, letsyou selectchannel1 or 3 for DMA transfers.This line, the
DMA requestline (DRQ), mustbe set to the samechannelasthe DACK line on P6. The factory settingis DMA
disabled(umper in a sored position).Note that if any otherdevicein your systemis alreadyusing your selected
DMA channel,channelcontentionwill result,causingerratic operation.
DRQl
DR03
P5
p5
Fig.1-4- DMARequest
ChannelJumper,
P6 - DMA AcknowledgeChannel(Factory Setting: Disabled)
This headerconnector,shownin Figurel-5, letsyou selectchannelI or 3 for DMA transfers.This line, the
DMA acknowledge
line (DACK), mustbe setto the samechannelastheDRQ line on p5. The factorysettingis
DMA disabled(umper in a storedposition).Note thatif anyotherdevicein your systemis alreadyusingyour
selectedDMA channel,channelcontentionwill result,causingerraticoperation.
T4
tr
DACKl
DACK3
P6
Fig. 1-5 -
DMA AcknowledgeChannelJumper,P6
YI -8254 Timer/CounterClock Sources(FactorySettings:CLKI-XTAL, CLK2-OTI, PCK)
This headerconnector,shownin Figurel-6, letsyou selecttheclock sourcesfor the 8254timerlcounters,
TC0,
TCl, andTC2.TCOandTCI arecascaded
to form thepacerclock.You mustinstalltwo or threejumpersin orderto
properlyusethe timer/counterfeatures,includingthepacerclock.Figure l-7 showsa block diagramof thetimer/
countercircuitry to helpyou in makingtheseconnections.
Theclock sourcefor TCOandTCI is selectedby placinga jumperon XTAL or ECI on CLK1 (thetwo pairsof
pins at the top of the header).XTAL is theon-board8-MIIZ clockandECI is an externalclock sourceyou connect
throughtheexternalI/O connectore245).
Below the CLKI pinsarethreepairsof pinslabeledCLK2. Thesepins areusedto selecttheclock sourcefor
TC2. OTI connectstheoutputof TCI to theclock inputof TC2. Installinga jumperherecascades
all threetimer/
counters,a featurenecessary
whenusingSIGNAL*MATH or ATLANTIS applicationsoftware(seeAppendixesD
andE). XTAL is the on-board8 MHz clock,andEC2is connectedto the sameexternalclock sourceasECI
(n4r.
The lasttwo pins on this header,PCK andET, let you usethepacerclock (PCK) or an externaltrigger(ET) to
triggerAID conversions.
A jumpermustbe placedon PCK in orderto usethepacerclock (outputfrom TCI). Or,
you canplacethejumperacrossET andconnectanyexternaltriggertoY2-39to triggertheA/D converter.
NOTES: You mustdisconnectthepacerclockby removingthePCKjumperandinstallthejumperof ET
wheneveryou usethe externaltriggerline. You musthaveonejumperinstalledon oneof the npoCLKI selections
andonejumperinstalledon oneof thethreeCLK2 selections.
P7
Y
XTAL
o
EC1
oTl
(\|
Y
o
XTAL
IH
EC2
PCK
ET
p7
Fig.1-6-8254 Timer/Counter
ClockSource
Jumpers,
l-5
t - ;8254
;;------'l
12 0 0
I/O CONNECTOR
TO A/D
T R I G GE R
XTAL
EC1
F8
MHz
EXT CLK
EXT GATE 1
I
ptt{ ggl1pl66gp
1x
I
PIN
ozlT / C O U T I
oTl
TIMER/
COUNTER
2
XTAL
EC2
CLK
o-_8
MHz
EXT GATE 2
GATE
T/C OUT2
Ar ri
Fig. 1-7 -8254 Timer/Counter
CircuitBlockDiagram
P8 - Interrupt Sourceand Channet (FactorySetting: Jumperson OT2 & G; Interrupt ChannelsDisabled)
This headerconnector,shownin Figure1-8,letsyou connectanyoneof four intemrptsourcesto any of six
interruptchannels,IRQ2 (highestpriority channel)throughIRQT (lowestpriority channel).To activatea channel,
you mustinstalla jumperverticallyacrossthedesiredIRQ channel.Figure1-8ashowsthe facory setting;Figure
1-8bshowsintenuptsourceOT2 connectedtroIRQ3.
P8
F i g .1 - 8 a :
FactorySetting
P8
or2
or2
ET
ET
EOC
EOC
DMA
IRQT
Fig.1-8b:Interrupt
Source
OT2 Connectedto lRe3
DMA
IRQT
IRQ6
IRQ6
IRQ5
IRQ5
IRQ4
lR04
IRQ3
IRQ3
IRQ2
IRQ2
G
G
Fig. 1-8 -
InterruptChannelJumper,pg
On the right sideof the header,you canselectany oneof four signalsourcesto generatean intemrpt.An
intemtptsourceis chosenby placinga jumperacrossthedesiredpair of.pins.The intemrptsourcesavailablearethe
A/D end-of-convert(EOC),DMA done(DMA), extemalrigger @T), andrheoutpurof timer/counter2 (OT2).
l-6
Whenjumpered,the bottompair of pins on P8, labeledG, connectsa I kilohm pull-down resistorto the output
of a high-impedancetri-statedriver which carriesthe intemrpt requestsignal.This pull-down resistordrives tle
intemrptrequestline low wheneverintemrptsarenot active.Wheneveran intemrptrequestis made,the tri-state
bufferis enabled,forcingtheoutputhighandgenerating
an intemrpLYou canmonitorthe interupt strtusthrough
bit 2 in thestatusword (I/O addresslocationBA + 0). After theintemrpthasbeenserviced,theresetcommand
returnstheIRQ line low, disablingthetri-statebuffer,andpulling theouput low again. Figurel-9 showsthis
circuit.Becausetheintemrptrequestline is drivenlow only by thepull-downresistor,you canhavetwo or more
boardswhich sharethe sameIRQ channel.You can tell which boardissuedthe intemlpt requestby monitoring each
board'sIRQ statusbit.
NOTE: Whenyou usemultipleboardsthatsharethesameinterrupt,only oneboardshouldhavethe G jumper
installed.Therestshouldbe disconnected.
Wheneveryou operatea singleboard,theG jumper shouldbe installed-
INT
SOURGE
IRO STATUS
INTERRUPT
g"
Fig. 1-9-
PullingDownthe InterruptRequestLine
P9 - DAC 1 Output VoltageRange(Factory Setting:+5 to -5 volts)
This headerconnector,shownin Figurel-10, setstheoutputvoltagerangefor DAC 1 at 0 to +5, +5, 0 to +10,
+10
volts.Two jumpersmustbe installed,oneto selecttherangeandoneto selectthemultiplier.The two
or
rightmostjumpersselecttherange,bipolar(15) or unipolar(5). Thetwoleftmostjumpersselectthe multiplier,X2
or Xl. Whena jumperis on the X2 multiplierpins,therangevaluesbecome+10 and 10.The tablebelowshowsthe
four possiblecombinationsof jumpersettings,andthediagramshowsthefactorysetting.This headerdoesnot have
to be setthesameasPl0.
Jumpers(Leftto Blght)
VoltageRange
x2
x1
r5
5
-5 to +5 volts
OFF
ON
ON
OFF
0 to +5 volts
OFF
ON
OFF
ON
-10 to +10 volts
ON
OFF
ON
OFF
0 to +10volts
ON
OFF
OFF
ON
t-7
P9
DACl
:II:
x2x1+5 5
Fig. 1-10-
DAC 1 OutputVoltageRangeJumper,P9
P10- DAC 2 Output VoltageRange(Factory Setting:+5 to -5 volts)
This headerconnector,shownin Figurel-l l, setstheoutputvoltagerangefor DAC 2 at 0 to +5, +5, 0 to +10,
or +10 volts.Two jumpersmustbe installed,oneto selecttherangeandoneto selectthe multiplier.The two
rightmostjumpersselecttherange,brpolar(15) or unipolar(5). The two leftmostjumpersselectthemultiplier,X2
or Xl. Whena jumperis on the X2 multiplierpins,therangevaluesbecome+10 and 10.The tablebelowshowsthe
four possiblecombinationsof jumpersettings,andthediagramshowsthefactorysetting.This headerdoesnot have
to be setthe sameasP9.
Jumpers(Leftto Right)
Voltage Range
and Polarity
x2
x1
r5
5
-5 to +5 volts
OFF
ON
ON
OFF
0 to +5 volts
OFF
ON
OFF
ON
-10 to +10 volls
ON
OFF
ON
OFF
0 to +10volts
ON
OFF
OFF
ON
P10
DAC2
:II:
x2x1r5 5
Fig.1-11- DAC2 OutputVottageRangeJumper,pl0
Pll - A/D Data Word Bit StateSet (Factory Setting: +/-)
This headerconnector,shownin Figurel-12, setsthe stateof theunusedfour bits in the 8-bit MSB of ttre l6-bit
AID dataword. This headerensuresthat ttresefour topmostbits are setat 0 for unipolar conversionsand at the same
stateasthemost,significantbit of the 12-bitA/D converteddatafor bipolarconversions.
Chapter4, BA + 1,
explainsthis in moredetail.NOTE: Pll and P4 must be set the samefor proper board operation.
+l-
Set P4 to the same polarityl
Pl1
Fig.1-12-AlD DataWordBit StateSet Jumper,p11
l-8
Plz - A/D Converter StatudExternal Gate 2 Monitor (Factory Setting: EOC (A/D Converter Status))
This headerconnector,shownin Figure l-13, les you selecteitherthe A,/Dconverterstatusor the externalgate
input of timer/counter2 to be availablefor monitoringat bit 3 of ttrestatusword (BA + 0). The A/D converterstatus
providesa direct readof the t"1D converter'savailability for startingconvenions.This line goeslow when a
conversionstafis,thengoeshigh when the conversionis completed.Chapter4 providesa moredetailedexplanation
of this statussignal.
Oor
o
(,
ut uJ
Fig.1-13- A/DConverter
Status/External
Gate2 Monitor
Jumper,
P12
S1- BaseAddress(FactorySetting:300hex (768decimat))
Oneof themostcommoncausesof failurewhenyou areflustrying your boardis addresscontention.Someof
your computer'sI/O spaceis alreadyoccupiedby internalI/O and otherperipherals.When the 1200boardattempts
to useI/O addresslocationsalreadyusedby anotherdevice,contentionresultsand the boarddoesnot work.
To avoidtttisproblem,the 1200hasan easilyaccessible
five-positionDIP swirch,51, which lets you selectany
oneof 32 startingaddresses
in thecomputer'sVO. Shouldthe facory seningof 300 hex (76gdecimal)be unsuitabie
for your system,you can selecta different baseaddresssimply by settingthe switchesto any oneof the valueslisted
in Tablel-2.The tableshowsttreswirchsettingsandtheircorresponding
decimalandhexadecimal
(in parentheses)
values.Makesurethatyou verify theorderof theswitchnumberson ttreswirch(l through5) beforesetting*rem.
Whentheswitchesarepulledforward,theyareOPEN,or setto logic 1, aslabeledon theDIp swirchpackage.When
you setthebaseaddressfor your board,recordthevaluein therableinsidettrebackcover.Figure l-14 showsthe
DIP switchsetfor a baseaddressof 300hex (768decimal).
Fig.1-14- BaseAddressSwitch,51
l-9
Table1-2- BaseAddressSwltchSettlngs,S1
BaseAddress
Decimal/(Hex)
Swltch Setting
54321
00000
BaseAddress
Decimal/(Hex)
768/ (300)
00001
784tQr0)
10001
00010
8oo/ (320)
10010
s60tQ30)
00011
-816/ (330)
10011
576| (240)
00100
10100
s92tQs0)
00101
832| (340)
848/ (350)
608tQ60)
6U tQ70)
00110
10110
00111
864/ (360)
880/ (370)
640| (280)
01000
896/ (380)
11000
6s6| (290)
01001
en tQn)
ll00l
672t QA0)
688/ (2B0)
01010
928/ (3A0)
11010
01011
9M t(380)
ll0ll
704 tQC0)
01100
960/ (3C0)
11100
720tQm)
01101
976tQrn)
11101
736t(2E0)
7s2| (2F0)
01110
9e2t(3E0)
1008/ (3F0)
11110
sn tQ00)
s28| (2ro)
su t(220)
0ltll
Switch Settlng
5432'l
10000
10101
10111
11111
0 = c l o s e d1, = o p e n
Pull-up/Pull-downResistorson Digital VO Lines
The 8255programmableperipheralinrerfaceprovides 16TTI/CMOS compatibledigiral VO lines which canbe
interfacedwith externaldevices.Theselines aredivided into threegroups: eight Port A lines, four port C Lower
lines, and four Port C Upper lines. (The eight lines of Port B are usedfor internal boardfunctions.)You can insall
and connectpull-up or pull-down resistorsfor any or all of thesethreegroupsof lines. You may want to pull lines
up for connectionto switches.This will pull theline high whentheswitchis disconnected.
Or, you may wantto pull
lines down for connectionto relayswhich control urning motorson and off. Thesemotorsturn on when the digitat
lines controlling them are high. The Port A line.sof the 8255automaticallypower up as inputs,which can float high
during the few momentsbeforethe boardis first initialized. This cancausethe externaldevicesconnectedto these
lines to operateerratically. By pulling theselines down, whenthe dataacquisitionsystemis first hrned on, the
motorswill not switchon beforethe 8255is initialized.
To usethepull-up/pull-downfeature,you mustfirst ins0all10kilohm resistorpacksin any or all of thethree
locationsnearthe8255,labeledPA, PCL, andPCH.PA akes a lGpin pack,andPCL andPCH take6-pin packs.
Figure 1-l5 showsa blowupof thePA, PCL, andPCH resistorpacklocations.
After theresistorpacksareinstalled,you mustconnecttheminto ttrecircuit aspull-upsor pull-downs.Locate
the three-holepadson ttreboardbelow the resistorpacks.They are labeledG (for ground)on one end and V (for
+5V) on theotherend.The middleholeis common.PA is for Port A, PCL is for Port C Lower, andpCH is for port
C Upper.Figure l-15 showsttresepads.To operateaspull-ups,soldera jumperwire betweenthecommonpin
(middlepin of tlrethree)andthe V pin. For pull-downs,soldera jumperwire berweentlrecommonpin (middlepin)
andtheG pin. Figurel-16 showsPort A lines with pull-ups,PortC lower with pull-downs,andPort C Upperwith
no resistors.
l-10
S$FE;EEEHH
i5ffieEiEggstr
:E:
H
"lJ"f
oooo
oooooo
oor oo
oo* oo
oooooo
oooo
gfrlgg
ffiL,L
;ffi];E,f,sp
ffi:-*:WI
oooooo
oooooooo
oo
oo
oo.
oo
*' 33
33
oooooooo
oooooo
Fig.1-15- Pull-up/Pull-down
Resistor
Circuitry
8255
(
PORT
AJ
(PA0-7)
1
(
PoRT
c r
LOWER
1
(PAo.3)
[
PORT
C T
l'l^::;
1
Fig.1-16- Addingpuil-upsand putt_downs
to
Digitatt/O Lines
Resistor Configurable Gain
Thel200hasresitorconfigurable
gainb c11om1ze.
thegainseningfor a
i:l,Hr[[
H#:,T,fr:"
uptheboaio
roragainoron.ifi-'ffi;r
apprication.
Notethat
when
,n"ro-lpecific
input
.r,i,inrriw'r operate
onry
at
Theresisror
configurable
gainis derived
Rl and-R2,
trimpotTR4,andcapacibrc36,all
locatedin theuppertt'"* -o'tiehi;;'#,i; by addingresislors
board:The;e;i;r^
-o trimpotiombin"to ,"t rhegain,
in theformulain Figure1-17'ca;;ilor
asshown
yourinputsignalis a slowlycrrangingcii i. p-"lo"a ,o n"iv"" Jrr
low-pass
filreringin thegaincircuit.If
one;;;""
"oo
do
it ata.higher
capacitor
at c36in order,oredu": n"" itp* il;qu€ncynorneed,;;;;*
B@,youmaywanrto adda
range
and
in
turn
reduce
formulafor settingthefrequencv
ttre
noise
on'yourinputsignar.The
is givenin ttreoiagram.Hg* i-rirn"*,
lJ;;;;l#itry
is configured.
As shownin Figure1'77' asoldershort
mustberemoved
from
trreboardto activatethegaincircuiry.
onthebottom
This
sideofneboarJ
::l#:ffled
uno
errJ7ra'D;i;ic1.rig* l-18shows
rierocation
or*re
ol
OI
'{:1"
El
lFl
oHo
^ ooooooooooo
iooooooooooq*
*r*(f,
lf l
-.olJ:id6615-ooo#gj
oooo
oooooo
OOr OO
oo.B oo
oooooo
oooo
lo
IO
RemoveSolder Short
BetweenThese2 Padson
BottomSldeof Board
@
HEtr;EiEiESEi
k&,ffF'EP
oooooo
oooooooo
oo
oo
oor
oo
*. 33
33
oooooooo
oooooo
Fig.1-18- Diagram
lor Rernovalof
SolderShort
CHAPTER2
BOARD INSTALLATION
The 12ffi is easyto installin your IBM PC/XT/AT or compatible computer.It canbe placedin any slot,shortor full-size.This
chaptertells you step-by-step
how to install andconnectthe board.
After you haveinstalledthe boardandmadeall of your connections,you canturn your systemon andrun the 1200DIAG
boarddiagnosticsprogramincludedon your examplesoftwaredisk
to verify that your boardis working.
Board Installation
Keep the boardin its antistaticbag until you arereadyto install il in your computer.Whenremoving it from the
bag,hold theboardat theedgesanddo not touchthecomponents
or connectors.
Beforeinstallingtheboardin your computer,checkthejumperandswirchsettings.Chapter1 reviewsthe
factory settingsand how to changethem.If you needto changeany settings,refer to the appropriateinsEuctionsin
Chapterl. Note that incompatiblejumper settingscanresult in unpredictableboardoperationand erraticresponse.
To installtheboard:
1. Turn OFF thepowerto your computer.
2. Removethe top coverof the computerhousing(referm yourowner'smanualif you do not alreadyknow
how to do this).
3. Selectany unusedshortor full-sizeexpansionslotandremovethe slot bracket.
4. Touchthe metal housingof the computerto dischargeany staticbuildup and thenremovettreboardfrom its
antistaticbag.
5. Holdingtheboardby its edges,orientit so thatits cardedge@us)connectorlinesup with the expansionslot
connectorin thebottomof theselectedexpansionslot.
6. After carefullypositioningtheboardin the expansionslot,sothatthecardedgeconnectoris restingon the
computer'sbusconnector,gentlyandevenlypressdownon theboarduntil it is securedin ttreslot.
NOTE: Do not forcetheboardinto the slot.If theboarddoesnot slideinto place,removeit andtry again.
Wiggling the boardor exertingtoo muchpressurecanresultln damageto the boardor to the computer.
7. After the boardis installed,securethe slot bracketback inlo placeandput the coverback on your computer.
The boardis now readyto be connectedvia the externalVO connectorat the rear panelof your computer.
ExternalVO Connections
Figure2-l showsthe 1200'sP2UO connectorpinout.Referto this diagramasyou makeyour I/O connections.
AINI
AIN9
AIN2
AINlO
AIN3
AINIl
AIN'
AINl2
atil5
AINI3
atil6
AINl'
AINT
AINIs
AIN8
AINl6
AOUTT
AIIALOG GND
AOUT2
ANALOG OND
Ail LOG GI{O
ANALOO GND
PA7
PC7
PA5
PC6
PA5
PC5
PA'
POI
PA3
PC3
PA2
PC2
PAI
PCt
PAO
PC0
T R I G G E RI N
OIGITALGND
EXT GATE 1
T/C OUT r
TRIGGEBOUT
T/C OUT 2
EXTCLK
EXT GATE 2
+12VOLTS
+5 VOLTS
.r2 volTs
D I O I T A LO N D
Fig.2-1- PZ VOConnectorPinAssignments
2-3
Connectingthe AnalogInput Pins
Connectthe high sideof theanaloginput to oneof theanaloginputchannels,AINI throughAIN16, and
connectthelow sideo an ANALOG GND (pins 18and2A-22onP2).Figure2-2 showshow rheseconnections
are
made.
NOTE: It is goodpracticeto connectall unusedchannelsto ground,asshownin thefollowing diagrams.
Failure to do so may affect the accuracyof your results.
I 200
I'O CONNECTOR
P2
I
I
SIGNAL 7
PIN,I
souRcE| '
1 our(
Inno
I
a
a
AIN I
a
a
a
a
.
ilux
a
O U T+
SIGNAL
I
jouRcE [ '
15 ourJ
+
A t Nt 5
OUT .
(GNc
PIN 16
AIN I5
PIN 22
Fig.2-2- AnalogInputConnections
Connectingthe Trigger In and Trigger Out Pins, CascadingBoards
The 1200boardhasan externaltrigger input (P2-39)and output(Y243) so that conversionscanbe started
basedon externalevents,or so that two or moreboardscanbe cascadedand run synchronouslyin a "master/slave"
configuration.By cascadingtwo (or more)boardsas shownin Figure 2-3, theycanbe triggeredto startan A/D
conversionat thesametime (samplinguncertaintyis lessttran50 nanoseconds).
Whenyou cascade
boards,be sure
to set eachboardfor a different baseaddress(seeChapterl), or systemcontentionwill result.
NOTE: When cascadingboards,the samplinguncertaintyis lessthan 50 nanoseconds.
If this level of uncertainty is too geat for your application,you canconnectthe trigger signalto the rigger input of eachboard.In this
configuration,the boardsare not cascaded,but ratherdriven by the sametrigger pulseat the sametime, and the
samplinguncertaintyis reducedto lessthan5 nanoseconds.
If you applyan externaltriggerto theboard'sniggerin pin, notethata jumpershouldbe instauedon ET on p7
(seeChapter1). The boardis triggeredon thepositiveedgeof thepulseandthepulsedurationshouldbe at least100
nanoseconds.
24
B O A R DT 1
(MASTER)
T R I G G E RO U T
BOARO T2
(SLAVE)
T R I G G E RI N
Fig. 2-3 -
CascadingTwo Boardsfor SimultaneousSampling
Connectingthe AnalogOutputs(ADA1200Only)
For eachof thetwo D/A outputs,connectthe high sideof thedevicereceivingtheoutputto theAOUT channel
F2-17 orP2-19)andconnectthelow sideof the deviceto an ANALOG GND (P2-tS orp2-20).
Connectingthe Timer/Countersand Digital UO
For all of theseconnections,the high sideof an externalsignalsourceor destinationdeviceis connectedto the
appropriatesignalpin on the P2 I/O connectorand the low sideis connectedto any DIGITAL GND.
Running the I200DIAG DiagnosticsProgram
Now that your boardis readyto use,you will want to try it out. An easy-to-use,menu-drivendiagnostics
program,1200DIAG,is includedwith your examplesoftwareto help you verify your board'soperation.you can
also usethis programto makesurethat your curent baseaddresssettingdoesnot contendwith anotherdevice.
2-5
CHAPTER3
HARDWARE DESCRIPTION
This chapterdescribesthefeaturesof the 1200hardware.The
majorcircuitsarethe A/D, the D/A, thetimer/counters,
andthe
digital VO lines.This chapteralsodescribesthehardware-selectableintemrpts.
The 1200boardhasfour major circuits, the A/D, the D/A (ADA1200 only), the timer/counters,and rhedigitat
I/O lines. Figure 3-1 showsthe block diagtamof ttreboard.This chapterdescribesthe hardwarewhich makesup the
major circuits and hardware-selectable
intemrpts.
Fig.3-1- AD1200/ADA1
200BlockDiagram
A/D ConversionCircuitry
The1200performsanalog-to-digital
conversions
on up to 16 single-ended
software-selectable
analoginput
channels.The followingparagraphs
describettreA/D circuitry.
AnalogInputs
The input voltagerangeis jumper-selectable
for -5 to +5 volts,-10 to +10 volts,or 0 to +10 volts.Resistor
configurablegain letsyou amplify lower level signalsto morecloselymatchtheboard'sinput ranges.This gain
circiutry is describedin Chapter1. Overvoltageprotectionto +35 volts is providedat theinputs.
A/D Converter
The AD678 12-bitsuccessive
approximationA/D convert€raccuratelydigitizesdynamicinput voltagesin
5 microseconds,
for a maximumthroughputrateof 200kHz for theconverteralone.The AD678 containsa sampleand-holdamplifier,a 72-bitA/D converter,a 5-voltreference,a clock,anda digitatinterfaceto providea complete
A/D conversionfunctionon a singlechip.Irs low-powerCMOSlogic combinedwith a high-precision,
low-noise
designgive you accurateresults.
Conversionsare initiated throughsoftware(internally riggered) or by using an extemaltrigger broughtonto the
boardthroughthe I/O conneclor.An on-boardpacerclock canbe usedto control the conversionrate. Conversion
modesaredescribedin Chapter4, Board OperationandProgramming.
3-3
Data Transfer
The converteddatacanbe tansfened throughthePC databus to PC memoryin oneof two ways: by usingthe
microprocessoror by using direct memoryaccess(DMA). Databus transferstakemore processortime to e*ecute.
They usepolling and intemtpts to determinewhen datahasbeenacquiredand is readyfor transfer.DMA places
da0adirectlyinto thePC's memory,onebyteat a time,with minimaluseof processortime. DMA transfersare
managedby the DMA controllerasa backgroundfunction of the PC, letting you operateat higher throughputrates.
Themaximumthroughputrateof the 1200is 125kHz.
D/A Converters(ADA1200Only)
Two independentl2-bitanalogoutputchannelsareincludedon theADAI200. Theanalogoutputsaregenerjumper-selectable
atedby two l2-bit D/A converterswith independent
outputrangesof +5, +10, 0 to +5, orb to +10
volts.The110 volt rangehasa resolutionof 4.88millivolts,the+5 and0 to +10 volt rangeshavea resolutionof
2.44millivolts, andthe0 to +5 volt rangehasa resolutionof 1.22millivolts.
Timer/Counters
An8254 programmableinterval timer providesthree16-bit, 8 MHz timer/countersto supporta wide rangeof
timing andcountingfunctions.Two of the timer/counters,
TCOandTCl, arecascaded
so thattheycanbe usedfor
thepacerclock.Thepacerclock is describedin Chapter4. You canusetheremainingtimer/counter,
TC2, for
countingapplications,
or cascade
it to TCOandTCI for timing applications.
Figure3-2 showsthetimer/counter
circuiry.
Eachtimer/counterhastwo inputs,CLK in andGATE in, andoneoutput,timer/counterOUT. They canbe
programmedasbinary or BCD down counten by writing the appropriatedatato the commandword, as describedin
Chapter4. Thecommandword alsoletsyou setup themodeof operation.The six programmable
modesare:
Mode0
Mode I
Mode 2
Mode 3
EventCounter(Intemrpton TerminalCount)
Hardware-Retriggerable
One-Shot
RateGenerator
SquareWaveMode
!-tru i ------l
TITER/
COUI{TER
0
CLK
1200
I/O CONNECTOR
?2
TO A/D
TRIGGER
XTAL
EC1
F-
8 MHz
I
I
I
EXT CLK
GATE
OUT
EXT GATE 1
prr{gglrnrecen rN
rt* o11116er1l .,
CLK 2
L----__-__.;
Fig.3-2- 8254Timer/Gounter
CircuitBlockDiagram
Mode 4
Mode 5
Software-TriggeredStrobe
HardwareTriggeredStrobe(Retriggerable)
Thesemodesaredetailedin *re 8254DataSheet,reprintedfrom Intel in AppendixC.
Digital VO, ProgrammablePeripheralInterface
The programmableperipheralinterface@PI) is usedfor digital VO functions.This high-performanceTlLl
CMOS compatiblechip has24 digital I/O lines divided into two goups of 12 lines each:
GroupA - Port A (8 lines)andPortC Upper(4 lines);
GroupB ----Port B (8 lines)andPort C Lower (4 lines).
Port A andPort C areavailableat the externalI/O connector,p2. port B is dedicatedto on-boardfunctionsand
is not availablefor your use.You can usethe 16 lines of PortsA andC in one of thesethreePPI operatingmodes:
Mode 0 - Basicinput/output.Lets you usesimpleinput and outputoperationfor a porL Datais written to or
readfrom the specifiedport.
Mode I - Strobedinput/output.I-es you transferIIO datafrom Port A in conjunctionwittr strobesor handshakingsignals.
Mode2 - Strobedbidirectionalinput/output.I*ts you communicate
bidirectionallywittr an externaldevice
throughPort A. Handshaking
is similarto Mode 1.
Thesemodesaredetailedin the8255DataSheet,reprintedfrom Intel in AppendixC.
Interrupts
The 1200hasfourjumper-selectable
intemrptsources:end-of-convert,
DMA done,the externaltrigger,andthe
outputof timer/counter2. The end-of+onvertsignalcanbe usedto interruptthe computerwhen an A/D convenion
is completed.The DMA doneis usedin the DMA modeto generatean intemtpt whenevera DMA transferis
completed.The externaltrigger at the VO connectorcanbe usedto generatean intemrpt wheneverthe nigger line
changesstatesfrom low to high.Or, theoutputof timer/counter
2 cangenerate
an intemrptwheneverrhecount
reaches0. Chapter1 tells you how to set thejumperson the intemrpt headerconnectorP7, and Chapter4 describes
how to programintemrpts.
3-5
CHAPTER 4
BOARDOPERATIONAND PROGRAMMING
This chaptershowsyou how to programanduseyour 1200
board.It providesa completedescriptionof the VO map,a detailed
descriptionof programmingoperationsandoperatingmodes,and
flow diagramsto aid you in programming.The exampleprograms
includedon the disk in your boardpackagearelistedat theendof
this chapter.Theseprograms,writtenin TurboC, TurboPascal,
andBASIC, includesourcecodeto simplify your applications
programming.
4-l
Definingthe VO Map
The I/O mapfor theADl200 andADA1200is shownin Table4-1 below.As shown,theboardoccupies16
I/O port locations.Thebaseaddress(designated
consecutive
asBA) canbe selectedusingDIP switchSI asdescribedin Chapterl, Board Settings.This switchcanbe accessed
withoutremovingtheboardfrom thecomputer.
S1 is factorysetat 300 hex (768decimal).Thefollowing sectionsdescribetheregistercontenrsof eachaddressused
in theI/O map.
."Table/t-1--ADl200/ADA1200t/O Map
ReglsterDescription
ReadFunction
ReadStatus/Start
Convert Readslatusword
WriteFunction
Address'
(Declmal)
StartA/D conversion
BA+0
Read converteddata, LSB
first,then MSB
Simultaneously
update
DAC1 andDAC2
(ADA1200
only)
B A +1
Reset
Not used
Resets board so that it is
readyto start A/D conversions
B A +2
Reserved
Notused
ReadData/Update
DACs
8255PPIPortA
Notused
ProgramPortA digitaloutput
ReadPortA dighalinputlines lines
8255PPIPortB
(Ghannel/Board
Functions)R eadPortB bits
8255PPIPortC
Programchannel;external
triggerenable,IRQenable
ProgramPortC digitaloutput
Read Port C digitalinput lines lines
BA+3
BA+4
BA+5
BA+6
8255PPlControlWord Notused
ProgramPPIconfiguration
BA+7
S2S4TimerlCounter
0
(Usedfor pacer clock)
Loadcountregister
B A +8
Loadcountregister
BA+9
Loadcountregister
B A +1 0
Programcountermode
BA+ 1'l
Notused
ProgramDAC1LSB
B A +1 2
Nol used
ProgramDAC1MSB
B A +1 3
Notused
ProgramDAC2LSB
B A +1 4
Not used
ProgramDAC2MSB
B A +1 5
Readcount value
8254Timer/Counter
1
(Usedfor pacerclock)
Readcount value
8254Timer/Counter
2
(Available
for externaluse) Readcount value
S254TimerlCounter
ControlWord
Notused
D/AConverter
1 LSB
(ADA1200
only)
D/AConverter
1 MSB
(ADA1200
only)
D/AConverter
2 LSB
(ADA1200
only)
D/AConverter
2 MSB
(ADA1200
only)
* BA = BaseAddress
4-3
BA + 0: ReadStatudStart Convert (ReadlWrite)
A readprovidesthefive statusbits definedbelow.Theend-of-convert
bit goeshigh whena conversionis
completeand doesnot go low until the datais read,usefulinformationwhen using externaltriggering to start
conversions.
The DMA donebit goeshigh whenyou arein theDMA modeandtheDMA transferis complete.The
IRQ statusbit goeshigh whenan intemrpthasoccunedandstayshigh until a resetcommandis sent(BA + 2). D3
showsthe statusof either the A/D converterstatussignalor the externalgateinput for timer/counter2, dependingon
thesettingofjumper P12.Unlike theEOC slatusat bit 0, theA/D converters[atusgoeslow whena conversionstarts
andthengoeshigh assoonastheconversionis completed.Whentheinput hasbeensampledanda conversionis in
progress,this line goeslow. At this time,the analoginput channelcanbe changed,allowingmaximumthroughput
for channelscanning.
A write stafrsan A/D conversion(datawritten is irrelevant).
D7
D6
D5
D4
D3
D2
D1
DO
A/D CONVERTER
Starus
o=convertinS
1=notconverting
EXTGATE2 Status
monitors
externalgate
2line
End-ol
l-of-Convert
|
|
O
=
no
n oEOC
|
|
1 = cconversion
or
I
I
done
|
|
DMADone
I
0 = DMAnotdone
IRQStatus 1 = DMAdone
0=NolRQ
1= IRQ
BA + 1: ReadA/D Data/UpdateDAC Outputs (ReadAilrite)
Two successive
readsprovidetheLSB first, followedby ttreMSB, for eachA/D conversion,asdefinedbelow.
If a conversionis srartedbeforethis datais readfrom thepreviousconversion,thedatawill be lost.Whenjumpers
on P4 andPl I are setfor bipolar conversions,ttredataword's four most significantbits matcht}remost signifiiant
bit of the A/D converteddataOit I l). This is necessaryto provide the correcttwos complementrepresentationof
theconverteddata.WhenP4 andPl1 aresetfor unipolarconversions,
thesetop four bits are0.
LSB
MSB
D7
D6
D5
D4
D3
D2
D1
DO
Bir7
Bir6
Bits
Bit4
Bir3
Bit2
Bir1
Bit0
D7
D6
D5
D4
D3
D2
D1
DO
Bit11
Bit11
Bit11
Bit9
BitI
Bir11 Bir11 Bir10
A write simultaneouslystartsa D/A conversionin both DACs (datawritten is irrelevant).If ttredatawritten to
eitherchannelhasnot beenupdatedsincethe lastconversion,theoutputofthe corresponding
DAC will not change.
BA + 2: Reset(Write Only)
Resetsinternal registersso that ttreboardis readyto startconversions.The datawritten is irrelevant;the act of
writing to thisaddressclearstheboard.A resetcommandsetsthe internalbyte pointerto readtheLSB on the next
read,reserstheDRQ andIRQ registers,androsets(clears)theDMA donebit, BA + 0, bit l.
BA + 3: Reserved
AA
BA + 4: PPI Port A - Digital VO (Read/Write)
Transfersthe 8-bit Port A digital input and digital outputdatabetweenthe boardandan externaldevice.A read
transfersdatafrom the externaldevice,ttrroughV2,andino PPI Port A; a write transfersthe written datafrom Port
A throughP2 to an extemaldevice.
BA + 5: PPI Port B - ChanneVBoardFunctionsSelect(ReadAVrite)
Programsthe analoginput channel,and enablesthe IRQ andexternaltrigger. Readingthis registershowsyou
thecurrentsettings.
D7
D6
D5
D4
D3
D2
IRQEnable
Enabl
0 = IRQdisabled
1 = IRQenabled
D1
DO
Analoglnput
ChannelSelect
0000= channel1 1000= channel9
0001= channel
2 1001= channel
10
0010= channel
3 1010=channelll
0 0 1 1= c h a n n e l 4 1 0 1 1= c h a n n e1l2
0100 = channel
5 1 1 0 0 = c h a n n1e3l
0101= channel
6 1101= channel
14
0110= channel
7 1 1 1 0 = c h a n n1e5l
0 1 1 1= c h a n n e l S1 1 1 1= c h a n n e1 l6
ExternalTriggerEnable
0 = Disabled
1 = Enabled
BA + 6: PPI Port C - Digital UO (Read/Write)
Transfersthe two 4-bit Port C digital input and digital outputdatagroups@ort C Upper andPort C Lower)
betweenthe boardandan extemaldevice.A readtransfersdatafrromthe externaldevice,throughY2, andino PPI
Port C; a write Sansfersthe written daa from Port C throughP2 to an externaldevice.
BA + 7: 8255PPI Control Word (Write Only)
Whenbit 7 of this word is setto l, a write programsttrePPI configuration.The PPI mustbe programmedso
thatPort B is a Mode 0 outputport,asshownbelow(X = don't care).
D7
D6
D5
D4
D3
D2
DO
-l
Mode Set F,"s
i
1 = active
1",
rde Seler>t
is:
I t,
D1
= mode t
= mode
= modeI
I
I
I
I
I
I
I
I
fr"rl
|
|
I
I
|
I
|
I
Port A
0 = output
1 = input
PortC
t C Lower
o =output
oul
1 = iinput
np
PortB
o = outPut
1 = inpur
I
|
I
ModeSelEct
0=mode0
1=mode1
L-
-__o3t_tJ
The tablebelow showsthe control words for the 16possibleMode 0 Port VO combinations.The control words
which setPort B asan input cannotbe usedon the 1200.
8255Port l/O Flow Directionand ControlWords,Mode0
GroupA
GroupB
ControlWord
PortA
Port C
Upper
Port B
PortC
Lower
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Binary
Decimal
Hex
10000000
128
80
Input
10000001
129
81
Input
Output
10000010
130
82
Output
Input
Input
10000011
131
83
Output
Input
Output
Output
10001000
136
88
Output
Input
Output
Input
10001001
137
89
Output
lnput
Input
Output
10001010
138
8A
Output
Input
Input
lnpul
10001011
139
8B
Input
Output
Output
Output
10010000
144
90
Inpul
Output
Output
Input
10010001
145
91
Input
Output
Inpul
Output
10010010
146
92
Input
Output
Input
Input
10010011
147
93
lnput
Input
Output
Output
10011000
152
98
Input
lnput
Outpul
lnput
10011001
153
99
lnput
Input
Input
Output
10011010
154
9A
Input
Input
lnput
Input
10011011
155
9B
Whenbit 7 of $e PPI conrol word is setto 0, a write canbe usedto individually programthe Port C lines.
D7
D6
D5
D4
SeUResel
set
FunctionBit
0 = active
D3
D2
Bit Select
000= PCo
001= Pc1
010= PC2
0 1 1= P C 3
100= Pc4
101= PC5
1 1 0= P C 6
1 1 1= P C 7
4-6
D1
DO
Blt Set/Reset
Sel
0=sel bitto0
1=setbittol
For example,if you want to setPort C bit 0 to l, you would setup thecontrolword so thatbit 7 is 0; bits l, 2,
and3 are0 (this selectsPC0);andbit 0 is 1 (this setsPCOto l). Theconrrolword is setup like rhis:
SetsPCOto 1:
(writtento BA+7)
D7
D6
D5
D4
D3
D2
D1
X = don'tcare
SeUReset
FunctlonBlr
DO
Set PCO
Bit Select
000= PCO
BA + 8: 8254Timer/Counter 0 (ReadAVrite)
A readshowsthe countin thecounter,anda write loadsthecounterwitl a newvalue.Countingbeginsassoon
asthecountis loaded.This counteris cascaded
with TCI to form the 32-biton-boardpacerclock.
BA + 9: 8254Timer/Counter1(ReadMrite)
A readshowsthe countin thecounter,anda write loadsthecounterwith a new value.Countingbeginsassoon
as the count is loaded.This counteris cascadedwith TCOto form fte 32-bit on-boardpacerclock.
BA + 10: 8254Timer/Counter 2 (Read/Write)
A readshowsthe countin thecounter,anda write loadsthecounterwith a newvalue.Countingbeginsassoon
asthecountis loaded.This countercanbe cascaded
to TCOandTCI or it canbe usedindependently.
BA + 11: 8254Control Word (Write Only)
Accesses
the 8254controlregisterto directlycontrolthethreetimer/counters.
D7
D6
D5
D4
D3
D2
D1
DO
BCD/Binary
0 = binary
1=BCD
CounterSelect
Selec
00 = Counter0
01 = Counter1
10= Counter
2
11 = readbacksetting
Read/Load
00 = latchingoperalion
01 = read/load
LSBonly
10 = read/load
MSBonly
11= read/load
LSB,thenMSB
4-7
CounterMode Select
Counter
000= Mode0, evenlcount
001= Mode1, programmable
1-shot
010= Mode2, rategenerator
011 = Mode3, squarewaverategenerator
100= Mode4, software-lriggered
strobe
101= Mode5, hardware-triggered
strobe
BA + 12: D/A Converter l LSB: ADA1200(Write Onty)
Programsthe DACI LSB (eightbia).
BA + 13: D/A Converterl MSB: ADA1200(Write Onty)
ProgramstheDACI MSB (four bits) into D0 throughD3; DztthroughD7 ae inelevant.
BA + 14: D/A Converter 2 LSB: ADA1200(Write Only)
hograms theDAC2"LSB(eightbis).
BA + 15: D/A Converter2 MSB: ADA1200(Write Only)
Programsthe DAC2 MSB (four bits) into D0 ttuoughD3; D,l throughD7 arc inelevanl
DACLSB
DACMSB
D7
D6
D5
D4
D3
D2
D1
DO
Bir7
Bit 6
Bit5
Bit4
Bir3
Bir2
Bit 1
Bit 0
D7
D6
D5
D4
D3
D2
D1
DO
Bit11
Bir10
BirI
BitI
X
4-8
Programmingthe 1200
This sectiongives you somegeneralinformationaboutprogrammingand the 1200board,and thenwalks you
throughthemajor 1200programmingfunctions.Thesedescriptions
will help you asyou usetheexampleprograms
includedwith the boardand the programmingflow diagramsat the end of this chapter.All of the programdescriptionsin this sectionusedecimalvaluesunlessotherwisespecified.
The 1200is programmedby writing to andreadingfrom the correctVO port locationson the board.TheseI/O
portsweredefinedin theprevioussection.Most high-levellanguages
suchasBASIC, Pascal,C, andC++, andof
courseassemblylanguage,makeit very easyto read/writethesepors. The tablebelow showsyou how to readfrom
and write to I/O ports using somepopularprogramminglanguages.
Language
BASIC
TurboC
TurboPascal
Assembly
REad
Data= INP(Address)
Write
OUTAddress,Data
Data= inportb(Address) outportb(Address,
Data)
Data:= Port[Address]
Port[Address]
:= Data
movdx, Address
in al,dx
movdx, Address
moval, Data
out dx, al
In addition to being able to read/writethe I/O [nrts on the 1200,you must be able o perform a variety of
operationsthat you might not normally usein your programming.The tablebelow showsyou someof the operators
discussed
in this section,with an exampleof how eachis usedwith Pascal,C, andBASIC. Notethat the modulus
operatoris usedto retrievethe leastsignificantbyte (LSB) of a two-byte word, and the integerdivision operatoris
usedto retrievethe mostsignificantbyte (MSB).
Language
Modulus
IntegerDivlsion
c
2,=bo/oC
a=b/c
AND
&
a=b&c
OR
I
a=blc
Pascal
MOD
a : = b M O Dc
DIV
a:=bDlVc
AND
a:=bANDc
OR
a:=bORc
BASIC
MOD
a=bMODc
\ (backslash)
a=b\c
AND
a=bANDc
OR
a=bORc
Many compilershavefunctionsthat canread/writeeittrer8 or 16bia from/to an I/O port. For example,Turbo
PascalusesPort for 8-bit port operationsandPortW for 16bits,TurboC usesinportb for an 8-bit readofa port
andinport for a 16-bitread.Be sure to useonly 8-bit operationswith the 1200!
Clearingand SettingBits in a Port
Whenyou clearor setoneor morebits in a port, you mustbe carefulthatyou do not changethe satus of the
otherbits. You canpreservethe statusof all bits you do not wish to changeby properuseof the AND and OR
binary operators.Using AND and OR, singleor multiple bits canbe easilyclearedin one operation.
To clear a singlebit in a port, AND thecurrentvalueof theport with thevalueb, whereb = /JJ - 2tat.
Example: Clearbit 5 in a port.Readin thecurrentvalueof theporr,AND itwith223
(223=255 -X), andthenwrite theresultingvalueto theport.In BASIC, ttrisis programmedas:
V = INP (PortAddress)
V=VAND223
OUT PortAddress,
V
4-9
To seta singlebit in a port, OR thecurent valueof theport with tle valueb, whereb = 2h,.
Example: Setbit 3 in a port.Readin thecurrentvalueof theport, OR it with 8 (8 = 23),andthen
write the resulting valueto theport. In Pascal,ttris is programmedas:
V :: Poqt [PortAddress] ,.
V := V OR 8;
Port [PortAddress] := V;
just aseasily.To clear multiplebits in a port,
Settingor clearingmorethanonebit at a time is accomplished
=
AND the culrent value of the port with the valueb, whereb 255 (the sum of the valuesof the bits to be cleared).
Notethatthebits do not haveto be consecutive.
Example:Clearbits2,4,and6inaport.Readinthecunentvalueoftheport,ANDitwithlTl
(171= 255 - 22- 2n- ?i), andthenwrite theresultingvalueto tre port. In C, this is programmed
as:
v = inportb(pbrt_address) ;
v=v&171;
outportb (port_address, v) ;
To set multiplebits in a port, OR thecurrentvalueof theport with the valueb, whereb = the sumof the
individualbits to be set.Notethatthebits to be setdo not haveto be consecutive.
Example: Setbis 3, 5, and7 in a port.Readin thecurrentvalueof theport, OR it with 168
(168= 23+ 25+ 27),andthenwrite theresultingvaluebacko theport. In assemblylanguage,this
is programmed
as:
mov dx, PortAddress
in aI, dx
or al, 168
out dx, a1
Often,assigninga rangeof bits is a mixtureof settingandclearingoperations.You cansetor cleareachbit
individually or usea fastermethodof first clearingall the bits in the rangethen settingonly thosebits that mustbe
setusingthe methodshownabovefor settingmultiplebits in a port.The following exampleshowshow this twostepoperationis done.
Example: Assignbits 3,4, and5 in a port to 101(bits 3 and5 set,bit 4 cleared).First,readin the
port andclearbis 3,4, and5 by ANDing themwith 199. Thensetbits 3 and5 by ORingthem
with 40, andfinally write theresultingvaluebackto theport In C, this is programmedas:
v = inportb (port_address),.
v=vCL99;
]"io]'Jotf,o..-"oo.."",
v),.
A final note: Don't be intimidatedby ttrebinary operatorsAND and OR and try to useoperatorsfor which you
havea betterintuition.For instance,if you aretemptedto useadditionandsubtractionto setandclearbits in place
of themethodsshownabove,DON'T! Additionandsubtractionmay seemlogical,but theywill not work if you try
to cleara bit that is alreadyclearor seta bit that is alreadyset.For example,you might think that to set bit 5 of a
port, you simply need!o readin the port, add32 (25)to that value,and thenwrite ttreresultingvalue back to the port.
This works fine if bit 5 is not alreadyset.But, what happenswhenbit 5 rt alreadyset?Birs 0 to 4 will be unaffected
andwe can't sayfor surewhathappensto bits 6 and7,but we cansayfor surethatbit 5 endsup clearedinsteadof
being set.A similar problemhappenswhen you usesubtractionto cleara bit in placeof the methodshownabove.
Now that you know how to clear andsetbits, we arereadyto look at ttreprogrammingstepsfor the 1200board
functions.
4-10
A"/DConversions
The following paragraphswalk you throughthe programmingstepsfor performingA,/D conversions.Detailed
informationaboutthe conversionmodesis presentedin this section.You canfollow thesestepson the flow diagums at theendof ttrischapterandin our exampleprogramsincludedwith theboard.In this discussion,BA refers
to thebaseaddress.
. Initializingthe 8255PPI
The eightPort B linesof the 8255PPI controlthechannelselection,programmable
IRQ, andexternalnigger
andDMA enable.Port B is programmed
at I/O addresslocationBA + 5:
D7
D6
D5
D4
D3
D2
D1
DO
Analoglnput
ChannelSelect
0000= channel1 1000 = channel9
0001= channel
2 1 0 0 1= c h a n n e 1l 0
0 0 1 0 = c h a n n e l130 1 0 = c h a n n e1 l1
0 0 1 1= c h a n n e l 4 1 0 1 1= c h a n n e1l 2
0100 = channel
5 1't00 = channel13
0101= channel
6 11 0 1= c h a n n e 1l 4
0110= channel
7 1 1 1 0 = c h a n n e1 l5
0 1 1 1= c h a n n e l S1 1 1 1 = c h a n n e l 1 6
IRQ Enabl
Enable
0 = IRQ disabled
;abled
1 = IRQ enabled
rabled
ExternalTriggerEnable
0 = Disabled
1 = Enabled
To usePort B for thesecontrolfunctions,the 8255mustbe initializedso thatPort B is setup asa Mode0
outputport.This is doneby writing this datato thePPIcontrolword at VO addressBA + 7 (X = don't care):
D7
D6
D5
D4
D3
D2
D1
DO
. Clearingthe Board
It is goodpracticeto sta$ your programby reseuingthe 1200board.You can do this by writing to the RESET
port locatedat BA + Z.The actualvalue you write to this port is irelevanl After resettingthe boardfollowing
power-up,it is a good idea to takean AlD readingandthrow it awayto makesurethe converteris initialized and
containsno unwanteddata.
. Selectinga Channel
To selecta conversionchannel,you mustassignvaluesto bits 0 through3 in thePPIPort B port at BA + 5. The
tablebelowshowsyou how to determinethebit settings.
x
x
x
x
BA+5
cH3 cH2 cHl
cH0
cH3
cH2
cH1
cH0
cH3
cH2
cH1
cH0
1
I
0
0
I
1
0
0
1
10
1
0
0
0
0
0
0
0
0
2
3
0
0
0
1
0
11
1
0
1
0
0
I
a
I
12
1
0
1
0
13
{
I
I
1
0
0
1
0
1
1
1
0
t
1
I
0
14
15
1
1
1
0
1
1
1
16
1
1
Channel
4
5
b
0
7
t'
0
Channel
4-11
I
1
1
I
. Enabling and Disabling the External Trigger
Any time you usethe externaltrigger or thepacerclock, this bit at port BA + 5 mustbe set high to enableA/D
conversions.
. Enablingand DisablingInterrupts
Any time you useintemrpts,ttrisbit at port BA + 5 mustbe sethigh to enabletheIRQ circuitry.
. ConversionModes/Triggering
The 1200hasthreeriggering (conversion)modes.Figure4-1 showsttretiming diagramfor A/D conversions.
This sectiondescribestheconverSion
modes.
Internal vs. External Triggering. With internaltriggering (alsocalled softwaretriggering),conversionsare
initiated by writing a valueto the START COI.{VERTport at BA + 0 on theboard.Wittr externaltriggering,
conversionsare initiated by applying a high TTL signalto the extemalTRIGGER IN pin (VZ-39).Any TTL signal
canbe usedasa trigger source.In fact, you canusetle timer/counteroutputsasa trigger source.
l{-
5 psec--+
|
Trigger
End-of-Convert
(Eoc)
Data
Read
Fig.4-1- A/D Conversion
TimingDiagram,Alt Modes
4-r2
Softwaretrigger. In this mode,a singleqpecifiedchannelis sampledwhenevera valueis writtento theSTART
COI.MRT port, BA + 0. The activechannelis the one specifiedin the PPI Port B port.
This is the easiestof all riggering modes. It canbe usedin a wide variety of applications,suchas sampleevery
time a key is pressedon the keyboard,samplewith eachiterationof a loop, or watchthe systemclock and sample
everyfive seconds.Seethe SOFITRIG sampleprogam in C andPascaland the SINGLE sampleprogramin
BASIC.
PacerClock. In this mode,conversions
arecontinuouslyperformedat thepacerclock rate.To usethis mode,
you mustprogramthe pacer.clock-torun at the desiredrate (seethe pacerclock discussionlater in this chapter).The
PCKjumperon P? mustbe installedto usethepacerclock.
This is the ideal modefor filling an arraywith data.Triggering is automatic,so your programis sparedrhe
choreof monioring the pacerclock to determinewhento sample.Seethe MULTI sampleprogramin C andpascal.
External Trigger.In this mode,a singleconversionis initiatedby therising edgeof an extemalriggerpulse.
This modeis implementedwhenan externaldeviceis usedto detenninewhento sample.SeetheEXTTRIG
sampleprogam in C andPascal.
. Starting an A/D Conversion
Softwareriggered singleconversionsare start€dby writing ro the START COI\IaERT port ar BA + 0. The
valueyou write is irrelevanLFor singleconversions,
you mustwrite to ttrisport to initiateeveryconversion.
Externallytriggeredsingleconversions
andmultipleconversions
niggeredby thepacerclock throughthe external
rigger arestailedby the lrst pulsepresentafter the extemaltrigger hasbeenenabled.
. Monitoring ConversionStatus(DMA Doneor End-of-Convert)
The A/D conversionslatuscanbe monitoredthroughthe DMA doneflag or throughthe end-of-convert(EOC)
bit in the STATUSport at BA + 0. WhendoingDMA transfers,you will wantto monirorthe DMA doneflag for a
transitionfrom low to high.This tellsyou whentheDMA transferis completeanddatahasbeenplacedin thi F€'s
memory.TheEOC line is availablefor monitoringconversionstatuswhenperformingsingleconversions
not using
DMA transfer.When ttreEOC goesfrom low o high, rheA/D converterhascompletedits conversionand the data
is readyto read.TheEOC line stayshigh followinga convenionuntil thedatahasbeenread.Thentheline goes
backto low until thenextconversionis complete.
. Readingthe ConvertedData
Two successive
readsof port BA + I providetheLSB andMSB of the 12-bitAID conversionin the format
definedin the VO mapsectionat thebeginningof this chapter.TheLSB mustalwaysbe readfirst, followedby the
MSB.
Theoutputcodeandtheresolutionof theconversionvary,dependingon theinput volbge rangeselected.
Bipolar conversionsare in twos complementform, and unipolarconversionsare straightbinary. When a bipolar
valueis read,you mustfhst converttheresultto straightbinaryandthencalculatethe voltage.Theconversion
formulais simple:for valuesgreaterthan}M7, you mustsubtract4096from the valueto get thesignof the voltage.
For example,if your outputis 2048,you subtract4096: 2MB - 4W6 = -2M8.This resultcorresponds
to -5 volts or
-10 volts,dependingon your binaryrange.For valuesof 2047or less,you simplyconvertttreresult.
The key digital
codesand their input voltagevaluesaregiven for eachrangein the threetableswhich follow.
4-13
A/D BlpolarCocleTable
(+5V;twos complement)
InputVoltage
OutputCode
+4.998volts
M S B 0 1 1 11 1 1 1 1 1 1 1 L S B
+2.500volts
0100 0000 0000
0 volts
0000 0000 0000
-.00244volts
1 1 1 11 1 1 11 1 1 1
-5.000volts
1000 0000 0000
1 LSB= 2.44millivolts
A/D BipolarCodeTabte
(il 0V; twos complement)
InputVoltage
OutputCode
+9.995volts
M S B0 1 1 1 1 1 1 1 1 1 1 1L S B
+5.000volts
0100 0000 0000
0 volls
0000 0000 0000
-.00488volts
1 1 1 11 1 1 1 1 1 1 1
-10.000
volts
1000 0000 0000
1 LSB= 4.88millivolts
A/D UnipolarCodeTable
(0 to +10V;straightblnary)
InputVoltage
Output Code
+9.99756volts
M S B1 1 1 1 1 1 1 1 1 1 1 1L S B
volts
+5.00000
1000 0000 0000
0 volls
0000 0000 0000
1 LSB = 2.44 millivolts
. Programmingthe PacerClock
Two of the tlree l6-bit timer/countersin the 8254programmableinterval timer are cascadedto form the onboardpacerclock,shownin Figure4-2. Whenyou want to usetle pacerclock for continuousA,/Dconversions,
you
mustprogramthe clock rate.To find the value you must load ino the clock to producethe desiredrate,you fint
haveto calculatethe valueof Divider I (timer/Counter0) andDivider 2 Climer/Counter1) shownin rhediagram.
Theformulasfor makingthis calculationareasfollows:
= ClockSourceFrequency/(Divider
Pacerclockfrequency
1 x Divider2)
Divider1 x Divider2 = ClockSourceFrequency/Pacer
ClockFrequency
To setthepacerclock frequencyat 100kHz usingtheon-board8 MHz clock source,this equationbecomes:
Divider1 x Divider
2=8MHzl1OO
kHz --> 80 = g y1127100
kHz
4-14
After you determinethe valueof Divider I x Divider 2, you thendivide the result by the leastcommondenominator.The leastcommondenominatoris thevaluethatis loadedinto Divider l, andtheresultof the division,the
quotient,is loadedinto Divider 2. In our exampleabove,theleastcommondenominatoris 2, so Divider I equals2,
andDivider2 equals802, or 40.The tablebelowlists somecommonpacerclock frequencies
andthe counter
settings(usingthe on-board8 MHz clock source).
After you calculatethedecimalvalueof eachdivider,you canconverttheresultto a hex valueif it is easierfor
you whenloadingthecountinto the 16-bitcounter.
To setup the pacerclock on the 1200,follow thesesteps:
1. Selecta clock source(fte 8 MHz on-boardclock or an extemalclock source).
2. ProgramTimer/Counter0 for Mode 2 operation.
3. ProgramTimer/Counter1 for Mode 2 operation.
4.Load DividerI LSB.
5. Load Divider I MSB.
6. Load Divider 2 LSB.
7. Load Divider 2 MSB.
The pacerclock startsrunningas soonasthe last divider is loaded.A,/Dconversionscanbe startedand stopped
by enablinganddisablingtheextemaltrigger.
Pacer Clock
Fig.4-2- PacerClockBlockDiagram
PacerClock
Divlder1
decimal/(hex)
Divider2
declmal/(hex)
125kHz
2 t (0002)
32 | (0020)
100 kHz
2t (0002)
40 / (0028)
50 kHz
2 | (0002)
80/ (ooso)
10kHz
2 | (ooo2)
400/ (0190)
1 kHz
2 t (00021
4000| (0FA0)
100Hz
2 | (ooo2)
40000/ (9c40)
Interrupts
. What Is an Interrupt?
An interrupt is an eventthat causesthe processorin your computero temporarilyhalt is currentprocessand
executeanotherroutine.Upon completionof tle newroutine,controlis retumedto theoriginalroutineat thepoint
whereits executionwasintemrpted.
Interrupts.uevery handyfor dealingwith asynchronous
events(eventsthatoccurat lessthanregularintervals).
Keyboardactivity is a goodexample;your computercannotpredictwhenyou might pressa key andit would be a
wasteof processortime for it to do nothingwhile waitingfor a keystroketo occur.Thus,the intemrptschemeis
usedandtheprocessorproceedswith othertasks.Then,whena keystrokedoesoccur,thekeyboard'intemrpts'the
processor,
andtheprocessorgetsthekeyboarddata,placesit in memory,andthenreturnsto what it wasdoing
beforeit wasinterrupted.Othercommondevicesthatuseintemrptsaremodems,disk drives,andmice.
4-t5
Your 1200boardcan intemtpt the processorwhena variety of conditionsarc met. By using theseintemrpts,
you can write softwarethat effectively dealswith real world events.
. Interrupt RequestLines
To allow different peripheraldevicesto generateintemrps on t}resamecomput€r,the PC bus haseight different
intempt request(IRQ) lines. A nansitionfrom low to high on one of theselines generatesan interrupt,request
which is handledby the PC's interruptcontroller.The intemrpt controllerchecksto seeif intemtpts are to be
acknowledgedfrom that IRQ and,if anotherintemrpt is alreadyin progress,it decidesif the new requestshould
supersedethe one in progressor if it hasto wait until the onein progressis done,This prioritizing allows an
intemrpt to be intemrptedif the secondrequesthasa higherpriority. The priority level is basedon the numberof the
IRQ; IRQ0 hasthehighestpriority, IRQI is second-highest,
andso on throughIRQ?,which hasthe lowest.Many of
theIRQsareusedby thestandardsystemresources.
IRQ0 is usedby the systemtimer,IRQ1 is usedby thekeyboard,IRQ3 by COM2,IRQ4 by COMI, andIRQ6 by thedisk drives.Therefore,it is imporranrfor you !o know
which IRQ linesareavailablein your systemfor useby tie 1200board.
. 8259ProgrammableInterrupt Controller
The chip responsiblefor handlinginterruptrequestsin thePC is the 8259ProgrammableIntemrpt Controller.
To useintemrpts,you needto know how to readandsetthe8259'sintemrptmaskregister(IMR) andhow to send
(EOI) commandto the 8259.
theend-of-interrupt
. Interrupt Mask Register(IMR)
Eachbit in theinterruptmaskregister(IMR) containsthemaskstatusof an IRQ line; bit 0 is for IRQ0,bit 1 is
for IRQI, andsoon. If a bit is set (equalto 1),thenthecorresponding
IRQ is maskedandit will not generatean
interrupl If a bit is clear (equalto 0), thenthecorresponding
IRQ is unmaskedandcangenerateintemrpts.The
IMR is programmedthroughport 21H.
IRQT IRQ6
IRQ5
IRQ4
IRQ3 rR02 IRQl
IRQO
l/O Port21H
Forall bits:
(enabled)
0 = IRQunmasked
1 = IRQmasked(disabled)
. End-of-Interrupt(EOI) Command
After an intenuptserviceroutineis complete,the8259intemrptcontrollermustbe notified.This is doneby
writing the value20H to I/O port 20H.
. What Exactly HappensWhen an Interrupt Occurs?
Understandingthe sequenceof eventswhen an intemrpt is riggered is necessaryto properly write software
intemrpthandlers.Whenan intemrptrequestline is drivenhigh by a peripheraldevice(suchasthe 1200),the
intemrpt controller checksto seeif intemrptsareenabledfor that IRQ, and thenchecksCI seeif other inremrptsare
activeor requestedand determineswhich intemrpt haspriority. The intemrpt controller then intemtpts the processor.The curent codesegment(CS),instructionpointer(IP), andflagsarepushedon the stackfor storage,anda new
CS andIP areloadedfrom a tablethatexistsin thelowest1024bytesof memory.This tableis refenedto asthe
intenupt vector table andeachentry is calledan intemrpt vector.Oncethe new CS and Ip are loadedfrom the
intemrptvectortable,the processorbeginsexecutingthecodelocatedat CS:IP.Whenthe intemrptroutineis
completed,the CS, IP, andflagsthat werepushedon the stackwhenthe intemrptoccurredarenow poppedfrom the
stackandexecutionresumesfrom thepoint whereit wasintemrpted.
. Usinglnterrupts in Your Programs
Adding intenupts to your softwareis not as difficult asit may seem,and what they add in termsof performance
is oftenworth theeffort. Note,however,thatalttroughit is not thathardto useinierrupts,the smallestmisake will
oftenlead!o a systemhangthatrequiresa reboot.This canbe both frusuatingandtime-consuming.
But, aftera few
4-16
tries, you'll get the bugsworked out andenjoy the benefitsof properlyexecutedintemrpts.In addition to readingthe
following paragmphs,study the INTRPTS sourcecodeincludedon your 1200programdisk for a betterunderstanding of intemrptprc$am development.
. Writing an Interrupt ServiceRoutine(ISR)
The first stepin addingintemrps to your softwareis o write ttreintemrpt serviceroutine (ISR). This is the
routinethatwill automaticallybe executedeachtime an intemrptrequestoccurson the specifiedIRQ. An ISR is
different thanstandardroutinesthat you write. First, on entrance,theprocessorregistersshouldbe pushedonto the
just beforeexitingyour ISR,.youmustcleartheintemrptstatusof the
stackBEFORE you do anythingelse.-Second,
1200andwrite an end-of-intemrptcommandto the 8259controller.Finally,whenexitingthe ISR, in additiono
poppingall the registersyou pushedon entrance,you must usetle IRET insfuction andnot a plain RET. The IRET
automaticallypopsthe flags,CS,andIP thatwerepushedwhentheintemrptwascalled.
If you find yourself intimidatedby intemrpt programming,takeheart.Most Pascaland C compilersallow you
to identify a procedure(function) asan intemrpt type and will automaticallyadd theseinstructionsto your ISR, with
oneimportantexception:mostcompilersdo not auomaticallyaddtheend-of-intemrptcommandto ttreprocedure;
you mustdo this younelf. Otherthanthis andthefew exceptionsdiscussed
below,you canwrite your ISRjust like
any other routine.It can call otherfunctionsandproceduresin your programandit can accessglobal data.If you are
writing your first ISR, we recommendthatyou stickto thebasics;just somethingthatwill convinceyou that it
works,suchas incrementinga globalvariable.
NOTE: If you arewriting an ISR usingassemblylanguage,
you areresponsible
for pushingandpopping
registersandusingIRET insteadof RET.
Therearea few cautionsyou mustconsiderwhenwriting your ISR. The mostimportantis, do not useany
DOS functionsor routinesthat call DOS functionsfrom within an ISR. DOS is not reentranqthatis, a DOS
functioncannotcall itself. In typicalprogramming,this will not happenbecauseof theway DOS is written.But
whataboutwhenusingintemrps?Then,you couldhavea situationsuchasthis in your program.If DOS functionX
is beingexecutedwhenan intemrptoccursandttreint€rruptroutinemakesa call to DOS functionX, thenfunction
X is essentiallybeingcalledwhile it is alreadyactive.Sucha recntrancyattemptspellsdisasterbecauseDOS
functions:uenot writtento supportit. This is a complexconceptandyou do not needto understand
it Justmake
surethatyou do not call any DOS functionsfrom within your ISR.Theonewrinkle is that,unfortunately,it is not
obviouswhich library routinesincludedwith your compileruseDOS functions.A rule of thumbis thatroutines
which write to the screen,or checkthe statusof orread the keyboard,andany disk VO routinesuseDOS and should
be avoidedin your ISR.
The sameproblemof reentrancyexistsfor manyfloating point emulatorsaswell, meaningyou may haveto
avoidfloatingpoint (real)mathin your ISR.
Note that the problemof reentrancyexists,no matterwhat programminglanguageyou are using.Even if you
arewriting your ISR in assemblylanguage,DOSandmanyfloatingpoint emulatorsarenot reentrant.Of course,
thereare waysaroundthis problem,suchasthosewhich involve checkingto seeif any DOS functionsare currently
activewhenyour ISR is called,but suchsolutionsarewell beyondthescopeof this discussion.
The secondmajorconcernwhenwriting your ISR is to makeit asshortaspossiblein termsof executiontime.
Spendinglongperiodsof time in your ISR may meanthatotherimportantinterruptsarebeingignored.Also, if you
spendtoo long in your ISR, it maybe calledagainbeforeyou havecompletedhandlingthe first.run.This oftenieads
to a hangthatrequiresa reboot.
Your ISR shouldhavethis structure:
' Pushanyprocessorregistersusedin your ISR.Most C andPascalintemrptroutines
automaticallydo this for
you.
. Put thebodyof your routinehere.
. Clearthe intemrptbit on ttre 1200by writing anyvalueto BA + 2.
' IssuetheEOI commandto the 8259int€rruptcontrollerby writing 20H to port 20H.
' Popall registerspushedon entrance.Most C andPascalintenuptroutinesautomatically
do this for you.
4-17
The following C and Pascalexamples show what the shell of your ISR should be like:
In C:
void interrupt
fSR(void)
{
,/* Your code goes here. Do not
outportb(BaseAddress
+ 2, 0);
outportb(jx2j,
0x20);
)
*/
use any DOS functions!
*/
/* Clear 1200 interrupt
/* Send EOr commandto g2\g
*/
In Pascal:
Procedure ISR; Interrupt;
begin
{ Your code goes here. Do not
PortlBaseAddress + 2] := 0;
Port[$20] := 920;
use any DOS functions ! l
{ Cfear 1200 interrupt
{ Send EOf conmand to
}
8259 }
ond.
. Savingthe Startup Interrupt Mask Register(IMR) and Interrupt Vector
The next stepafter writing the ISR is to savethe startupstateof the interruptmaskregisterandthe intemrpt
vertor thatyou will be using.TheIMR is locatedat VO port 21H. The intemrptvectoryou will be usingis located
in the intemrpt,vector tablewhich is simply an arrayof 256-bit (a-byte)pointersand is locatedin ttrefint 1024
bytesof memory(Segment= 0, Offset= 0). You canreadthis valuedirectly,but it is a betterpracticeto useDOS
function 35H (get intenupt vector).Most C andPascalcompilersprovide a library routine for readingthe valueof a
vector.The vectorsfor the hardwareintemrptsarevec0ors8 through 15,whereIRQ0 usesvector 8, IRel uses
vector9, andsoon. Thus,if the 1200will be usingIRQ3,you shouldsavethevalueof intemrptvector11.
Beforeyou installyour ISR, temporarilymaskout the IRQ you will be using.This preventsttreIRe from
requestingan intemrptwhile you areinstallingandinitializingyour ISR.To masktheIRQ, readin the currentIMR
at I/O port 21H and set the bit that correspondsto your IRQ (remember,settinga bit disablesinterruptson that IRe
while clearinga bit enablesthem).The IMR is anangedso thatbit 0 is for IRQO,bit I is for IRel, andso on. See
the paragraphentrtledInterrupt Mask Register(IMR) earlier in this chapterfor help in determiningyour IRe's bit.
After settingttrebit, write the new value to I/O port 2ilt.
Wiot the startupIMR savedand the intemrps on your tRQ temporarilydisabled,you canassignttreintemrpt
vector to point to your ISR. Again, you can overwrite ttreappropriateentry in the vector table with a direct memory
write, but this is a badpractice.Instead,useeither DOS function 25H (setintemrpt vector) or, if your compiler
providesit, the library routine for settingan intemrpt vector.Rememberthat vector 8 is for IReO, vector 9is for
IRQI, andsoon.
If you needto programthe sourceof your interrupts,do ttratnexl For example,if you are usingthe programmableinterval timer to generateinterrupts,you mustprogramit o run in the propermodeandat the properiate.
Finally, clear the bit in the IMR for the IRQ you areusing.This enablesinremrprson rhe IRe.
. Restoringthe Startup IMR and Interrupt Vector
Beforeexiting your progam, you must.restorethe intemrpt maskregisterandintemrpt vectorsto the statethey
werein when your prog&m stafied.To restorethe IMR, write the value that was savedwhen your pro$am started
to I/O port 21H. Restorethe intemrpt vectorthat was savedat startupwittr eitherDOS function f SH
Get interrupt
vecfor),or usethe library routine suppliedwith your compiler.Performingthesetwo stepswill guaranteethat gri
interrupt statusof your computeris the sameafter runningyour progam as it was beforeyour programstarted
running.
4-18
. CommonInterrupt Mistakes
' Rememberthat hardwareintemrptsarenumbered8 ttrrough15,eventhoughthe correspondingtRes
are
numbered0 through7.
' Two of the mostcommonmistakeswhenwriting an ISR areforgettingto clearthe interruptsatus
of the 1200
andforgettingto issuetheEOI commando the8259intemrptconroller beforeexiting theISR.
Data TransfersUsing DMA
Direct Memory Access(DMA) transfersdatabetweena.peripheraldeviceandPC memorywithout usingthe
processorasan intermediate.Bypassingthe processorin this way allows very fast transferrates.All PCsconain the
necessaryhardwarecomponentsfor accomplishingDMA. However,softwaresupportfor DMA is not includedas
partof the BIOS or DOS,leavingyou with thetaskof programmingthe DMA controlleryourself.With a little care,
suchprogrammingcanbe successfullyand efficiently achievedThe following discussionis basedon using the DMA controllerto get datafrom a peripheraldeviceand write it
to memory.The oppositecan alsobe done;the DMA controllercanreaddatafrom memoryandpassit to a peripheral device.Therearea few minor differences,mostly concemingprogrammingthe DMA controller,but in genlral
theprocessis thesame.
The following st€psarerequiredwhen usingDMA:
l.
2.
3.
4.
5.
6.
7.
8.
Choosea DMA channel.
Allocatea buffer.
Calculatethepageandoffsetof thebuffer.
SettheDMA pageregister.
ProgramtheDMA controller.
Programdevicegeneraring
data(1200).
Waitunril DMA is complete.
DisableDMA.
Eachstepis detailedin $refollowing paragraphs.
. Choosinga DMA Channel
Therearea numberof DMA channelsavailableon the PC for useby peripheraldevices.The 1200can use
eitherDMA channel1 or DMA channel3. The factory settingis DMA disabled.You can arbinarily chooseone or
the otherby settingthejumperson P5 andP6 as describedin Chapter1; in mostcaseseither choiceis fine. Occasionallythough,you will haveanotherperipheraldevice(for example,atapbackupor Bernoullidrive) thatalso
usesthe DMA channelyou haveselected.This will certainlycauseerratic resultsand canbe hardto detect.The best
approachto pinpoint this problemis to readthe documentationfor the otherperipheraldevicesin your syst€mand
try to determinewhich DMA channeleachuses.
. Allocatinga DMA Buffer
When using DMA, you musthavea location in memorywherethe DMA controller will placedatafrom the
1200board.This buffer canbe eitherstaticor dynamicallyallocated.Justbe surethatits locationwill not change
while DMA is in progress.The followingcodeexamplesshowhow to allocatebuffersfor usewith DMA.
In Pascal:
Var Buffer
: Arrayt1..10000l
of Byte;
{ static
allocation
}
-or-
Var Buffer
Buffer
:-
: ^Byte;
tdynamic al-location
G e t M e m ( 1 0 0 0 0 ;)
4-19
l
In C:
char Buffer[10000];
/*
static
/*
dynamic allocation
allocation
*/
-orchar *Buffer,'
*/
Buffer = calloc(10000,
In BASIC:
D I M B U F F E R(?5 O O O )
. Calculatingthe Pageand Offset of a Buffer
Onceyou havea buffer ino which to placeyour data,you must inform the DMA controller of the locationof
thisbuffer.This is a little morecomplexthanit soundsbecausetheDMA controllerusesa page:offsetmemory
scheme,while you areprobablyusedto thinkingaboutyourcomputer'smemoryin termsof a segmentoffset
scheme.Pagedmemoryis simplymemorythatoccupiescontiguous,non-overlappingblocksof memory,with each
block being64K (onepage)in length.The frst page(page0) startsat thefirst byreof memory,the secondpage
(page1) startsat byte65536,the third page(page2) atbyte I3l072,and soon. A compurerwirh 640K of memory
hasl0 pagesof memory.
The DMA controller can write to (or readfrom) only onepagewitlrout beingreprogrammed.This meansthat
theDMA controllerhasaccessto only 64K of memoryat a time.If you programit to usepage3, it cannotuseany
otherpageuntil you reprogramit to do so.
When DMA is started,the DMA controlleris programmedo placedataat a specifiedoffset into a specified
page(for example,startwriting at byte 512of page3). Eachtime a byte of datais writtenby the controller,the
offset is automaticallyincrementedso the next byte will be placedin the next memorylocation.The problem for
you whenprogrammingthesevaluesis figuring out,what the correspondingpageand offset arefor your buffer.
Most compilerscontainmacrosor functionsthat allow you to directly determinethe segmentand offset of a data
structure,but not the pageand offset. Therefore,you mustcalculatethe pagenumberand offset yourself.probably
the most intuitive way of doing this is to converttlte segmenroffsetaddressof your buffer to a linear addressand
thenconvert that linear addressto a page:offsetaddress,The tablebelowshows functions/macrosfor determining
the segmentandoffset of a buffer.
Language
Segment
Offset
c
FP-SEG
s = FP_SEG(&Bulfe0
FP_OFF
o = FP_OFF(&Buffer)
Pascal
BASIC
seg
S:= Seg13u11"r,
CIs
O :=O1s13utf.t;
VARSEG
VARPTR
S = VARSEG(BUFFER) o = VARPTR(BUFFER)
Onceyou've determinedthe segmentandoffset,multiply thesegmentby 16andaddtheoffsetto give you the
linear address.(Make sureyou storethis result in a long integer,or DWORD, or the resultswill be meaningiess.y
Thepagenumberis the quotientof thedivisionof thelinearaddressby 65536andtheoffsetinro thepageis ttre
remainderof thatdivision. Below aresomeprogrammingexamplesfor Pascal,C, andBASIC.
4-20
In Pascal:
Segment :: SEG(Buffer),'
Offset := OFS(Buffer);
Linear Address := Segrment * 16 + Offset,Page := LinearAddress
DfV 65535,.
PageOffset
:= LinearAddress
I
{
t
{
MOD 65536,.
get segnent of buffer
)
get offset
of buffer
)
calculate
address )
a linear
deterrnine page corresponding
to this
address )
determine
into the paSe )
offset
linear
In C:
segn€nt = FP_SEG(&Buffer) ;
= FP_OFS (eBuffer) ,.
offset
= segrEnt * 16 * offset,.
linear_address
page = linear_address
,/ 55536,'
1*
1*
/*
/*
*/
qet se$nent of buffer
*,/
geL offset
of buffer
calculate
a linear
address */
deterrnine page corresponding
to
address */
= l"j-near_address
/*
deterrnine
page_offset
* 55536,.
offset
into
the
this
linear
page */
In BASIC:
s = VARSEG(BUFFER)
O : VARPTR(BT]FT'ER)
LA=S*16+O
PAGE=INT(LAl55536)
POFT=LA-(PA@*65536)
Beware! Thereis onebig catchwhen usingpage-based
addresses.
The DMA controller cannotwrite properly to
a buffer that 'straddles'a pageboundary.A buffer straddlesa pageboundaryif onepart of the buffer residesin one
pageof memorywhile anotier partresidesin thefollowingpage.The DMA controllercannotproperlywrite to such
a bufferbecausethe DMA controllercanonly write to onepagewithoutreprognmming.Whenit reachestheendof
the currentpage,it doesnot startwriting to the next page.Instead,it startswriting back at the first byte of ttre
culrent page.This can be disasEousif the beginningof the pagedoesnot correspondto your buffer. More often than
not, this locationis being usedby the codeportion of your prograrnor the operatingsystem,and writing datato it
will almostalwayscauseserraticbehaviorandan eventualsystemcrash.
You mustcheckto seeif your buffer sraddlesa pageboundaryand,if it does,takeaction to preventttreDMA
controller from rying to write to the portion that continueson the next pageYou can reducethe sizeof the buffer or
!T [o repositionthe buffer. However,this canbe difficult when using large satic datastrucnres,andoften, the only
solutionis to usedynamicallyallocatedmemory.
. Settingthe DMA PageRegister
Oddly enough,you do not inform ttreDMA conroller directly of the pageto be used.Instead,you put ttrepage
to be usedinto the DMA pageregisterwhich is sepantefrom the DMA controller,as shownin the tablebelow. The
location of this registerdependson the DMA channelbeing used.
DMAChannel
Locatlonof PageRegister
1
83(131)
3
82(130)
4-2r
. The DMA Controller
The DMA controlleris a complexchip thatoccupiesthefirst 16bytesof thePC's I/O port space.A complete
discussionon how it operatesis beyondthescopeof this manual;only relevantinformationis includedhere.The
DMA connolleris programmedby writing to the DMA registersin yourPC. The tablebelowlists theseregisters.
Note thatwhenyou write 16-bitvaluesto anyof theseregisters(suchasto theCountregisters),you mustwrite ttre
LSB frst, followedby rheMSB.
If you areusingDMA channell, write your pageoffsetandcountro ports02H and03H; if you areusing
channel3, write your pageoffsetandcountto pors 06H and07H.The pageoffsetis simply theoffsetthatyou
calculatedfor your buffer (seediscussionabove).Countindicatesthenumberof bytesthat you want theDMA
controllerto transfer.Rememberttrateachdigitizedsamplefrom the 1200consissof 2 bytes,so thecountthatyou
write to tle DMA controllershouldbe equalto (thenumberof samplesx 2) - l. Thesinglemaskregisterandmode
registeraredescribedbelow.The clearbytepointersetsan internalflip-flop on the DMA conroller ttratkeepstrack
of whethertheLSB or MSB will be sentnextto registersthatacceptbothLSB andMSB. Ordinarily,you neue,
needto write to this port,but it is a goodhabito do so beforeprogrammingtheDMA conrroller.Writing any value
to thisport clearsrheflip-flop.
Addresshex{decimal)
RegisterDescrlption
02/(02)
Channel1 PageOffset(write2 bytes,LSBfirsl)
03(03)
Channel1 Count(write2 bytes,LSBfirst)
06(06)
Channel3 PageCIfset(write2 bytes,LSBfirst)
07t(o7)
Channel3 Count(write2 bytes,LSBfirst)
0A/(10)
SingleMaskRegister
oB(11)
Mode Register(writeonly)
jct(12)
ClearBytePointerFlip-Flop
(writeonly)
. DMA SingleMask Register
The DMA singlemaskregisteris usedto enableor disableDMA on a specifiedDMA channel.you should
mask(disable)DMA on the DMA channelyou will be usingwhile programmingtheDMA controller.After the
DMA controller hasbeenprogrammedand the 1200hasbeenprogrammedto sampledata,you canenableDMA by
clearingthemaskbit for theDMA channelyou areusing.You shouldmanr:allydisableDMA by settingthe mask
bil beforeexiting your programor, if for somereason,samplingis haltedbeforettreDMA controller hasransfened
all the datait wasprogrammedto transfer.If you leaveDMA enabledand it hasnot transferredall the darait was
programmedto transfer,it will resumetransfersthe next time dataappearsat the A/D converter.This can spell
disasterif yourprogramhasendedandthe bufferhasbe reallocatedto anotherapplication.
x
x
x
x
x
82
B1
BO
l/O PortOAH
Channel Select
MaskBlt
00 = Channet0
0 = unmask 01 = e6snn";1
1 = mask
10= channel2
11= Channel
3
4-22
. DMA Mode Register
The DMA moderegisteris usedto setparametersfor the DMA channelyou will be using.The read/writebits
areself explanatory;the readmodecannotbe usedwith ttre 1200. Autoinitialization allows the DMA controller to
automaticallys[afi over onceit hastransferredthe requestednumberof bytes.Decrementmeansthe DMA conroller
shoulddecrementits offset counterafter eachtransfer;the defaultis increment.You can useeither the demandor
singletransfermodewhen transferringdata.The demandmodetransfersdatao the PC on demandfor fastest
transferrate.The singletransfermodeforcesthe DMA controllerto relinquisheveryother cycle so that the processorcan0akecareofother tasks.
B7
B6
Tran
tnsferMode
00=
0 1=
1 0= U l o i [
1 1==cascade
B5
B4
B3
82
I autornrtiailzati
on
=3'?T'iii".o",'
I o=oisaute
l1=en"bl"
I
Offset Counter
0 = increment
1 = decrement
B1
BO
l/O PortOBH
Channel
rnelSelect
t
00 = Channel
Chan 0
01 = Channel
66s1 1
10= Channel
Chan 2
11= Channel
Chan 3
Read/Vt/rite
01 = write
10= 1s3! (notusedwith1200)
. Programmingthe DMA Controller
To programthe DMA controller,follow thesesteps:
1. Clearthebytepointerflip-flop.
2. DisableDMA on thechannelyou areusing.
3. Write the DMA moderegisterto choosethe DMA paramet€rs.
4. Write theLSB of the pageoffset of your buffer.
5. Write theMSB of thepageoffsetof yourbuffer.
6. Write theLSB of the numberof bytesto transfer.
7. Write theMSB of thenumberof bytesto transfer.
8. EnableDMA on thechannelyou areusing.
. Programmingthe 1200for DMA
Onceyou haveset up the DMA controller,you mustprogmmttre 1200for DMA. The following stepslist this
procedure:
l. Setup the 8255PPI for Port B ourput.
2. Setup the timer/countersfor the desiredtransferrate.
3. EnableDMA andexternalrigger.
4. Monitor DMA donebit.
NOTE: If the DMA is set up in the singletransfermode,eachDMA transfertakestwo readcycles to complete.Therefore,in single transfer,you canrun the L2{J|.arspeedsup to about 100kIIz so the DMA transferrate can
keepup with the board'sconversionrate.The demandmodesupportsevenhighertransferrates.However,rates
fasterthan l25kHz, evenin the demandmode,may give unreliableresults.
. Monitoring for DMA Done
Therearetwo waysto monitorfor DMA done.Theeasiestis to poll theDMA donebit in the 1200status
register(BA +0). While DMA is in progress,thebit is clear(0). WhenDMA is complete,thebit is set(l). The
secondway to checkis to usethe DMA donesignalto generatean intemrpl An intemrptcanimmediatelynotify
your programthat DMA is doneandany actionscanbe takenasneeded.Both methodsare demonstratedin the
sampleC andPascalprogmms,the polling methodin the programnamedDMA and the intemrpt methodin
DMASTRM.
4-23
. CommonDMA Problems
. Make surethat your buffer is largeenoughto hold all of the datayou programthe DMA controller to transfer.
. Checkto be surethat your buffer doesnot straddlea pageboundary.
. Rememberthat the numberof bytesfor the DMA controllerto transferis equalto twice the numberof
samples.This is becauseeachsampleis two bytesin size.
' If you terminatesamplingbeforethe DMA controller hasransferredthe numberof bytesit wasprogrammed
for, be sureto disableDMA by settingthe maskbit in the singlemaskregister.
. lvlakesuretlat the boardis not running too fast for DMA transfers.
(ADA1200Only)
D/A Conversions
The two D/A converterscan be individually programmedto convert 12-bit digital words into a voltagein the
rangeof +5, +10, 0 !o +5, or 0 to +10 volts.DACI is programmed
by writing the 12-bitdigital dataword to BA + 8.
DACZ is identical,with thedaa word'writtento BA + 10.The foltowingtableslist thekey digital codesand
correspondingoutput voltagesfor the D/A converters.
D/A ConverterUnlpolarCallbrationTable
ldealOutputVoltage(in mllllvolts)
D/ABlrWelghr
0to+5V
0to+10V
4095(Max.Output)
4998.8
9997.6
2048
2500.0
5000.0
1024
1250.0
2500.0
512
62s.00
1250.0
256
312.s0
62s.00
128
1s6.250
312.s0
64
78.125
156.250
s2
39.063
78.12s
16
19.5313
39.063
8
9.76s6
4
4.8828
9.76s6
2
2.4414
4.8828
1
1.2207
2.4414
0
0.0000
0.0000
4-24
19.5313
D/AConverter
BlpolarCatibratlon
Table
ldealOutputVoltage(ln millivolts)
D/A Bit Welght
*5V
4095(Max.Output)
+4997.6
110v
+9995.1
2048
0.0
0.0
1024
-2500.0
s000.0
512
-3750.0
-7500.0
256
-4375.0
-8750.0
128
-4687.5
-9375.0
64
-4843.8
-9687.s
32
-4921.9
-9843.8
16
-4960.9
-9921.9
8
-4980.5
-9960.9
4
-4990.2
-9980.s
2
-4995.1
-9990.2
1
-4997.6
-9995.1
0
-5000.0
-10000.0
Timer/Counters
4n8254 programmableinterval timer providesthree 16-bit, 8 MlIz timer/countersfor timing and counting
functionssuchasfrequencymeasurement,
eventcounting,andintemrpts.Two of the timerrcounters
arecascaded
and can be usedfor the pacerclock. The remainingtimer/counteris availablefor your use.Figure 4-3 showsthe
timerhounter circuitry.
I 200
I/O CONNECTOR
P2
TO A/O
TRIGGER
I
I
I
EXT CLK
I
I
I
I
I
etl lrlext crre r
P7
CLK 2
Fig.4-3 -8254 Programmable
IntervalTimer
CircuitBlockDiagram
4-25
Eachtimer/counterhastwo inputs,CLK in and GATE in, andone output,timer/counlerOUT. They canbe
programmedasbinary or BCD down counten by writing the appropriatedatato the commandword, asdescribedin
the I/O mapsectionat the beginningof this chapter.
Oneof two clock sources,the on-board8 MHz crystalor the externalclock (P245) canbe selectedas the clock
input to TCOor TC2. The diagramshowshow theseclock sourcesareconnectedto the timer/count€rs.
Two gatesourcesare availableat the I/O connector(VZ4l andY246). Whena gateis disconnected,an onboardpull-upresistorautomaticallypulls thegatehigh,enablingthetimer/counter.
The outputfrom timer/counter-lis available'attheT/C OUT1 pin (Y242)'andtimer/counter2's outputis
availablearTl9 2OI-JiI @.44), wherethey canbe usedfor intemlpt generation,asan A/D rigger, or for counting
functions.
The timer/counterscanbe programmedto operatein one of six modes,dependingon your application.The
followingparagraphs
briefly describeeachmode.
Mode 0, Event Counter (Interrupt on Terminal Count).This modeis typicallyusedfor eventcounting.
While the timer/countercountsdown,theoutputis low, andwhentlrecountis complete,it goeshigh.Theoutput
stayshigh until a new Mode0 controlword is writtento thetimer/counter.
Mode 1, Hardware-RetriggerableOne-Shot.The outputis initially highandgoeslow on ttreclock pulse
followinga triggero begintheone-shotpulse.Theoutputremainslow until thecountreaches0, andtirengoeshigh
andremainshigh until theclockpulseaftertle nextrigger.
Mode 2, Rate Generator.This modefunctionslike a divide-by-Ncounterandis typicallyusedto generatea
real-timeclock interrupt.Theoutputis initially high,andwhenthecountdecrements
to 1, the outputgoeslow for
oneclockpulse.The outputthengoeshigh again,thetimer/counter
reloadstheinitial count,andtheprocessis
repeated.
This sequence
continuesindefinitely.
Mode 3' SquareWave Mode. Similaro Mode2 exceptfor theduty cycleoutput,this modeis typicallyused
for baudrategeneration.
The outputis initially high,andwhenthecountdecrements
to one-halfits initial count,the
outputgoeslow for theremainderof thecounl The timer/counter
reloadsand theoutputgoeshighagain.This
processrepeatsindefinitely.
Mode 4' Software-TriggeredStrobe.The outputis initially high.Whentheinitial countexpires,theoutput
goeslow for oneclock pulseandthengoeshigh again.Countingis "figgered" by writing the initial count
Mode 5, Hardware Triggered Strobe(Retriggerable).The outputis initially high.Countingis riggeredby
the rising edgeof the gateinput. Whenthe initial count hasexpired,the output goeslow for one clock pulseand
thengoeshigh again.
Digital VO
The 16 8255PPl-baseddigital I/O lines can be usedto transferdatabetrveenthe computerand externaldevices.
Thedigital input linescanhavepull-upor pull-downresistorsinstalled,asdescribedin Chapterl.
4-26
ExampleProgramsand Flow Diagrams
Includedwith the 1200is a setof exampleprogramsthat demonstratethe useof manyof the board's features.
Theseexamplesarewrittenin C, Pascal,andBASIC. Also includedis an easy-to-use
menu-drivendiagnostics
program,I200DIAG, which is especiallyhelpfulwhenyou arefrst checkingout your boardafterinstallationand
whencalibratingthe board(Chapter5).
Beforeusing the softwareincludedwith your board,makea backupcopy of the disk. You may makeasmany
backupsasyou need.
C and PascalPrograms
Theseprogramsare sourcecodefiles so that you caneasilydevelopyour own customsoftwarefor your 1200
board.In the C directory, 1200.Hand 1200.INCcontainall ttrefunctionsneededo implementthe main C programs.
H definesthe addresses
and INC containsthe routinescalledby the main progams. In the Pascaldirectory,
I200.PNCcontainsall of theprocedures
neededto implementthemainPascalprogams.
Analog-to-Digital:
SOFITRIG
EXTTRIG
MULTI
Demonstrateshow to usethe softwarerigger modefor acquiringdata.
Similarto SOFTTRIGexceptttratan externaltriggeris used.
Showshow to fill an anay with datausinga softwaretrigger.
Timer/Counters:
TIMER
A shortprogramdemonstratinghow to programthe 8254for useas a timer.
Digital VO:
DIGITAL
Simpleprogramthatshowshow to readandwrite the digiralVO lines.
Digital.to-Analog:
DAC
WAVES
Showshow to uset}reDACs.UsesA/D channel1 to monitortheouput of DACI.
A morecomplexprogramthat showshow to usethe 8254 timer and the DACs asa
waveformgenerator.
Interrupts:
INTRPTS
INTSTRM
Showsthebareessentialsrequiredfor using interrupts.
A completeprogramshowingintemrpt-basedsreaming to disk.
DMA:
DMA
DMASTRM
Demonstrateshow to useDMA to transferacquireddatato a memorybuffer. Buffer can
be written to disk and viewed with the includedVIEWDAT progam.
Demonstrates
how to useDMA for disk streaming.Very high continuousacquisition
ratescanbe obtained.
BASIC Programs
Theseprogramsare sourcecodefiles so that you caneasily developyour own customsoftwarefor your 1200
board.
Analog-to-Digital:
SINGLE
EXTTRIG
SCAN
DemonsEateshow to usethe singleconvert,internal trigger modefor acquiringdata.
Demonstrateshow to usethe externaltrigger to acquiredata.
Demonstrates
how to scanchannelsto acquiredata.
4-27
Timer/Counters:
TIMER
A shortprogramdemonstratinghow to programthe 8254for useasa timer.
Digital VO:
DIGITAL
Simpleprogramthat showshow to readand write the digital VO lines.
Digital-to-Analog:
DASCAN
Demonstrates
D/A conversion.
DMA:
DMA
Showshow to takesamplesand transferthem to PC memoryusing DMA.
4-28
Flow Diagrams
The following paragraphsprovide descriptionsand flow diagramsfor someof the 1200'sAID and D/A conversionfunctions.Thesediagramswill helpyou to build your own customapplicationsprogftms.
. SingleConvert Flow Diagram (Figure 4-4)
This flow diagramshowsyou the stepsfor taking a singlesampleon a selectedchannel.A sampleis takeneach
time you sendthe StartConvertcommand.All of the sampleswill be takenon thesamechanneluntil you change
thevaluein thePPI Port B register@A + 5). Changingthis valuebeforeeachStartConvertcommandis issuedlets
you takethe next readingfrom a different channelat a different gain.
Program
8255PPI:
PortB out
ClearRegisters
(Resel)
Change
Channel?
Start Conversion
End-of-Conven
E O C= 1 ?
StopProgram
Fig.4-4- SingleConversion
FlowDiagram
4-29
. DMA Flow Diagram (Figure 4-5)
This flow diagramshowsyou how to take samplesand transferthe datadirectly into the computer'smemory.
You can useDMA channelI or 3 to transferdatato the computer'smemory.The pacerclock canbe usedto setthe
samplinginterval.
Program8255PPI:
PodB out
ClearRegisters
(Reset)
Program8254TCO& TC1for
desiredtransferrates
ProgramDMAController
EnableDMA&
ExternalTrigger
DMADone= 1?
StopProgram
Fig.4-5- DMAFlowDiagram
4-30
.Interrupts Flow Diagram(Figure4-6)
This flow diagramshowsyou how to progam an intemrpt routine for your 1200.The diagramparallelsthe
interruptsdiscussionincludedearlier in ttris chapter.You canusethis diagramin conjunctionwith the detailedtext
in this chapterto developan intemrpt programfor your 1200.
Fig.4-6- Interrupts
FlowDiagram
4-31
. D/A ConversionFlow Diagram (Figure 4-7)
This flow diagramshowsyou how to generatea voltageoutputthroughthe D/A converter(ADAI200 only). A
conversionis initiated eachtime the high byte (MSB) is witten to the D/A converter.
Fig.4-7- D/AConversion
FlowDiagram
4-32
CHAPTER 5
CALIBRATION
This chaptertells you how to calibratethe 1200usingthe
1200DIAGcalibrationprogramincludedin theexamplesofrware
packageandsix trimpotson the board.Thesetrimpotscalibratethe
A/D conveftergainandoffsetandthe DlAX2 multiplier output.
This chaptertells you how to calibratethe A/D convertergain andoffset andthe D/A converterX2 multiplier
(ADA1200 only). All A/D and D/A rangesare factory-calibratedbeforeshipping.Any time you suspecrinaccurare
readings,you cancheckttreaccuracyof your conversions
usingtheprocedurebelow,andmakeadjustments
as
necessary.
Usingthe 1200DIAGdiagnostics
programis a convenientway to monitorconversions
while you
calibratethe board.
Calibrationis donewith the boardinstalledin your system.You canaccessthe trimpotsat the edgeof the
board.Powerup thesystemandlet theboardcircuitry stabilizefor 15 minutesbeforeyou startcalibrating.
RequiredEquipment
Thefollowing equipmentis requiredfor calibration:
. PrecisionVoltageSource:-10 o +10 volts
. Digital Voltmeter:5-112digis
. SmallScrewdriver(for trimpotadjustment)
While not required,ttreI200DIAG diagnostics
progam (includedwith examplesoftware)is helpfulwhen
performingcalibrations.Figure5-1 showstheboardlayoutwith thetrimpotslocatedalongttretop edgeof theboard
(TR2andTR3 at left, TR7 in middle,andTRl, TR4, andTR6 at right).
tE$
llufYto
@
ilil*ltg
)31J3
t;
ho
Effi
oooooo
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oo
oo
otrr
oo
o o 82cs5 o o
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66
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oooo
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Fig.5-1- BoardLayout
5-3
o
A/D Calibration
Two proceduresare usedto calibratettreAID converterfor all input voltageranges.The fint procedurecalibratesthe converterfor the unipolarrange(0 to +10 volts), andthe secondprocedurecalibratesthebipolarranges
(15, +10 volts).Table5-1 showstheidealinput voltagefor eachbit weightfor theunipolar,straightbinaryrange,
andTable5-2 showsthe idealvoltagefor eachbit weightfor thebipolar,twos complementranges.
Unipolar Calibration
Two adjustmentsare madeto calibrate+heAID converter'for.theunipolar-rangeof 0 to +10 vols. One is the
offsetadjustment"
and theotheris thefull scale,or gain,adjustrnent.
TrimpotTR7 is usedto maketheoffset
adjustment,and trimpot TR2 is usedfor gain adjustment.This calibrationprocedureis performedwith ttreboardset
up for a 0 to +10 volt input range.Beforemakingtheseadjustrnents,
makesurethat thejumperon P3 is setfor lOV
andthejumperson P4 andPll aresetfor +.
Useanaloginput channel1 andsetit for a gainof I while calibratingtheboard.Connectyour precisionvoltage
sourceto channell. SetthevoltagesourcetD+1.22070miltvolts, starta conversion,andreadtheresultingdata.
AdjusttrimpotTR7 until it flickersbetweenthe valueslistedin thetableat the top of the nextpage.Next, setthe
voltageto +9.49829volts,andrepeattheprocedure,this rimeadjustingTR2 until the dataflickersbetweenthe
valuesin the table.Note that the valueusedto adjustthe full scalevolrageis not the ideal full scalevalue for a 0 to
+10 volt inputrange.This valueis usedbecauseit is themaximumvalueat which theA,/Dconverteris guaranteed
to be linear, and ensuresaccuratecalibrationresults.
Table5-1- A/D ConverterBit Wetghts,
Unipolar,StralghtBinary
ldeallnput Voltage(mlllivolts)
A/D Bit Weight
0 to +10Volts
1 1 1 1 1 1 1 11 1 1 1
+9997.6
1000 0000 0000
+5000.0
0100 0000 0000
+2500.0
0010 0000 0000
+1250.0
0001 0000 0000
+625.00
0000 1000 0000
+312.50
0000 0100 0000
+156.250
0000 0010 0000
+78.125
0000 0001 0000
+39.063
0000 0000 1000
+19.5313
0000 0000 0100
+9.7656
0000 0000 0010
+4.8828
0000 0000 0001
+2.4414
0000 0000 0000
+0.0000
54
DataValuesfor CalibratlngUnipolar10 Volt Range(0 to +10votts)
Offset (TR7)
ConverterGaln(TR2)
InputVoltage= +1.22070
mV Input Voltage= +9.49829V
0000 0000 0000
0000 0000 0001
A/D ConverledData
1 1 1 10 0 1 10 0 1 0
1 1 1 10 0 1 1 0 0 1 1
Bipolar Calibration
. Bipolar RangeAdjustments:-5 to +5 Volts
Two adjustmentsare madeto calibratethe A/D converterfor the bipolar rangeof -5 to +5 volts. One is the
offset adjustment,and the other is the full scale,or gain, adjustmenrTrimpot TR3 is usedto makethe offset
adjustment,and trimpot TR2 is usedfor gain adjustment.Beforemakingtheseadjustments,makesurethat the
junper on P3 is setfor lOV andthejumperson P4 andPl I aresetfor +/-.
Useanaloginput channelI andsetit for a gainof 1 while calibratingtheboard.Connectyour precisionvoltage
sourceto channel1. Setthe voltagesourceto 4.99878 volts,shrt a conversion,andreadtheresultingdaia.Adjust
trimpotTR3 until it flickersbetweenthevalueslistedin the tablebelow.Next, setthe voltagetD+4.99634volts,and
repeattheprocedure,this time adjustingTR2 until thedataflickersbetweenthe valuesin the table.
DataValuesfor CalibratingBipolar10 Vott Range(-5to +5 votts)
Oftset (TR3)
ConverterGaln(TR2)
InputVoltage= -4.99878V lnput Voltage= +4.99634V
A/D ConvertedData
1000 0000 0000
1000 0000 0001
0111 1111 1110
0111 111't 1111
Table5-2- A/D ConverterBit Weights,
Bipolar,Twos Complement
ldealInputVoltage(millivolts)
A/D Bit Weight
1 1 1 1 1 1 1 11 1 1 1
'5 to +5 Volts
-2.44
-10to +10Volts
-4.88
1000 0000 0000
-5000.00
-10000.00
0100 0000 0000
+2500.00
+5000.00
0010 0000 0000
+1250.00
+2500.00
0001 0000 0000
+625.00
+1250.00
0000 1000 0000
+312.50
+625.00
0000 0100 0000
+156.25
+312.50
0000 0010 0000
+78.13
+156.25
0000 0001 0000
+39.06
+78.13
0000 0000 1000
+19.53
+39.06
0000 0000 0100
+9.77
+19.53
0000 00000010
+4.88
+9.77
0000 0000 0001
+2.44
+4.88
0000 0000 0000
0.00
0.00
5-5
. Bipolar RangeAdjustments:-10 to +10 Volts
To adjustthebipolar20-voltrange(-10 to +10 volts),changethejumperon P3 so that it is insalled acrossthe
20V pins.LeavetheP4 andPll jumpersat +/-. Then,setthe input voltageo +5.0000volts andadjustTRI until the
outputmatchesthedatain thetablebelow.
DataValuefor CalibratingBipolar20 Volt Range(-10to +10volts)
TR1
lnput Voltage= +5.0000V
A/D ConvertedData
0100 0000 0000
D/A Calibration(ADA1200)
The D/A converterrequiresno calibrationfor the Xl ranges(0 to +5 and+5 volts). The followingparagraph
describesthe calibrationprocedurefor the X2 multiplier ranges.
To calibratefoirX2(0 to +10 or +10 volts),settheDAC outputvoltagerangeto 0 to + 10volts (iumperson X2
and5 on P9, AOUTI, orP10, AOUT2).Then,programthecorresponding
D/A converter(DACI or DAC2) with rhe
digital value2048.TheidealDAC outputfor 2048 atX2 (0 to +10 volt range)is 5.0000volts.AdjustTR5 for
AOUTI and TR6 for AOUTZ until 5.0000volts is readat the output.Table 5-3 lists ttreideal outputvolragesper bir
weightfor unipolarrangesandTable54 lists ttreidealoutputvoltagesfor bipolarranges.
Table5-3- D/A ConverterUnipotarCatibrationTabte
ldealOutputVoltage(in mlllivotts)
D/A Bit Weight
0to+5V
0to+10V
4095(Max.Output)
4998.8
9997.6
2048
2500.0
5000.0
1024
12s0.0
2500.0
512
625.00
1250.0
256
'128
312.50
625.00
156.2s0
312.50
64
78.125
156.250
32
39.063
78.125
16
19.5313
39.063
I
9.7656
19.s313
4
4.8828
9.7656
2
2.4414
4.8828
1
1.2207
2.4414
0
0.0000
0.0000
5-6
Table54 - D/A ConverterBlpolarGallbrailonTabte
ldealOutputVoltage(ln mlllivolts)
D/A Bit Weighl
15V
4095(Max.Output)
+4997.6
r10v
+9995.1
2048
0.0
0.0
1024
-2500.0
-5000.0
512
-3750.0
-7500.0
256
-437s.0
-8750.0
128
-4687.s
-9375.0
64
-4843.8
-9687.s
32
-4921.9
-9843.8
16
-4960.9
-9921.9
I
-4980.s
-9960.9
4
-4990.2
-9980.s
2
-4995.1
-9990.2
1
-4997.6
-999s.1
0
-5000.0
-10000.0
5-'l
5-8
APPENDIX A
12OO
SPECIFICATIONS
A-l
A-2
AD1200/ADA1200
Characteristicsrypical
@2soc
lnterface
Switch-selectable
baseaddress,l/O mapped
Jumper-selectable
interrupts
& DMAchannel
Analog lnput
16single-ended
inputs
Inputimpedance,
eachchannel........
Gain.............
Inputranges
Guaranteed
linearityacrossinputranges
protection
Overvoltage
Settling
time(gain= 1).....
A/D Converter...............
Type............
Resolution
Linearity
Conversion
speed..........
Throughput
.............>10
megohms
....................
resistor
configurable
.............i5,
110,or 0 to +10vohs
.....t5,t9.5, and0 to +9.5vohs
..135Vdc
...5Fsec,max
..AD678
Successive
...........
approximation
..........12
bits(2.214
mV@ 10V;4.88mV@ 20V)
.11 bit,typ
psec,typ
................5
125kHz
PacerClock
(using
Range
I MHzclock)
...........
on-board
Digitall/O .............
..............9
minutes
to 5 psec
CMOS82C55
Number
of lines
......................16
Logiccompatibility
............
.............TTUCMOS
(Configurablewithoptionall/O pull-up/pul
l-downresistors)
voltage...................
High-fevel
output
....................4.2V,
min
Low-level
outputvoltage..................
..................0.45V,
max
High-level
inputvoltage
..2.2V,min;5.5V,max
Low-level
inputvoltage
.-0.3V,min;0.8V,max
pA
Inputloadcurrenl
............+10
Inputcapacitance,
pF
C(|N)@F=1MHz
................
..................10
Outputcapacitance,
C(OUT)<@F=1MHz
pF
.......20
D/A Converter (ADA1200Only)
......AD7237
Analogoutputs
..,,......2
channels
Resolution
...12bits
Outputranges
.....0to +5,t5, or 0 to +10vohs
Guaranteed
linearityacrossoutputranges....................0
to +5,t5, and0 to +9.2vohs
Relativeaccuracy......
t1 bit, max
Full-scale
accuracy
.t5 bits,max
Non-linearity.
.............11
bit,max
Settling
time.............
psec,max
..................10
cMos82cs4
Timer/Counters
...........
Three16-bitdowncounlers(2 cascaded,
1 independent)
6 programmable
operatingmodes
Counter
inputsource
...........External
clock(8 MHz,max)or
on-board8-MHzclock
Counteroutputs
Available
externally;
usedas PC interrupts
gatesource..
Counter
gateor alwaysenabled
........External
(PCbus-sourced)
Miscellaneous
lnputs/Outputs
ground
t5 volts,112
volts,
CurrentRequirements
140mA@ +5 vohs;32 mA@ +12volts;30 mA@ -12 volts
A-3
Gonnector
50-pinrightangleshrouded
header
Size
Shortslot- 3.875'H
x 5.25'W(99mm
x 134mm)
A4
APPENDIX B
P2 CONNECTORPIN ASSIGNMENTS
B-l
AINl
AIN9
AIN2
AINlO
AIN3
AIN11
AIN4
AINl2
AIN5
A1N13
AIN6
Alltla
AINT
AIN15
AINs
AINl6
AOUTl
ANALOGGND
AOUT2
ANALOG GND
ANALOGGND
ANALOGGND
PA7
PC7
PA6
PC6
PA5
PCs
PA4
PC4
PA3
PC3
PA2
PC2
PAl
PCl
PAO
PC0
T R I G G E RI N
EXT GATE 1
T R I G G E RO U T
EXT CLK
+12 VOLTS
.12 VOLTS
DIGITAL GND
T/C OUT 1
Ttc ouT 2
EXTGATE2
+5 voLTs
DIGITALGND
P2 Connector
APPENDIXC
COMPONENT DATA SHEETS
c- l
lntef82C54Programmable
IntervalTimer
DataSheetReprint
intel'
82C54
TIMER
CHMOSPROGRAMMABLE
INTERVAL
r Compatlblewlth all Intel and most
other mlcroprocessors
r Hlgh Speed,"Zero Walt State"
Operatlonwlth 8 MHz8086/88and
80186/188
I HandlesInputs from DC to 8 MHz
- 10 MHzfor 82C54-2
r AvallableIn EXPRESS
- StandardTemperatureRange
- ExtendedTemperatureRange
I Three Independent16-bltcounters
I Low Power CHMOS
- lcc : 10 mA o 8 MHzCount
frequency
r CompletelyTTL Compatlble
r Six ProgrammableCounterModes
I Blnary or BCDcountlng
I Status Read Back Command
I AvallableIn 24-PlnDIPand 28-PlnPLCC
TheIntel82C54is a high-performance,
CHMOSversionof the industrystandard
8254counter/timer
whichis
designedto solvethe timingcontrolproblemscommonin microcomputer
systemdesign.lt providesthree
independent
16-bitcounters,
eachcapableof handlingclockinputsup to 10 MHz.All modesare software
programmable.
The 82C54is pincompatible
withth€ HMOS8254,and is a supersetof the 8253.
Six programmable
timer modesallow the 82C54to be usedas an 6vsnt counter,elaps€cttime indicator,
programmable
one-shot,and in manyotherapplications.
The82C54is fabricated
on Intel'sadvancedCHMOSlll technology
whichprovideslow powerconsumption
withperformance
equaltoor greaterthantheequivalent
HMOSproduct.
The82C54is available
in 24-pinDIP
and 28-pinplasticleadedchipcarrier(PLCC)packages.
OIOCI
coiilEn
Oa
Dt
6
c3
Or
,
AI
Ot
I
AO
DO
9
c|.x2
t0
lt
t2lt'.ts$?ll
oalEocaao xc
23124/--3
PLASNCLEADEDCHIPCAFRIER
O,
Or
Or
D.
Dr
Ot
Dr
Oo
.cLx 0
out 0
OAIEO
or{D
2312U-1
Flgure1.82C54BlockDlagram
I
2
3
a
5
t
2a
tt
t2
21
20
rt
Ycc
m
m
d-s
At
Aa
a
ra cLr 2
rt oul 2
c
!3
OATC2
t0
rt
cLx r
It
ta
'|l
I
l2
CATET
ouTt
231244-2
Diagramsar€lor pin reterenc€only.
Packagesizesar6 not to scal€.
Ffgure2.82C54Plnout
3-83
scPtGmbor1989
Ordcr Numbcn 231244405
int€f
82C54
Table1.PlnDescrlption
Symbol
Dz-Do
PlnNumber
DIP
1-8
PLCC
2-9
CLKO
OUTO
9
10
10
GATE O
GND
11
12
12
13
OUT1
GATE1
CLK1
GATE2
OUT2
CLK2
Ar,Ao
13
Function
Type
vo
data bus lines,
Data:Bidirectionaltri-state
connectedto systemdata bus.
Clock0: Clockinputof Counter0.
o
Output0: Outputof Counter0.
Gate0: Gateinputof Counter0.
16
17
18
o
I
20-19
t9
20
21
23-22
G
z',|,
24
I
m
22
26
I
WF
23
27
I
Vr:n
24
28
Out1:Outpuiof Counter1
Gate1:Gateinoutof Counter1.
1.
Clock1:Clockinputof Counter
2.
Gate2: Gateinputof Counter
2.
Out2: Outputof Gounter
2.
Clock2: Clockinoutof Counter
Address:
Usedto selectoneof thethreeGounters
or theControlWordRegisterfor reador write
Normallyconnectedto thesystem
operations.
addressbus.
Ar
Ao
Selects
Counter0
0
0
Counter1
1
0
Counter2
1
0
1
1
ControlWord
Reqister
ChipSelectA lowon thisinputenablesthe82C54
to respondto FD andWFisignals.RDandWFlare
iqnoredotherwise.
ReadControl:Thisinputis lowduringCPUread
operations.
WriteControl:Thisinputis lowduringGPUwrite
operations.
Power:* 5Vpowersupplvconnection.
No Connect
NC
14
15
16
17
18
Ground:Powersupplyconnection.
14
o
I
1 ,1 1 ,1 5 , 2 5
FUNCTIONALDESCRIPTION
General
The82C54is a programmable
intervaltimer/counter
designedfor usewith Intelmicrocomputer
systems.
It is a generalpurpose,
multi-timing
elementthatcan
be treatedas an anay ol llO ports in the system
software.
The 82C54solvesone o{ the most commonproblemsin any microcomputer
system,the generation
of accuratetime delaysundersoftwarecontrol.Insteadof settingup timingloopsin software,the programmerconfigures
the 82C54to matchhisrequirementsand programsone of the countersfor the de-
sired delay. After the desired delay, the 82C54 will
intenupt the CPU.Sottwareoverheadis minimaland
variablelength delays can easily be accommodated.
Some of the other counter/timer functions common
to microcomputerswhich can be implementedwith
the 82C54 are:
r Realtimeclock
o Even counter
o Digitalone-shot
o Programmable
rategenerator
. Square
wavegenerator
o BinaUratemultiplier
o Complexwaveformgenerator
o Complexmotorcontroller
intef
82C54
BlockDlagram
CONTROLWORD REGISTER
The ControlWordRegister(see Figure4) is selected
by the Read/WriteLogicwhen Ar, Ao : 11. lf the
CPU then does a write operationto the 82C54,the
data is stored in the ControlWord Registerand is
interpreted as a Control Word used to define the
operationof the Counters.
DATABUSBUFFER
This3-state,bi-directional,
8-bitbutleris usedto interfacethe 82C54to the systembus(seeFigure3).
The Control Word Register can only be written to;
status informationis availablewith the Read-Back
Command.
ND
m
231244-4
Flgure3. Block DlagramShowlngDataBus
Buffer and Read/WrlteLoglc Functlons
231244-5
READ/WRITE
LOGIC
The Read/WriteLogicacceptsinputsfromthe system bus and generatescontrolsignalsfor the other
functionalblocksof the 82C54.A1 and As select
oneof the threecountersor the ControlWordReE
ter to be readfrom/writteninto.A "low" on the FiD
inputtells the 82C54that the CPl.lis readingone of
the counters.A "low" on the WH input tells the
82C54that the CPUis writinqeithera ControlWord
or an initialcount.BothFiDanOWn-are qualifiedby
6; HE and WH are ignoredunlessthe 82C54hai
beenselectedby holdingCS low.
Flgure4. Block DlagramShowlngControlWord
Reglsterand GounterFunctlons
couNTERO,COUNTEB1, COUNTER
2
Thesethreefunctionalblocksare identicalin operation,so onlya singleCounterwillbe described.
The
internalblockdiagramof a singlecounteris shown
in Figure5.
The Countersare fully independent.
EachCounter
mayoperatein a differentMode.
The ControlWordRegisteris shownin the figure;it
is not partof the Counteritself,but its contentsdeterminehowthe Counteroperates.
3-85
int€t
82C54
to the CE.The
storedin the CRandlatertransferred
ControlLogic allowsone registerat a time to be
loadedfromthe internalbus. Both bytesare transCRy and CRl are
ferredto the CE simultaneously.
ln this
clearedwhenthe Counteris programmed.
for one
way,if the Gounterhas beenprogrammed
byteonlyor least
bytecounts(eithermostsignificant
significantbyte onty)the other byte will be zero.
Notethat the CEcannotbe writteninto;whenevera
countis written,it is writtenintothe CR.
CLK
TheControlLogicis alsoshownin thediagram.
n, GATEn, andOUTn areall connected
to the outsideworldthroughthe ControlLogic.
82C54SYSTEMINTERFACE
231244-6
Flgure5. InternalBlockDlagramof a Counter
The status register,shown in the Figure,when
latched,containsthe currentcontentsof the Control
Word Registerand status of the output and null
countflag.(Seedetailedexplanation
of the ReadBackcommand.)
Theactualcounterlslabelled
CE(lor"Counting
Element").lt is a 16-bitpresettable
synchronous
down
counter.
The82C54is treatedby the systemssoftwareas an
l/O ports;three
arecountersand
arrayof peripheral
the fourthis a controlregisterfor MODEprogramming.
Basically,
the selectinputsA0,A1connectto the A9,
A1addressbussignalsof the CPU.The CScanbe
deriveddirectlyfromthe addressbus usinga linear
selectmethod.Or it can be connectedto the output
of a decoder,suchas an Intel8205for largersyst€ms.
OLy and OL1are two 8-bit latch€s.OL standsfor
"OutputLatch";the subscriptsM and L standfor
"Most significantbyte" and "Leastsignificantbyte"
respectively.
Both are normallyreferredto as on€
unitand calledjust OL.Theselatchesnormally"follow" the CE,but if a suitableCounterLatch.Commandis sent to the 82C54,the latches"latch" the
presentcountuntilreadby the CPUandthenreturn
to "following"theCE.Onelatchat a timeis enabled
by the counter'sControlLogicto ddvethe internal
bus.This is howthe 16-bitCountercommunicates
over the 8-bit internalbus. Note that the CE itself
cannotbe read;wheneveryou readthe count,it is
the OL that is beingread.
Similarly,there are two 8-bit registerscalled GBtul
Bothare normally
and CRg(for "CountRegister").
relerredto as one unitand callediust CR.Whena
new countis writtento the Counter,the countis
3-86
Ar lo
. coutttt
Cl
0r
r--:*
out olTC cLt
DlD,
atcaa
corrtl:t
couxt:i
r-:+
'ot
t oalc crx' 'ot l otlE clx
231244-7
Flgure6. 82C54SystemIntertace
intef
82C54
DESCRIPTION
OPERATIONAL
Programmingthe 82C54
General
Counters
areprogrammed
by writinga ControlWord
andthenan initialcount.Thecontrolwordformatis
shownin Figure7.
Atter power-up,the state of the 82C54 is undefined.
The Mode, count value,and output of all Counters
are undefined.
How each Counteroperatesis determinedwhen it is
programmed.Each Counter must be programmed
beforeit can be used.Unusedcountersneed not be
programmed.
All ControlWordsare writteninto the OontrolWord
Register,
whichis selected
when41,Ao : 11.The
ControlWord
itselfspecifies
whichCounteris being
programmed.
By contrast,initialcountsarewrittenintothe Counters,not the ControlWordRegister.
The 41, A9 inputs are used to selectthe Counterto be written
into.Theformatof the initialcountis determined
by
theControlWord
used.
ControlWordFormat
A1,A9:11 G:O
ffi:1
D7
WH:O
D5
scl sc0
D5
Da
D3 D2 D1
Ds
RW1 RWO M2 M 1 MO BCD
SC- SelectCounter:
M-
MODE:
n2
Ml
scl
sco
0
0
SelectCounter0
0
0
0
Mode0
0
1
SelectCounter1
0
0
1
Mode 1
1
0
SelectCounter2
X
1
0
Mode 2
1
1
Read-BackCommand
(See Read Operations)
x
1
1
Mode3
1
0
0
Mode4
1
0
1
Mode 5
RW - Read/Wrlte:
RWl RWo
0
0
MO
BCD:
CounterLatchCommand(seeRead
Operations)
0
1
Read/Writeleastsignificantbyte only.
1
0
Read/Write
mostsignilicant
byteonly.
1
1
Read/Writeleastsignificant
bytefirst,
thenmostsignificant
byte.
0
BinaryCounter16-bits
1
BinaryCodedDecimal(BCD)Counter
(4 Decades)
NOTE:Don't care bits (X) should be 0 to insure
compatibilitywith future Intel products.
Figure7. GontrolWordFormat
3-87
iilef
82C54
structions€quenceis required.Any programming
thatfollowsth€ conventions
sequence
aboveis acceptable.
WrlteOperations
procedurefor the 82C54is very
The programming
flexible.Onlytwo conventions
needto be rememA new initialcountmay be writtento a Counterat
bered:
any time without affecting the Counter's pro1) For each Counter,the ControlWord must be
grammed
Modein anyway.Counting
willbeatfected
writtenbeforethe initialcountis written.
in the Modedefinitions.
as described
Thenewcount
2) The initialcount must tollow the count format
mustfollowthe programmed
countformat.
specifiedin the ControlWord (leastsignificant
byteonly,mostsignificant
byteonly,or leastsiglf a Gounteris programmed
to read/writetwo-byte
nificantbyteandthenmostsignificant
byte).
counts,the followingprecaution
applies:A program
must not transfercontrolbetweenwritingthe first
Since the ControlWord Registerand the three
andsecondbyteto anotherroutinewhichalsowrites
Countershaveseparateaddresses(selectedby the
intothat sameCounter.Othenrise,
the Counterwill
Ar, Ao inputs),andeachGontrolWordspecifies
the
be loadedwithan incorrectcount.
Counterit appliesto (SC0,SC1bits),no specialinControlWord
LSBof countMSBofcountControlWordLSBof countMSBof countControlWordLSBofcountMSBof count-
41
11
00
00
11
01
01
11
10
10
Ae
Counter
0
Counter
0
Gounter0
Counter1
Counter1
Gounter
1
Counter
2
Counter2
Counter
2
ControlWordCounterWordControlWordLSBofcountLSBofcountLSBofcountMSBof countMSBof countMSBof count-
A1
11
11
11
10
01
00
00
01
10
Ae
Counter0
Counter1
Counter2
Counter2
Counterl
Counter0
Counter0
Counter1
Counter2
ControlWord
ControlWordControlWord
LSBof countMSBof countLSBof countMSBof countLSBof countMSBof count-
Counter
2
Counter1
Counter
0
Counter
2
Counter
2
Counter1
Counter1
Counter
0
Counter
0
ControlWord
ControlWordLSBof countControlWord
LSBof count
MSBof countLSBof countMSBof countMSBof count-
Counter1
Counter0
Counter1
Counter2
Counter
0
Counter1
Counter2
Counter0
Counter2
A1
'l
1
1
1
1
0
0
0
0
A1
11
11
01
11
00
01
10
00
10
Ao
1
1
1
0
0
1
1
0
0
A6
NOTE:
ln all four examples,all countersare programmedto read/writ€two-byt€counts.
These are only four of many possibleprogrammingsaguenc€s.
Figure8. A FewPoeslbleProgrammlngSequences
ReadOperations
It is often desirableto readthe valueof a Gounter
withoutdisturbing
thecountin progress.
Thisis easily donein the 82C54.
Thereare three possiblemethodsfor readingthe
counters:a simple read operation,the Counter
Latch Command,and the Read-BackGommand.
Eachis explainedbelow.The first methodis to performa simplereadoperation.
To readthe Counter,
whichis selectedwith the A1, A0 inputs,the CLK
inputof the seleciedCountermustbe inhibitedby
usingeitherthe GATEinpuior externallogic.Otherwise,the countmaybe in the processof changing
whenit is read,givingan undefined
result.
3-88
intef
82C54
grammingoperationsof other Countersmay be insertedbetweenthem.
COUNTER
LATCHCOMMANO
Thesecondmethodusesthe "GounterLatchCommand".Likea ControlWord,thiscommand
is written
to the ControlWord Register,which is selected
when41, Ao : 11.Alsolikea ControlWord,the
SCO,SC1bitsselectoneof the threeCounters,
but
twootherbits,D5andD4,distinguish
thiscommand
froma ControlWord.
A l , A O : 1 1 6; : 0 ;
D7
D5
R D - : 1W
; F:O
D5
Da
0
0tx
sc1 sc0
Another feature of the 82C54 is that reads and
writesof the same Countermay be interleaved:for
example,if the Counteris programmedfor two byte
counts,the followingsequenceis valid.
'1.
Read least significantbyte.
2. Write new least significantbyte.
3. Read most significantbyte.
4. Write new most significantbyte.
D3
D2
D1
Ds
X
X
X
lf a Counteris programmedto readlwrite two-byte
counts,the followingprecautionapplies;A program
must not transfercontrol betweenreadingthe first
and secondbyteto anotherroutinewhichalso reads
from that same Counter.Otheruvise,an incorrect
count will be read.
SC1, SCO- specifycounterto be latched
scl
sco
Counter
0
0
1
0
1
0
1
1
0
1
2
Read-BackCommand
READ.BACKCOMMAND
The third method uses the Read-Backcommand.
This commandallows the user to check the count
value, programmedMode, and current state of the
OUT pin and Null Count flag of the selectedcounter(s).
D5,D4- 00 designatesCounterLatchCommand
X - don't care
The commandis writteninto the ControlWord Register and has the format shown in Figure 10. The
commandappliesto the countersselectedby setting their correspondingbits DB,D2,D1: 1.
NOTE:
Don'tcarebits (X) shouldbe 0 to insurecompatibility
withfutureIntelproducts.
Figure 9. Counter Latchlng Command Format
The selectedCounter'soutputtatch(OL)latchesthe
count at the time the Counter Latch Commandis
received.This count is held in the latch until it is read
by the CPU (or until the Counteris reprogrammed).
The count is then unlatched automaticaliyand the
OL returnsto "following"the countingelement(CE).
This allows reading the contents oi the Counters
:'9! the fly" without atfecting counting in progress.
MultipleGounterLatch Commandsmiy be used to
latch more than one Counter.Each latched Gounter's OL holdsits countuntilit is read.CounterLatch
Commandsdo not affect the programmedMode of
the Counterin any way.
lf a Counter is latched and then, some time later,
latchedagain before the count is read, the second
CounterLatchCommandis ignored.The count read
will be the count at the time the first CounterLatch
Commandwas issued.
With either method,the count must be read according to the programmedformat; specifically,if the
Counter is programmedfor two byte counts, two
bytes must be read.The two bytes do not have to be
read one right after the other; read or write or pro-
A 0 , A 1: 1 1
D7
1
Q$-O
FD:1
WF:o
Da
1
D1
6TNT SlTr-USCNT2 CNT 1 C N T O 0
D5:0 : Latch count ol selectedcounter(s)
Da:0 : Latch statusof selectedcounter(s)
D3: 1 : Select counter2
D2: 1 = Select counter 1
Dr: 1 : Select counter0
Dg: Reservedfor luture expansion;must be 0
Figure 10.Read-BackCommand Format
The read-backcommandmay be used to latch multioutput latches (OL) by setting the
S_pgnter
COUNT bit D5:0 and selectingthe desiredLounte(s). This single command is functionallyequiva_
lent to several counter latch commands,one for
each counterlatched.Each counter'slatchedcount
is held until it is read (or the counter is reprogrammed).That counter is automaticallyunlatched
when read, but other countersremain latched until
they are read.lf multiplecountread-backcommands
are issuedto the same counterwithoutreadingthe
3-89
inbf
82C54
count,all but the first are ignored;i.e.,the count
whichwill be readis the countat the timethe first
read-back
wasissued.
command
THISACTION:
A. Writeto the control
wordregister:ht
B. Writeto the count
Theread-back
command
mayalsobe usedto latch
statusinformationof selectedcounter(s)by setting
ffifre
bit D4:0. Statusmustbe tatch6dto ue
read;statusof a counteris accessedby a readfrom
thatcounter.
r"tot"i tcnitri
C. Newcountis loacled
intocE (cH + 6E;.
NULL
OUTPUT
RWI RWOM2 M1 MO BCD
COUNT
Dz1:OutPinisl
0: OutPinis0
D 5 1 : N u l lc o u n t
0 : Countavailablefor reading
Ds-Do CounterProgrammedMode (See Figure7)
Flgure 11.Status Byte
NULL COUNTbit DOindicateswhen the last count
writtento the counterregister(CR)has been loaded
into the countingelement(CE).The exact time this
happensdependson the Modeof the counterand is
describedin the Mode Definitions,but untilthe count
is loadedinto the countingelement(CE),it can't be
read from the counter. lf the count is latchedor read
before this time, the count value will not reflectthe
new count just written.The operationof Null Count
is shown in Figure12.
0
0
1
0
1
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
0
0
1
0
0
1
1
1
0
0
0
1
Nullcount=o
Flgure12.NullCountOpera$on
Both count and status of the selectedcounter(s)
may be latchedsimultaneously
by setting both
ffi
and SIAluS- bits DS,D4:0. rnis ii functionallythe sameas issuingtwo separateread-back
commands
at once,andthe abovediscussions
apply herealso.Specifically,
if multipl€countand/or
statusread-back
commands
areissuedto the same
counter(s)
withoutanyintervening
reads,all butthe
firstare ignored.
Thisis illustrated
in Figure13.
lf bothcountandstatusof a counterarelatched,the
firstreadoperationof that counterwill returnlatched
status,regardlessof which was latchedfirst. The
nextone or two reads(depending
on whetherthe
counteris programmed
for one or two type counts)
returnlatchedcount.Subsequent
readsreturnunlatchedcount.
Command
DescrlPtlon
D7 D5 D5 Da D3 D2 D1 D9
1 1 0 0 0 0
1 0 Readbackcountandstatusof
1
Nullcount:1
lf multiplestatuslatchoperations
of the counter(s)
areperformed
withoutreadingthe status,all butthe
firstare ignored;i.e.,the statusthat will be readis
the statusof the counterat the timethe firststatus
read-back
command
wasissued.
Dl
1
Nullcount= 1
ttl Qn! the counterspeciliedby the controlword will
have its null count set to 1. Null count bits of other
countersare unatfected.
l2l f tne counler is programmedfor two-byte counts
(least significantbyte thgn most significantbyte) null
count goes to 1 when the secondbyte is written.
Thecounterstatustormatis shownin Figure11.Bits
D5 throughD0 containthe counter'sprogrammed
Modeexactlyas writtenin the last ModeControl
Word.OUTPUTbit D7 containsthe cunentstateof
the OUT pin. This allowsthe userto monitorthe
counter'soutputvia software,possiblyeliminating
somehardware
froma system.
1
CAUSES:
Results
Countandstatuslatched
Counter0
for Counter0
0 Readbackstatusof Counter1
Statuslatchedfor Counter1
0 Readbackstatusof Counters2, 1 statuslatchedfor counter
2, butnotCounter1
0 Readbackcountof Counter2
Countlatchedfor Counter2
0 Readbackcountandstatusof
Countlatchedlor Counter1
Counter1
but not status
0 Readbackstatusof Counter1
Command
ignored,
status
alreadylatchedfor Counter1
Figure13.Read-Back
GommandExample
3-90
inqef
cs
RD WR
1
0
1
0
1
0
1
0
'l
0
0
1
82C54
0
1
0
0
1
A r Ao
0 0 WriteintoCounter
0
0 1 WriteintoCounter1
1
0 WriteintoCounter2
1
1 WriteControlWord
0 0 ReadfromCounter
0
0 1 Readfrom Counter1
1
0 Readfrom Counter2
1
1 No-Qperation
(3-State)
1
x
X
X
X
0
1
1
X
X
0
0
0
0
0
0
0
Thisallowsthecounting
sequence
to be synchroniz_
ed by^gottware.
Again,OUTdoesnotgo highuntitN
+ 1 CLKpulsesafierthe newcountot tt is written.
lf an initialcountis writtenwhileGATE: 0, it will
stillbe loadedon the nextCLKpulse.WhenGATE
goeshigh,OUTwittgo highN CLKputsestater;no
CLKpulseis neededto loadtheCounteras thishas
alreadybeendone.
No-Operation
(3-State)
(3-State)
No-Operation
Flgure14.Read/WrlteOperailonsSummary
ModeDefinitions
The followingare definedfor use in describing
the
operation
of the 82C54.
CLKPULSE:a
risingedge,thena failingedge,in
thatorder,of a Counter,s
CLKinput.
TRIGGER:
a risingedgeof a Counter'sGATEinput.
COUNTER
LOADTNG:
thetransferof a countfrom
the CR to the CE (referto
the "FunctionalDescription")
| -l " l* | * | I I ! I I I i I slfflF[l
CW.l0
t!!rt
l" l- l- l- l3lt lt l! i? ls lr:l
MODE0: INTERBUPT
ON TERMTNAL
COUNT
Mode0 is typically
usedfor eventcountinq.
Afterthe
ControlWordis written,OUTis initiallylo-w,andwill
remainlowuntiltheCounterreacheszero.OUTthen
goeshighand remainshighuntila newcountor a
new Mode0 ControlWordis writteninto the Counter.
GATE: 1 enablescounting;GATE: 0 disables
counting.
GATEhasno etfecton OUT.
AftertheControlWordandinitialcountarewrittento
a Counter,
the initialcountwillbe loadedon the next
CLKpulse.ThisCLKpulsedoesnot decrement
the
count,so for an initialcountof N, OUTdoesnot go
highuntilN + 1 CLKputsesafterthe initiatcountis
written.
ll a new countis writtento the Counter,it will be
loadedon the nextCLKpulseandcountingwillcon.
tinuefromthe newcount.lf a two-bytecountis writ_
ten,the followinghappens:
1) Writingthefirstbytedisabtes
counting.
OUTis set
low immediately
(noclockpulserequired).
2) Writingthe secondbyte allowsthe new countto
be loadedon the nextCLKpulse.
3-91
l"l-l*l* l3 l: I I ll lt l; lt:l
231244-8
NOTE:
The FollowingConventionsApply To All Mode Timing
Diagrams:
1. Counters.are_programmedfor binary (not BCD)
golllins and for Reading/Writingteast signiiicantbyte
(LSB)only.
2. The counteris alwaysselected(G alwayslow).
3. CW standsfor "ControlWord"; CW : iO mein" a
controlword of 10, hex is writtento the counter.
4. LSBstandsfor "LeastSignificantByte" of count.
5. Numbersbelow diagramsare count values.
The lower numberis the least signiticantbyte.
The upper numberis the most signilicanibyte. Since
the counter is. programmedto Read/Write LSB only,
the most signilicantbyte cannot be read.
N standsfor an undelinedcount.
Verticallinesshowtransitionsbetweencountvalues.
Figure15.Mode 0
intef
82C54
IIIODE1: HARDWARERETRTGGERABLE
ONE-SHOT
OUT will be initiallyhigh.OUTwill go low on the CLK
pulsefollowinga triggerto beginthe one-shotpulse,
and will remainlow until the Counterreacheszero.
QUT will then go high and remainhigh untilthe CLK
pulse atter the next trigger.
After writingthe ControlWord and initialcount,the
Counter is armed. A trigger results in loading the
Counterand settingOUT low on the next CLK pulse'
thus startingthe one-shotpulse.An initialcountof N
will resultin a one-sholpulse N CLK cyclesin dura'
tion. The one-shotis retriggerable,hence OUT will
remainlow for N CLK pulsesafter any trigger.The
one-shotpulsecan be repeatedwithoutrewritingthe
samecountinto the counter.GATEhas no etfecton
OUT.
ll a new countis writtento the Counterduringa oneshot pulse,the currentone-shotis not affectedunless the Counter is retriggered.In that case, the
Counteris loadedwith the new count and the oneshot pulse continuesuntilthe new count expires.
MODE2: RATE GENERATOR
This Mode functionslike a divide-by-Ncounter.lt is
typiciallyused to generatea Real Time Clock inter'
rirpt.OUf will initiallybe high.When the initialcount
has decrementedto 1, OUT goes low for one CLK
pulse. OUT then goes high again, the Counter reioads the initialcount and the processis repeated'
Mode 2 is periodic;the same sequenceis repeated
indefinitely.For an initialcount of N, the sequence
repeats every N CLK cYcles.
GATE : 1 enablescounting;GATE : 0 disables
counting.lf GATE goes low duringan outputpulse,
OUT is set high immediately.A triggerreloadsthe
Counterwith the initialcounton the next CLK pulse;
OUT goes low N CLK pulsesafter the trigger.Thus
the GATE input can be used to synchronizethe
Counter.
After writing a Control Word and initial count, the
Counterwili be loadedon the next CLK pulse.OUT
ooes low N CLK Pulsesafier the initialcount is writien. This allows the Counterto be synchronizedby
software also.
WF
w-t
cl(
ctx
oltt
oArc
out
oul
WT
WF
clx
clx
o^lE
oltE
oul
l,.l- l- l-l: ll ll l3 ll I il: I
our
Cwrll
lElra
LSl.5
.Wr
cLx
9F
GATE
crx
our
Gltt
l-1.1.1.1: l3i: ll lll:l3l
231244-'.lo
our
NOTE:
A GATE transitionshould not occur one clock prior to
terminalcount.
l- i. I xlr ir I I i : l3i:[lffl: l3 |
231244-9
Flgure 17.Mode 2
Figure 16.Mode 1
3-92
inbf
82C54
Writinga new countwhilecountingdoesnot atfect
the cunent countingsequence.lt a triggeris receivedafterwritinga newcountbut beforethe end
of the cunentperiod,the Counterwill be loadedwith
the newcounton the nextCLKpulseandcounting
will continuefrom the new count.Othenvise,
th6
new countwill be loadedat the end of the current
countingcycle.In mode2, a COUNTof 1 is illegal.
OUTwill be highfor (N + 1)/2 countsand low for
(N -1)/2 counts.
m
ctl
orra
0t
MODE3: SQUAREWAVEMODE
Mode3 is typicallyusedfor Baudrateqeneration.
Mode3 is similarto Mode2 exceptforthJdutycycle
of OUT.OUTwiilinitialty
be high.Whenhatfina ini_
tialcounthasexpired,
OUTgoeslowfor theremainder of the count.Mode3 is-periodic;
the sequence
aboveis repeatadindefinitely.
An initialcountof N
resultsin a sguarewavewith a periodof N CLK
cycles.
GATE: 1 enablescounting;GATE= 0 disables
coulling.lf GATEgoeslowwhiteOUTis tow,OUTis
set highimmediately;
no CLK pulseis required.A
triggerreloadsthe Counterwiththe initialcounton
the nextCLK pulse.Thusthe GATEinputcan be
usedto synchronize
the Counter
Atter writinga ControlWord and initialcount,the
Counterwill be loadedon the nextCLKpulse.This
allowsthe Counterto be synchronized
by software
also.
Writinga newcountwhilecountingdoes not atfect
the currentcountingsequence.lf a triggeris receivedafterwritinga newcountbut befo-r6
the end
of the cunent half-cycleof the squarewave,the
Counterwill be loadedwith the new count on the
nextCLKpulseandcountingwill continuelromthe
newcount.Otherwise,
the newcountwill be loaded
at the end of the currenthalf-cycle.
Mode3 is implemented
as follows:
Evencounts:OUTis initiallyhigh.Theinitialcount
is
loadedon one CLKpulseandthenis decremented
by two on succeeding
CLKpulses.Whenthe count
expiresOUTchangesvalueand the Counteris re_
loadedwiththe initialcount.The aboveprocessis
repeatedindefinitely.
Odd counts:OUT is initiailyhigh.The initiatcount
minusone (anevennumber)is loadedon one CLK
pulseandthenis decremenled
by two on succeed_
ing CLKpulses.OneCLK gulseafterthe countexpires,OUT goes low and the Counteris reloaded
with the initialcountminusone. Succeeding
CLK
pulsesdecrement
thecountby two.Whenthecount
expires,OUT goes high againand the Counteris
reloaded
withtheinitialcountminusone.Theabove
processis repeatedindefinitely.
So for odd counts,
3-93
9t
c!i
oAr:
our
9I
cu
olt:
oul
l-l.l*l.i:
l:l :i:i Itl:l:
l| !l
231244-11
NOTE:
A GATE transitionshould not occur one clock prior to
l€rminalcount.
Flgure18.Mode3
IIODE4: SOFTWARE
TRtccEREDSTROBE
OUTwill be initiailyhigh.Whenthe initiatcountexpirgq,OUTwill go low for one CLKpulseand then
go highagain.Thecountings€quence
is,.triggered,,
by writingthe initialcount.
GATE: 1 enablescounting;GATE: O disables
counting.
GATEhasno effecton OUT.
Atter writinga ControlWord and initialcount,the
Counterwill be loadedon the nextCLKpulse.This
CLKpulsedoesnot decrement
the couni,so for an
initialcountof N, OUT does not strobeiow until
N + 1 CLKpulsesafterthe initialcountis written.
ff a new count is wriilenduringcounting,it wilt be
loadedon the nextGLKpulseandcountiigwiilcon_
tinuefromthe newcount.lf a two-bytecorjntis writ
ten,the followinghappens:
82C54
1) Writingthe first bytehasno etfecton counting.
2) Writingthe secondbyteallowsthe newcountto
be loadedon the nextCLKPulse.
This allowsthe sequenceto be "retriggered"by
software.OUT strobeslow N+ 1 CLK pulsesafter
th€ newcountof N is written.
WT
Atterwritingthe ControlWordand initialcount,the
counterwillnotbe loadeduntiltheCLKpulseattera
trigger.This CLK pulsedoes not decrementthe
count,so for an initialcountof N, OUTdoes not
strobelowuntilN+ 1 CLKpulsesaftera trigger.
A triggerresultsin theCounterbeingloadedwiththe
initialcounton the next CLK pulse.The counting
OUTwill not strobelow
sequenceis retriggerable.
for N + 1 CLK pulsesafterany trigger.GATEhas
no etfecton OUT.
the current
lf a newcountis writtenduringcounting,
countingsequencewill not be atfected.lf a trigger
occursafterthe newcountis writtenbut beforethe
currentcountexpires,the Counterwill be loaded
with the new count on the next CLK pulseand
will continuefromthere.
counting
clr
oAt€
our
wr
rt
ctr
cLx
o/l?t
cltt
OUT
9I
w-l
cLx
clx
oltc
oltE
out
our
l"l.l"l"ll
to
lz
lo
lr
lo
la
lo
lr
lo lFFl
lo lrrl
231211-12
Figure 19.Mode 4
Fi
ctx
MODE 5: HARDWARETRIGGEREDSTROBE
(RETRIGGERABLE)
G IC
OUT will initiallybe high. Countingis triggeredby a
risingedge of GATE.When the initialcount has expired,OUT will go low for one CLK pulse and then
go high again.
l"l
r
|
l o I o lrrl;rl
* l| * l| * l| * I| o3 I| o
2 I I I O trftFEt
o
o
g ir a II
231244-',t3
Flgure20.Mode5
3-94
inbr
82C54
OperationCommonto All Modes
Programmlng
1) lnitiates
counting
2) Resetsoutput
aft€r next
clock
Flgure21.GatePlnOperailonsSummary
lrlAX
COUNT COUNT
1
0
1
0
2
0
2
0
1
0
MODE MIN
0
1
2
3
4
NOTE:
0 is equivalent
to 216for binarycountingand 104for
BCDcounting
Figure22.ilinlmumand MarlmumInlilalCounts
When a GontrolWord is writtento a Counter,atl
ControlLogicis immediately
resetandOUTgoesto
a knowninitialstate;no CLKpulsesare requiredfor
this.
GATE
The GATEinputis alwayssampledon the rising
edgeof CLK.In Modes0, 2, 3, and4 theGATEinpu-t
is levelsensitive,
andthe logiclevelis sampledon
therisingedgeof CLK.In Modes1,2, g, and5 the
GATEinputis rising-edge
sensitive.
In theseModes,
a rising-9dgeof GATE(trigger)setsan edge-sensitiveflip-flopin theCounter.
Thisflip-flopis thensampledon the nextrisingedgeof CLK;the flip-flopis
resetimmediately
afterit is sampled.ln thisway,a
triggerwill be detectedno matterwhenit occurs_a
highlogicleveldoesnot haveto be maintained
until
the nextrisingedgeof CLK.Notethat in Modes2
and3, theGATEinputis bothedge-andlevel-sensitive.In Modes2 and 3, if a CLKsourceotherthan
the systemclock is used,GATEshouldbe pulsed
immediately
following
WF of a newcountvalue.
COUNTER
New counts are loadedand Countersare decrementedon the fallingedgeof CLK.
Thelargestpossibleinitialcountis O;thisis equivalent to 216 lor binarycountingand 104 for BCD
counting.
The Counterdoesnot stopwhenit reacheszero.In
Modes0, 1,4, and5 the Counter,?rapsaround"to
the highestcount,eitherFFFFhexfor binarvcountingor 9999for BCDcounting,
andcontinueicounting.Modes2 and3 areperiodic;the Counterreloads
itselfwith the initialcountand continuescounting
fromthere.
intef
82C54
ABSOLUTEMAXIMUMRATINGS*
UnderBias... . . . '0'C to 70'C
Temperature
Ambient
- 65' to + 150'C
Temperature
Storage
. -0,5to *8.0V
SupplyVoltage
+4Vto+7V
Op'erdtingVoitage......
. 'GND-2V to +6.5V
Vdttage
onanylnput..
Voltageon anyOutput. .GND-0.5Vto V66 + 0.5V
... '.1Watt
PoweiDissipation
'Notice: Sfressesahove those listed under'Abso'
lute MaximumBatings"maycausepermanentdamage to the device. Thisis a sfless rating only and
functionaloperationof the device at these or any
otherconditionsabovethoseindicatedin the opera'
tionatsectionsof thisspecificationis not implied.Ex'
posure to absolutemaximumrating conditionsfor
extendedperiodsmayaffect devicereliability.
D.C.CHARACTERISTICS
(Il:0.c
Symbol
Vrr
Vrr+
Vor
vox
to 70.c,vcc:5Vt
Temperature)
GND:OV)fin : -40oc tO t85'C for Extended
10"/o,
Parameter
InoutLowVoltage
InputHighVoltage
OutputLowVoltage
OutputHighVoltage
Mln
- 0.5
2.O
Max
0.8
Vcn * 0.5
o.4
3.0
Vee - 0.4
Unlte
V
V
V
V
v
Test Condltlong
lnr : 2.5 mA
lox : -2.5 mA
lox = -100 rlA
Vrr.r:Vec to 0V
r.2.0
166
lnoutLoadCurrent.
OutputFloatLeakageCunent
V66 SupplyCurrenl
t10
20
mA
crkFreq= ,'fiH*r%l".ti
lccsg
Vs6 SupplyCurrent-StandbY
10
pA
lccsgr
V66 SupplyCurrent-StandbY
150
pA
CLKFreq : Pt6
dS: V66.
All lnputs/DataBusV66
AllOutoutsFloatinq
CLKFreq: 96
eS : V66.AllOtherInPuts,
l/O Pins: Vcrun,OutputsOPen
InputCapacitance
l/O Capacitance
OutpulCapacitance
10
20
20
pF
fc:
pF
pins
Unmeasured
to GND(S)
rEturned
I11
lorl
crru
Qro
Corrr
A.C.CHARACTERISTICS
: 5V t10o/o, GND :0V) (IR :
CfA : 0'C to 70'C, V66
BUS PABAMETERS(NOIE1)
READCYCLE
Symbol
Parameter
tln
AddressStableBeforeF'DJ
tsR
tnn
G staoteBeforeffi J
tno
AddressHoldTimeAtterRDt
m PulseWidth
DataDelayfromFD J
DataDelayfromAddress
tor
nD T to DataFloating
tRR
tno
Time
CommandRecovery
Inv
NOTE:
1. AC timingsmeasuredat V96 : 2-OY'Vol : 0.8V.
U,A
pA
pF
Vorr:Vcc to 0.0V
1 MHz
-40"C to + 85'C for ExtendedTemperature)
82C54
Max
Mln
45
0
0
150
120
220
c
90
200
82C54-2
llax
llln
30
0
0
95
85
185
5
165
65
Unlts
ns
ns
ns
ns
ns
ns
ns
ns
inbr
82C54
A.C. CHARACTERISTICS(continued)
WRITECYCLE
Symbol
Parameter
Min
tew
tsw
twn
tww
tow
two
tnv
AddressStableBeforeWR-J
6stabte BeforeWF'J
AddressHoldTimeAfterWFIf
82C54
Max
82C54-2
Min
Itlar
0
0
0
0
0
0
WR PulseWidth
150
DataSetupTimeBeforeWFIf
DataHoldTimeAfterWFIf
Command
RecoveryTime
120
95
95
0
200
Unlts
ns
ns
ns
ns
ns
0
ns
ns
165
CLOCKAND GATE
Symbol
tcr-r
tpwx
tpwt
Tn
tp
tew
tet
tes
tox
Too
tooo
twc
twc
two
tcl
Parameter
Clock Period
HighPulseWidth
Low PulseWidth
ClockRiseTime
ClockFallTime
GateWdth High
Gate Width Low
9ate SetupTimeto CLKf
GateHoldTimeAfterCLK1
OutputDelayfromCLKJ
OutputDelayfromGateJ
__qLK Delayfor Loading(a)
Gate Delayfor Sampling(a)
OUT DelayfromModeWrite
CLKSet Upfor CountLatch
82C54
Min
Max
125
DC
60(3)
60(3)
82C54-2
Max
100
DC
ns
25
25
ns
ns
ns
ns
30(3)
50(3)
25
25
50
50
50
50(2)
50(2)
50.
ns
50
ns
40
ns
ns
ns
150
100
100
120
0
-5
55
50
0
55
-5
40
240
40
260
-40
45
Units
Mln
-40
ns
ns
ns
ns
ns
NOTES:
2' ln Modes 1 and 5 trigg€rsare sampledon each risingclock edge. A second
triggerwithin .t20 ns (70 ns for the g2c54-2'
of the risingclock edge may not be det€cted.
3' Low'goingglitchesthat violatetpwx, tpwt may cause errorsrequiring
count€rreprogramming.
4. Exceptror Exrendedremp., see enendb? Tehp. A.c. ctraraa6risiicsolro*.
5. Samplednot 100o/otested.T1 : 25.C.
6' It cLK presentat rvvg min lhen count equalsN+2 cLK pulses,Tryg max
equalscounl N+1 cLK pulse.Twc min to
Tryg max, count will be either N * 1 or N + 2 CLK Dulses.
7' ln Modes 1 and 5, if GATE is presentwhen wriiing a new count value,
al Tyy6 min counter will not be triggered,at Try6
max Counterwill be triggered.
8' lf cLK presentwhen writing a counter Latch or ReadBackcommand,
at Tq min cLK will be reflectedin counl value
latched,at T61 max cLK will not be reflectedin the counl value latched.writing
a counter Latch or ReadBackcommand
betweenTg; min and Try; max will result in a latchedcount valluewtricnis +
one teast significantbit.
EXTENDED
TEMPERATURE = -40oC to *85oC for ExtendedT
3-97
inbf
2312M-14
c8
IU
lao
On?Arus--29124-',t5
inbf
82C54
CLOCKAND GATE
z'3',t24-17
' Last byt€ ol count
b€ing wdtten
A.C.TESTINGINPUT,OUTPUTWAVEFORM
A.C.TESTINGLOADCIRCUIT
INPUT/OUTPUT
i-i
I
orvrcr
uxom
I
l?rlrll
|-
I
|
*cr'lrcr'
|
I
2'3124/-18
A.C.Testing:InprrtBare d.ivenet 2.4Vlq a loglc,,i " and O,4SV
for.a logic "0." Timingm€asurem€nleare madeat 2,0Vtor a loglc
"1" and 0.8Vtor a logic.,0."
3-99
?
Cs - 150pF
C1 Includeellg capacitance
23124-15
Intel82C55AProgrammable
Peripheral
Interface
DataSheetReprint
intel'
82C55A
INTERFACE
PERIPHERAL
CHMOSPROGRAMMABLE
I Control Word Read.BackCapablllty
I Direct Btt Set/ResetGaPabllitY
. 2.5 mA DC Drlve Gapabilltyon all l/O
Port Outputs
r AvailableIn 4GPin DIP and 44-PlnPLCC
r AvailableIn EXPRESS
- StandardTemperatureRange
- ExtendedTemperatureRange
I Compatlblewlth all Intel and Most
Other MlcroProcessors
r Hlgh Speed,"Zero Walt State"
Operationwlth 8 MHz8086/88and
80186/188
a 24 Programmablel/O Plns
I Low PowerCHMOS
r CompletelyTTL Compatible
CHMOSversionof the industrystandard82554generalpurpos€
The Intel82C55Ais a high-performance,
lt provides
programmable
l/O devicswhichis designedfor usewithall Inteland mostothermicroprocessors.
in
3
major
modes
groups
used
of
operation.
12
programmed
ol
and
in
2
pins
whichmaybe individually
Zq ttO
withthe NMOS8255Aand8255A'5.
The82C55Ais pincompatible
in setsof 4 and I to be inputsor outputs.ln
ln MODE0, eachgroupof 12llo pinsmaybe programmed
4 pinsareused
input
of
or output.3 of the remaining
programmed
8
lines
group
to
have
maybe
MODE1, each
bus configuration.
and intenuptcontrolsignals.MODE2 is a strobedbi-directional
for handshaking
The 82C55Ais fabricatedon Intel'sadvancedCHMOSlll technologywhichprovideslow powerconsumption
equalto or greaterthan the equivalentNMOSproduct.The 82C55Ais availablein 40-pin
with performance
DfPand 44-pinplasticleadedchipcarrier(PLCC)packages.
r e3 i ! 3 r i 3 i 3r :
I.SET
00
ol
02
DJ
!.c
0a
06
0a
o,
7
t
I
t0
It
t2
IJ
la
VC
RSfEE2iREEE
231256-31
231256-1
Flgure 1.82C55ABlock Diagram
231256-2
Figure2.82C55APlnout
Diagramsaro tor pin rot€r€nceonly. Packag€
siz€s ar6 not to scale.
3-124
S.ptcmbci tetT
Ordcr llumb.n 231256{0l
82C55A
Table1. Pln Descrlpilon
Symbol
PAs-o
FE
Pln Number
PLCC
1-4
2-5
Dlp
Type
Nameand Functlon
vo
PORTA, PINS0-3: Lowernibbteof an g-bitdataoutputlatch/
butferandan 8-bitdatainputlatch.
READCONTROL:
Thisinputis towduringCpUreadoperations.
CHIPSELECT:
A lowon thisinputenablesthe82C55Ato
respondto FiEandWF signals.R-DandWRareignored
otherwise.
SystemGround
ADDRESS:
Theseinputsignals,
in conjunction
FE andWF[,
controlthe selectionof oneof thethreeportsor thecontrol
wordregisters.
5
6
I
6
7
I
GND
7
I
Ar-o
8-9
9-10
es
Ar
As
m
0
0
0
1
0
1
1
0
0
0
0
10-13 11,13-15
vo
Pco-g
14-17
16-19
vo
PBo-z
't8-25
t/o
RESET
35
20-22,
24-28
29
30-33,
35-38
39
WR
36
40
37-40
41-44
Vcc
Dz-o
PAt-t
NC
26
27-34
1,12,
23,94
vo
I
vo
F
1
0
0
0
0
1
1
1
InputOperailon(Read)
PortA-DataBus
PortB-DataBus
PortC-DataBus
- DataBus
ControlWord
OutputOplratlon (Wrtte)
0
0
DataBus- PoitA
1
1
0
0
DataBus- PortB
1
0
1
0
0
DataBus- PortC
1
1
1
0
0
DataBus- Control
DisableFunctlon
x
X
X
X
1
DataBus-3-State
X
X
1
1
0
DataBus-3-State
PORTC, PINS4-Z: Uppernibbteof an 8-bitdataoutputlatch/
bufferandan 8-bitdatainputbutfer(noratchfor rnpui).Thisport
canbe dividedintotwo4-bitportsunderthe modecontrol.Each
4-bitportcontainsa 4-bitlatchandit canbe usedfor the control
signaloutputs
andstatussignalinputsin conjunction
withports
A andB.
PORTC, PINS0-3: Lowernibbleof portC.
PORTB, PINS0-Z: An 8-bitdataoutputlatch/butferandan 8bit datainputbutfer.
SYSTEITI
POWER:* 5VpowerSupply.
DATABUS:Bi-directional,
tri-statedatabuslines,connectedto
systemdatabus.
0
0
PCt-c
1
WR
0
1
RESET:A high on this input clears the control registerand atl
ports are set to the input mode.
WRITECONTRO|:Thisinputis towduringCpUwrite
operations.
PORTA, PINS4-7: Uppernibbleof an8_bitdataoutputlatch/
lgttqr andan 8-bitdatainputtatch.
No Connect
intef
82C554
DESCRIPTION
82C55AFUNCTIONAL
General
peripheralinterface
The82C55Ais a programmable
sys'
devicedesignedfor usein lntelmicrocomputer
t€ms.lts functionis that of a generalpurposel/O
componentto interfaceperipheralequipmentto the
microcomputer
systembus.The funclionalconfiguby the system
rationof the 82C55Ais programmed
sottwareso that normallyno externallogicis necsssaryto interfaceperipheraldevicesor structures.
DataBus Buffer
This3-statebidirectionalS-bit
butferis usedto intsrface the 82C55Ato the systemdata bus. Data is
transmittad
or receivedby the butferuponexecution
of inputor outputinstructionsby the CPU.Control
words and statusinformationare also transfened
throughthe databus buffer.
Read/Wrlteand Control Loglc
The functionof this block is to manageall of the
internaland externaltransfersof both Data and
Controlor Statuswords.lt acceptsinputsfrom the
CPUAddressandControlbusses
andin turn,issues
commandsto bothof the ControlGroups.
Group A and Group B Gontrols
The functionalconfigurationof each port is programmedby the systemssoftware.In essence,the
CPU"outputs"a controlwordto the 82C55A.The
controlword containsinlormationsuchas "mode",
"bit s€t", "bit reset", etc., that initializesthe functionalconfiguration
of the 82C55A.
Eachof the Controlblocks(GroupA and GroupB)
accepts"commands"from the Read/WriteControl
Logic,receives"control words" from the internal
to its asdatabusand issuesthe propercommands
sociatedports.
ControlGroupA - PortA andPortG upper(C7-C4)
ControlGroupB - PortB andPortC lower(C3-C0)
The controlword registercan be both writtenand
readas shownin the addressdecodetable in the
pin descriptions.Figure6 showsthe controlword
lormat for both Readand Writeoperations.When
thecontrolwordis read,bit D7willalwaysbe a logic
"1", as thisimpliescontrolwordmodeinformation.
Portg A, B, and G
The82G55Acontainsthree8-bitports(A, B, andC).
All can be configuredin a widevarietyof functional
by the systemsottwarebut eachhas
characteristics
its own specialfeaturesor "personality"to further
enhancethe powerand flexibilityof the 82C55A.
Port A. One 8-bitdata outputlatch/butferand one
8-bit input latch butfer.Both "pull-up'''and "pulldown"bus holddevicesare pres€nton PortA.
Port B. One 8-bit data input/outputlatch/butfer.
Only"pull-up"busholddevicesare presenton Port
B.
Port C. One 8-bitdataoutputlatch/bufferand one
8-bitdata inputbutfer(no latchfor input).This port
can be dividedinto two 4-bit portsunderthe mode
control.Each4-bitport containsa 4-bit latchand it
canbe usedfor the controlsignaloutputsandstatus
withportsA and B. Only
signalinputsin conjunction
"pull-up"bus holddevicesar€ presenton PortG.
for
SeeFigure4 for the bus-holdcircuitconfiguration
PortA, B, andC.
3-126
intef
82C55A
ar.Drttctlilat
oltr
.|a
or Do
t6
ar
atttt
231256-9
Flgure3' 82c55ABlock DlagramShowlngDataBus Bufferand Read/wrlte
controtLogtc
Fu;[o;
RESSI
ilTERTAT
OATA|l{
irTElxAL
OATAOUT
EnEtx t
POFrqC
?IN
NYESIAL
OATA
'NOTE:
wn
Port pins loaded with more than 20 pF capacitanc€may not have
231zfi-4
their rogic level guaranteed following a hardware resel.
Flgure4. Port A, B, C, Bus-holdConllguration
3-127
intef
82C55A
82C55AOPERATIONALDESCRIPTION
c(,i|riolfirno
q
ModeSelectlon
oa
D!
or
Dr
D2
Dl
o!
I
Thereare threebasicmodesof operationthat can
be selectedby the systemsoftware:
Mode0 - Basicinput/output
Mode1 - StrobedInput/ouput
Bus
Mode2 - Bi-directional
Whenthe res€tinputgoes"high"all portswillbe set
to theinputmodewithall24portlinesheldat a logic
"on€" levelby the internalbus hold devices(see
Figure4 Note). Atter the reset is removedthe
82G55Acanremainin the inputmodewithno addirequired.
Thiseliminates
the need
tionalinitialization
for pullupor pulldowndevicesin "all CMOS"designs.Duringthe executionof the systemprogram,
anyof the othermodesmaybe s€lectedby usinga
single output instruction.This allows a single
82C55Ato servicea varietyol peripheraldevices
with a simplesoftwaremaintenance
routine.
I
I
t_
/
oo'"
\
;oirc |lortFl
I . I'{?UT
0. Oulru?
''0i7 3
| . ltl?UT
0. Ot ttUT
xoDEl€tEctlor
0. r,OO:0
I . arool I
/
cnoua
\
troiT c llttEil
l.ll|'W
0.OuTrut
The modesfor PortA and PortB can be separately
defined,whilePortC is dividedinto two portionsas
requiredby the PortA and PortB definitions.
All of
the outputregisters,includingthe statusflip-flops,
will be resetwheneverthe modeis changed.Modes
may be combinedso that theirfunctionaldefinition
can be "tailored"to almostany l/O structure.For
instance;GroupB can be programmed
in Mode0 to
monitorsimpleswitchclosingsor displaycomputational results,Group A could be programmedin
Mode1 to monitora keyboardor tapereaderon an
intenupt-driven
basis.
foir a
t .lt|'lrt
o. Ottlttt
r@E SCLECflOX
O. alOOEO
ot.I|oOE I
lX.mE2
rcOE $' FLAG
| . ACTIVE
231256-6
Flgure6. ModeDetlnltlonFormat
The modedefinitionsand possiblemodecombinationsmayseemconfusingat firstbut attera cursory
reviewof the completedeviceoperationa simple,
logicall/O approachwill surface.The designof the
82C55Ahastakeninto accountthingssuchas efficientPCboardlayout,controlsignaldefinition
vs PC
layoutand completefunctionalflexibilityto support
almostany peripheraldevicewith no extemallogic.
Such designrepresentsthe maximumuse of the
pins.
available
SlngleBlt Sel/Reset Feature
Anyof the eightbits of PortC can be Set or Reset
usinga singleOUTputinstruction.This featurereducessottwarerequirements
in Control-based
applications.
Figure5. BasicModeDefinltionsand Bus
Interface
WhenPortC is beingusedas status/controlforPort
A or B, thesebitscanbe set or r€setby usingthe Bit
Set/Resetoperationjust as if theyweredataoutput
POrts.
3-128
82C5sA
InterruptControl Functlons
oor?notronD
When the 82C55Ais programmedto operatein
mode1 or mode2, controliignatsare providedthat
can be usedas interruptrequ€stinputsto the GpU.
Theinterruptrequestsignals,generated
fromportC,
can be inhibitedor enabledby settingor resetting
the associatedINTEflip-flop,usingthe bit set/reset
functionof portC.
This functionallowsthe Programmer
to disallowor
allowa specificl/O deviceto intem.rpt
the CPUwithout atfectingany otherdevicein the interruptstructure.
INTEflip-flopdefinition:
251256-7
(BIT-SET)-INTE
is SET-lnterruptenabte
(BIT-RESETFINTE
is RESET-lnterrupt
disabte
Flgure7. Blt Set/ResetFormat
Note:
All Mask flip-flopsare automaticallyreset during
modeselectionand deviceReset.
3-129
intef
82C55A
OperatlngModeg
Mode0 (BaslcInput/Output).Thisfunctionalconfigurationprovidessimpleinput and outputop€rationsfor eachof the threeports.No "handshaking"
is required,data is simplywrittento or readfrom a
specifiedport.
Mode0 BasicFunctional
Definitions:
o Two 8-bitportsandtwo 4-hitports.
o Any port can be inputor output.
. Outputsare lalched.
o Inpi.rtsare not latched.
o 16 ditferentInput/Outputconfigurations
are pos.
siblein thisMode.
MODE0 (BAS|C|NPUT)
231256-A
lrlODE0 (BASICOUTPUT)
231256-9
3-130
intef
82C5sA
IIIODE0 Port Dellnltlon
A
B
Da
D3
D1
De
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
1
1
1
0
0
0
1
1
0
1
1
1
0
0
0
0
1
1
0
0
0
0
1
1
1
1
1
1
1
1
1
0
0
0
1
1
1
1
1
1
1
1
1
1
GROUPA
POFTC
POBTA
(UPPER)
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
INPUT
OUTPUT
INPUT
OUTPUT
INPUT
OUTPUT
INPUT
INPUT
OUTPUT
INPUT
OUTPUT
INPUT
OUTPUT
INPUT
OUTPUT
GROUPB
PORTC
PORTB
GOWER)
OUTPUT
OUTPUT
OUTPUT
INPUT
INPUT
OUTPUT
INPUT
INPUT
OUTPUT
OUTPUT
OUTPUT
INPUT
INPUT
OUTPUT
#
0
1
2
3
4
5
6
7
I
9
INPUT
INPUT
OUTPUT
OUTPUT
10
INPUT
OUTPUT
INPUT
OUTPUT
11
INPUT
OUTPUT
OUTPUT
OUTPUT
INPUT
INPUT
INPUT
12
13
0
INPUT
INPUT
INPUT
INPUT
14
INPUT
OUTPUT
1
INPUT
INPUT
15
INPUT
INPUT
MODE0 Conflguratlons
cof{?iot
firaD 12
LO.OrO.OrOz
coa{7eol 80iD -3
Ot
Da
olo
D5
D.
0t0
O!
Dt
o
Or
Oo
I
INPUT
intef
E2C55A
ilODE 0 Conflguratlons(Continued)
coNrnot woBDa
D,
Dc
D3
D.
Dr
D2
Dr
Do
oon?not ioRD 16
cor|rnor fitRD,t
corctnot fitRo a6
coxrFot fi)ao alo
o, D. o, o.
ot
or
Dr
tl0lolrl0lolr
cofrtiot
o,
toRo at
oo
o
Oofrtltol tORD arl
06
03
o.
Dt
o'
0
o
0
I
0
Dr
oo
I
o,
Da
D!
rlol0lr
D.
O!
O,
010
Or
I
Oo
82C55A
ilODE 0 Conflguratonr (Continued)
ooatYlot f,oaD fiz
oo,{tnoLtroeorr.
or%orDrorDtoroo
lorDro.DrDrDroo
rlololrltlolrlo
@ffrtoL tfotDttt
%tDrDrDrDrOrOo
Operatlng llodct
IIODE 1 (Strobed Inptrt/Output).This functional
contiguration
providesa meanafor transfeningl/O
rlQ to or from a specifiedport in conjunctionwith
strob€sor "handshaking"
signals.In m6de1, portA
and Port B use the lineson port C to generateor
acceptthese"handshaking"signals.
Mode1 BasicfunctionalDefinitions:
o Two Groups(GroupA and GroupB).
.
F?ghgroupcontainsone 8-bitdataportand one
4-bit control/datraport.
.
fhg 8-bitdata port can be eitherinputor output
Bothinputsand ouputs are latched.
o The4-bitportis usedfor controlandstatusof the
8-bitdatraport.
3-133
int€f
82C554
lnput Control SlgnalDellnltlon
STE (Strole Input). A "low" on this input loads
dataintothe inputlatch.
ooxtior woto
f!:
IBF (lnput Bufler Full F/F)
ffi^
t!?^
A "high" on this outputindicatesthat the data has
beenloadedintothe inputlatch;in 6ssence,an acknowledgement.
IBF is set by STE ingt beinglow
and is resetby the risingedgeof the RD input.
|l{tn^
t/o
INTR(lntenupt Fequest)
sc
A "high" on this outputcan be usedto interuptthe
GPUwhen an input deviceis requestingservice.
INTRis set by the STBis a "on6", IBFis a "one"
and INTEis a "one". lt is resetby the fallingedgeof
RD-.This procedureallowsan input deviceto request servicefrom the CPUby simplystrobingits
dataintothe port.
INTEA
Controlledby bit set/resetof PCa.
INTEB
Gontrolledby bit set/resetof PC2.
oofJttol
I coirll
f,oto
r--.1
I lljtc I
!!!
.23r256-13
Flgure8. lrlODEI Input
It
fl?i
E
rurtro-
Ei|lfiIAL
- -
2312ft-14
Flgure9.llODE 1 (StrobedInput)
3-134
intef
82C55A
OutputControlSlgnalDeflnlilon
OEFlOutpurBuftcrFu[ F/F).The6BF outputwil
go "low" to indicatethat the CPUhas writtendata
out to the specifiedport.The ffi f n wiil be set bv
the risingedgeof the WF inputand resetby ffi
Inputbeinglow.
oiltiottlotD
dl^
r--.r
I ltrl
lAl
I
E^
FR (lctnowledge Input). A "low" on this input
informsthe 82C55Athatthe datafromportA or port
B hasbeenacceptsd.In essenc€,a responsefrom
the peripheraldeviceindicatingthat it has received
the dataoutputby the cPU.
INTR(lnterruptRequest).A "high','onthis output
can be usedto intenuptthe CpU when an output
devicehas accepteddata transmittedbv the CpU.
INTRis set whenAffi is a ,,on€",6EF-isa ,,on€"
gl INTEis a "on€". lt is resetby the fallingedgeof
lffie
mE
oof{ttol
I FOtt]
toRD
ilh
wR.
eh
ITiITE
A
Gontrolled
by bit set/resetof pG5.
INTEB
Controlledby bit set/resetof pC2.
Itfrq
231256-r5
Flgurel0.llODE I Outpur
231256-16
Flgurc 11.IIODE 1 (StrobcdOutput)
3-135
82C55A
Comblnatloneof IIODE I
PortA andPortB cbnbe individually
definedas inputor outputin Mode1 to supporta widevarietyof strobed
l/O applications.
fiF^
I!-xe
c(xlnolsoio
coillFot
fitiD
lf{Ti^
to
dFr
sfE
lcx.
llfr
tNlnr
ntTir
tolT A - tstaotED rirPUTl
roi? I - (sttoSEo outaJ?t
roFTA-(STiO8€OOurrutl
ioBTt-(stnoffonrfurl
231256-17
Flgure12.Comblnatlons
of ilODE 1
OperatlngModes
Output Operatlons
MODE 2 (Strobed Bidlrectlonal Bus l/O).This
providesa meansfor comfunctionalconfiguration
municating
witha peripheral
deviceor structureon a
single8-bit bus for both transmittingand receiving
data(bidirectional
bus l/O). "Handshaking"
signals
areprovidedto maintainproperbusflowdisciplinein
a similarmannerto MODE1. Intenuptgeneration
and enable/disable
functionsare alsoavailable.
OEF (Output Buffer Full).The 6EF outputwitt9o
"lovv"to indicatethat the CPUhaswrittendata out
to portA.
MODE2 BasicFunctionalDefinitions:
. Usedin GroupA only.
o One8-bit,bi-directional
busport(PortA) anda 5bit controlport (PortG).
o Bothinputsand outputsare latched.
o The S-bitcontrolport (PortC) is usedfoi control
and status for the 8-bit, bi-directionalbus port
(PortA).
BldirectionalBus l/O ControlSignalDefinltlon
INTR(lnterruptRequest).A highon thisoutputcan
be usedto interrupt
theCPUfor inputor outputoperations.
ffi (ncmowbdge). A "low" on this inputenables
the tri-stateoutputbutfer of Port A to send out the
data.Otherwise,
the outputbuflerwill be in the high
impedancestate.
INTE I (The INTE Fllp-Flop Assoclated wlth
OBF).Controlledby bit set/resetof PC6.
Input Operatlons
SF lStroUe Input). A "low" on this input loads
dataintothe inputlatch.
IBF(lnputBuffer FullF/F).A "high"on thisoutput
indicatesthat data has been loadedinto the input
latch.
INTE2 (The INTEFlip-FlopAssoclatedwtth tBF).
Gontrolledby bit set/resetof PCa.
3-136
intef
82C55A
ooiftiol
fitiD
qD.orD,
dF^
Ero
I . ltltuT
O.OUT?I,I
ffi^
x)fit E
l - ltruT
0 - OUttUT
cnottErooE
0 - 'IOOE0
I .l,lOOE I
231256-18
Flgure13.ItlODE
ControlWord
231256-19
Flguru1{.llODE 2
o tat'H
crutoatcra
FI
ill
rittR
tEf
lrt
IBF
?ENI'|ICBAL
31,s
io
DA?A IiOI
'ln'|lGialTOaacaa
oAtAttor
epaa ro;Eil,'rcu!
Figure15.MODE2 (Btdtrectionat)
NOTE:
ispermissibre.
:'rgff'3flh+fl8ffi*1":'Hl'o'"ffi
til+ff:?JP".ffi^Ttffi
3-137
intel
82C55A
MOO€2 AND MODEO IOUTPUTI
MOOE 2 AND MOOE O {IfIIPUTI
rcr
r+rt
6f.
rc?
-i^
rq
Fr^
m^
rca
fri^
|!;a
fcr
tlfr
tQo
tro
IFr^
OOIJTROL fiOND
4Dr\D.DrOrOrDo
4Dr%D.OrD2DrOo
r/o
rar+'lo
MOOE2 ANOMOOEI IOUTPUTI
MOOE2 AND MOOEI IINPUTI
rc!
r.Trt
tc:
6-F^
rc'
oa-F^
tcr
iG-rr
rct
lc-I^
tc.
m^
,rCa
ffi^
rq
lFe
q
tlt
'trrh
lG1
rt'rq
6-Fr
t%
4
ef"
RD
fct
tltr
tfltBa
ii
r%
ilrrr
Figure16.MODE/4 Combinatlons
3-138
irfief
82C55A
ModeDeflnltlonSummary
MODEO
MODE1
MODE2
IN
OUT
IN
ouT
PAo
PAr
PAz
PAs
P&
PAs
PAo
PAz
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
1N
IN
1N
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
PBo
PBr
PBe
PBg
PBa
PBs
PBs
PBz
1N
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
1N
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
Pco
PCr
PCz
PCs
PCe
PCs
PCo
PCz
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
GROUPA ONLY
<--.it
MODEO
OH MODE1
ONLY
vo
INTRg INTRs
lBFs GFs
Affis
ffia
INTRl INTRa
t/o
llo
INTRI
srEA alo
lBFa vo
l to
VO
sIBl
lBFa
Iffia
OtsF-a
TfKA
6EFa
SpeclalModeComblnatlonConslderailons
Thereare severalcombinations
of modespossible.
For anycombination,
someor all of the PortC lines
areusedfor controlor status.Theremaining
bitsare
eitherinputsor outputsas definedby a "Set Mod6"
command.
Duringa readof PortC, the stat€of all the port C
lines,exceptthe Affi and SE lines,will be placed
on the data bus. In placeof the Affi and ffi line
states,flag statuswill appearon the databusin the
PC2,PC/, and PCObit positionsas illustratedby
Figure18.
Througha "WritePortG" command,
onlythe PortC
pinsprogrammed
as outputsin a Mode0 groupcan
be written.No otherpinscanbe atfectedby a "Write
PortC" command,norcanthe interruptenableflags
be accessed.To write to any Port C output programmedas an outputin a Mode 1 groupor to
changean int€rruptenableflag,the "Set/ResetPort
C Bit" commandmustbe used.
Witha "Set/ResetPortC Bit" command,anyPortC
lineplggrammed
as an output(including
|NTR,tBF
and OBF)can be written,or an interuptenableflag
can be €ithers€t or reset.PortC linesproqrammed
as inputs,inctudingAffi and SfB linei, aJsociated
with PortG are not atfectedby a "Set/ResetPortC
Bit" command.Writing1]g
the conesponding
PortC
bit positionsof the fiffi and SE'finei iritn tn"
"Set/Reset Port C Bit" commandwill atfect the
GroupA andGroupB interrupt
enableflags,as illus.
tratedin Figure18.
GurrentDrlve Capabltlty
Anyoutputon PortA, B or C can sinkor source2.S
mA.Thisfeatureallowsthe 82Cf5Ato direcilydrive
Darlingtonbpe driv€rs and high-voltagedisplays
that requiresuchsinkor sourcecurrent.
3-139
82C55A
ReadlngPort G Status
In Mode0, PortC transfersdatato or fromthe peWhenthe82C554is programmed
to
ripheraldevice.
functionin Modes1 or 2, Port C generatesor acsignalswiththe peripheral
decepts"hand-shaking"
vice.Readingthe contentsof PortC allowsthe programmerto test or verifythe "status" of each peripheraldeviceand changethe programflow accordingly.
Thereis no specialinstructionto readthe statusinformationfrom PortC. A normalread operationof
PortC is executedto performthis function.
II{PUTCONFIGURATION
D5
D3
D2
Da
D1
D7 D5
t/o vo
lBFl
INTEI INTRI INTEs lBFs INTR6
GROUPA
D7
D6
GROUPB
OUTPUTCONFIGURATIONS
D2
D5 D5 Da D3
D1
GROUPA
D6
GROUPB
Figure17a.MODEI StatusWordFormat
D?
D5
D5
Da
D3
D2
D1
De
GROUPA
GROUPB
(D€fn€dByMode0 or ModeI Sel€ction)
Figure17b.iIODE 2 StatusWord Format
Interrupt Enable Flaq
INTEB
INTEA2
INTEA1
Poeltlon
AlternatePort C PlnSlgnal(llode)
PC2
Affie (OutputMode1)orSTEe(lnputMode1)
PC4
STEa(lnputMode1 or Mode2)
PC6
ffia (OutoutMode'l or Mode2
Flgure18.InterruptEnableFlagsln ilodes 1 and 2
3-140
inbf
82C55A
ABSOLUTEMAXIMUMRATINGS*
Ambient
Temperature
UnderBias.. . .0'C to + 70"C
StorageTemperature ... - 65'Cto+ 150'C
- 0.5to + 8.0V
SupplyVoltage
OperatingVoltage
.....+ 4Vto + 7V
Voltageon anyInput..
. .GND-2V to + 6.5V
Voltageon anyOuput . .GND-0.5Vto V66 + O.sV
PowerDissipation
1 Watt
'Notice: Sfressasabove those listed under 'Absolute MaximumRatings"maycausepermanentdamage to the device. Thisis a stress rating only and
functionaloperationof the deuicedt these or any
otherconditionsabovethoseindicatedin thd operationalsectionsof thisspecificationis not imptied.Exposure to absolutemaximumrating cbnditionsfor
ertendedperiodsmayaffect devicereliability.
D.C. CHARACTERISTICS
T n = O G t o 7 0 " C , V C C :* 5 V X l O o / o , G N D : 0 V f f n : - 4 0 ' C t o * S 5 . C f o r E x t e n d e d T e m p e r t u r e )
Symbol
Parameter
Mln
Max
Unlts
TestCondltlons
0
.
5
vr
InputLowVoltage
0.8
V
Vrx
Vor
Vox
OutputLowVoltage
OutputHighVoltage
It
InputLeakageCunent
lopl
OutputFloatLeakageGunent
lolR
Darlington
DriveCunent
lpxt
InputHighVoltage
2.0
Vcc
V
0.4
V
lgg : 2.5 mA
V
V
l o H : -2.5 mA
loH - -100 pA
t1
pA
Vlx : V66to0V
(Note1)
r10
pA
V1x : V66 to 0V
(Note 2)
t2.5
(Note4)
mA
PortsA, B, C
R61 = 500O
Vs1 : 1.7V
PortHoldLowLeakageCunent
+50
+300
pA
Vow = 1.ov
lpxx
PortHoldHighLeakageCunent
-50
-300
lpxlo
-350
pA
Vggry: 0.8V
Inrno
PortHoldLowOverdriveCunent
PortHoldHighOverdriveCunent
+350
pA
VOUT:3.0V
166
Vg6SupplyCunent
10
mA
lccsa
V6s SupplyCunent-Standby
10
pA
(Note3)
V69 : 5.5V
Vtru: VCCor GND
PortConditions
Itl/P : Open/High
OlP : OpenOnly
WithDataBus :
High/Low
6:
High
Reset: Low
PureInputs:
Low/High
3.0
V66 - 0.4
PortA only
pA
vow = 3.ov
PortsA, B, C
ilOTES:
1. Pins41,Ao,6, WF',F'0,Reset.
3. Outputsop€n.
4. Limitoutpulcun€ntto 4.0 mA.
3-141
intef
82C55A
CAPACITANCE
Tq : 25"G,Vgg :Q|lP
- 9Y
GrH
lnputCapacitance
10
Unlts
pF
cvo
!/O Capacitance
20
pF
Parameter
Symbol
l/lax
Mln
Test Condltlons
plns
Unmeasured
returnedto GND
lc : 1 MHz(s)
NOTE:
5. Samplednot 10006test€d.
A.C. CHARACTERISTICS
TA : 0oto 70'C,Vcc : +5V t10o/o,GND : 0V
TA : -40'C to +85'C for ExtendedTemperature
BUS PARAMETERS
READ CYCLE
Symbol
82C554.2
Parameter
llln
tnn
AddressStableBeforeF-DJ
0
tRa
AddressHoldTimeAtterF'D1
0
tnn
RDPutseWidtn
tRo
DataDelayfromFEJ
tor
tnv
HDt to DatraFloating
10
RecoveryTimebatweenHE/WH
200
Unlts
tar
150
120
75
Tert
Condltlons
ns
ns
ns
ns
ns
ns
WRITECYCLE
Symbol
82C55A-2
Parametcr
tln
tar
Unlte
tew
AddressStableBeforeWFIJ,
0
ns
twe
AddressHoldTimeAfterWF 1
20
ns
ns
ns
ns
ns
ns
20
tww
tow
two
WF Pulsewidth
100
DataSetupTimeBeforeWFif
100
DataHoldTimeAfterWF f
30
30
3-142
Tcet
Gondltlonr
PortsA & B
PortC
PortsA & B
PortC
intef
82C55A
OTHERTITII{GS
Symbol
82C55A-2
Parameter
Mln
ilar
Unlts
Gondltlons
tws
tn
tnn
tnx
0
ns
ns
ns
7ffi Pubewidrh
200
ns
tsr
SfB PulseWidth
100
tps
20
tpx
Per.DataBeforeSffi Xigfr
Per.DataAtterSTBHign
teo
Iffi:
txo
Fffi : 1 to OutputFloat
twog
W F i : l to OE F : O
Affi:0toOBF:1
150
SfB:0tolBF-1
150
R-D:'ltolBF:0
HD : OtoINTR: 0
STE:lto|NTR:1
150
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tnog
lsre
tnra
tnr
tgr
tnn
twr
tnes
W'F i :l to Ou tp u t
Peripheral
DataBeforeH-D
Peripheral
DataAtterRD-
350
0
50
't75
OtoOutput
20
150
200
150
Fffi:lto|NTR:1
WFi: OtoINTR: 0
Reset PulseWidth
250
150
200
500
Test
se€ note 1
s€enot€2
}IOTE:
1. INTRf mayoccuras eartyas WFJ .
2' Pulsewidthof initiatResetpulseafter poweron mustbe at least50 pSec. SubseguentResetpulsesmay be 5111)
ng
minimum.
3-143
82C554
WAVEFORMS
moDEo (BAslc lNPl,tT)
281zft-u2
roDE o (BASTC
OUTPUT)
",31zft-2s
-4+<s-'
3-144
WAVEFORMS(continued)
iloDE 1 (STROBED
TNPUT)
m
t!F
tf,tl
l-D
rpu? itil
tEirttlEial
231256,-24
iloDE r (STROBEDOUTPUT)
82C55A
WAVEFORMS(continued)
lroDE2 (BIDIRECTTONAL)
231256-26
lloto:
Any-eequence
U€re fiElqcurs b€for€ffi nNo_srE @cursbeforeFE is permissible.
(INTR= IBFo FFffi. SF6. FD + OEF. [[ASRo fif;( o ffi;
WRITETIMING
READTIMING
231256-27
A.C.TESTINGINPUT,OUTPUTWAVEFORM
"31256-28
A.C.TESTINGLOADCIRCUIT
Ytrr'
1e.uP
I
231256-29
231256-30
'VgXr ls S€t At Variqrs VottagesDuringTesting
To Gurantee
Th€ Specificetion.Cs InctudesJig Capacilance.
AC. Toting lnputs Are DrivenAt 2AV Fot A Logic 1 And 0.45V
For A Lggic 0 Timing Measur€nents Are Made At z.OV For A
Logic 1 And 0.8 For A Logic 0.
3.146
APPENDIX D
CONFIGURING THE 12OO
FOR SIGNAL*MATH
Jumper and SwitchSettings
WhenrunningSIGNAL*MATH, you may haveto changesomeof the 1200'son-boardjumpen from their
factory-setpositions.BeforeusingSIGNAL*MATH on the 1200board,checkthefollowing switchandjumpers:
. Sl * Baseaddress
cll *8254 timerlcounterI/O configuration
. P8 - Interrupts
Theboardlayoutis shownin FigureD-1.
tE$
llolY'lo
@
ilgl'lig
)3LJ3
tt*
h!
ffi
oo
oooo
oooooo
OO! OO
ooorc, oo
oooooo
oooo
oooooo
oooooooo
oo
oo
Otrr
OO
oo
oo
gg 82css 9q
oooooooo
oooooo
ooooooo
ooooooa'
7
soo0000000\7tro(
6hEUI
o(ED
R.al ]im. O€vics, IrF. St t Cdt.g.,
pA l6!Oa t SA
@
Fig. D-1 -
1200 BoardLayout
51- BaseAddress
SIGNAL*MATH assumes
thatfte baseaddressof your 1200is thefactorysetringof 300 hex (768decimal).If
you changethis setting,you must run the ADAINST programandresetthebaseaddress.
NOTE: WhenusingtheADAINST program,you canenterthebaseaddressin decimalor hexadecimal
notation.Whenenteringa hex value,you mustprecedethenumberby a dollar sign(for example,$300).
D-3
W -8254 Timer/CounterUO Configuration
The 8254mustbe configuredwitlt thetiree jumpersplacedbetweenthepins asshownin FigureD-2. This
configurationis thesameasthefactorysetting.After settingthejumpers,verify thateachis in theproperlocation.
Any remainingjumpersmustbe removedfrom theP7 headerconnector.
P7
XTAL
;l
EC1
:l
oTl
XTAL
H
EC2
PCK
I
ET
Fig. D-2 -8254 Timer/CounterClock SourceJumpers,P7
P8 - Interrupts
To selectan IRQ channelandan intemrptsoruce,you mustinstallthreejumperson this headerconnector.To
configurethis headerfor SIGNAL*MATH, placeonejumperacrossthepins of your desiredIRQ channel,placethe
secondjumperacrossthepins labeledEOC,andplacethirdjumperacrossthepins labeledG. Makecertainthat
thereareno otherjumperson this connector.Also, makesurethattheIRQ channelyou haveselectedis not usedby
any otherdevicein your system.FigureD-3 showsyou how to configureP8 for IRQ channel3.
P8
oT2
ET
EOC
DMA
IRQT
IHQ6
IRQs
IRQ4
IRQ3
IRQ2
p8
Fig.D-3- Interrupts
and InterruptChannelJumpers,
D-4
RunningADAINST
After thejumpersandswitcharesetandthe 1200boardis installedin ttrecomputer,you arereadyto configure
SIGNAL*MATH so thatit is compatiblewith your board'ssettings.This is doneby runningthe ADAINST driver
installationprogram.After runningtheprogram,openADA1200.EXEfrom the OpenaFile menu.You will seea
screensimilarto thescreenshownin FigureD4 below.The factorydefaultsettingsareshownin theillusration.
Your settingsmay or may not matchthedefaultsettings,dependingon whetheryou havemadechangesto these
settingsbefore.
BaseAddress. Theboard'sbaseaddresssettingis enteredin theupperright block,as shownin thediagram.
The factory settingfor all Real Time Devicesboardsis 300 hex (768 decimal).The baseaddresscanbe enteredasa
decimalor hexadecimal
value(hexvaluesmustbe precededby a dollarsign (for example,$300)).Referto your
board'smanualif you needhelpin determiningthecorrectvalueto enter.
EOC IT (End-of-ConvertInterrupt). In this block,entertheIRQ channelnumberwhich corresponds
to your
jumpersettingon P8.
Timer IT (Timer/CounterInterrupt). This block is not usedon the 1200,andshouldbe left blank.
LabTech Sw IT (LABTECH NOTEBOOK SoftwareInterrupt). This setsthe softwareintemrptaddress
whereLABTECH NOTEBOOK'slabLINX driveris installed.The factorysettingis $60.This settingcanbe
ignoredwhenrunningSIGNAL*MATH.
AID Parameters.Six A/D boardparameters
arelisted:resolution,numberof channels,activeDMA channel,
gain,loss,andinput voltagepolarity.
Resolutionandnumberof channelsarefixed by theprogramfor your board.
End-of-Convert
lnterrupt
Channel
Timer/Counter
Interrupt
Channel
BaseAddress
Sottware
Intenupt
Address
A/D DMA
Channel
Select:
External
Gain
& Loss
D/A DMA
Channel
Select;
ExternalGain
& Loss
A/D Unipolar/
Bipolar
Select
D/AUnipolar/
Bipolar
Select
Fig.D-4- ADAINST.EXE
Screen
D-5
If you areusingDMA Eansfer,you mustenterthechannelnumberwhich conespondsto thejumper settingsin
theDMA channelblock.Valid channelsnumbersare I and3.
The nexttwo blocks,gainandloss,areprovidedso thatyou canmakeadjustments
for externalgain or loss,
gainsettingsavailableon theboard.If your input signalis externallyattenuated,
other than theprogrammable
then
you canadjustfor this by settinga valueotherthanI for loss.Ifyou havean externalgain factor,thenyou can
adjustfor this condition.Numbersmustbe enteredaswholedecimalvalues.The factorydefaultsettingfor gain and
lossis 1.
For a bipolarinput range,an X shouldbe placedbeforeBipolaron the screen(defaultsetting).For unipolar
operation,removetheX.
D/A Parameters(ADA1200Only). Six D/A boardparameters
arelisted:resolution,numberof channels,
activeDMA channel,gain,loss,andinput voltagepolarity.Resolutionandnumberof channelsarefixed. For the
ADAI200, DMA is not usedandshouldbe left blank. Gainandlossareprovidedso thatyou canmakeadjustments
for externalgain or loss,asdescribedabovefor theA/D parameters.
For a bipolaroutputrange,an X shouldbe
placedbeforeBipolaron the screen(defaultsetting).For unipolaroperation,removetheX.
D-6
APPENDIXE
CONFIGURING THE 12OO
FOR ATLANTIS
E-l
E-2
If you havepurchasedATLANTIS dataacquisitionandreal time monitoring applicationsoftwarefor your
1200,pleasenote that the ATLANTIS drivers for your boardmustbe loadedfrom your examplesoftwaredisk into
thesamedirectoryasthe ATLANTIS.EXEprogmm.WhenrunningATLANTIS, you mustchangesomeof the
1200'son-boardjumpersfrom ttreirfactory-setpositions.BeforeusingATLANTIS on the 1200board,checkthe
followingswitchandjumpers:
. Sl - Baseaddress
. P7 - 8254 timeilcounterI/O configuration
. P8- Interrupts
FigureE-l showstheboardlayout.
Eg
uFlfrs
ofYloltl' l l
.l-1.ooo oo oo oo oo oo
t_t r-
"I
3u3
*.*.
,
o-6t1o-666'
l?;'^tri1,',s
I
i GONTRO SYSEM
ro\7troooooo
oooo
oooooo
OOr OO
o osrce o o
ooooooooo
oooooo
oooo
oooooo
oooooooo
oo
oo
oor
oo
*"* 33
33
oooooooo
oooooo
rcb.ab .&
Rqel lin!
Oa/i6.
lm. Sblc Cdt.g.,
PA r38oa IJSA
Fig.E-1- 1200BoardLayout
51- BaseAddress
ATLANTIS assumes
thatthe baseaddressof your 1200is the factoryseuingof 300 hex (seeChapterl). If you
changedthis setting,you must run theATINST programandresetthebaseaddress.
NOTE: The ATINST progmmrequiresthebaseaddressto be enteredin decimalnotation.
P7 - 8254Timer/CounterVO Configuration
The 8254mustbe configuredwittr thethreejumpersplacedbetweenthepins asshownin FigureE-2. This
configurationis the sameasthe factorysetting.After settingthejumpers,verify thateachis in theprroperlocation.
Any remainingjumpersmustberemovedfrom theP7 headerconnector.
E-3
P7
Y
XTAL
o
EC1
N
Y
o
rH
orl
XTAL
EC2
PCK
XTRIG
p7
Fig.E-2- 8254Timer/Counter
ClockSource
Jumpers,
P8 - Interrupts
To selectan IRQ channelandan intemrptsource,you mustinstallthreejumperson ttrisheaderconnector.To
configurethis headerfor ATLANTIS, placeonejumperacrossthepinsof your desiredIRQ channel,placethe
secondjumperacrossthepins labeledOT2,andplacethirdjumperacrossthepins labeledG. Ivfakecertainthatthere
areno otherjumperson this connector.Also, makesurethatttreIRQ channelyou haveselectedis not usedby any
otherdevicein your system.FigureE-3 showsyou how to configureP8 for IRQ channel3.
P8
oT2
EOC
DMA
IRQT
IRQ6
IRQs
IRQ4
IRQ3
IRQ2
G
pg
Fig.E-3- lnterrupts
andInterrupt
ChannelJumpers,
APPENDIXF
WARRANTY
F-1
LIMITED WARRANTY
Real Time Devices,Inc. warrantsthe hardwareandsoftwareproductsit manufacturesandproducesto be free
from defectsin materialsandworkmanshipfor oneyeiu following thedateof shipmentfrom REAL TIME DEVICES.This warrantyis limited to theoriginalpurchaserof productandis not Eansferable.
During theoneyearwarrantyperiod,REAL TIME DEVICESwill repairor replace,atits option,anydefective
productsor partsat no additionalcharge,providedthattheproductis returned,shippingprepaid,to REAL TIME
DEVICES.All replacedpartsandproductsbecomettrepropertyof REAL TIME DEVICES.Before returning any
product for repair, customersare required to contactthe factory for an RMA number.
THIS LIMITED WARRANTY DOESNOT EXTEND TO AT.IYPRODUCTSWHICH HAVE BEEN DAMAGED AS A RESULTOF ACCIDENT,MISUSE,ABUSE (suchas:useof incorrectinput voltages,improperor
insufficientventilation,failureto follow the operatinginstructionsthatareprovidedby REAL TIME DEVICES,
"actsof God" or othercontingencies
beyondthecontrolof REAL TIME DEVICES),OR AS A RESULTOF
SERVICEOR MODIFICATION BY ANYONE OTI{ER THAN REAL TIME DEVICES.EXCEPTAS EXPRESSLYSETFORTH ABOVE, NO OTIIER WARRANTIESARE EXPRESSEDOR IMPLIED,INCLUDING,
BUT NOT LIMITED TO, ANY IMPLIED WARRANTMS OF MERCHANTABILITY AND FITNESSFOR A
PARTICULARPURPOSE,AND REAL TIME DEVICESEXPRESSLYDISCLAIMS ALL WARRANTIESNOT
STATED I{EREIN. ALL IMPLIED WARRANTIES,INCLUDINGIMPLIED WARRANTIESFOR
MECHANTABILITY AND FITNESSFOR A PARTICULARPURPOSE,ARE LIMITED TO TIIE DURATION
OF THIS WARRANTY. IN TI{E EVENT TI{E PRODUCTIS NOT FREEFROM DEFECTSAS WARRAN].ED
ABOVE, THE PURCHASER'SSOLEREMEDY SHALL BE REPAIROR REPLACEMENTAS PROVIDED
ABOVE. T]NDERNO CIRCUMSTANCESWILL REAL TIME DEVICESBE LIABLE TO TIIE PURCHASER
OR ANY USERFOR ANY DAMAGES,INCLUDING AI\ry INCIDENTAL OR CONSEQUENTIALDAMAGES,EXPENSES,LOST PROFITS,LOST SAVINGS,OR OTHERDAMAGES ARISING OUT OF TIIE USE
OR INABILITY TO USE TIIE PRODUCT.
SOMESTATESDO NOT ALLOW TIIE EXCLUSIONOR LIMITATION OFINCIDENTAL OR CONSEQUENTIAL DAMAGES FOR CONSUMERPRODUCTS,AND SOMESTATESDO NOT ALLOW LIMITATIONS ON HOW LONC AN IMPLIED WARRANTY LASTS,SO THE ABOVE LIMITATIONS OR EXCLUSIONSMAY NOIAPPLY TO YOU.
THIS WARRANTY GIVES YOU SPECIFICLEGAL RIG}ITS,AND YOU MAY ALSO HAVE OTHER
RIGHTSWHICH VARY FROM STATE TO STATE.
F-3
AD1200/ADAI
200UserSettings
Basel/OAddress:
(hex)
IRQChannel:
DMAChannel:
(decimal)