Resume'
Name: Avik Bhattacharya
Phone No: 033-23341729 .
Mobile: 91-9959200112(M)
e-mail Id: avik_iitkgp@yahoo.co.in
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Contact Address: BH-193 ,
Salt Lake City
Kolkata
West Bengal
700091
OBJECTIVE:
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To achieve my full potential as an Electrical Engineer by working with a reputed engineering
firm in a challenging environment and to achieve new goals as a technical professional.
Present Designation: Senior Design Engineer –System Integration
Name of the Company: Solar Semiconductor
Present package: 10.5 lakh(CTC)
Job Responsibility:
1. Introduce stage gate approach for new product development.
2. Vendor development for existing and new product development.
3. Value addition of existing product.
4. Co-ordinate with business leads for making technical proposals and tenders.
5. Scheduling and monitoring of execution plan for existing projects.
New product development: Smart Balance for solar charge controller.
Project in hand:
The smart balance is an innovative solution to long standing problems with solar
arrays and their design. Real-world problems lead to mismatch in solar systems,
significantly reducing the power output of an array. The smart balance can recoup up
to 71 percent of power lost to mismatch – regardless of cell technology – giving
installation owners more predictable power output and increased return on
investment.
Reporting: Reporting to VP of R/D &SI
Academic Qualification:
EDUCATION:
• Ph. D. (Engineering) Submitted thesis from the Dept. of Electrical Engineering, Indian
Institute of Technology Kharagpur ,
Date of Enrollment: 24 july 2006
Submitted Thesis on June 2010.
Date of Defense: December 2010
•
B. E. (Electrical Engineering) from Sikkim Manipal University in 2001; Aggregate : 68%
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Higher Secondary (10+2) Examination.
Name of Board: West Bengal council of Higher Secondary Education.
Year of Completion/Pass out: 1996
Percentage: 60%.
•
Secondary Examination (10 std).
Name of Board: West Bengal Board of Secondary Education.
Year of Completion/Pass out: 1994
Percentage: 72%.
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M. Tech (Electrical Engineering) with specialization in Power Electronics and Machine
Drives, from Indian Institute of Technology, Kharagpur, 2005; CGPA: 7.3
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Previous Working Experience: Worked as a Development Engineer in
a Power
Electronics (UPS Manufacturing company) namely Epoch Marketing (Pvt) Ltd from July 2001
to june 2003. Again join the company on june-2005 and served till july-2006. Responsibility
involves design and implementation power electronics equipment (e.g. UPS) to provide technical
edge of the company over its competitor in highly competitive Power electronics Market.
Previous Job Profile: Job responsibility involved design of PFC converters, Inverters, Devices,
Gate Drive design Magnetics Design- Low and High Frequency Transformers, Inductors, CTs,
PT, Digital circuit design, Analog circuit design, ADC, DACs, OPamps etc
and microcontroller and DSP.
Previous Employer & Location: Epoch Marketing Ltd
66Salkia Road, ' AAVVS '
B-Block, Dist: Hawrah
West Bengal
Pin:711106
Phone:91-33-2665-1551.
Previous Designation: Senior Development Engineer
Company Profile: Epoch is a professionally managed ISO 9001 Certified power electronics
company in eastern region. EPOCH manufactures products ranges like ONLINE & LINE
INTERACTIVE UPS, Inverters, Servo Controlled Voltage Stabilisers and Float cum Boost
Charger to support the electronic industry.
Software Skill:
Operating System: Microsoft 98 to Microsoft XP
Software Language: C, C++.
Application Software(Simulation): PSPICE, MATLAB(simulink).
Assembly Language: 8085.Pic microcontroller(RISC).
Embedded system: Dsp TMS320F240 processor.
Details of Projects:
1.
Power Factor Correction Technique: Designed and implemented UPS with Power factor
Correction Techniques.
Synopsis of this Projects: Power factor correction Technique of line voltage was implemented
UC 3854. First phase of this topology is a rectifier followed by a boost converter. The Circuit
function by monitoring the input full-wave rectified line voltage as well as the output voltage.
The two feedback signals are combined to modulate the average input current waveform in
accordance with the rectified line voltage, while regulating the output over line and load
variation.
Tenure of Project: 2002 - 2003.
Project was successfully completed and UPS up to 6KVA was implemented with PFC feature.
Later this topology was designed with chip IR1150, which doesn’t require input current sensing.
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2.
Voltage Conversion With Maximum Power Tracking Of Solar Panel.
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Synopsis of MPPT: The maximum Power Tracker is a special form of buck/boost, sometimes
buck only, Power converter designed to deliver the maximum possible power to a load or storage
battery, from limited input power sources. The Project was under taken an improved MPPT
control method for dual modules .In this method, the voltage and current information of each
module are shared and utilized for the detection of MPPT Without measuring power.
Tenure of Project: June 2005 to june2006.
ACADEMIC PROJECTS:
• Ph. D Thesis: The research work aims to develop new reference generation scheme for shunt
active power filter. The shunt active power filter is employed to mitigate current harmonics
present source current. This current harmonics arise in to the source current, due to the
increasing use of non-linear load namely Adjustable Speed Drives (ASD), Arc Furnace,
SMPS, UPS etc. Harmonics not only increase the losses in the system but also produce
unwanted disturbance to the communication network, more voltage and/or current stress etc.
This has motivated the introduction of the Active Power Filter (APF) for improving power
quality. Shunt-APF is used to eliminate the current harmonics, whereas, the series
compensation does the same job for the voltage harmonics. The thesis deals with the shunt
compensation Most of the reference generation technique reported in literature are generally
suffers from delay in compensation and accuracy. The proposed reference generation
technique reduces the compensation delay of predictive algorithm.
• M. Tech Project: Design an UPS with feature like Brown out control and series
boosting .The proposed UPS is expected take care of 20 % sink or Swell of supply voltage
and in blackout condition the UPS will supply only critical load for the period of 10 min.
• B. E. Project:. Design of and implementation of current control voltage source inverter.
Publication:
Papers Published/Accepted
1. A. Bhattacharya, C. Chakraborty and S. Bhattacharya, “Current compensation in shunt
type active power filters,” IEEE Industrial Electronics Magazine, vol.3, no.3, pp.38-49,
2009.
2. A. Bhattacharya and C. Chakraborty, “A Shunt Active Power Filter with Enhanced
Performance Using ANN based Predictive and Adaptive Controllers,” IEEE Transactions
on Industrial Electronics,Feb.2011.
3. A.Bhattacharya and C.Chakraborty, “Recursive least square based ann tuned reference
generation technique for shunt active power filter,” International Journal of Power
Engineering & Green Technology, in july 2010 issue.
4. A. Bhattacharya, C. Chakraborty and S. Bhattacharya, “Parallel connected shunt hybrid
active powerfilters operating at different switching frequencies for improved
performance,” IEEE Trans. Ind. Eletron.(in press)
5. A. Bhattacharya and C. Chakraborty, “Improved tracking of shunt active power filter by
sliding mode control,” European Transactions on Electrical Power. Accepted with minor
modifications.
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6. T.S.Basu, A.Bhattachary and C.Chakraborty, “Shunt Active Filter/STATCOM
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Topology for Medium /High Power Application: Parallel Inverters Operating at Different
Switching Frequency”, IEEE Industrial Electronics Society Conference (IECON 2010).
Accepted for publication.
7. A.Bhattacharya and C.Chakraborty, “ANN (Adaline) based harmonic compensation for
shunt active power filter with capacitive voltage based predictive technique," IEEE ICIIS,
2008,Kharagpur.
8. A.Bhattacharya and C.Chakraborty, "Predictive and adaptive ANN (adaline) based
harmonic compensation for shunt active power filter," IEEE ICIIS, 2008,Kharagpur.
9. A.Bhattacharya and C.Chakraborty, “Adaline controlled 3-phase 3-wire shunt active
power filter with enhanced performance using the capacitor voltage feedback,” Conf.
Rec. IEEE-ICIT 2009, Feb. 10-13, Gippsland, Australia.
10. A.Bhattacharya and C.Chakraborty, “Harmonic elimination and reactive power
compensation through a shunt active power filter by twin neural networks with predictive
and adaptive properties,” Conf. Rec. IEEE-ICIT 2009, Feb. 10-13, Gippsland, Australia.
11. A.Bhattacharya, C.Chakraborty and S. Bhattacharya “A reduced switch transformer-
less dual hybrid active power filter,” Conf. Rec. IEEE-IECON 2009,Nov.Nov.3-5. Porto,
Portugal
INDUSTRIAL TRAINING:
At the CESC Limited, Sub-Station Division, Prinsep Street, Kolkata, from June 2000 to July
2000; transformer erection, sub-station maintenance and operation and transformer maintenance
divisions.
Areas of Interest:
Power Electronics, Power Quality. Electric Drives, FACTS, Microcontrollers (8051 family, PICMid-range), Power System and Control System design, Electrical Machine Design, Illumination
Engineering;
Simulation Tools: MATLAB (Mathematical analysis, curve plotting etc.), SIMULINK (General
and Power System Toolbox), PSPICE, Proteus, ANSYS (Electromagnetic
Analyses only), MPLAB .
Hobbies:
Designing power electronic circuits, solving mathematical problems (university
entrance level), listening to music (pop, western instrumental), watching live
sports.
Personal Details:
Father's Name: Late Arun Kr. Bhattacharya
Date of Birth: 29.09.1977
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Area of interest : Active power filter, Line interactive UPS, PFC, Fly Back converter.
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Extracurricular Activity : Puzzle solving , playing computer game , Reading Magazine of
Economic interest.
Referee :
(i) Name: Dr. Chandan Chakraborty
Designation: Associate Professor
Department of Electrical Engineering.
Full Address: Department of Electrical
Engineering..
Indian Institute of Technology Kharagpur
Kharagpur 721302
Contact No. 91-3222-283096
& Fax No . 91-3222-282262
E-mail(i) cc@ee.iitkgp.ernet.in
(ii) chakraborty@ieee.org
(ii) Name: Dr. Subhashish Bhattacharya
Designation: Assistant Professor
Department of Electrical & Computer
Engineering
Full Address: Department of Electrical &
Computer Engineering
North Carolina State University
Raleigh, NC 27695-7571. USA
Contact No. 919-513-7972
& Fax No. 919-513-0405
E-mail : sbhattacharya@ncsu.edu
Date: 03/09/2010
Place: Hyderbad-500034
______________________________
Mr.Avik Bhattacharya