Enpirion® Power Evaluation Board
EY1501DI-ADJ 6Vin 1A Linear Regulator
Evaluation Board User Guide
Description
This is the EY1501DI-ADJ User Guide. The
EY1501DI-ADJ is a CMOS Low Drop-Out
(LDO) linear regulator. A CMOS LDO
consumes significantly lower quiescent current
than a bipolar LDO, achieving higher efficiency
and smaller footprint. The high level of
integration provides protection against system
faults and delivers a substantial reduction in
footprint and component count compared to
competing solutions. The evaluation board is
optimized for engineering ease of testing
through programming options, clip leads, test
points
and
other
supporting
external
components.
Evaluation Board Over View
Figure 1. EY1501DI-ADJ Evaluation Board Illustration
Instructions
The numbers in the instructions below correspond
to the numbers in Figure 1. By following the number
sequence below, the device can be turned on by
step 5.
1) ENABLE – Connecting jumper to the upper
two pins of JP1 enables the device. The
jumper on the lower two pins of JP1
disables the device.
2) Output Voltage Settings (J1-J6) – With a
jumper placed as shown, output voltage is
set to 1.2V. The jumper may be switched to
change the output voltage to any of the
setting shown in Figure 1.
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October 9, 2014
Rev A
EY1501DI-ADJ Evaluation Board User Guide
3) VIN (CON2) – Connect the positive terminal
of a 2.2V to 6V power supply to CON2. Do
not turn the power supply on until everything
is connected correctly.
4) Ground (CON4 and CON3) – Connect the
power supply’s negative terminal ground to
CON4 and the load ground to CON3.
5) VOUT (CON1) – Connect the load to CON1.
If the instructions were followed up to this
point, the power supply may be turned on. If
output voltage is not present after turning on
the power supply, check the position of the
jumper on JP1.
6) POK (TP1) – This is an open drain logic
output used to indicate the status of the
output voltage. Logic low indicates VOUT is
not in regulation.
7) SS (TP2) – The soft-start circuit controls the
rate at which the output voltage rises up to
regulation at power-up or LDO enable. This
start-up ramp time can be set by adding an
external capacitor from the SS pin to
ground.
𝑇𝑠𝑡𝑎𝑟𝑡 =
𝐶𝑆𝑆 ∗ 0.5
2𝜇𝐴
Evaluation Board Schematic
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Rev A
EY1501DI-ADJ Evaluation Board User Guide
Bill of Materials
Designator
R3
R2
R5
R1, R7
R4
R6
R8
JP1
J1-J6
CON1-CON4
C1
C5, C6
TP1
U1
Qty
1
1
1
2
1
1
1
1
6
4
1
2
1
1
Description
RES 1K OHM 1/10W 1% 0603 SMD
RES 100K OHM 1/10W 1% 0603
RES 1.30K OHM 1/10W 1% 0603 SMD
RES 2.61K OHM 1/10W 1% 0603
RES 464 OHM 1/10W 1% 0603
RES 1.87K OHM 1/10W 1% 0603
RES 649 OHM 1/10W 1% 0603
CONN HEADER 3POS .100" SNGL TIN
CONN HEADER 2POS .1" T/H
TERMINAL TURRET DOUBLE .109" L
CAP CER 82PF 50V 5% NP0 0603
CAP CER 10UF 16V 20% X5R 0603
TEST POINT PC COMPACT .063"D WHT
EY1501DI-ADJ High Performance 1A LDO GTP
Test Recommendations
To guarantee measurement accuracy, the following precautions should be observed:
1. Make all input and output voltage measurements at the board using the test points provided
(CON2 to CON1). This will eliminate voltage drop across the line and load cables that can
produce false readings.
2. Measure input and output current with series ammeters or accurate shunt resistors. This is
especially important when measuring efficiency.
3. The board includes an enable pin, which turns the device on when pulled high. When EN is
low, the IC goes into shutdown mode. In “always-on” applications, EN can be tied to IN.
4. This product has internal current limiting functionality to protect the regulator during fault
conditions.
Contact Information
Altera Corporation
101 Innovation Drive
San Jose, CA 95134
Phone: 408-544-7000
www.altera.com
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products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any products and serv ices at any time without
notice. Altera assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in
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October 9, 2014
Rev A