Comtents
1
POWER ELECTRONICS
converters and regulators
Power electronics
2
Editor:
Reviwers:
Lector:
Comtents
3
Branko Dokic, Branko Blanusa
POWER ELECTRONICS
CONVERTERS AND REGULATORS
Power electronics
4
Petty are people who consider teacher’s work petty
(Dositej Obradovic*)
A good teacher, by discovering new
and unknown, creates the desire and
habit of learning, stirs up the spirit of
free thinking, develops the feeling of
personal responsibility, and succeeds in
teaching others to what even he himself
does not understand.
To all my teachers with gratitude.
Author
*
The First Serbian Minister of Education
Comtents
5
CONTENTS
PREFACE
1 INTRODUCTION
1.1 TYPES OF SIGNALS
1.2 ROOT-MEAN-SQUARE AND AVERAGE VALUES OF PERIODIC
SIGNALS
1.3 POWER OF PERIODIC CURRENTS
1.4 DIRECT CURRENT POWER SUPPLIES
1.4.1 The basic parameters
1.4.2 The classification
1.4.3 The classification of pulse converters
1.4.4 The output filters
1.5 SWITCHING ELEMENTS
1.6 MAGNETIC ELEMENTS
1.6.1 The chokes
1.6.2 The transformers
1.7 CAPACITORS
1.8 CONTROL MODULES
1.9 INTEGRATED PULSE CONVERTERS
1.10 RADIO-FREQUENCY INTERFERENCE
1.11 COOLING OF COMPONENTS
Problems
2 DIODES AND TRANSISTORS
2.1 DIODE AS A SWITCH
2.1.1 The temperature characteristics
2.1.2 The dynamic diode characteristics
2.1.3 Schottky diodes
2.1.4 The selection of pulse diodes
2.2 BIPOLAR TRANSISTOR AS A SWITCH
2.2.1 The cut off region
2.2.1.1 The voltage restrictions
2.2.2 The saturation region
2.2.3 The static transfer characteristic
2.2.4 The dynamic inverter characteristics
2.2.4.1 Turning on a transistor
2.2.4.2 Turning off a transistor
2.2.4.3 The optimum drive
2.2.4.4 The speed up capacitor
2.2.5 The non-saturated switch
6
Power electronics
2.2.6 Capacitatively loaded inverter
2.2.7 Inductively loaded switch
2.2.7.1 The protection of transistor
2.2.8 The selection of transistor
2.3 POWER MOS TRANSISTOR AS A SWITCH
2.3.1 The power VDMOS transistor
2.3.2 The power BiMOS switch
2.3.3 The static parameters
2.3.4 The dynamic parameters
2.3.4.1 The driving circuits
2.3.5 The safe operation area (SOA)
Problems
3 REGENERATIVE SWITCHES
3.1 UNIJUNCTION TRANSISTOR – UJT
3.1.1 The temperature characteristics
3.1.2 The programmable unijunction transistor – PUT
3.1.3 The complimentary unijunction transistor – CUJT
3.1.4 The pulse generators
3.1.5 The nonstandard applications
3.2 THYRISTORS
3.2.1 The triode thyristor – SCR
3.2.1.1 The characteristics of the control electrode (gate)
3.2.1.2 The effect of the rate of anode voltage change (dV/dt effect)
3.2.1.3 The effect of the rate of anode current change(di/dt effect)
3.2.1.4 The turn-on time
3.2.1.5 The turn-off time
3.2.1.6 Turning on (triggering) and off
3.2.1.7 The triggering circuits based on UJT
3.2.2 The gate assisted turn-off thyristor – GATT
3.2.3 The asymmetric thyristor – ASCR
3.2.4 The reverse conducting thyristor – RCT
3.2.5 The gate turn-off thyristor – GTO
3.2.6 The MOS thyristor – MCT
3.2.7 IGCT-Insulated Gate-Commutated Thyristor
3.2.8 ETO-The Emitter Turn-off Thyristor
3.2.9 The photo-thyristor
3.2.10 The unilateral switch – SUS
3.2.11 The double switch – SBS
3.2.12 The diode thyristors
3.2.13 The triac
Problems
Comtents
5 PWM DC/DC COVERTERS
4.1 FORWARD CONVERTERS
4.1.1 The analysis of the basic circuit
4.1.1.1 The output voltage variation
4.1.1.2 The quasi steady-state regime of the transistor
4.1.1.3 The discontinuous regime
4.1.1.4 The energy relations in the quasi-stable states
4.1.1.5 The dynamic losses of the transistor and diode
4.1.1.6 The parameter optimization
4.2 GALVANICALLY ISOLATED FORWARD CONVERTER
4.3 VOLTAGE BOOSTER
4.3.1 The analysis of the basic scheme
4.3.2 The variation of the output voltage
4.3.3 The boundary between the continuous and discontinuous regimes
4.3.4 The discontinuous regime
4.3.5 The power losses
4.4 FLYBACK CONVERTERS
4.4.1 The boundary between the continuous and discontinuous regimes
4.4.2 The discontinuous regime
4.4.3 The flyback converter having galvanic separation
4.5 PUSH-PULL CONVERTERS
4.5.1 The analysis of idealized circuit in the continuous regime
4.5.2 The output characteristcs
4.5.3 The selection of the components
4.5.4 D.C. pre-magnetization of the core
4.5.5 The half-bridge converter
4.5.6 The bridge converter
4.5.7 Hamilton circuit
4.6 CUK CONVERTERS
4.6.1 The elimination of the current ripple
4.6.2 Cuk converters having galvanic isolation
Problems
5 CONTROL MODULES
5.1 BASIC PRINCIPLES AND CHARACTERISTICS OF PWM CONTROL
MODULES
5.1.1 The analysis of the circuit
5.1.2 The simple PWM
5.1.2.1 The auxiliary voltage generators containing operational amplifiers
5.1.2.2 The auxiliary voltage generators in integrated circuit form
5.2 VOLTAGE CONTROLLED PWM
5.3 CURRENT CONTROLLED PWM
5.3.1 The problem of stability
7
8
Power electronics
5.3.2 The compensated PWM
5.4 IC CONTROL MODULES
5.4.1 Control module TL494
5.4.2 Control module SG1524/2524/3524
5.4.2.1 The advanced circuits
5.4.3 Control module TDA 1060
6 DC/AC CONVERETRS – INVERETERS
6.1 SINGLE-PHASE VOLTAGE INVERTERS
6.1.1 The pulse controlled output voltage
6.2 PULSE-WIDTH MODULATION INVERTERS
6.2.1 The Unipolar PWM
6.3 THREE-PHASE INVERTERS
6.4 SPACE VECTOR MODULATION
6.4.1 Space vector modulation-the basic principle
6.4.2 Application of space vector modulation technique
6.4.3 Direct and inverse sequencing
6.5 INFLUENCE OF REAL DRIVE
Problems
7 AC/DC CONVERTERS – RECTIFIERS
7.1 HALF-WAVE SINGLE-PHASE RECTIFIERS
7.2 FULL-WAVE RECTIFIERS
7.2.1 The commutation of current
7.3 OUTPUT FILTERS
7.3.1 The capacitive filter
7.3.2 The L filter
7.4 VOLTAGE DOUBLERS
7.5 THREE PHASE RECTIFIERS
7.6 PHASE CONTROLLED RECTIFIERS
7.6.1 The full-wave thyristor rectifiers
7.6.2 The three phase thyristor bridge rectifiers
7.7 TWELVE –PULSE RECTIFIER
7.8 RECTIFIERS WITH CIRCUIT FOR POWER FACTOR CORRECTION
7.9 ACTIVE RECTIFIER
7.9.1 Active rectifier with hystersis current controller
7.10 PWM RECTIFIERS
7.10.1 Advanced control techniques of PWM rectifiers
7.10.2 PWM rectifier with the current output
7.10.3 PWM rectifiers in active filters
7.10.4 Some topologies of PWM rectifiers
7.10.5 Some applications of PWM rectifiers
Problems
Comtents
8 AC CONVERETERS
8.1 SINGLE-PHASE AC-AC VOLTAGE CONVERTERS
8.1.1 The time proportional control
8.2 THREE-PHASE CONVERTERS
8.3 FREQUENCY CONVERTERS
8.3.1 The direct frequency converters
8.4 INTRODUCTION TO AC/AC MATRIX CONVERTERS
8.4.1 Basic characteristics of matrix converters
8.4.2 Bidirectional switch
8.4.3 Realization of input filter
8.4.4 Current commutation
8.4.5 The protection of matrix converter
8.4.6 Application of matrix converter
Problems
9 RESONANT CONVERTERS
9.1 RESONANT CIRCUITS
9.2 RESONANT CONVERTERS OF CLASS D
9.2.1 The series resonant converters
9.2.2 The parallel resonant converters
9.2.3 The series-parallel resonant converter
9.3 SERIES RESONANT CONVERTERS BASED ON GTO THYRISTORS
9.4 CLASS E RESONANT CONVERTERS
9.5 DC/DC CONVERTERS BASED ON RESONANT SWITCHES
9.5.1 The ZCS quasi-resonant converters
9.5.2 The ZVS quasi-resonant converters
9.5.3 The multi-resonant converters
9.6 ZVS RESONANT DC/AC CONVERTERS
9.7 SOFT SWITCHING PWM DC/DC CONVERTERS
9.7.1 The phase shift bridge converters
9.7.2 The resonant transitions PWM converters
9.8 CONTROL CIRCUITS OF RESONANT CONVERTERS
9.8.1 Intrgated circuit family UCx861-8
9.8.2 The integrated circuits for control of soft switching PWM converters
Problems
10 INTRODUCTION TO MULTILEVEL CONVERTERS
10.1 BASIC CHARACTERISTICS OF MULTILEVEL CONVERTERS
10.2 INTORODUCTION TO MULTILEVEL DC/DC CONVERTERS
10.3 MULTILEVEL INVERTERS
10.3.1 Cascaded H-bridge multilevel inverters
9
10
10.3.2 Diode-clamped multilevel inverters
10.3.3 Flying capacitor multilevel inverters
10.3.4 Other multilevel inverter topologies
10.4 CONTROL OF MULTILEVEL INVERTERS
10.4.1 Multilevel SPWM
10.4.2 Space vector modulation
10.4.3 Space vector control
10.4.4 Selective harmonic modulation
Problems
REFERENCES
INDEX
Power electronics
INTRODUCTION
1
Power electronics in the broader sense implies that part of electronics used in
electric power. This is the equipment used in the systems for control and regulation
of electric power supplies and in the systems for the regulation of electric drives.
Power electronics includes various types of electric power converters, such as:
converters of AC to DC current, DC to AC, DC to DC, then converters of different
types of energy (thermal, nuclear, and light) in to electric energy. Since most of the
equipment that uses power electronics contains converter’s of some type, very
often the concept of power electronics is understood as converter electronics.
In essence, a power electronics aparatus consists of the power part and control
part. The power componant, serving for the transfer of energy from the source to
the load, consists of power electronic swtiches, electric chokes, transformers,
capacitors, fuses, and sometimes resistrors. A combination of these elements
combine to make different converter circuits adjusted to the mode of the primary
supply and the character of the load. Energy losses within a converter should be as
small as possible. Consequently, the semiconductor elements of the converter are
mainly operating in the pulse (switching) mode. They could be either controllable
(transistors, thyristors) or non-controllable (diodes). The control or information
block controls the regulating (mostly switching) elements of the converter. The
control, or regulation, is acomplished on the basis of the information the control
block has collected from the power part of the aparatus. Mostly the information
concerns the output voltage, load current or current/voltage of a critical element of
the converter (e.g.transistor). The control block can functionally be a very complex
electronic assembly consisting of either analogue and digital elementary
assembiles.
1.1 TYPES OF SIGNALS
There are various types of signals (voltage/current) used in the transferring of
energy from the primary source to the load and in the control of this transfer
(Fig.1.1).
Power electronics
12
i
v
a
T/2
i
T
3T/ 2
2T
t
v
b
t
i
v
c
t
i
v
d
t
i
v
e
t
i
v
f
t
i
g
v
t
Fig. 1.1 The most frequent voltage and current waveforms in power electronics circuits.
Input and output voltages or currents are mainly either harmonic functions of
time (Fig.1.1a) or are time independent. The time independent signals (Fig.1.1b)
are called direct current signals since they act in only one direction. The most
frequent forms of signals inside power electronics equipment are rectangular
(Fig.1.1c). These signals are obtained at the outputs of the DC. voltage supplied
1 Introduction
13
switching circuits as a consequence of the operation of the ON/OFF switch. A
rectangular excitation of a circuit within the equipment results in responses that
may be exponential (Fig.1.1d and e), triangular (Fig.1.1f), sawtooth (Fig.1.1g) or
harmonic functions of time. They are mainly periodic functions of time. Their
values and directions are repeated after a precisely determined time interval T
which is called cycle, so that:
f( t+kT )=f(t), k=±1, ±2,...
(1.1)
Periodic functions of an arbitrary form can be, on the basis of the Fourier
analysis, expanded in a series of harmonic functions of different amplitudes
and frequencies. Fourier series of any periodic function can be represented
in the form of a sum of a d.c. component and harmonic cosine and sine
functions, i.e.:
∞
∞
n =1
n =1
f (t ) = F0 + ∑ f n (t ) = a0 + ∑ [ an cos( nωt ) + bn sin( nωt )]
(1.2)
where: ao, an and bn are the Fourier coefficients determined by:
F0 = a 0 =
an =
bn =
1T
f (t )dt ,
T ∫0
(1.3)
2T
f (t ) cos(nωt ),
T ∫0
(1.4)
2T
f (t ) sin( nωt ).
T 0∫
(1.5)
Coefficient Fo=ao is the average value of a complex-periodic function, or its
d.c. component. By using the basic trigonometric relations, Fourier series (1.2) can
be expressed in terms of cosine only or sine only form. Namely:
∞
f (t ) = a0 + ∑ Cn cos(nωt + θ n ),
(1.6)
n =1
where:
C n = a n2 + bn2
and
θ n = tan −1 (− bn a n ),
(1.7)
i.e.
∞
f (t ) = a0 + ∑ Cn sin(nωt + θ n ),
n=1
where:
(1.8)
Power electronics
14
C n = a n2 + bn2
θ n = tan −1 (a n bn ).
and
(1.9)
Coefficient C1 is the amplitude of the first or the basic harmonic whose circular
frequency ω=2π/T is equal to the frequency of the complex-periodic function. The
members of higher frequencies (2ω, 3ω, 4ω, ...) are called higher harmonics. In
Fig.1.2 a symmetric rectangular signal (dash-dot line) is represented by the sum of
only the first three members of the Fourier series (full line). This rectangular signal
contains only odd harmonics. Its Fourier series is:
f (t ) = F sin (ωt ) +
F
F
F
sin (3ω ) + sin (5ωt ) + sin (7ωt ) + ...,
3
5
7
(1.10)
where F is the amplitude of the basic harmonic. With a higher number of
harmonics the sum would come closer to the rectangular function while the infinite
sum would produce the complete rectangular form of the signal.
v1
v
v3
v 1 + v 2 +v 3
v
v2
T/ 5
T/ 3
T
Fig.1.2 A symmetric rectangular signal (dash-dot line) and its Fourier equivalent (full
line) consisting of only the first three members of the Fourier series.
1.2 ROOT-MEAN-SQUARE AND AVERAGE VALUES OF
PERIODIC SIGNALS
The root-mean-square (RMS) value of a variable periodic current is equal to the
value of a d.c. current which would within the same time interval in the same
resistor develop the same amount of heat, i.e. does the same amount of work. The
work of a periodic current through a resistor R over a period T is determined by:
T
T
T
0
0
0
W1 = ∫ v(t )i (t )dt = ∫ [ Ri(t )]i (t ) dt = R ∫ i 2 (t )dt ,
(1.11)
whereas the work of the DC current equal to the RMS value of the variable current
in the same resistor over the same period T is:
2
W2 = RI rms
T.
(1.12)
1 Introduction
15
By equating these two works, i.e. W1=W2, it follows that the RMS value of a
periodic current is:
T
I rms
1 2
=
i (t )dt .
T ∫0
(1.13)
Similarly, the root-mean-square (RMS) value of a periodic voltage is obtained as:
T
Vrms
1 2
=
v (t )dt .
T ∫0
(1.14)
For example, for a harmonic voltage v(t)=VM sin(ωt) the RMS value is:
T
Vrms
T
VM2
V
1
2
2
=
VM sin (ωt )dt =
[1 − cos(2ωt )]dt = M = 0.707VM , (1.15)
∫
∫
T0
T 0
2
and the RMS value of a harmonic current of the form i(t)=IM sin(ωt) is:
I rms = I M / 2 = 0.707 I M .
(1.16)
The RMS value denotes the real influence of a harmonic current or voltage. For
this reason it is mostly used without index the RMS and is briefly denoted by I or
V. For example, V=220 V is the rms value of the mains voltage. Its amplitude is
VM=√2*220=310V.
For the periodic function of the rectangular form (Fig. 1.3), determined by (1.17),
i (t )
I rms = I M
D
I av = I M D
IM
DT
T1
T
t
T2
Fig. 1.3 A current of rectangular form of duty cycle 0<D<1, its RMS and average vales.
⎧I
i (t ) = ⎨ M ,
⎩ 0,
0 ≤ t < T1 = DT
DT < t < T ,
(1.17)
the RMS value is:
I rms =
DT
T
⎫
1⎧ 2
1 2
I
dt
+
0 2 dt ⎬ =
I M ( DT ) = I M D ,
⎨∫ M
∫
T⎩0
T
DT
⎭
(1.18)
Power electronics
16
where D=TI/T is the duty cycle of the rectangular pulse.
The average value of a periodic signal within one period is defined as:
T
f av =
1
f (t )dt.
T ∫0
(1.19)
For a current of a rectangular form, according to Fig.1.3, it is
I av =
1
T
DT
∫I
M
dt = DI M .
(1.20)
0
Practically, the average value represents the area between the pulse and the time
axis over a single period, divided by the period. The average value of a harmonic
signal of the form f(t)=FM sin(ωt) is zero since it consists of two equal areas but of
opposite signs (positive and negative half-periods). In some of the circuits of power
electronics, such as, rectifiers, the use is made of the rectified current (Fig.1.4),
where all the parts are positive, while the original form of the wave is retained. The
cycle of such a signal is T/2 , and the average value is:
I av
1
=
T /2
T 2
∫I
M
sin(ωt )dt =
0
IM
2I M
π
≈ 0.637 I M .
i (t ) = I M sin(ωt )
T /2
(1.21)
I av = 0, 637 I M
T
t
Fig. 1.4 The rectified harmonic current and its average value.
For complex-periodic currents the use is made of the form factor, as the
measure of the discrepancy from the harmonic form, defined as:
k=
I rms
I
=
.
I av
I av
(1.22)
The form factor of a rectangular current according to Fig. 1.3 is
k=IM√D/(IMD)=1/√D whereas for a rectified harmonic current it is
k=(IM/√2)/(2IM/π)=π/(2√2)=1.11.
Often as a measure of the discrepancy of a periodic signal from the harmonic
form of a current/voltage signal the use is made of the distortion factor:
1 Introduction
DF =
17
I1rms
,
I rms
(1.23)
or of the total harmonic distortion
1 − DF 2
I 2 rms − I 21rms
=
,
I 1rms
DF
THD =
(1.24)
where: IIrms is the root-mean-square value of the first harmonic and
I rms =
∞
∑I
⎛ I ⎞
= I + ∑⎜ n ⎟
n =1 ⎝ 2 ⎠
∞
2
nrms
n =0
2
2
0
(1.25)
is the total RMS value of a complex-periodic current. In (1.25) I0 is the D.C
component, and In is the amplitude of the n-th harmonic. If the D.C component is
zero, the total harmonic distortion is:
∞
TDH =
∑I
n =2
2
nrms
I1rms
.
(1.26)
Example 1.1
5
Determine the effective (rms) value of
12
60° for
a)
2
10
30°
b) When the sinusoids are of different frequencies , and the terms are
orthogonal, the rme value is:
5
√
12.12 .
√
a) First, we will combine sinusoide using phasor addition:
10
30°
12
21.25
60°
46°
14.66
.
The voltage function is then expressed as:
5 21.25 46° V.
The rms value of voltage v is:
2
2
1
52
21.25 2
√2
15.83 .
15.39
Power electronics
18
1.3 POWER OF PERIODIC CURRENTS
The product of the instantaneous values of a periodic voltage across a load and
the current through the load is the instantaneous power:
p(t)=v(t)i(t).
(1.27)
Since the instantaneous values of the voltage or current could have different signs,
the instantaneous power can in general be positive or negative. The power is
positive if the energy is transferred from the source to the load and negative if the
energy is transferred from the load to the source. A typical example of a load
involving positive and negative instantaneous power is a coil and a capacitor driven
by a harmonic signal. If, for example the coil of inductance L is connected to a
voltage V(t)=VM sin(ωt), the current through the coil will be shifted by -π/2 with
reference to the voltage and the instantaneous power will be
p(t)=[VM cos(ωt)][IM cos(ωt -π/2)]=½ VM IM sin(2ωt).
The frequency of the instantaneous power will be double the voltage frequency
(Fig. 1.5). Shaded area between curve p(t) and the time axis (Fig.1.5) represents
this work. During the first and third quarters of the cycle this work is positive, i.e.
the work of the source is converted to the energy of the magnetic field of the coil.
During the other two quarters of the cycle (second and fourth) this work is
negative, meaning that the energy of the magnetic field is returned back to the
source.
p (t )
v (t )
i (t )
T/2
T
ωt
Fig.1.5 Instantaneous power of a coil driven by a harmonic signal.
During the intervals of negative instantaneous power the coil behaves like a source
and the source like a load. The energy is thus being exchanged between the source
and the coil. Consequently, the total work of the source is zero and the average
power is also zero.
The same conclusions may be drawn if a capacitor is driven by a harmonic
signal. In two quarters of the cycle the capacitor accumulates the electrostatic
energy from the source and during the other two quarters this energy is returned
back to the source. Consequently, here too the average power is equal to zero.
1 Introduction
19
The average or active power is the one that does the work. For periodic currents
it is defined by the time interval equal to one cycle:
P=
1T
p (t )dt.
T ∫0
(1.28)
It can be shown that in the case of a capacitor the average power from the source is
zero. If a capacitor is driven by a rectangular signal:
T
⎡1 T
⎤
1
P = ∫ VDC iC (t )dt = VDC ⎢ ∫ iC (t )dt ⎥ = VDC I cav ,
T0
⎣T 0
⎦
(1.29)
where:
T
I cav =
1
iC (t )dt ,
T ∫0
(1.30)
is the average current through the capacitor. The voltage across the capacitor is
1
VC (t0 + T ) = VC (t0 ) +
C
t0 +T
∫ iC (t )dt.
(1.31)
t0
Since it has been assumed that the voltage across the capacitor (source voltage)
was periodic, i.e. VC(to+T)=VC(to) it follows that:
1
C
t0 +T
∫ iC (t )dt = VC (t0 + T ) − VC (t0 ) = 0.
(1.32)
t0
By comparing (1.32) and (1.30) one comes to the conclusion that the average
current through the capacitor is zero, thus the average power is also zero. It is
shown in the same way that the average value of the voltage across a coil driven by
a periodic rectangular current is also zero.
It can thus be concluded that either coil or capacitor dissipate no power if driven
by a periodic signal. For this reason they are called non-dissipative elements. Since
minimum dissipation of power is one of the basic requirements in the design of
various efficient converters, coils and capacitors are the basic elements of these
circuits together with the switching circuits generating periodic voltages and
currents.
Example 1.2
A coil of inductance L= 1mH and a capacitor of capacitance 1 μF connect
blocks B1 and B2 (Figure 1.6 a) and B3 and B4 (Figure 1.6 b) respectively. Current
through the coil and voltage across the capacitor are linear periodic functions
determined by:
Power electronics
20
1A
⎧
⎪10 A + 0.75ms t ,
i L (t ) = ⎨
1A
⎪11A −
t,
0.25ms
⎩
10V
⎧
⎪11V − 0.75ms t ,
vC (t ) = ⎨
10V
⎪ 1V +
t,
0.25ms
⎩
t0<t<t0+0.75ms, t0+0.75ms<t<t0+T=t0+1ms; (1)
t0<t<t0+0.75ms, t0+0.75ms<t<t0+T=t0+1ms.
(2)
Draw the variations of the voltage across the coil and the current through the
capacitor and determine their average values.
iL
B1
B2
vL
B3
Fig. 1.5 a)
iC
B4
vC
Fig. 1.5b)
Voltage across the coils is:
1A
4
1A
⎧
−3
=
=
L
V = VL+ ,
1
*
10
−
3
diL ⎪
0.75 *10
3
0.75ms
=⎨
VL = L
t0<t<t0+0.75ms
1A
−
dt ⎪− L 1A = −1*10 −3
=
−
=
4
V
V
,
L
0.25 *10 −3
0.25ms
⎩
The current and voltage of the coil are drawn in Fig.1.6.
iL
ILM =11A
ILm =10A
t0
t 0+0.75ms t 0+1ms
t 0+T+0.75ms t 0+2ms
T
4
V +L= 3 V
A
-A
-
V L=-4V
Fig. 1.6
t
1 Introduction
21
The areas above and below the time axis within one cycle are mutually equal but of
the opposite signs.
Namely:
A = VL+ * 0.75 = 4 3V * 0.75ms = 1* 10 −3 Vs ,
- A = VL− * 0.25 = −4V * 0.25ms = −1* 10 −3 Vs .
The average value of the voltage across the coil is:
t +T
t +0.75
T
⎤ 1
10
1 ⎡0 +
1
VLav = ∫VL (t )dt = ⎢ ∫VL dt + ∫VL− dt⎥ = (4 3* 0.75 − 4 * 0.25) = ( A − A) = 0
T t0
T ⎣⎢ t0
T
t0 +0.75
⎦⎥ T
Current through the capacitor is:
10V
40
10V
⎧
−6
−
dvC ⎪− C 0.75ms = −1*10 F 0.75 *10 −3 s = − 3 mA = I C ,
=⎨
iC = C
10V
dt ⎪ C 10V = 1*10 −6 F
= 40mA = I C+ ,
0.25 *10 −3 s
0.25ms
⎩
The voltage and current of the capacitor are drawn in Figure 1.7.
vC
VCM=11V
VCm=10V
t0
t 0+0.75ms t 0+1ms
t 0+T+0.75ms t 0+2ms
iC
+
I C=40mA
A
A
40
I C- =- 3 mA
-A
0.75ms
-A
0.25ms
Fig. 1.7.
The areas below and above the time axis are:
− 40
− A = I C− * 0.75 ms =
mA* 0.75 ms = −10 As ,
3
+ A = I C+ * 0.25ms = 40 mA* 0.25ms = +10 As.
The average current through the capacitor is:
t
Power electronics
22
I Cav =
1
T
t 0 +T
1
∫ i (t )dt = T (− A + A) = 0
C
t0
In general, however, when the load is an impedance Z=|Z|ejϕ, there will be a
phase shift ϕ between the current and the voltage. If V=VM cos(ωt), then i=IM
cos(ωt-ϕ) and the active power is
P = VM I M
T
1T
1
[cos(
ω
t
)][cos(
ω
t
−
ϕ
)]
dt
=
V
I
M M ∫ cos ϕdt ,
T ∫0
2T
0
(1.33)
i.e. since VM=√2Vrms and IM=√2Irms ,
P=VrmsIrms cos(ϕ)=VI cos(ϕ).
(1.34)
Thus, the active power is the product of the RMS values of the voltage and current
and the cosine of the angle between the load voltage and current. The power is
maximum when the load voltage and current are in phase (ϕ=0) which is the case
of a purely resistive load. In a resistor the electric energy is converted to thermal
energy. If ϕ = ±π/2, as it is with a coil or capacitor, cos(ϕ)=0, and the active power
in these elements is zero.
The phasor diagram of the voltage and a current which is phase shifted by ϕ is
shown in Fig.1.6. Bearing in mind (1.34), the work is performed only by voltage
component V cosϕ which is in phase with the current, so V cosϕ is called the
voltage component for active power. In addition, there is passive component V sinϕ
which is orthogonal to the current vector. This component does not perform any
work i.e. it does not transform the electrical work of the source, so the
corresponding power is called reactive power and it amounts:
1
Q = VM I M sin ϕ = VI sin ϕ .
2
(1.35)
The reactive power is understood as the energy alternatively exchanged between
the source and load. Vector sum of the active and reactive powers:
S=P+jQ
(1.36)
is the apparent power. Its modulus is:
S = S = P 2 + Q 2 = VI .
(1.37)
Thus, the apparent power is the product of the RMS values of the load voltage and
current.
1 Introduction
23
V sin ϕ
V
S
Q
ϕ
ϕ
V cos ϕ
P
I
b)
a)
Fig.1.6 The components of a voltage phasor for active and reactive powers (a) and power
triangle (b).
The ratio of the active and apparent powers is called power factor:
PF =
P
= cos ϕ .
S
(1.38)
Therefore, the power factor of harmonic currents and voltages is cosϕ. If the
current or voltage is a complex-periodic function, then (1.38) should be multiplied
by distortion factor (1.23), i.e.
PF=DFcosϕ.
(1.39)
Example 1.3
A nonsinusoidal voltage is
5 10
2 50
30°
15
4 50
45° . This voltage is connected to the load which is serial connection of 10Ω
resistor and 10mH inductance.
a) Determine power absorbed on the load and
b) derive an expression for a load current.
a) Power absorbed on the load can be determined following the next equation:
. The DC current term is:
The amplitudes of ac current terms are:
10
10
2 50 0.01
15
10
4 50 0.01
RMS value of load current is:
0.5 .
0.98
1.45
Power electronics
24
,
0.5
,
.
.
√
√
√
√
1.33 .
Power absorbed on the load is:
1.33 10 17.69 .
b) Phase angel of ac current terms are
.
45°
Load current can be expressed as:
0.5 0.98
2 50
1.45
.
30°
11° 4 50
11°
0°
.
Example 1.4
The waveforms of voltage and current at the single phase load are recorded and
presented in analytical form:
100 320
2 50
20
2 50
20
2 100
A
Determine:
a) the power absorbed by the load,
b) power factor
a) The power absorbed by the load is determined by computing absorbed
power at each frequency
∑
2.26
a) Power factor is calculated folowing the equation (1.38):
.
The rms value of load current and voltage are:
100
√
320
√2
√
The power factor is:
.
0.46 .
247.38
20 .
.
1 Introduction
25
1.4 DIRECT CURRENT POWER SUPPLIES
Direct current power supply is a representative of the converter assemblies of
power electronics. It can be either a AC/DC or DC/DC converter. The output is,
therefore, always DC, whereas the input could be either AC or DC. A constituent
part of AC/DC converters are rectifiers. An integral part of a pulse DC/DC
converter is the inverter or DC/AC converter. Therefore, within one complex direct
current power supply several various converters can be found.
Direct current power supplies have found much wider applications compared to
other assemblies of power electronics. Integral parts of the majority of the
electronic equipment are direct current power supplies with in electronic circuits. It
may be freely stated that they are the heart of the electronic equipment. A failure in
a power supply causes a failure of the equipment as a whole. The name “power
supply” indicates of energy supply. However most of the time this is not the case.
Namely, a power supply is mainly connected to an energy source such as mains or
batteries. This energy source is usually referred to as the primary power supply. Its
output voltage is converted to other voltage forms (AC or DC) or other voltage
levels (DC or DC). The conversion is done by the secondary power supply
(Fig.1.7). In engineering terminology it has become customary that the concept of
power supply implies the secondary power supply. Consequently, it can be said
that the power supply is an interface placed between the energy source and load
(electronic equipment).
+
-
V0
Ba ttery
DC /DC
VI
+
Rectifier
I0
Convert er
and
Sta bi lizer
L
Lo ad
C
22 0V
Pr imar y
Power
Supply
Second ar y pow er sup ply
Fig.1.7 Block diagram of a direct current power supply.
A block diagram of a direct current power supply is shown in Fig.1.7. When the
energy source is the power mains, the alternating current (AC) is converted to
direct current (DC) (AC/DC conversion). The resulting voltage is not stable. For
this reason it is fed to a block called the DC/DC converter and stabilizer in order to
be stabilized and converted to the required voltage level. Most of the time the
stabilization is understood and these blocks are usually called DC/DC converters.
Power electronics
26
1.4.1 The basic parameters
A power supply should provide the load with a stable voltage or current which
will not undergo changes with variations of the input voltage, or load, or
temperature. However, an ideal supply does not exist. The variation of the output
voltage can be expressed in the form:
Δ V o = F s ΔV I + R o Δ I o + S T ΔT ,
(1.40)
where ΔVI, ΔIo, and ΔT are the respective changes of the input voltage, load
current, and temperature. Coefficients FS, R0, and ST indicate the relative influence
of these changes on the output voltage. They are defined as follows:
Fs =
ΔV O
- stabilization factor,
|
ΔVI Δ I o=0;ΔT =0
(1.41)
R0 =
ΔU i
- output resistance, and
|
Δ I o ΔU u=0;ΔT =0
(1.42)
ST =
ΔV O
- temperature coefficient.
|
ΔT ΔV I=0 ,Δ I o=0
(1.43)
In this literature the use is often made of the so called line regulation which
represents the variation of the output voltage in percents per given variation of the
input voltage:
F sv =
ΔVO [%] ⎡ % ⎤
ΔVI ⎢⎣ V ⎥⎦
(1.44)
and load regulation which represents the variation of the output voltage in
percentage per given variation of the load current.
The ripple rejection is the ratio of a peak to peak variation of the input voltage
and the corresponding variation of the output voltage, i.e.:
F RR =
V ppI
V ppO
(1.45)
and is usually expressed in decibels. Together with information concerning FRR the
frequency range of the ripple is also indicated.
The efficiency factor is defined as the ratio of the load power and the nominal
input power, i.e.
η = V o Io .
VI II
(1.46)
1 Introduction
27
Ideally η =1. This would imply that there are no losses in the power supply and all
input power is transferred to the load. In reality, however, this is not possible and η
<1 and, depending upon the type of converter, it can be from several tenths up to
about 0.9. Often η is expressed in percentages.
As a rule the external dimensions of a converter are proportional to the output
power. One of the technical requirements set to designers are permitted external
dimensions for a given output power. As a measure of converter efficiency the
specific power density per unit volume or mass is defined and expressed in W/dm3
or W/kg.
1.4.2 The classification
There are different criteria for the classification of power supplies. Global
classification, based on the mode of operation, results in linear and switching
converters and voltage stabilizers. Fig.1.8 shows a block diagram of a linear power
supply. In the case of when the source of energy is electric power mains, a power
transformer is the input in order to provide its secondary AC voltage, which upon
rectification and filtering is suitable for supplying a linear DC/DC converter and
stabilizer. The attribute linear is chosen since the regulating transistor Tr is
operating in the linear (active) mode. These converters posses a series of useful
properties like: small output impedance, good stabilization factor, small output
ripple, relatively simple regulating circuits, and the absence of radio-frequency
disturbances. However, linear converters posses a very poor efficiency factor (0.2 <
η < 0.6) and their dimensions and mass are relatively large. The efficiency factor
reduces with the load current and with the difference between the input and output
voltages. Namely, the difference VI – V0 is the voltage drop across the regulating
transistor Tr and its dissipation Pdt = I0(VI – V0) makes a net loss. Let VI = 24V, V0
=5V, and I0 = 10A. The currents of the regulating circuits (error amplifier,
feedback elements, and voltage reference) are negligible compared to I0 so II ≈ I0.
The dissipation of the transistor is Pdt= (24-5)V10A = 190W and the efficiency
factor is η = 0.2. In this example 80% of the consumed energy is net loss. Owing to
this large dissipation the transistor requires a large heat sink thus adding to the size
and weight of the converter. However, the power transformer (50Hz) is the element
that mainly determines the dimensions of the linear AC/DC converter. In addition,
the power losses in this transformer, rectifier and filter are within limits of 15 to
20%.
Power electronics
28
II
V0
Tr
F eedback
V AK
E rror
a mpl ifier
AC
input
~
C
Power
tr ansfo rmer
Rectifier and
filter
DC
output
R1
+
VI
I0
L
R2
VR
Linear DC/DC
converter and stabiliz er
Fig. 1.8 Block diagram of a linear power supply.
V AK
CB
V0
I0
AC
inp ut
~
L
C
DC
output
Ba sic cir cui t
Rectifier
and filter
Pulse DC/DC
co nverter a nd stab iliz er
Fig. 1.9 Block diagram of a switching power supply.
The block diagram of a switching power supply is shown in Fig.1.9. The
essential difference compared to a linear supply is that here the regulating transistor
operates in a switching or pulse mode (it is either cut off or in saturation mode).
Owing to this the losses in this transistor are negligible and are almost independent
of the difference between the input and output voltages. Consequently the
efficiency factor is quite good, within limits of 0.6 to 0.9. The reduction of the
power losses has improved the thermal operating mode of the semiconductor
elements and the need for using heat sinks is considerably reduced.
Table 1.1 Comparative characteristics of pulse and linear converters
Parameter
Input voltage (V)
frequency (Hz)
Pulse converter with PWM
180 up to 260
47 up to 440
Efficiency factor (%)
65 up to 85
Output current (A)
5 up to 300 at VI=5V and
dimensions 125x200x300
mm
up to 35 at VI=5V with
identical dimensions
50pp at VI=5V
10pp
70 up to 200
20 up to 40
80 up to 300
20 up to 60
AC component of
output voltage (mV)
Mass power density (W/kg)
Volume power density
(W/dm3)
Linear converter
198 up to 242
47 – 63 or 400 ±5%
30 up to 45, exceptionally
55
1 Introduction
29
A significant advantage of pulse AC/DC converters compared to linear converters
is that they do not require a power transformer. Namely, the mains voltage is
directly rectified and filtered and regulated by a high voltage switch (transistor or
thyristor) operating at a frequency ranging from several tens up to one hundred
kHz. Owing to this the dimensions and power losses of this part of the converter
are quite small or considerably smaller that those of linear AC/DC converters.
Table 1.2 Descriptive characteristics of pulse and linear converters
Parameter
Price
Efficiency factor
Volume
Weight
Reparability
Radio-frequency
disturbances
Pulse
High
High
Small
Small
Very complex
Present
Linear
Average
Low
Large
Large
Less complex
Absent
1.4.3 The classification of pulse converters
In principle, the pulse DC/DC converters consist of two parts: a basic circuit
and a regulating assembly (Fig.1.9). The basic circuit comprises of switches
(usually a transistor and a diode), choke and/or transformer, and capacitor. By a
controlled turning on and off of the switches the required amount of energy is
transferred through the switches and the low frequency filter (the choke and
capacitor) from the input to the load. In this way the output voltage is proportional
to the ratio of the on and off time intervals of the switch. This ratio, thus the output
voltage, is controlled by the control block (CB).
Depending upon the configuration of the elements in the basic circuit there are
several different DC/DC converters. Globally, however, they could be classified as
converters without galvanic isolation and those having galvanic isolation (input and
output are separated by a transformer or an optocoupler). The classification of
these two groups could be made as is shown in Fig. 1.10. On the other hand, all this
can be split into four groups: forward (direct), flyback (indirect), push-pull
(symmetric) and ]uk1 converters. The peculiarity of ]uk converters is that in
addition to the electromagnetic energy transfer (similar to other converters) they
also use electrostatic energy transfer. This type of converter also comprises the
coupled input-output coils which serve to eliminate the variations of input and
output currents, the property which is significant from the point of view of
elimination of pulse disturbances.
1
Invented by Dr Slobodan Ćuk (interpreter’s comment)
Power electronics
30
Buck (Step-Down)
Galvanically
isolated
Boost (Step-Up)
Boost-Buck (Step-Up I Step-Down)
Forward (Direct)
Flyback (Indirect)
Galvanically not
isolated
Push-Pull (Symmetric)
Half-Bridge
Bridge
Fig.1.10 Classification of pulse DC/DC converters according to the topology of the basic
circuit.
The classification according to the mode of control, or regulation, of the output
voltage is shown in Fig.1.11. The self-oscillating converters are simple from the
design point of view, but their efficiency factor η is the lowest. They are mainly
used for supplying small loads (up to several tens of watts). The widest application
today finds DC/DC converters using pulse width modulation (PWM). The output
voltage is controlled by varying the ratio of the on and off times of the switch with
a constant frequency of switching.
Over the past ten years an ever increasing attention is being paid to the resonant
converters. It is considered that the future in the design of efficient power supplies
belongs to this type of converter.
DIODES AND TRANSISTORS
2
In all basic circuits of the pulse DC/DC or DC/AC voltage converters the
switching elements are transistors (bipolar and unipolar) and diodes. In the analysis
of a basic circuit, transistors and diodes have been considered as ideal switches
(zero on-resistance, infinite off-resistance, and instantaneous transition from one
state to the other). However, they are not ideal switches but have real parameters,
in both the static and dynamic conditions. The influence of these parameters on the
characteristics of pulse converters is considerable, particularly on the efficiency
factor. For this reason in this chapter a description is given of the basic switching
characteristics of transistors (bipolar and unipolar) and diodes. An analysis is
presented of the modes of control of transistor switches and the optimum control
circuits are given. The analysis is of a general character and applies to all pulse
assemblies using diodes or transistors as switches.
2.1 DIODE AS A SWITCH
The static characteristic of a pn junction diode is nonlinear and is determined
by:
I d = I s (eV d
/( m d ϕ t )
- 1)
(2.1)
where: Is is the reverse saturation current, md is the correction factor (md=2 for
small currents – in the vicinity of the knee of the characteristic and md =1 at higher
currents), φt is the temperature potential. The static characteristic (Fig.2.1) consists
of three regions: forward (low-resistance), reverse (high-resistance), and
breakdown. The region where the operating point is found depends on the voltage
applied to the diode. Therefore, a diode can be used as a switch because its
resistance can be controlled by the applied voltage.
When a diode is forward biased and if Vd>VDt , where VDt is the conduction
threshold voltage, the diode is on (conducting). Then its resistance is small (from
10 to 100 Ω). Since the threshold voltage of Si diodes is VDt=(0.5 – 0.6)V, in the
conduction region Vd>>mφt, and exp(Vd/mdφt) >> 1, so the current is:
Power electronics
68
ID
+
Q
VD
Is
≈
BVKA
BREAKDOWN
REGION
ID
VD t
REVERSE REGION
VD = Va k
CONDUCTION
REGION
Fig.2.1 The static diode characteristic.
/(
)
I d ≈ I s eV d m d ϕ t
(2.2)
The dynamic diode resistance is the reciprocal value of
conductance and it is defined by:
rd =
1
d I d dVd
=
Vd =const
md ϕ t
,
I DQ
the dynamic diode
(2.3)
where IDQ is a diode current at the quiescent operating point Q. Any increase of
diode current IDQ decreases the dynamic resistance. E.g. for IDQ=1mA, rd=26Ω and
for IDQ=26mA, rd=1Ω. It has been assumed that φt=26mV and md=1. It should be
emphasized that (2.3) is the pn junction resistance. The total resistance between
anode and cathode is increased by the resistance of the base (substrate) which is
typically ten to hundred Ω, i.e. Rd=rd+rb . At high currents resistance rb is dominant
and the V-I characteristic in that region is almost linear.
In many practical applications a conducting diode can be approximated, with a
satisfactory accuracy, by a straight line of the slope determined by RD and a voltage
source VDt (Fig.2.2a). Then:
rd =
1
d I d dVd
=
Vd =const
md ϕ t
,.
I DQ
(2.4)
On the other hand, in the majority of diode applications as a switch, the resistance of
the driving circuit, which determines current IDQ in the quiescent operating point Q, is
much higher than RD so that the voltage variation across the diode is negligible. The
diode is then replaced by a voltage source VD and its characteristic by a straight line
through the operating point Q and orthogonal to the VD axis (Fig.2.2b). Typically
VD=0.7 – 0.8V and contains a voltage drop of 0.1- 0.2V across RD.
2 Diodes and Transistors
69
When a diode is reverse biased, i.e. VAK < 0, and if |VAK| > mdϕt, then exp(VD/ mdϕt)
<< 1 and the current through the diode is equal to the reverse saturation current IDF=-IS.
Namely, already at VAK=-0.2V from (2.1) it follows that ID=-0.98IS. This means that at
very small reverse voltages the cathode-anode current is saturated at –IS. The
measurements, however, indicate that the reverse current is considerably larger than IS.
This difference is largely due to generation-recombination of the charge carriers in the
transition region of the pn junction. At reverse bias the concentration of the charge
carriers in the depleted region drops well below equilibrium concentration.
Consequently, the recombination is decreased and the generation prevails. Owing to
the generation of electron-hole pairs a reverse current proportional to the volume of
the depleted region Sd and the rate of generation of pairs G=ni/(2τo) arises, i.e.:
ni
d ,
(2.5)
2 τ0
where; S is the pn junction surface, d is the width of the transition region, ni is the
intrinsic concentration of the free charge carriers, τo is the lifetime of the carriers in
the transition region. It is well known [60] that the width of the transition region
increases with increasing the reverse bias thus causing the increase of the reverse
current due to increased generation of the pairs:
I G = Sq
n
⎛ VI ⎞
ni
d 0 ⎜⎜ 1 - ⎟⎟ ,
I G = Sq
2τ 0 ⎝ ϕ k ⎠
(2.6)
where: VI is the reverse voltage, ϕk is the contact potential, do is the width of the
depletion region at VI=0, n=1/2 for abrupt and n=1/3 for pn junction with linear
distribution of impurities.
V
V
V
V
V
V
Fig.2.2 The practical approximations of the V-I characteristic in the conduction region
and the corresponding diode equivalent circuits (dotted line – real characteristic).
The reverse saturation current IS obtained on the basis of the diffusion theory of
pn junction is determined by:
⎛ D p p n 0 D n n p0 ⎞
(2.7)
+
I S = Sq ⎜⎜
⎟,
L n ⎟⎠
⎝ Lp
where: Dp, Lp, and Dn, Ln are the respective diffusion constants and diffusion
lengths for the holes and electrons respectively, pno is the concentration of holes in
Power electronics
70
n-type semiconductor, npo is the concentration of electrons in p-type
semiconductor. In the majority of practical applications pn junction is highly
asymmetric since the concentration of holes ppo in the p-type region is much higher
than the concentration of electrons in the n-type region. Therefore, the most
frequent is p+n- junction. Then, ppo>>nno and the hole current in (2.7) is much
higher (several orders of magnitude) than the electron current. The reverse
saturation current is thus:
pn
(2.8)
I S ≈ I Sp = Sq D p 0 .
Lp
Applying relations pponno=ni2 and Lp=Dpτo one obtains:
I G 1 d n n0
=
.
I S 2 L p ni
(2.9)
E.g. for a silicon diode of the following parameters: d=10-4cm, Lp=2*10-2cm,
nno=2.5*1015cm-3, and ni=1.9*1010 cm-3 the ratio of the reverse generation current IG
to the reverse saturation current IS is IG/IS≈300. At voltages of approximately ten
volts this ratio may become several thousands. Therefore, the total reverse current
of a diode is:
(2.10)
I I = IS+ IG ≈ IG.
abrupt
linear
V
Fig. 2.3 Reverse current density as function of the reverse voltage for linear and abrupt
junctions.
Thus the current density characteristic of a diode according to (2.6), for a linear and
abrupt junctions, is of parabolic shape. In practice, however, the reverse
characteristic of a diode is often replaced by the straight line tangential at the
operating point R with a segment –IR0 on the ordinate (Fig. 2.4a). This means that a
2 Diodes and Transistors
71
diode can be replaced by a parallel connection of a current source IR0 and the
leakage (reverse) resistance RI (Fig. 2.4a). Then:
I d = -( I RO + V d R I ) .
(2.11)
V
V
Fig. 2.4 The approximations of V-I characteristic and the corresponding equivalent
circuits in the reverse region (dotted lines – real characteristics).
Reverse resistance RI ranges from several tens kΩ (power diodes) to several
hundreds MΩ. The resistance of the driving circuit is usually much lower than RI,
and the change of the reverse current can be neglected. The diode is then replaced
by a current source IRR>IR0 (Fig. 2.4b) which is specified for a given reverse
voltage VI. The reverse current IRR is usually between limits the 10-12 and 10-6A for
silicon diodes. Since this current is directly proportional to the surface of the pn
junction it means that IRR of power diodes is large and can be of the order of mA.
When the reverse voltage is higher than the breakdown voltage of the pn
junction, the diode behaves like Zener diode if the current is limited. Typical
values of the breakdown voltage are between several V up to one hundred V. For
high voltage diode this voltage ranges from several hundred V up to several kV.
2.1.1 The temperature characteristics
The basic static parameters of a diode as a switch are: the reverse current IR
when diode is not conducting and forward bias voltage VD when it is conducting. In
many applications the temperature sensitivities of these parameters are of
considerable influence on the temperature sensitivities of functional parameters of
the circuits incorporating diodes.
The reverse current is approximately given by (2.5). All parameters except ni
are constant independent of temperature, whereas the temperature dependence of
ni2 is determined by [45]:
ni2 = AT 3e
−Vg ϕ t
,
(2.12)
Power electronics
72
where: T [K] is temperature, A=1.5*1032cm6K3, Vg is the energy gap voltage and at
room temperature it is 1.11V. Voltage Vg is also temperature dependent and for
silicon it is approximately determined by 1
Vg (t) = V go - 3.6 ×10 −4 T ,
(2.13)
where Vgo=1.21V is the energy gap voltage for silicon at absolute zero. The reverse
current thus can be written in the form:
I R = BT
3 / 2 -V g ( 2ϕ t )
e
,
(2.14)
where:
B = qS A1/ 2
d
.
2τ 0
(2.15)
By differentiating (2.14) in terms of temperature and after rearranging the
temperature coefficient of the reverse current is obtained as:
dI R
1 ⎛ V g0 ⎞
⎜ 3+
⎟.
=
ϕ t ⎟⎠
I R dT 2T ⎜⎝
(2.16)
At room temperature To=300 oK, the temperature potential is ϕ=26mV, and
Vgo=1.21V and:
dI R
I R dT
T0
⎡ 1 ⎤
= 0.0825 ⎢ o ⎥ .
⎣ C⎦
(2.17)
Very often, however, in use it is a more practical expression for IR=f(T) is the
form:
I R (T)= I R (T0 )2
T − T0
Tx
,
(2.18)
where; IR(To) is the current IR at temperature To and Tx is temperature variation with
respect to To which doubles the value of IR. Tx can be calculated by equating (2.14)
and (2.18) which gives:
⎞ T − To
3 T V g ⎛ ϕt
⎜
ln +
ln2 .
- 1 ⎟⎟ =
⎜
2 T 0 2ϕ t ⎝ ϕ t ( T 0 ) ⎠
Tx
(2.19)
If (T-To)/To << 1 the logarithm can be written in the form:
ln
⎛ T − To ⎞ T − To
⎟≈
= In⎜⎜1 +
.
Tx ⎟⎠
Tx
T0
⎝
T
(2.20)
Since ϕt/ϕt(To)=T/To, from (2.19) and (2.20) it follows that:
Tx=
2 ln 2
T0 .
3 +V g ϕ t
(2.21)
2 Diodes and Transistors
73
At room temperature (T=300 oK) for a silicon diode Tx= 9 oC. This would mean
that the reverse current doubles for each 9 oC. Here the influence of the reverse
saturation current is neglected. It can be shown that its variation with temperature
is higher by a factor of 2 (it doubles for each 4.5 oC) since the generation current is
proportional to ni (IG≈IR∼ni) whereas the injection current is proportional to ni2
(IS∼ni2). Due to the influence of the temperature variations of IS it is accepted in
practice that the total reverse current doubles for each 10 oC, i.e.:
T − T0
I R = I R (T0
o
)2 10 C
.
(2.22)
It should be emphasized that for small silicon diodes current IR(To) is quite small
and in many applications its temperature variation is of no importance.
Forward bias voltage Vd is also a function of temperature. The case of high
currents ID , when md =1, will be considered first. Now the diffusion current
compared to the generation-recombination current is dominant and on the basis of
(2.2), (2.7), and (2.12), taking that pno=ni2/ND and npo=ni2/NA , one obtains:
Vd = Vg − ϕt ln
DT 3
.
ID
(2.23)
where D is a temperature independent constant. By differentiating Vd in terms of
temperature at a constant current ID it follows:
dVd Vd dVg ϕ t ⎛ V g ⎞
− ⎜ 3 + ⎟⎟ .
= +
ϕt ⎠
dT
T
dT T ⎜⎝
(2.24)
At room temperature for Vd=0.7V:
dVd 700
26 ⎛
1110 ⎞
mV
− 0.36 −
=
⎜3+
⎟ = −2 o .
dT
300
300 ⎝
26 ⎠
C
Therefore, the temperature coefficient of the forward bias voltage is negative.
Typically, Vd decreases by 2mV if the temperature increases by 1 oC. It should be
stressed that expression (2.24) is general because it also apllies at low currents.
Then md=2 and instead of IS the generation-recombination current proportional to ni
is dominant so:
V d = V g - 2 ϕ t ln
PT 3 / 2
ID
,
(2.25)
wehere P is a temperature independent constant. By differentiating (2.25) in terms
of T after rearrangement one obtains that at low currents dVd/dT is determined by
(2.24). From (2.24) it is noticeable that the temperature coefficient depends on the
position of the operating point. E.g. for VD = 0.6V dVd/dT=2.32mV/oC and for
VD=0.8V dVd/dT =1.66mV/oC. In general, it can be said that depending upon the
Power electronics
74
operating regime the temperature coefficient of the forward bias voltage is withim
limits –1.5mV/oC and –2.5 mV/oC.
V
8
VI
V
V
Fig. 2.5 The basic diode switching circuit (a) and distribution of holes in the n-region (b)
2.1.2 The dynamic diode characteristics
In addition to the static parameters in the switching regime it is important to
know the dynamic response of the diode. The dynamic characteristics of the diode
are determined by the transition processes, i.e. the turn-on/turn-off transition times
in response to a pulse drive.
Allowing the diode be driven through resistance R by a pulse voltage source
varying between –V2 and V1 (Fig. 2.5). The turn-on processes at instant t=0 will be
considered first. For t<0 VI=-V2 the diode is reverse biassed and off. A change of
the input voltage at t=0 turns-on the diode. If R is much higher than the diode
resistance, the current through the diode is:
ID=
V 1 -V D ≈ V 1
,
R
R
(2.26)
because VI>>VD. It is known that diode current is proportional to the gradient of
the injected holes at the edge of the transition region, i.e.:
I D = -qS D p
dp
V
|x=0 = 1 = const.
dx
R
(2.27)
During the turn-on process the hole concentration at the edge of the transition
region grows from the equilibrium concentration pno to the concentration
determined by the steady state voltage applied across the diode. Since the current
2 Diodes and Transistors
75
through the diode is constant, the change of the hole concentration at the edge of
the transition region is also constant (Fig.2.5b). Practically the steady state is
established after a time which is somewhat longer than the lifetime of the holes, τp.
In general the spatial concentratiron of holes in the n region during turn-on
(Fig.2.5b) is determined by the diffusion equation:
∂2 ( Δ p n ) ∂( Δ p n ) Δ p n
=
+
,
Dp
∂t
∂ x2
τp
(2.28)
where Δpn=pn - pno is the excess hole concentration in the n region. The
equation governing the excess hole charge can be obtained if equation (2.28) is
multiplied by qSdx and integrated along the neutral region from x=0 to x=w.
Therefore:
w
w
⎡ ∂( Δpn )
1
∂( Δpn ) ⎤ d
eSΔ pn dx .
−
qSDp ⎢
⎥ = dt qSΔ pn dx +
x
x
∂
∂
τ
p
⎣
w
0⎦
0
0
∫
∫
(2.29)
Since the hole charge is determined by
w
∫
Q p = qSΔ pn dx
(2.30)
0
and taking into account (2.27), equation (2.29) can be written in the form:
d Qp Qp
+
.
I p (0) - I p (w)=
dt
τp
(2.31)
In the same way it is possible to derive the equation for the excess electrons in
the neutral region. In practice, however, the impurity concentrations of the two
sides of the junction are distinctly asymmetric, thus NA>>ND, pno>>npo and
consequently Qp>>Qn. This indicates that the infulence of holes on the dynamic
process is dominant. Due to this, the indices “p” in (2.31) can be replaced by “d”.
Since Ip(0) – Ip(w) ≈Ip(0)=Id it follows:
d Qd Qd
.
(2.32)
+
Id =
dt
τd
This is the charge control equation and it represents the basic relation between
diode current and the excess minority carriers in the dynamic operating regime of
the diode. In the steady state for a conducting diode dQd/dt=0 and Id=Qd/τd . The
injection process is in equilibrium with the recombination process. In other words a
dynamic equilibrium between the injection and recombination has been
established. The amount of charge in the vicinity of the transition region is constant
and it is proportional to the current through the diode.
At the instants of to the input voltage abruptly changes from +V1 to -V2. The
diode is reverse biased, but the current through the diode will not drop immediately
Power electronics
76
to the value of the reverse current. On the contrary, the diode exhibits low
resistance conducting for some time in the reverse direction (cathode – anode), the
current being determined by the external elements. Namely, if Vd <<V2, the reverse
current through the diode is:
I I ≈ V 2 R 2 = const.
(2.33)
When, at instant t=to the diode is abruptly reverse biased, the direction of the field
applied to the pn junction will change. The direction of the applied field is from the
cathode towards the anode and it supports movement of the minority charge
carriers. Thanks to this, the excess holes from the n region return to the p region.
The direction of the change of hole concentration at the edge of the junction is
altered (Fig. 2.6a). Since the current is constant, the slope of the hole concentration
at the edge of the junction is also constant. During this time the piled up charge
clears away. A constant reverse current (low diode resistance) will exist as long as
the hole concentration at the edge of the junction is greater than zero. The duration
of this phenomenon is called the discharge time, often the accumulation or storage
time. It is denoted by ts. Therefore, during ts the charge piled up in the vicinity of
the pn junction clears away, i.e. during ts the diode retains low resistance.
pn
p(0,0)
t 0 < t 1< t 2 < t 3
t1
a)
t= t 0
2
t3 = tI
pn0
t→ ∝
x
id
I D=
b)
V1
R1
tI
t0
I1 =
t II
IR
V2
R2
t
tf
ts
t 0p
Vd
( I D- I I ) rs
I D rs
tI
t0
t II
I I rs
t
c)
-V2
Fig. 2.6 Variation of the hole concentration (a), current (b), and voltage (c) during the
turn-off process.
2 Diodes and Transistors
77
From equation (2.32) by putting Id=II and with initial condition Qd(0)=τdID, it
follows that the change of the excess hole charge is:
Qd (t) = τ d ( I D + I I ) e − t
τd
− I I τd .
(2.34)
From condition Qd(ts)=0 and (2.34) the storage time is:
t s = τ d ln(1 + I D I I ) .
(2.35)
Therefore, the storage time is lower if the forward current is lower (Fig.2.7a), since
the stored charge is lower. On the other hand, the storage time is lower if the
reverse current is higher (Fig.2.7b), because the process of clearing away the
stored charge is faster.
Fig. 2.6 shows the variations of the current and voltage of a diode in the
transient regime. At instant t=to the voltage undergoes a negative swing:
ΔV = r s ( I D - I I ) .
(2.36)
Here rs is the ohmic resistance of the diode and ID – II is the current swing through
the diode at the initial moment. During ts the voltage across the diode drops to a
value -rsII. After ts diode is obviously reverse biased. The turn-off process
continues until the reverse current IR is attained. The current through the diode
reduces and the voltage across it grows more negative. This time is called fall time
and is denoted by tf. Practically, during tf the capacitor formed by the reverse
biased pn junction is charged. The total turn-off time of the diode ts+tf is called
recovery time denoted by tr, sometimes reverse recovery time denoted by trr.
d
id
ID
ID3
t s1
ID2
0
ID1
t s1
t s2
t s2
i1
i4
II4
t s3
0
i2
II
a)
i3
t
i3
t I
I3
i1
t s3
i2
II2
b)
Fig. 2.7 The illustration of the dependence of storage time on forward current for a
constant reverse current (a) and on reverse current for a constant forward current (b).
It has been shown that the duration of the transient process is directly
proportional to the lifetime of the minority carriers. For this reason in fast diodes
for the purpose of reducing τp in the n region the recombination centers, most
frequently the atoms of gold, are introduced. In this way it is possible to obtain τp <
1ns. The fast diodes, however, have larger reverse saturation currents and lower
breakdown voltages. The lifetime of holes in diodes with gold atoms grows with
temperature. Namely:
Power electronics
78
τ p (T) = τ p (T0 )(T T0 ) r ,
(2.37)
where r is a constant; for low injections in silicon it amounts to 3.5 and in
germanium 2.2. E.g. for a temperature increase from 213 K (-60 oC) to 353 K (+80
o
C) the average lifetime in silicon increases nearly six times. The duration of the
transient process, thus largely depends upon temperature.
2.1.3 Schottky diodes
It is known that the junction of a metal and a weakly doped semiconductor
possesses rectifying properties. E. g. at a junction aluminum - n-type silicon, when
the donor concentration in silicon is ND < 5*1018 cm-3, a Schottky barrier is formed
and the junction is conductive in one direction and non-conductive in the other. A
structure metal – n-type semiconductor with typically ND < 1016 cm-3 makes a
Schottky diode.
A Schottky barrier at a metal-semiconductor junction depends upon the type of
metal and is within limits 0.58 and 0.85V. This barrier, similarly to that of a pn
junction, prevents the diffusion of electrons from metal to semiconductor in a nonbiased diode. A positive polarization of a diode (metal is at a higher potential)
decreases the potential barrier and electrons from semiconductor cross over to the
metal. A reverse polarization increases the potential barrier and widens the space
charge region which prevents the movement of electrons. The diode is then not
conducting. On the semiconductor side the phenomena are identical to those in a pn
junction.
The static V-I characteristic of a Schottky diode is similar to that of a pn
junction diode (Fig. 2.8) and can be written in the form:
I d = I D 0 (eVd
ϕt
− 1) ,
(2.38)
where the reverse saturation current is:
I D 0 = K SBT 2 e −φ B ϕ t .
(2.39)
KSB is a constant which is determined experimentally and φΒ is a Schottky barrier.
The reverse current of Schottky diode is three to four orders of magnitude higher
than the reverse current of a pn junction diode of the same surface. For a junction
with the surface of S=100 μm2 the reverse current is within limits 2*10-14A and
1nA, depending on the material used.
Except for the difference in the reverse currents the threshold voltages of
Schottky and pn junction diodes are quite different. For a Schottky diode this
voltage is typically 0.3V whereas for Si diode it is approximately 0.6V. Due to the
smaller potential barrier the temperature coefficient of the forward voltage for a
Schottky diode is smaller than that of pn junction diode (Fig. 2.8b). By neglecting
one in the brackets of equation (2.38) and having in mind (2.39) it follows:
2 Diodes and Transistors
79
φ ⎞
dVd
V ϕ ⎛
|Δ I d=0 = d - t ⎜⎜ 2 + B ⎟⎟ .
dT
T T⎝
ϕt ⎠
(2.40)
For a Schottky diode with aluminum at room temperature φΒ=0.7V. If VD is taken
to be 0.4V, one obtains that dVd/dT=-1.2mV/oC. The experimentally obtained
characteristics for the pn junction and Schottky diodes (Fig. 2.8b) show that the
temperature coefficient of a Schottky diode is smaller by about 0.4mV/oC.
diode
Schottky
diode
diode
Schottky
diode
V
μ
Fig. 2.8 The V-I characteristic of Schottky diode (a) and temperature coefficient of
forward voltage (b).
Schottky diodes are faster. In pn junction diodes the current is carried
predominantly by the minority carriers. Owing to their crowding around the
junction a delay arises in the turn-off process. In Schottky diodes the electrons are
the free charge carriers in the metal and majority carriers in the semiconductor. The
current is thus carried by the majority carriers and there is no effect of crowding of
the minority carriers. Thanks to this Schottky diodes are considerably faster
compared to the pn junction diodes. The recovery time of small-signal Schottky
diodes is typically less than 0.1nS.
2.1.4 The selection of pulse diodes
For a good selection of diode in each specific circuit it is necssary to know its
operation well, the circuit properties and manufacturer’s data. This data are usually
given in the form of maximum ratings of the static parameters in the forward and
reverse regions and the parameters of the transient state. Usually the following
parameters are given at 25oC:
• the maximum reverse voltage VI or VR (this is the maximum negative voltage
still not causing the breakdown),
• the maximum reverse current IR or II (this is the current at VI),
• the maximum forward dc current ID or IF,
Power electronics
80
• the maximum forward dc voltage VD at current ID,
• the maximum permitted power PD (often this information is given instead of ID
or VD),
• the maximum allowed junction temperature Tjmax (this is most often the
temperature at which the reverse current is not greater than the given value of II.
Otherwise, the maximum pn junction temperature is 90oC for germanium and
175oC for silicon diodes),
• the diagram of the permitted forward current vs. temperature (Fig. 2.9a),
• the diagram of the permitted power vs. case temperature (Fig. 2.9b).
This data are given for diodes regardless of the purpose. In particular, for pulse
diodes the following additional data is given:
• the maximum forward current IDM, when the current through the diode flows in
pulses (often the pulse width for a given IDM is specified), and
• the maximum recovery time trr (usually both the forward and reverse currents of
the transient regime are given for which the specified trr is garanteed).
Table 2.1 contains the maximum ratings of the basic parameters for some types
of power, low-power, and Schottky diodes
Pj [W]
I D [A]
Pj max
2
1
Ta [°C]
60
120
175
Ta [°C]
Tco
T j max
Fig. 2.9 The permitted forward current as a function of the ambient temperature (a) and
the permitted junction power as a function of the case temperature (b).
The dependence of the forward DC current on the ambient temperature Ta
(Fig.2.9a) shows that for Ta < 60oC the forward current is constant ID=2A in the
given example. Above this temperature the permitted froward current drops and for
Ta=Tjmax it is zero.
2 Diodes and Transistors
81
Table 2.1 The basic parameters of different types of diodes
Type
Ip[A]
IDM[A]
The characteristics at 25oC
VD[V]
ID[A]
VI[V] IR/VI[mA]
Power diodes
25
50
80
3
500
1500
1500
60
0.85
0.85
0.92
1.3
20
50
80
3
50
200
100
400
2.5
5
5
0.5
ID=II=10
mA
35
60
60
2
8
100
1.3
8
300
2.5
2.2
50*10-5
50*10-5
50*10-5
100*10-5
4
2
2
5
0.25*10-3
<5(τ<10
0ps)
Tj=100OC
10ms
BYW 77-50
BYW 78-200
BYW 08-100
BYT 03-400
BYT08P300A
trr,max[ns]
Tj=100OC
Low power diodes
1N4149
1N4151
1N4152
1N3070
0.2
0.2
0.2
0.2
8.3
0.5
0.5
0.5
0.5
bat 17
0.3
-
1
0.88
1
0.6
75
0.05
45
0.02
40
0.1
200
Schottky diodes
10
4
The power dissipated in a diode is PD=VDID and it behaves as a source of heat.
Consequently, diode temperature increases. Thus the process of selfdestruction is
possible since the influence of the current temperature coefficient which is positive
prevails over the voltage temperature coefficient which is negative. Above case
temperature Tc0 the maximum permitted power of the junction decreases (Fig.
2.9b). In the range Tco < T <Tjmax :
T jmax - Tc0 T jmax - T c
=
,
(2.41)
P jmax
Pj
where: Tc is case temperature, Pj is permitted, and Pjmax is the maximum permitted
junction power. From (2.41) it follows:
T jmax - T c
,
(2.42)
Pj=
R jc
where:
R jc =
T jmax − T c0
P jmax
(2.43)
is the thermal resistance between junction and case. A part of the heat is exchanged
between the case and the ambient. In relation to this the thermal resistance caseambient is defined in that the junction-case resistance is subtracted from the total
resistance, i.e.
Power electronics
82
Rca =
T jmax - T a
- R jc .
Pj
(2.44)
The removal of heat is facilitated by mounting a diode on the heat sink. The
junction temperature is then:
(
)
T j = P j R jc + R ch + R ha + T a ,
(2.45)
where: Rch and Rha are the respective resistances case-heat sink and heat sinkambient.
2.2 BIPOLAR TRANSISTOR AS A SWITCH
The applications of diodes as switches are quite limited owing to the fact that a
diode is a two terminal device so the control and controlled circuits are the same. A
transistor is a three terminal device and the control circuit is separated from the
load. In accordance with this it is a standard switching element. In principle,
transistrors can be connected to a switching circuit in three different
configurations: common-emitter, common-base, or commom-collector. As a rule,
however, transistors are used as a switch in the common-emitter configuration.
Namely, in this case it is the highest ratio of the load current (collector current) to
the input control current (base current) which maintains the on state of the
transistor. In other words, this configuration requires the least power for
performing control which is the basic requirement for any switch.
V
Ic
saturation region
active region
V
cut off
region
V
V
Fig. 2.10 The basic switching circuit (a) and operating regions of transistors (b).
In addition to the transistor being used as the switch, the basic switching circuit
comprises a load and a power supply (Fig.2.10a). Depending upon the position of
the operating point the transistor will be in one of the three possible regions:
saturation, cut off, or the active region (Fig.2.10b). As a switch the transistor is
either in saturation or is cut off. The saturation corresponds to the on-state and cut
off to the off-state of the switch. These are the static states of the switch. For the
2 Diodes and Transistors
83
analysis of the parameters of the switch use will be made of the Ebers-Moll
equations given in the following form:
(
(e
)
− 1) ,
I C = α N I E − I CO eVBC /( mcϕ t ) − 1 ,
I E = α I I C + I EO
VBE /( mcϕ t )
(2.46)
(2.47)
where: αΝ and αΙ are the respective current gain coefficients of the transistor in
the common-base connection for the direct (normal) and reverse modes, IC0 is the
collector current with the emitter circuit open, IEo is the emitter current with the
collector circuit open, mc and me are the respective correction coefficients of the
collector and emitter pn junctions. Like the diode mc and me are 2 at low currents
and 1 at medium currents.
2.2.1 The cut off region
In the cut off region the transistor as a switch is in the off state. It would be
ideal if the collector current in this state, i.e. the load currtent, was equal to zero. In
reality, however, this current exists. Its value depends upon by which method the
transistors have been switched off. Each of these methods will be analysed.
1. Both pn junctions are reverse biased, i.e. VBC < 0 and VBE < 0
Let ⏐VBC ⏐>> mcϕt and ⏐VBE ⏐>> meϕt (these conditions are already fulfilled if
VBC and VBE are severeal hundreds mV since ϕt=26mV and max{me , mc}=2). Then:
e
V BC /( m cϕ t )
<< 1
and
e
V BE /( m eϕ t )
and from (2.46) and (2.47) it follows:
I C = α N I E + I CO
I E = α I I C - I EO .
From (2.48) and (2.49) having in mind that
α I I CO = α N I EO
<< 1 ,
(2.48)
(2.49)
(2.50)
one obtains that the collector and emitter currents, when both junctions are reverse
biased, are determined by
1- α I
(2.51)
,
IC =
I
1 - α I α N CO
IE = −
α I (1 - α N )
.
I
α N (1 - α N α I ) CO
(2.52)
Typicall values of the current coefficients are αΝ = 0.96 - 0.995 and αΙ =0.3 – 0.7.
At small currents these values are several time smaller. Thus, αΝ αΙ <<1 and:
Power electronics
84
I C ≈ (1- α I ) I CO < I CO ,
αI
IE ≈ −
I CO
βN
(2.53)
(2.54)
where:
αN
(2.55)
1 - αN
is the common emitter current gain.The transistor can be replaced by the simplified
equivalent circuit (Fig. 2.11a). The negative base current is given by:
βN =
I B ≈ −(1 − α I +α I β N ) I C 0 .
(2.56)
At small currents βN ranges from 1 to 5 and αΙ <<1 so that IC ≈ ICo , IE ≈ 0, and
IB=-ICo. The transistor equivalent circuit is as shown in Fig.2.11b. This is, therefore,
equivalent to the open emitter. Since IC = -IB, it is customary that the collector-base
current is denoted by ICBo (open emitter collector-base current) and is often called –
the reverse base current. It is straightforward to show that VBE < 0 when the emitter
is open. Namely, by introducing IE=0 and IC=IC0 in (2.47) one obtains:
VBEO = meϕ t ln(1 − α N ) = −meϕ t ln(1 + β N ) .
(2.57)
For me=2 and βN=3, VBE0 = -72mV. Current ICB0 is temperature dependent and, like
the reverse diode current, it doubles with every 10oC of temperature increase, i.e.:
I CBO (T)= I CBO (T0 ) 2
T − T0
10 oC
.
(2.58)
Usually ICB0 at room temperature is of the order of nA and for power transistors of
the order of μA. In most practical applications ICB0 can be neglected and the
transistor can be considered as an open circuit (Fig. 2.11c).
2. The second method of achieving cut off is obtained when: VBE =0
and VBC < 0,
i.e. when the base and emitter are short circuited and the collector junction is
reverse biased. For ⏐VBC ⏐>> mcϕt from (2.46) and (2.47) it follows:
I CO
IC = 1− α α ,
N
I E = α I IC =
I
αI
I .
1 − α N α I CO
(2.59)
(2.60)
Since αNαI << 1, then: IC ≈ IC0 , IE ≈ αIIC0 . The base current is IB= IE - IC =-(1-αI)IC0
. Since αI << 1, IB ≈ -IC0 . Therefore, when the base and emitter are short circuited
(VBE=0) the currents are approximately as if VBE < 0 or the emitter was open, i.e.:
(2.61)
I C ≈ − I B = I CBO , I E ≈ 0 .
2 Diodes and Transistors
85
I
αI
βN
Fig. 2.11 The simplified equivalent circuits of transistor in the cut off region when both
junctions are reverse biased.
3. Transistor will be cut off when: IB = 0, VBC < 0,
i.e. if the base is open and the collector junction is reverse biased. By replacing
IC=IE=ICE0 in (2.46) and since ⏐VBC ⏐>>mcϕt it follows:
I CO
I CEO = 1 − α = (β N + 1) I CO .
N
(2.62)
In this case the transistor can be replaced by the equivalent circuit of Fig.2.12.
Therefore, if the base is open, the collector current is βN + 1 times greater than ICB0 .
It should be emphasized that βN at small currents is typically from 1 to 5, and ICE0
=(2-6)ICB0 . The open base voltage VBE=VOBE can be obtained from (2.47) by the
replacement IE=IC=ICE0:
VOBE = meϕ t ln(1 + β N β I )> 0 .
(2.63)
E.g. for βN=3, βI=0.25 and me=2, VOBE=133mV.
The characteristics of currents IC , IE , IB as functions of voltage VBE, for VBC<0
(Fig.2.13) show that the transistor is in the cut off when VBE < VOBE . In practice it
could be considered that a transistor is cut off if VBE<VBEt , where VBEt is the voltage
VBE at the knee of the characteristic IB=f(VBE). VBEt is the conduction threshold
voltage and for silicon transistors it is typically 0.5 to 0.6V.
Power electronics
86
IC , IE , IB
I CE0 =( βN+ 1) I CB0
IC
C
B
I CB0
I B=0
CEO
V BE=m e t ln(1- a N)
-ICB0
E
Fig.2.12 The open base
equivalent circuit.
IE
IB
V BE
βN
)
βI
V BE=m eϕt ln(1+
Fig. 2.13 Transistor currents in the cut off region.
Very often it is not convenient to realize the cut off state by VBE < 0 or VBE =
0. The third case (IB = 0) should be avoided since the current ICB0 is relatively large
and, as will be shown, the voltage limitations of transistors are then the most
significant. For this reason the cut off state is often realized by a resistor R between
the base and the emitter (Fig. 2.14a). Resistor R is chosen so that VBE < VOBE . Then
the base current is negative and it is certain that VBE > 0. The smaller VBE the
smaller collector current. Therefore it is assumed that VBE is approximately zero,
i.e. VBE << mcϕt . Since ⏐VBC ⏐>>mcϕt the emitter current is:
(
I E = α I I C + I EO e
V BE /( meϕ t )
)
−1 ≈ α I I C +
I EOVBE
,
meϕ t
(2.64)
and the collector current is determined by (2.48). Since:
V BE = R(I C − I E ) ,
(2.65)
by using (2.64) and (2.48) one obtains:
α N me ϕ t +α I I CO R
I CO ,
α N (1 − α N α I ) me ϕ t +α I (1 − α N ) I CO R
α N me ϕ t + RI CO
I CO .
I E = αI
α N (1 − α N α I )me ϕ t + α I (1 − α N ) I CO R
IC =
(2.66)
(2.67)
2 Diodes and Transistors
87
2.5
IC
I C0 =5 mA
IC , IE
2
+V CC
A
IB
B
1.5
IC
IB
Tr
1
IC
a)
C
IB
0.5
10 0
IB
10 00 10 00 0
b)
10 5
10 6
10 7
R[ W ]
Fig. 2.14 The realization of the cut off state by a resistor (a) and the dependencies of the
emitter and collector currents on resistor R for IC0=5μA, (b) with αN=0.8,
αI=0.3(A) αN=0.7, αI=0.1(B), and αN=0.3, αI=0.1(C).
It is straightforward to show that VBE=0 and IB=0 are both special cases of the cut
off state by a resistor between the base and emitter. Namely, from (2.66) and (2.67)
it follows that R=0 results in (2.59) and (2.60) and R→ ∞ results in (2.62). On the
basis of the variations of collector and emitter currents as functions of R (R axis is
shown in the logarithmic scale)(Fig.2.14b) it follows that for the resistor R values
below several kΩ currents IC and IE are approximately as if the base and emitter
were short circuited. Thus the practical values of R are within limits from several
hundreds Ω to several kΩ.
2.2.1.1 The voltage limitations
When a transistor is off, the collector junction is always reverse biased and
sometimes the emitter junction too. Care must be taken that the reverse voltage is
lower than the breakdown voltage. The impurity concentrations in the emitter
barrier of diffused transistors are quite high and the emitter-base breakdown
voltages are small, typically they are between 5 and 7V, rarely 9V. The reverse
voltages of the emitter junction are usually smaller than the breakdown voltage.
The reverse voltage of the collector junction is higher. The impurity concentration
in the collector barrier is smaller and the breakdown voltage is higher and depends
upon the connection of the transistor. At high reverse voltages the process of
avalanche multiplication of carriers in the collector barrier arises leading to an
abrupt increase of the collector current. In fact, due to the multiplication the
parameters αN and ICB0 exhibit sharp growths so the collector current in the
common-base connection is expressed by:
(2.68)
I C = Mα N I E + MI CBO ,
Power electronics
88
where
M=
1
n
1 − (VCB BVCBO )
(2.69)
is the multiplication factor. BVCB0 is the base-collector breakdown voltage at the
open emitter (IE=0), and n is the parameter depending upon the impurity
concentration of the less doped region. For abrupt and linear pn junctions n ranges
from 2 to 6. If the emitter is open (IE=0), IC =MICB0 . In the breakdown region M →
∞ and IC → ∞ which is obtained for VCB=BVCB0 .
When a transistor is in the common-emitter connection the breakdown
phenomena are more complex and the collector current in the breakdown region is:
Mα N
MI CBO
IC =
IB +
.
(2.70)
1 − Mα N
1 − Mα N
For IB=0 the breakdown occurs at MαN =1 resulting in:
BVCEO =
BVCBO
n
β +1
.
(2.71)
Thus, for instance, if BVCB0 = 60V, n=4, and βN =50, then BVCE0 =22.6V. Therefore,
the breakdown voltage of an open base transistor is several times lower compared
to the open emitter situation (Fig. 2.15).
V
V
V
V
V
V
V
Fig. 2.15 The illustration of the breakdown Fig. 2.16 The illustration of the dependence
characteristic of a transistor in
of the breakdown voltage on R.
common-emitter (a) and common-
-base (b) connection.
Most often the transistor is cut off by a resistor between the base and emitter
(Fig. 2.14a). The base-emitter voltage is then negligibly small and the breakdown
voltage of the transistor is equal to the collector-emitter voltage. It is usually
denoted by BVCER . By introducing in (2.66) the substitutions αN =MαN and
IC0=MIC0 and from condition that IC → ∞ it follows:
2 Diodes and Transistors
89
BVCER = BVCBO n 1 −
mϕ tα N + RI CO
α Nα I .
mϕ tα N +α I RI CO
(2.72)
In the limiting cases when R→∞ (2.73) transforms into (2.71) and when R = 0,
BVCER=BVCEK (K-base and emitter short circuited), where:
BVCEK = BVCBO n 1 - α Nα I .
This expression could have been obtained directly from (2.59). Fig. 2.17 shows the
normalized voltage BVCER as a function of R, according to (22.72). At small values
of R the breakdown voltage is approximately the same as if the base and emitter
were short circuited, i.e. BVCER ≈BVCEK . Consequently, it may be concluded that the
currents and breakdown voltage of a transistor, when resistor R is within limits
from several hundreds Ω to several kΩ, are nearly the same as if the base and
emitter were short circuited (Fig.2.14 and Fig. 2.17). The breakdown voltage is
then only 10% to 20% lower than the maximum breakdown voltage BVCB0 and the
collector current is somewhat higher (up to 10%) than ICB0 .
1
V
= 5μA
0.8
0.6
n= 5
35
n= 3
0.4
0.2
100
1000
10000
10
5
10
6
10
7
Fig. 2.17 The normalized breakdown voltage as function of R for IC0=5μA, αN = 0.98, αI
=0.5, m=1.5 and for n=3 and n=5.
Example 2.1
For the switch of Figure2.71 determine breakdown voltage in the following cases
a) R→∞,
b) Resisteance between base and emiter is R=20kΩ, and R=100Ω.
Power electronics
90
The circuit of Fig. 2.10 has BVCBO=80V, αN=0,983, αI=0.1, ICO=50nA, ϕt=25mV i
n=4.
If R→∞ base is broken, so the collector current is equal to emitter current (ICEO)
and using the Ebers-Moll model,the emitter(collector) current is (2.59):
I CEO =
I CO
.
1− αN
In breakdown region parameters αN and ICO are multiplied by a factor of
multiplication M =
1
⎛ BVCB ⎞
⎟⎟
1 − ⎜⎜
⎝ BVCBO ⎠
n
, where is BVCB the breakdown voltage of pn
junction collector-emitter in a general case, and BVCBO is breakdown voltage of pn
junction collector-base with broken emitter. From the breakdown condition 1MαN→0 is obtained (2.71):
BVCE 0 =
BVCBO
n
βN +1
= 28,67V .
a) If there is a resistor R between the base and emitter of transistor, using the
Ebers-Moll model of transistor and multiplying in breakdown voltage region
coefficients αN and ICO by the factor of multiplication, the breakdown voltage of pn
junction collector-base (BVCER) is equal to (2.72):
BVCER = BVCBO 1 −
For R=20kΩ is
BVCER=75,96V.
mϕ t α N + RI CO
α Nα I ,
mϕ t α N + α I RI CO
obtained
BVCER=75,92V,
where mc=me=m.
and
for
R=100Ω is
obtained
2.2.2 The saturation region
When VBE>VBEt , the transistor is on and it could be either in the active or in the
saturation region. In the active region the collector current is IC=βIB+ICEO ≈ βIB
and:
VCE = VCC − βRC I B .
(2.73)
2 Diodes and Transistors
91
(The omission of index ‘N’ implies that normal current gains β and α are in
question). Increasing the driving current IB reduces VCE voltage up to the limiting
value VCE=VCES for IB=IBS when the operating point is in position B (Fig.2.10b). If
IB further increases above value IBS , the collector-emitter voltage and collector
current do not change and are determined by:
V CE = V CES , I CS =
V CC − V CES
.
RC
(2.74)
It is said that the transistor is in saturation, since the response (collector current ICS
or voltage VCES, in saturation) does not change with the excitation (base current).
This is because both pn junctions are forward biased and the transistor has lost its
amplifying ability which it had in the active region owing to the reverse bias of the
base-collector junction. A forward bias of the collector junction, i.e.
(2.75)
V BC > V BCt
is, thus, the condition for transistor saturation, where VBCt is the conduction
threshold of the collector junction. Since VBC=VBE – VCE, from (2.73) and (2.75)
one obtains that transistor is in saturation if:
IB ≥
VCC − (VBE − VBCt )
.
βRC
The collector-emitter voltage in saturation is:
V CES = V BE - V BC .
(2.76)
(2.77)
By substitution of (2.77) in (2.76) the saturation condition can be expressed in the
following form:
(2.78)
I B ≥ I BS ,
where
I BS =
VCC − VCES I CS
=
βRC
β
(2.79)
is the base current at the boundary between the active and saturation regions.
Because maintaining a transistor in saturation requires a driving current not smaller
than IBS, the transistor is usually called a current controlled switch. As a measure of
saturation the factor or degree of transistor saturation is often defined:
Fs = I B I BS = β I B I CS ,
where IB is the base current holding the transistor in saturation. For determination
of the saturation condition one may use (2.75) or (2.78).`It should be emphasized
that the condition (2.75) is more general because (2.78) is valid only if the load is
not a complex impedance. From (2.77), (2.46), and (2.47) it follows:
Power electronics
92
V CES = ϕ t ln
α N [ I B + I CS (1 - α I )] .
α I [α N I B − I CS (1 - α N )]
(2.80)
It has been assumed that mc=me=1. For ICS= 0 voltage VCES is minimal and
determined by:
V CESmin = V CESO = ϕ t ln
1
αI
.
(2.81)
This means that IC-VCE characteristics compared to the origin are shifted to the
right by value VCESO (Fig. 2.18). For diffused transistors 0.3< αI < 0.7, and 9.3mV
< VCES < 31.3mV. These limits should be increased by a factor of 1.2 to 1.5 because
at small currents the correction factor is mc > 1.
The temperature coefficient of voltage VCES is equal to the difference of the
corresponding coefficients of the emitter and collector diodes, i.e.:
d V CES d V BE d V BC
=
.
dT
dT
dT
(2.82)
In view of (2.24)
d V CES dT = V BE T - V BC T = V CES T .
(2.83)
Therefore, the temperature coefficient of voltage VCES is positive and at room
temperature (T = 300oK) it is dVCES/dT= (0.33 – 0.66)mV/oC.
The collector-emitter resistance of a transistor in saturation is determined by:
r ces =
d V CES
d I CS
=
I B =const
ϕt ⎡
⎤
1
1
+
⎢
⎥
I B ⎣ 1 + β I + I CS I B β - I CS I B ⎦
(2.84)
For βΙ =1, β =50, and IB =1mA at ICS =10mA, rces ≈ 2.8Ω and at ICS =40mA, rces ≈
3.2 Ω. This resistance should be increased by adding to it the resistance of the
collector body rc . The total collector resistance in saturation rcs=rces+rc is typically
5 to 10Ω (for low power transistors).
Over the major part of the saturation region resistance rcs is nearly constant. By
approaching the active region (weak saturation), however, the second member in
the brackets in (2.84) sharply rises with ICS. At the boundary of the saturation and
active regions ICS/IB =β and rces→ ∞ which, if the characteristic is ideal,
corresponds to resistance rce of a transistor in the active region. The increase of rces
in weak saturation, particularly for power transistors, is also a consequence of their
technological structure. This region is often called the region of quasi-saturation
(Fig.2.18b). Namely, for high voltage power transistors the resistance of the
epitaxial layer can be significant. When a transistor is strongly saturated, the
collector pn junction is strongly forward biased and the concentration of the charge
carriers is very high. The resistance of the epitaxial layer is low and does not
influence the characteristics in saturation. In the region of quasi-saturation the
2 Diodes and Transistors
93
satur ati
on
quasi
satur ation
activ
regi e
on
collector pn junction is weakly forward biased and the concentration of the charge
carriers is reduced which leads to an increase of the resistance. This is particularly
characteristic for transistors having a wide epitaxial layer (power and high voltage
transistors). In transistors having a narrow epitaxial layer, or having no epitaxial
layer, the quasi-saturation region practically does not exist.
reverse
active region
V
V
saturation
region
Fig. 2.18 The output characteristics in saturation of a transistor having a small (a) and
large (b) collector body resistance.
V
V
V
Fig. 2.19 The equivalent circuits of a transistor in saturation.
A transistor in saturation can be replaced by the collector and emitter diodes
(Fig. 2.19a) because both pn junctions are forward biased. The equivalent circuit is
shown in Fig. 2.19b. Resistance rbs is within the range from several tens Ω up to
several hundreds Ω and rcs from several up to ten Ω. Most of the time these
resistances can be neglected and the simplified equivalent circuit of a transistor in
saturation is shown in Fig. 2.19c. Typical voltage values are: VBES =(0.7 - 0.8)V
and VCES =(0.1 - 0.2)V.
Power electronics
94
Example 2.1
+VCC
a) For a switch of Figure 2.20 calculate the
collector-emitter voltage when the transistor is
in saturation for RC→∞ and RC=RB.
b) Determine the resistance collector-emitter of
the transistor in saturation (rCES)
+VBB
The circuit of Fig. 2.20 has RB=4,7kΩ,
αN=0,952, αI=0.3, ϕt=25mV, VBES=0,75V i
VCC=VBB=15V.
RC
iC
vC
Tr
RB
Figure 2.20
a) Based on the Ebers-Moll model,the voltage between the collector and emitter of
bipolar transistor in a state of saturation (VCES) (2.80) the following expression can
be derived:
VCES = ϕ t ln
α N [I B + I CS (1 − α I )]
= ϕ t ln
α I [α N I B − I CS (1 − α N )]
⎡
βN
⎣
FS
α N ⎢1 +
⎤
(1 − α I )⎥
⎦
⎡
⎤
β
α I ⎢α N − N (1 − α N )⎥
FS
⎣
⎦
,
(2.85)
where
β RC VBB − VBES
IB
=
.
I BS
RB VCC − VCES
For RC→∞ current ICS→0, and on the basis (2.85) :
FS =
VCES = ϕt ln
1
αI
= 31mV .
For RC=RB factor of transistor saturation FS≈β=20. Based on expression (2.264),
voltage collector-emiterfor bipolar transistor in saturation region is VCES=44,6mV.
b) Collector-emiter dynamic resistance for bipolar transistor in saturation region
rCES is (2.84):
2 Diodes and Transistors
rCES =
dVCES
dI CES
95
⎡
⎤
⎢
⎥
1
1
ϕt
⎢
⎥.
=
+
I B = const
I B ⎢1 + β + β N β − β N ⎥
I
N
⎢⎣
FS
FS ⎥⎦
For RC→∞ dynamic resistance is:
rCES =
ϕt ⎡ 1
1 ⎤
+
⎢
⎥ = 6,18Ω.
I B ⎣1 + β I β N ⎦
For RC=RB collector-emitter resistance is:
rCES =
ϕt ⎡
1
1 ⎤
+
⎢
⎥ = 3,83Ω.
I B ⎣ 2 + β I β N − 1⎦
2.2.3 The static transfer characteristic
It is customary that the static states of a switching circuit are defined by the
voltage transfer characteristic which represents the dependence of the output on
input voltage, i.e. Vo=f(VI). There are three parts of the characteristic (Fig. 2.20). In
the first part VI < VBEt ≈ 0.5V and the transistor is off. In the vicinity of VBEt the
transistor is in the region of weak conduction. However, the collector current is still
negligible compared to ICS. Let VBE/( meϕt)=5. Then, from (2.46) and (2.47):
1+ α I e5
5
I C = 1 − αα I CO ≈ α I e I CO ,
I
(2.86)
and the output voltage is
5
V OH = V O ( V BEt ) = VCC - RCα I e I C 0 .
(2.87)
Let, e.g. VCC=5V, RC=1kΩ, and αI=0.3. Then VOH=VCC – 223*10-6V≈VCC for
IC0=5nA and VOH=VCC – 223*10-3V≈VCC for IC0=5μA. Thus, the voltage drop
across this resistance is negligible compared to VCC. For this reason it is taken that
for all voltages VI<VBEt the transistor is off and the output voltage is equal to the
supply voltage VCC.
In the second part of the characteristic the transistor is in the active region.
According to (2.46), (2.47), and (2.50) the collector current is:
αI
IC =
I CO e
1 − αα I
Vi
m eϕ t
+
I CO .
1 − αα I
(2.88)
Power electronics
96
Since now α≈1, ααI≈αI , the second member in (2.88) is negligible and:
Vo
VI
V
o
=
V
I
V
V VV
VI
Fig. 2.21 The transfer characteristic.
V O = V CC − β I I CO RC e
Vi
meϕ t
.
(2.89)
The output voltage drops quickly with the increase of VI until the transistor enters
the saturation region. The difference
ΔV I = V BESt - V BEt
(2.90)
is the transition region width of the transfer characteristic. VBESt is the input voltage
for which the transistor is at its boundary between the active and saturation regions.
This voltage can be obtained from (2.89) for Vo=VCES. This voltage should be
increased by the voltage drop across the base resistance rbs . At last one obtains:
ΔV I =
rbs I CS
β
+ ϕ t ln
I CS
− VBEt .
β I I CO
(2.91)
Typically ΔVI=(0.1 – 0.2)V. In general, however, the width of the transition region
is defined as the difference between the input voltages for which the voltage gain is
–1, i.e. dVo/dVI=-1.
The voltage difference between the high and low output levels is the amplitude of
the output voltage, i.e.
V m = V OH − V OL = V CC − V CES ≈ V CC .
REGENERATIVE SWITCHES
3
R egio
or sa n of c on d
tu rat
ion uc tion
A special group of semiconductor switches are made up of elements which have
properties that each change of state is accompanied by a positive feedback, or by a
regenerative (cumulative) process. The static I-V characteristic have the shape of
the letter “S” (Fig.3.1), so they are often called the “S” elements. Function I=f(V)
consists of three different regions. In the first region, specified by V<Vp and I<Ip ,
the switch is off and this is the high-resistance region. P is the breaking point and
its coordinates are the break point voltage Vp and current Ip . The break point
current is the lowest current for which dV/dI= 0. The third region is the lowresistance region and it is specified by I>Iv and Vv<V<Vp . V is the valley point of
the characteristic. Vv and Iv are the minimum voltage and current of the conduction.
Iv can be defined as the minimum current for which dV/dI= 0.
Negative resistance region
or transition region
Cut off region
Fig. 3.1 The static characteristic of a regenerative switch.
The region of negative differential resistance is between points P and V since
increasing the current is accompanied by the corresponding decreasing of the
voltage. This is the region of instability and the operating point can not stay in it.
Namely, at points P and V, where dV/dI= 0, the regenerative process supporting the
change of state of the switch is initiated. Thus, each change of state from region I
to region III and vice versa is accompanied by a regenerative (cumulative) process.
In the analysis of the circuits containing the regenerative switches, the I-V
characteristic is usually approximated by linear segments in each region (Fig.3.2).
Fig.3.2 also shows the corresponding equivalent circuits of the switch in the stable
Power electronics
164
regions (I and III). Resistances R1 and R2 in the off and on (saturation) states are
determined by the slopes of the linear segments in the corresponding regions.
The resistance of the switch in the off state is defined as:
RI =
VP
,
IP − II
(3.1)
where I1 is the current of the switch at V= 0. Usually this current is negative and is
often called the reverse current. Its value varies from switch to switch from several
nA to several tenths of μA. Resistance R1 ranges from hundred kΩ to hundred MΩ.
Since, as a rule, the regenerative switches are very powerful (currents in the on
state reach hundred A), R1 and I1 can usually be neglected. Then, the switch can be
considered open and its characteristic in the open state coincides with the “V” axis
(Fig.3.2b).
Fig. 3.2 The linearized characteristics and the corresponding equivalent circuits.
The resistance of the switch in the on state is defined as:
RS = (VV − VVO ) IV ,
(3.2)
where Vvo is the minimum conduction voltage (for conduction current I= 0)
(Fig.3.2a). The equivalent circuit of the switch is made of a series connection of
resistance Rs and voltage generator Vvo (Fig.3.2a). Usually Vvo≈Vv and the
corresponding linear segment is vertical with respect to the “V” axis (Fig.3.2b).
Practically, resistance Rs is within limits of several tenths of Ω to ten Ω and can be
neglected. This means that a switch in the on state can be replaced by a voltage
generator Vv (Fig. 3.2b). Voltage Vv is typically 1V, seldom (2÷3)V as it is for
unijunction transistors.
3 Regenerative Switches
165
3.1 UNIJUNCTION TRANSISTOR – UJT
The unijunction transistor, or UJT, is one of the oldest semiconductor elements.
Compared to the standard transistor UJT has only one pn junction. A cross section
of some early designs is shown in Fig. 3.3a. The substrate is n-type semiconductor
containing a low concentration of impurities. At two ends of the substrate there are
metallic contacts of bases B1 and B2. Approximately halfway, somewhat closer to
base B2, a heavily doped p-type emitter region is diffused. Since there is only one
pn junction (like in a diode) and two bases, in the earlier days it was often called
the two-base diode.
The principle of operation and basic characteristics of UJT will be described
using the model of Fig.3.3b. The diode replaces the pn junction and RB1 and RB2 are
the respective resistances between the base contacts and pn the junction. The total
resistance of the n-type substrate between the base contacts is:
(3.3)
R BB = RB1 + RB 2
typically 5÷10kΩ.
The input static characteristic IE=f(VE) will be analyzed first. The suppliy
voltage
Fig. 3.3 The cross-section (a) and model of the unijunction transistor (b).
is fed between two bases so VB1B2 > 0. If VE = 0, diode D is reverse biased because
the cathode voltage is:
Vk = RB1
V B2B1
.
R BB
(3.4)
The input current is equal to the reverse saturation current of the diode, i.e. IE=-IEO
and, depending on the UJT type, it ranges from several tens of nA to ten μA. Now,
let VE grow. As long as the diode does not turn on, its I-V characteristic is the input
characteristic of the UJT in the off state. At VE=VK the input current is IE= 0. When
the input voltage becomes higher than VK by the threshold voltage of the diode VDt
, the diode starts conducting. The holes from the p-type region of the emitter are
injected in to the n-type region of the substrate. Since VB2B1> 0, the electric field in
Power electronics
166
the n-type substrate directs the holes towards the base B1. Owing to this in the
region of B1 free electrons are generated in order to preserve the charge neutrality.
The conductivity of the semiconductor material is given by:
(3.5)
σ = q n μn+ p μ p ,
(
)
where: q=1.6*10-19 [C] is the electron charge, μn and μp are the respective electron
and hole motilities. Since direct polarization of the pn junction increases the
electron and hole concentrations in the B1 region, the conductivity of the region
increases and resistivity RB1 decreases. Owing to this VK decreases and the voltage
across the diode increases. This leads to the enhanced injection of holes from the ptype region and further decrease of resistance RB1. The resulting process of
resistivity modulation is that of the regenerative character. Since voltage VK
decreases while the input current increases, the input static characteristic in that
region have a negative differential resistance. The regenerative process ends with
RB1 in saturation. Namely, owing to the increased concentrations of electrons and
holes their motilities’ are reduced, and at a certain period of time an equilibrium is
established between the increasing concentrations of n and p and decreasing
concentrations of μn and μp . The modulation of resistivity is completed and further
on it remains constant ranging from several Ω up to several tens of Ω . Now UJT is
in the state of conduction and its input characteristic IE=f(VE) are close to the
characteristic of the conducting diode emitter-base B1 with base B2 open (IB2= 0).
V
V
V
V
V
V
V
Fig. 3.4 The static characteristic (a) and symbol of the unijunction transistor (b).
The regenerative process is thus initiated by the start of the diode conduction when
dV/dI = 0 (point P in Fig. 3.4a). Therefore, the break point voltage is:
VP = VK + VDt = ηVB 2 B1 + VDt ,
(3.6)
where
η=
RB
RB
=
RBB RB1 + RB 2
(3.7)
3 Regenerative Switches
167
VV ,IV (nor m. V B2B1 =1 0 V )
is the resistance ratio ranging from 0.4 to 0.8. The break point current IP is typically
several hundreds of nA up to ten μA.
1.6
1.5
TA =25° C
1.4
1.3
1.2
1.1
1
10
15
20
25
VB2B1 (V)
30
Fig. 3.5 The normalized IV and VV as functions of base-to-base voltage VB2B1 .
As previously mentioned, IE-VE characteristic of UJT in the saturation region are
almost as the I-V characteristic of the E-B1 diode with IB2= 0. UJT will remain in
this region as long as current IE does not fall to the minimum conduction current Iv .
Then, the process of regenerative modulation of the resistivity of base B1 is
restarted. For IE=Iv , due to the reduction of emitter current, the concentrations n
and p have dominant influence on resistance RB1 . Since now the concentrations n
and p are decreasing, RB1 will increase. Owing to this voltage VK increases and
current IE decreases still more. The process ends with the reverse biased diode D
and the re-established value of RB1 of the UJT in the cut off region. The range of
values of current Iv is from several hundreds of μA to ten mA and the minimum
conduction voltage Vv is typically 2÷3V. Both, Iv and Vv are dependent on the baseto-base voltage VB2B1. E.g. for UJT type 2N4851-51 an increase of the base-to-base
voltage from 10 to 30V causes the minimum conductuion current Iv to rise by the
factor 1.55.
The static I-V characteristic and symbol of UJT are shown in Fig. 3.4. The part
of this characteristic in the region of negative differential resistance is shown by
dotted lines because this is the unstable region, i.e. the operating point is fleeting.
At the edges of this region the regenerative process of the resistivity modulation is
initiated. When UJT is cut off, this process arises at VE=VP and it is on when IE=Iv .
Consequently, the basic parameters of a UJT are the break-point voltage VP and
minimum conduction current Iv.
3.1.1 The temperature characteristics
The reverse emitter current IEO and the reverse saturation current of the diode
increase with temperature. The temperature characteristics of both the current Iv
and voltage Vv for UJT type 2N4851-3 (Fig. 3.6) are decreasing functions of
temperature.
Power electronics
168
The break point voltage is also temperature dependent. Constant η decreases
with temperature. Since temperature variations of RB1 and RB2 are approximately
the same, the temperature coefficient of constant η is by more than one order of
magnitude smaller than the corresponding coefficient of resistance RBB and it can
usually be neglected. Thus from (3.6) it follows:
(3.8)
dV p dT ≈ ddT Dt dT < 0 .
Therefore, VP decreases with temperature. The manufacturers of UJTs quote that
(3.8) is approximately –2.7mV/oC.
VVn -I Vn
1.4
1.3
1.2
1.1
1.0
-9
-8
-7
-6
-60
RBB [k W ]
12
2N4651- 53
VB2B1 = 10V
IV
10
8
6
VV
4
2
-40
-20
0
20 40
T[° C ]
60
80
a)
0
2N465 1-53
-50 -25 0 2 5 50 75 100 1 25 150 1 75
T[° C ]
b)
Fig. 3.6 The IV and VV normalized at T=25oC as functions of temperature at VB2B1=10V
(a) and base-to-base resistance RBB of UJT 2N4851-3 as function of temperature (b).
Since the functional parameters of the circuits using UJTs are most sensitive to
variations of VP , this voltage should be temperature stabilized. The standard
practice is to add a resistance R (Fig.3.7). Now:
V p =η
V BB
+ V Dt .
1 + R/ R BB
(3.9)
Over temperature range –55 to +125oC resistance RBB varies approximately linearly
(Fig.3.6b) and can be expressed as:
(3.10)
R BB (T) = R BB (To )[1 + (T − To )α r ] ,
where To is the room temperature. Temperature coefficient αr is approximately
8*10-3[oC-1]. Therefore, R/RBB reduces, the first member in (3.9) grows with
temperature and it could compensate the negative variation of voltage VDt .
If one assumes that η, VBB, and R are temperature independent, by differentiating
(3.9) in terms of T, one obtains:
dV p
R dRBB dV Dt
η V BB
=
+
.
2 2
dT
dT
(1 + R/ R BB ) R BB dT
(3.11)
In practice it is always R<<RBB . By equating (3.11) to zero, one obtains the
resistance R which results in a complete temperature compensation of the break
point voltage VP:
3 Regenerative Switches
R≈-
dV Dt /dT R BB
.
α r η V BB
169
(3.12)
Let dVDt/dT=-2.7mV/oC and α=8*10-3[oC-1]. Then:
R ≈ 0.34 R BB .
η V BB
(3.13)
The practical values of resistance R range from several hundreds Ω up to 1kΩ.
Fig. 3.7 The practical UJT circuits for breaking voltage stabilization (a) and limitation of
current IE in the state of conduction (b).
In order to limit the emitter current when the UJT is turned on, a resistance Ro is
inserted in the circuit of base B1 (Fig.3.7b). Typical values of this resistance are
from several tens of Ω up to hundred Ω. In this case the break point voltage is:
V p = η V BB
1 + R o / R B1
+ V Dt .
1 + ( R + R o) / R BB
(3.14)
By assuming that the temperature coefficients of RB1 and RB2 are equal and that
R+Ro <<RBB , resistance Ri at which dVP/dT= 0 is determined by the formula:
R=
1 -η
η
Ro -
dV Dt /dT R BB
.
η V BB
αr
(3.15)
therefore, when Ro is used, resistance R should be increased by factor Ro(1-η)/η.
Power electronics
170
3.1.2 The programmable unijunction transistor – PUT
The programmable unijunction transistor is a regenerative switch having
adjustable (programmable) basic parameters. It belongs to the group of four layer
structures (Fig. 3.8a), but its static characteristics and applications are identical to
those of UJT. It can be modeled by a pair of complimentary bipolar transistors
(Fig. 3.8b). The notation of terminals (A - anode, K- cathode, and G – gate) is
analogous to that of thyristors.
Fig. 3.8 The structure (a), model (b), and symbol of PUT (c).
A complete PUT is obtained by adding resistors R1 and R2 (Fig.3.9). This
element is completely equivalent to a unijunction transistor and its terminals are
denoted in the same way. In order to explain the principle of operation, allowing
the input voltage (the emitter voltage of the PNP transistor) to grow from 0 to VBB .
At VE= 0, Tp is certainly cut off. At the same time transistor Tn is also cut off. The
gate voltage is:
VG=
R1
V BB .
R1 + R 2
(3.16)
Since VBEp=VE – VG , then for VE<VG the emitter junction of transistor Tp is reverse
biased and the emitter current is IEO ≈ (αPI/αPN)ICO , where αPI and αPN are the
respective common base reverse and direct current gains of the PNP transistor. Tp
starts conducting at VE=VG+VEBt . Since ICp=IBn , Tn is also turned on. For any
increase of ICp by ΔICp , current ICn will be increased by βnΔICp . The base current of
Tp is increased by approximately the same amount causing an increase of current
ICp of βpΔIBp . Consequently, the current feedback loop is closed which ends by
turning the PUT on when both transistors go into saturation. The break point
voltage is:
V p=
R1
V BB + V EBt .
R1 + R 2
(3.17)
3 Regenerative Switches
171
The input voltage of a PUT in saturation is:
V ES = V EBSp + V CESn = V ECSp + V BESn = 0.7 ÷ 1V .
(3.18)
The resistance in this region is only several Ω and usually can be neglected.
In the course of decreasing of the input current PUT will remain in the
saturation region as long as transistor Tn is in saturation. Tp is the first to cross from
the saturation to active region. Then IBn=ICp=αpIE ≈ IE . When Tn is in the active
region, the regenerative process arises again leading to the turning off both
transistors. Therefore, the minimum conduction current is the saturation base
current of transistor Tn , i.e. IV=IBSn . If the base current of transistor Tp is neglected,
and taking into account that VCESn<VBB , then it can be written:
I v = I BSn =
V BB
β n R2
.
(3.19)
The minimum conduction voltage is:
V v = V EBp + V CESn ≈ V ES .
(3.20)
The essence of programmability of PUT is the fact that the basic parameters VP
and IV can be adjusted by changing resistances R1 and R2 . Some manufacturers
make resistors on a single crystal. Such PUTs have four terminals (Fig.3.9c). The
programmability is accomplished by adding external resistors in the base circuit of
B2 or B1 .
Fig. 3.9 The complete model of a PUT (a), its I-V characteristic (b), and a four terminal
PUT (c).
The break point voltage is temperature dependent because VEBt is temperature
sensitive. Temperature compensation can be accomplished in several ways (Fig.
3.10). Firstly (Fig.3.10a), since diode D is always conducting, the break point
voltage is determined by:
V p=
R1
R1
V BB + V EBt - V D ≈
V BB ,
R1 + R 2
R1 + R 2
under condition
(3.21)
Power electronics
172
R D >>
R1 R 2
.
R1 + R 2
Usually 100kΩ<R<1MΩ . Secondly two diodes are used. Then:
V p=
2R1
R1
V BB + V EBt −
VD.
R1 + R 2
R1 + R 2
(3.22)
V
V
Fig. 3.10 The method of temperature compensation of the breaking voltage.
If one assumes that VD=VBEt , then temperature compensation is achieved for
R1=R2 and VP= 0.5VBB . Therefore, for a given VBB the break point voltage is fixed.
For the same purpose use is made of compensation by a transistor (Fig.3.10c)
which together with resistors R1 and R2 makes a voltage multiplier. If the base
current is neglected, the current through R3 and R4 is I=VBE/R4 , and the collectoremitter voltage is:
(3.23)
V CE = (1 + R3 R 4 )V BE .
Now the break point voltage is
VP =
1 + R3 / R4
R1
V BB + V EBt - R1
V BE .
R1 + R 2
R1 + R 2
(3.24)
By equating the second and third members in (3.24) and for VBE=VBEt one obtains
that VP is temperature independent if:
(3.25)
R 2 R1 = R 3 R 4 .
Then:
VP =
VBB
.
1 + R3 R4
(3.26)
In selecting the resistors care must be taken that the transistor is on, i.e.
R4
V BB
> V BEt .
R1 + R2 + R3 + R4
Usually R1+R2>>R3+R4 and the condition (3.27) reduces to:
(3.27)
3 Regenerative Switches
R4
V BB > V BEt .
R1 + R2
173
(3.28)
In addition to the programmability of voltage VP and current IV there are other
significant advantages of a PUT over UJT. Voltage VV of a PUT is smaller which
extends the range of supply voltages VBB . Resistance RBB is smaller than 10kΩ and
the base-to-base current ranges from 1 to 10mA. The base-to-base resistance of a
PUT is R1+R2 and it can be selected within limits of one hundred Ω up to several
hundreds MΩ . If a large minimum conduction current is not required, then R1 and
R2 should be selected from the range of several tens kΩ up to several hundreds kΩ .
This means that the base-to-base current of a PUT can be considerably lower than
that of a UJT. Also, the reverse current of the emitter diode (anode) of a PUT is
lower by at least one order of magnitude.
Example 1
For a circuit of Figure kolo sa slike 3.7b determine dVP/dT if:
a) R=0 and
b) R=Ropt.
The circuit of Figure 3.7b has: VBB=10V, η=0,6, RBB=8kΩ and dVDt/dT=2,7mV/°C.
a)Unijunction transistor is usually used as an element of simple pulse generator.
These pulses are taken from R0, and resistor R is used for temperature
stabilization of break point voltage of unijunction transistor (Fig. 3.7b). Most is
RO<<R, so the effect of RE on static parameters can be neglected.To determine
break point voltage of unijunction transistor in the circuit of Fig. 3.7b equation
(3.9) can be used.
Taking that η, VBB, i R do not depend on temperature differentation equation 3.9
by temperature and inclusion R=0 in expression (3.11) is obtained:
dV p
dT
=
dV Dt
mV
= −2,7 D .
dT
C
b) The value of resistance for which the dVp/dT≈0 is obtained by calculating the
expression (3.11):
Ropt ≈ 0,34
RBB
= 453Ω.
ηVBB
Power electronics
174
3.1.3The complimentary unijunction transistor – CUJT
The Complimentary UniJunction Transistor consists of a p type substrate into
which an n type emitter is diffused (Fig.3.11a). The principle of operation is
identical to that of a UJT. The polarization of the electrodes is different so the static
characteristic is in the third quadrant (Fig. 3.11d). The main advantage of CUJT
over UJT is that the majority carriers in the emitter are electrons so it can be used
at higher frequencies. Furthermore, the minimum conduction voltage is somewhat
lower, typically 1.5V. This extends the range of supply voltages.
V
V
V
Fig. 3.11 The structure (a), model (b), symbol (c), and static characteristic of a CUJT (d).
Fig. 3.12 The basic structure (a) and transistor model of a planar CUJT (b).
Today CUJTs are manufactured by planar technology like monolithic integrated
circuits. This is a four layer structure comprising an n type substrate (Fig.3.12).
Diffused resistors RB1 and RB2 are manufactured together with the active structure.
The model containing two complimentary transistors is shown in Fig.3.12b. The
shortcoming of this element compared to that of a UJT is that its emitter junction
breakdown voltage is several times smaller. Usually it is 8÷9V whereas for UJTs it
is around 30V. This limits the application of CUJTs to supply voltage range VBB=
15V
Table 3.1 presents the parameters of conventional UJT 2N2647, CUJT D5K1,
and PUT 2N6027
3 Regenerative Switches
175
Table 3.1 The comparative characteristics of various unijunction transistors
Parameter
Break point
current IP
Constant η
Base-to-base
resistance
RBB
Reverse
emitter
current IEO
Breakdown
voltage BVBE
Minimum
conduction
current IV
Minimum
conduction
voltage VV
* RG =
UJT
2N2647
min max
2
CUJT
D5K1
min max
5
0,68
4,7
0,82
9,1
0,58
5,5
-
0,2
30
-
8
-
min
-
max
2
0,62
8,2
X
X
X
X
-
-
0,01
-
0,01
μA
8
-
40
V
1
2
PUT 2N6027
-
0,07
1,5
At
* RG=10
kΩ,
UG=10V
RG=1 MΩ
RG = 10 kΩ
VG = 10 V
1
Unit
μA
mA
V
R1 + R 2
R1
; VG =
V BB ; x – programmable
R1 − R 2
R1 + R 2
3.1.4 The pulse generators
Unijunction transistors have found basic application in simple and inexpensive
RC pulse generators. The design of this type of generator requires the use of only
one unijunction transistor (Fig. 3.13). This is possible because the static
characteristic of a UJT has a region of negative differential resistance. The
regenerative process, typical for relaxation generators, occurs within UJT or PUT.
Analysis of a UJT-based pulse generator is given (Fig. 3.13a). The scheme and
principle of operation of a PUT-based generator is exactly the same. The pulse
waveforms of voltages VE and Vo are shown in fig. 3.14a. During time interval T1
the UJT is off. If the reverse current IE and resistance R1 are neglected (R1>>RE),
then capacitor CE will be charged by VBB via RE and:
VE (t) = VBB − (VBB − VCO1 )e
−
t
C E RE
,
(3.29)
Power electronics
176
where VCO1 is the voltage across CE at the end of the conduction of UJT, T2 . At
(3.30)
V E(T1 )= V P ,
the UJT turns on and, on the basis of (3.29) and (3.30), one obtains:
T1 = C E RE ln
VBB − VCO1
,
VBB − VP
(3.31)
where the break point voltage, VP , is determined by (3.14).
V
V
V
V
V
Fig. 3.13 The pulse generators comprising UJT (a), or PUT (b).
At the end of the regenerative process the UJT is on. Resistance RS between
emitter and base B1 is then only several Ω, and can be neglected. At the start of this
interval the operating point is in position Q (Fig. 3.14b). Now, capacitor CE is
discharging. The emitter current decreases and is determined by:
iE (t) =
VBB − VEB1 ⎛ VP − VEB1 VBB − VEB1 ⎞ −t τ
⎟⎟e
+ ⎜⎜
,
−
R E + Ro
Ro
R E + Ro ⎠
⎝
(3.32)
where
τ = C E Ro R E .
R E + Ro
As a rule, resistance Ro is between ten and hundred Ω and Ro<<RE . Now, the
member in the brackets in (3.32) can be neglected and τ ≈ CERo , so:
iE (t) ≈
VBB − VBB1
RE
+
VP − VEB1
Ro
e
−
t
C E Ro
.
Quasi-stable interval T2 ends at:
i E (T2 ) = IV .
Now, VEB1=Vv , and from (3.33) and (3.34):
(3.33)
(3.34)
3 Regenerative Switches
T2 = C E Ro ln
177
(VP − VV ) Ro
.
IV − (VBB − VV ) RE
(3.35)
After T2 UJT is off again and capacitor CE is discharging. The initial voltage across
the capacitor is VCO1=V(T2)=Vv+RoIv ≈Vv , and finally:
T1 = C E RE ln
VBB − VV
.
VBB − VP
(3.36)
The cycle of oscillation is T=T1+T2 . Since RE>>Ro , then T1>>T2 and T ≈ T1.
V
V
V
V
V
V
dynamic
trajecto ry
V
V
Fig. 3.14 The pulse waveforms (a) and dynamic trajectory of the operating point of the
pulse generators of Fig. 3.13 (b).
The condition of oscillation is determined by the position of the static load line
with respect to the static characteristic of the UJT (Fig. 3.15a). The static
conditions are determined for the circuit without the timing capacitor (Fig. 3.15b).
The load line is:
(3.37)
V E = V BB - R E I E .
because RE>>Ro . For the oscillating mode of the generator the load line must
cross the static characteristic of UJT in the region of negative differential
resistance. Thus, at VEB1=Vv it must be IE <Iv , and from (3.37):
RE > (VBB − VV ) IV = RE min ,
(3.38)
and at VE=VP , IE>IP , there fore it follows:
RE < (V BB - V P ) I P = RE max .
(3.39)
Allowing for example e.g. Iv=1mA, Vv=2V, IP=1μA, η=0.6, and VBB10V. Then, VP
≈ ηVBB ≈ 6.7V and on the basis of (3.38) and (3.39), 8kΩ <RE <3.3MΩ . Therefore,
the timing resistor RE can be varied over a wide range. For the purpose of ensuring
a soft transition from the saturation region to the negative differential resistance
region it is recommendable that the lowest resistance of RE is several times higher
than the minimum value determined by (3.38).
Power electronics
178
V
V
V
V
V
V
V
V
V
Fig. 3.15 The position of the load line (a) of an oscillating generator and the equivalent
circuit for determination of the static conditions (b).
The value of the timing capacitance, CE , can also be varied over a very wide
range (from several nF to several tens of μF). The minimum capacitance is limited
by the turn-on (tu) and turn-off (ti) times of the unijunction transistor. Usually these
times are between one hundred and several hundreds of ns. Since the minimum
quasi-stable interval must be Tmin>tu+ti , it follows that the minimum capacitance
CE is from several nF to several tens of nF.
Sometimes the UJT is used when designing generators that have simultaneously
outputs of saw tooth and rectangular wave-shapes. A standard generator of this
type using a PUT is shown in Fig. 3.16. The function of the timing resistor here is
taken over by the current generator comprising elements Tr , Dz , R , and Rz
producing the current:
(3.40)
I o ≈ (V BB - V EB - V z ) R .
While the PUT is off, the variation of voltage VE is linear:
VE (t) = VV + IV Ro +
Io
t.
C
(3.41)
From condition (3.30) and on the basis of (3.41) it follows:
T1 = C
VP - (VV + IV Ro )
.
Io
(3.42)
The region of oscillation (Fig.3.16b) is limited by:
I P < I O < IV .
(3.43)
In addition, the collector junction of the transistor must not be forward biased, i.e.
VP< Vz+VCBt , giving:
Vz>
R1
V BB .
R1 + R 2
(3.44)
The places of resistance Rz and Zener diode can be interchanged. Then the
condition Vz<VBBRz/(R1+R2) has to be satisfied.
3 Regenerative Switches
179
Simple generators based on UJT are highly asymmetric (T1>>T2). By adding
one transistor (Fig. 3.17) one obtains a generator where it is possible that T1<T2 .
When the UJT is cut off, Tr is on and vice versa. The pulse waveforms at
characteristic points are shown in Fig. 3.17b. While the UJT is cut off, Tr is in
saturation so:
V
operation area
V
V
V
V
V
V
Fig.3.16 PUT-based function generator (a) and its operation area (b).
VE = VBB − (VBB − VV + VBEt )e
−
t
R2C
(3.45)
.
This quasi-stable period ends when VE(T1)=VP so that:
V
V
V
V
V
V
V
V
V
V
V
V
V
V
Fig. 3.17 The oscillator based on UJT and transistor Tr (a) and the voltage waveforms.
T1 = R2C ln
V BB − V V + V BEt
.
V BB − V P
(3.46)
Now the UJT is in the saturation region and Tr is cut off. Capacitor C charges via
resistor R1 in the opposite direction and so:
V BE (t) = V BB − (V BB − V P − V V + V BES )e
−
t
R1C
.
The next change of state occurs at VBE(T2)=VBEt so on the basis of (3.47):
(3.47)
Power electronics
180
T2 = R1C ln
V BB − V P − V V + V BES
.
V BB − V BEt
(3.48)
Equation (3.48) applies if:
I E(T 2 )=
V BB - V V V BB - V BEt
+
> IV ,
R2
R1
(3.49)
there fore it follows:
R1 <
V BB - V BEt
.
I v - (V BB - V V ) R2
(3.50)
The restrictions on resistance R2 are defined by (3.38) and (3.39), i.e.:
V BB - V P
V -V
< R2 < BB V .
IP
IV
(3.51)
In the static conditions transistor Tr should be in the saturation region. For this
reason:
R1 < β RC
V BB - V BES
≈ β RC .
V BB - V CES
(3.52)
3.1.5 The nonstandard applications
It is possible to use a UJT for designing monostable and bistable multivibrators.
In the stable state of a monostable multivibrator, re-triggering enabled, (Fig. 3.18)
UJT is cut off and its static load line crosses its I-V characteristic in the saturation
region (Fig. 3.18b). Therefore, it is required that (VBB – VV)/RE>IV , there fore it is:
RE < (V BB − V V ) I V .
(3.53)
Tr is turned on by a positive pulse. This will cause a reduction of the emitter
current of the UJT by factor β, i.e. by the amount corresponding to the collector
current of transistor Tr . This should bring the operating point in to the region of
negative differential resistance, i.e.:
(3.54)
(V BB − V V ) R E − βI B < I V ,
and this turns off the UJT. Thus the minimum resistance is bounded by:
RE >
V BB − V V
.
I V + βI B
(3.55)
During the positive triggering pulse capacitor C will be discharged. Tr is
then in saturation, i.e. VE=VCES . At the trailing edge of the triggering pulse
Tr is turned off and capacitor CE starts charging. Then:
3 Regenerative Switches
181
V E = V BB − (V BB − V CES )e
−
t
C E RE
(3.56)
.
V
V
V
V
V
V
V
V
Fig. 3.18 The monostable multivibrator re-triggering enabled (a) and the position of its
static load line (b).
V
V
V
V
V
re-triggering
V
η
−η
V
V
Fig. 3.19 The voltage pulse waveforms of a UJT based monostable multivibrator.
Quasi-stable interval TM ends when VE(TM)=VP so that, on the basis of (3.56) and
bearing in mind that VBB>>VCES , :
TM = C E RE ln
V BB
+ Δt ,
V BB - V P
(3.57)
where Δt is the width of the positive triggering pulse.
In the re-triggering mode a triggering pulse arrives before VE reaches the value of
the break point voltage of the UJT. Thus the condition for re-triggering is:
VE (To ) < VP .
(3.58)
Since Tr is turned on CE is during Δt discharged to the initial value VE=VCES . At
the end of Δt, Tr is turned off and capacitor CE restarts charging (Fig.3.19).
Throughout this period the UJT is turned off. If one assumes that
Power electronics
182
VP=ηVB2+VDt≈ηVBB , then, on the basis of (3.58) and (3.56), the re-triggering
condition can be written in the following form:
C E RE < -
To
.
ln (1 - η )
(3.59)
It is possible to design a monostable multivibrator having UJT cut off during the
stable state. In that case the static load line crosses the I-V characteristic in the cut
off region. This position of the load line is shown by dotted lines in Fig. 3.18b.
Among the nonstandard applications a very simple Schmitt trigger will be
described (Fig.3.20). This possibility is quite obvious since the input characteristic
of UJT is in the form of a hysteresis loop. Here, the lower threshold of the Schmitt
trigger is controlled by resistor RE . The upper threshold is determined by:
V
V
V
V
V
VM
VH
V
V TL
V TH
VI
Fig.3.20 Schmitt trigger based on UJT (a) and its transfer characteristic.
V TH = V P + R E I P ≈ V P .
(3.60)
In the course of decreasing the input voltage, the UJT turns off when IE=IV . Then,
VEB1=Vv and the lower threshold of the Schmitt trigger is:
(3.61)
V TL = R E I V + V V .
The hysteresis voltage:
V H = V P −V V - RE IV .
(3.62)
can be controlled by changing resistance RE over the range from ten V down to
several hundreds mV. The maximum value of RE is limited by the condition that
upon turn-on the UJT is in the saturation region, i.e. (VP – VV)/RE>IV , or VH> 0.
there fore it follows:
RE < (V P - V V ) I V .
(3.63)
Minimum resistance RE is limited by the maximum permitted emitter current IEmax .
Namely:
RE >
VIm ax − V V
,
I E max
(3.64)
3 Regenerative Switches
183
where V1max is the maximum value of the input voltage.
By adding one NPN transistor one obtains an interesting solution for the
Schmitt trigger having voltage controlled upper threshold level (Fig. 3. 21). In
essence UJT, transistor Tr , and resistor R make a sort of PUT having the break
point voltage:
VP = V x + VBE
(3.65)
which is a function of control (programming) voltage Vx . At the same time the
following condition has to be met:
V BB
≈ η V BB .
1 + R/ R BB
V V − V BEt < V x < η
(3.66)
+V BB
+V BB
R
R
VX
Tr
V0
VI
I
UJT
RE
RE
UJT
RC
V BB - V CES
Vi
Fig. 3.21 The programmable Schmitt trigger (a) and Schmitt trigger having enlarged
output voltage amplitude (b).
As long as V1<Vx , UJT and Tx are in the cut off region. At V1=Vx+VBEt , Tx begins
turning on. Owing to this the reduction of VB2B1 of the UJT will follow. Now it is:
V - βIBR
(3.67)
VB 2 B1 = BB
,
1 + R/ R BB
where β is current gain of transistor Tx . A small change of current IB , and
consequently of voltage VBE , will cause a considerable reduction of VB1B2 . Since
the break point voltage of UJT is VP=ηVB2B1+VDt , it means that soon after turn-on
of Tr turning on of the UJT will occur. For this reason the break point voltage is
determined by (3.65). If the break point current IP of the UJT is neglected, the
upper threshold of the Schmitt trigger is:
VTH = V x + VBE + RE ⋅ I BP .
(3.68)
From condition
V x + V BE = V p = η
V BB - β R I Bp
+ V Dt
1 + R/ R BB
it follows that base current IBP at which the UJT turns on is:
I BP =
R ⎞⎤
V BB ⎡
V x ⎛⎜
⎟⎥ .
1+
⎢1 ⎜
βR ⎣ η V BB ⎝ R BB ⎟⎠⎦
(3.69)
Power electronics
184
Since this current is very small, member REIBP in (3.68) can be neglected and:
(3.70)
V TH ≈ V x + V BE .
Immediately upon the UJT being turned on, transistor Tr is turned off. Thus its only
task is to initiate the turning on of the UJT. Therefore the lower threshold is
determined by (3.61).
The output voltage amplitude VM of the Schmitt triggers in Figs. 3.20 and 3.21
is relatively small (VM<0.5V). By adding a PNP transistor (Fig.3.21b), the
amplitude is VM=VBB – VECS ≈ VBB . In order that Tr is in the saturation region when
the UJT is conducting, it has to be:
V BB − V EB V EB V BB − V ECS
−
>
R
βRC
RB2
(3.71)
Since VBB>>VEB and RB2=(1-η)RBB , and taking into account that member VEB/R
can be neglected, from (3.71) it follows:
1 -η
(3.72)
RC >
R BB .
β
There fore, if the UJT is off, Tr must also be off. Thus, RVBB/(R+RBB)<VEBt , there
fore, for VBB>>VEBt :
R<
V EBt
R BB .
V BB
(3.73)
E.g. for VBB=10V, RBB=8kΩ, η=0.6, β=50, and VEBt=0.6V; on the basis of (3.72)
and (3.73) one obtains: RC>640Ω and R<480Ω. The choice can be: Rc=1.5kΩ and
R=320Ω.
3.2 THYRISTORS
The thyristor is general name for a family of four layer semiconductor switches
containing three pn junctions. Often, however, this concept implies the complete
group of regenerative switches. Within this concept the unijunction transistor
belongs to the thyristor group. Broadly speaking, the thyristor (Greek thyra – gate)
is a bistable switch having a regenerative transition from the high-resistance to the
low-resistance region and vice versa. The ranges of controlled currents and
voltages are very wide. The nominal values of currents of the present day thyristors
range from several mA up to several thousands of A and the nominal values of
voltages extend up to 10 000V.
3 Regenerative Switches
185
3.2.1 The triode thyristor – SCR
The triode thyristor is representative of the four layer elements and it is often
referred to as thyristor. It comprises three electrodes (anode, cathode, and control
electrode - gate). The load is connected in the anode - cathode circuit and the
control is realized via the gate. Since the triode thyristor is most frequently used in
a A.C. circuitry as a rectifier (conducts in one direction only, like a diode) having a
controlled conduction angle, the abbreviated name SCR (Silicon Controlled
Rectifier) is almost universally accepted.
The thyristor structure and a typical distribution of impurities are shown in Fig.
3.22. Technologically, the initial material is a highly resistive N1 region having
typical concentration of donor impurities from 1014 to 1015 cm-3. On both sides are
deeply diffused p-type regions. The first p-region P1 is the anode emitter. The
cathode emitter is made by the n+-type diffused region N2 . Thus, a thyristor
consists of three pn junctions.
Fig. 3.22 The thyristor structure (a) and typical distribution of impurity concentrations
(b).
At forward bias, when VAK> 0, the outside junctions J1 and J3 are forward biased
and the central junction J2 is reverse biased. The thyristor current is then
determined by the current of the reverse biased pn junction. Practically, the whole
of the applied voltage VAK is across junction J2 . Owing to the low impurity content,
the space charge region is located in the N1 region (shaded area in Fig. 3.22). The
thyristor will cross over from the cut off to the conduction region when voltage VAK
is equal to the breakdown voltage of the central pn junction.
In order to simplify the explanation of the turn-on and turn-off mechanisms, it
is customary to represent the thyristor using a two-transistor model (Fig. 3.23).
Regions N1 and P1 are common for the PNP and NPN transistors. Allowing the
gate be open, i.e. IG= 0. At VAK> 0, both emitter junctions are forward, whereas the
Power electronics
186
common collector pn junction is revere biased. The transistors are, thus, in the active
forward regions. Since at IG= 0 the anode and cathode currents are equal, then:
(3.74)
I A = α p I A + I CBOp + α n I A + I CBOn ,
there fore it follows:
IA=
2 I CBO
I CBOp + I CBOn
.
=
1 - (α n + α p ) 1 - (α n + α p )
(3.75)
Fig. 3.23 Two-transistor model of the thyristor (SCR) (a and b) and its symbol.
By αn and αp respectively are denoted the common-base current gains of transistors
Tn and Tp . If the individual currents of the collector junction are equal, then its total
current is ICBOp+ICBOn=2ICBO . At small currents IA the gains of αn and αp are very
small (Fig. 3.25a), and IA=IK ≈ 2ICBO . An increase of voltage VAK ≈ VCBn=VCBp
causes the current ICBO to increase gradually, so αn and αp also increase. When VAK
becomes sufficiently large, in the reverse biased barrier of J2 the process of
avalanche multiplication starts. The thyristor is in the forward breakdown region
(region between points B and P in Fig. 3. 24). In the break point P the regenerative
process starts by turning on of the thyristor with both transistors Tn and Tp in the
saturation region. Namely, an increase of the base current of transistor Tn will cause
βn times to increase higher than its collector current. Since icn=ibp , the collector
current of transistor Tp will increase βn βp times. Thus, the closed loop current gain
is βn βp . If the regenerative process is to start, it has to be:
(3.76)
β p βn ≥1,
there fore there follows the thyristor turn-on condition in the form:
α n +α p = 1 .
(3.77)
The same result is obtained on the basis of the equation (3.75) and condition that
IA→∞ . Current IA , at which (3.77) applies, is the break point current IP (Fig.
3.25a).
3 Regenerative Switches
187
The anode current of the thyristor in the off state, at IG= 0, is so small that
condition (3.77) is impossible to reach without a considerable increase of VAK . If
one assumes that the multiplication factors of electrons and holes are equal, then
one can write that the anode current in the breakdown region is:
I A=
2 I CBO M
,
1 - M (α n + α p )
(3.78)
where the multiplication factor is:
M=
1
1 − (V AK BVJ2 )n
(3.79)
,
where BVJ2 is the breakdown voltage of the central pn junction. By letting IA → ∞ ,
at VAK=VPMO , from (3.78) and (3.79) one obtains the break point voltage:
(3.80)
V PMO = BV J 2 n 1 - (α n + α p ) .
In order that VPMO is as high as possible, the gain of one of the transistors has to be
quite small. Usually this is transistor Tp (Fig. 3.23), since its base (region N1) is
very wide.
IA
Conduction
region
Regeneration
region
IH
IP
IG3
VH
IG=0
IG1
IG2
IG3 Reverse cut off
region
Rever se breakdown
region
IG2 IG1
VPM
High res istance
(cut off) region
IG =0
For ward breakdown
region
B
VPM 0
VAK
IG3 > IG2 > IG1
Fig. 3.24 The static I-V characteristic of an SCR.
If, however, IG > 0, the thyristor will turn-on sooner, i.e. VPM<VPMO (Fig. 3.24).
Namely, due to a positive IG the thyristor current is higher, so αn and αp are higher
which leads to the turn-on at lower voltages VAK . Now:
(3.81)
I K = I A+ I G ,
and the anode current is:
I A=
α n I G + 2 I CBO .
1 - (α n + α p )
(3.82)
Therefore, the turn-on condition is again αn + αp =1. The difference is in that αn and αp
increase primarily due to current IG . This is exactly why the break point voltage is
inversely proportional to the gate current IG (Fig. 3.24). Practically, if IG is sufficiently
188
Power electronics
high, the break point voltage could be only several V (Fig. 3.25b). Consequently, the
break point voltage of the SCR is programmable by the gate current within limits from
several V up to the value of the break point voltage at IG= 0, VPMO .
In the conduction region both transistors are saturated, the anode-to-cathode
voltage is:
(3.83)
V AKS = V CES + V BES
and, depending on the anode current, it ranges from 0.7V up to 2V. It should be
emphasized that no gate current is needed in the state of conduction. Therefore, the
thyristor is a switch which requires a relatively small drive only during turn-on. This
makes the essential difference between the thyristor and the bipolar transistor as a
switch. Namely, a transistor requires a permanent and relatively high drive
throughout the state of conduction. E.g. if a transistor, maintaining a collector current
of about 20A, is to be in saturation, the base current of at least 1A is required.
Fig. 3.25 The current gains αn and αp of transistors Tn and Tp as functions of the anode
current (a) and the dependence of the break point voltage on the gate current (b).
The thyristor will remain in the on state (the region of low resistance) as long as
the anode current is higher than the holding current, IH . The holding current is the
lowest anode current maintaining the thyristor in the state of conduction with the
gate open (IG = 0). Namely, at IA=IH the regenerative process is restarted and
owing to the reduction of IA it leads to the turning off of the thyristor. Typical
values of IH are within the range from several hundreds μA up to ten mA.
At reverse bias (VAK < 0), the outside pn junctions J1 and J3 of the thyristor are
reverse biased. Because of that in the region of reverse breakdown the regenerative
process does not arise. The current-voltage characteristic in this region is very
similar to the I-V characteristic of a reverse biased diode. Since region N1 is only
weakly doped, i.e. its resistance is much higher compared to that of region N2, most
of the applied voltage appears across junction J1 and the influence of junction J3
3 Regenerative Switches
189
can be neglected. The breakdown occurs either due to the avalanche process or due
to the spreading of the transition region of junction J1 over the entire region N1 up
to junction J2. However, since region N1 is quite wide, the breakdown is largely
caused by the avalanche process.
3.2.1.1 The characteristics of the control electrode (gate)
As already emphasized, a controlled turn-on of a thyristror occurs at the
moment when the influence of the positive gate current IG influence at a positive
anode-to-cathode bias, VAK>0. After the thyritor is turned on, no gate drive is
required. Moreover, it is then of no use because it only heats up the thyristor. In
addition, it is also that there is no use of an negative anode bias since it increases
the reverse anode current (Fig. 3.24). Because of all this, the gate should be pulse
driven. The driving pulse should have the required gate current IG , voltage VG , and
sufficient length TG .
max. voltage
ga
te
reiable turn on
turn on
possible
V
V
turn on
impossible
dis
s
ipa
tio
n
max. current
V
Fig. 3.26 The static start-up characteristics of a thyristor.
Time TG is several μs. Practically, however, TG is between 10 and 20 μs and the
gate Ig –Vg characteristics are called the static thyristor characteristics (Fig.3.26).
Practically, these are the I-V characteristics of the P2N2 junction and they are
determined by the minimum, rgmin , and maximum, rgmax , gate resistances. The gate
voltage has to be higher than the threshold voltage of the pn junction which is
about 0.5V. The region of safe turn-on of a thyristor is the cross-hatched region
shown in Fig. 3.26. The maximum voltage VGM is several V and the maximum gate
current IGM ranges from one hundred mA for low power thyristors up to the order
of one A for power thyristors. On the right hand side the operating region is limited
Power electronics
190
by the hyperbola of permitted dissipation. This is power which will not cause any
damage to the pn junction. Owing to the temperature dependence of the pn junction
voltage, triggering of a thyristor is not reliable in the region of the characteristics
which has not been cross-hatched. Therefore, at lower temperatures the region of
safe triggering is narrower.
In order to accomplish the exactly defined instant of thyristor triggering, it is
driven by the current pulses of much higher level compared to those corresponding
to the static conditions. In other words, an overdrive current pulse is applied. In this
way the influence of temperature variations of the gate characteristics is reduced
and very short triggering times are accomplished.
Example 3.2
Characteristics of thyristor in direct
polarization is shown in Figure 3.27.
Determine the power losses on thyristor for
excitations shown in Figures 3.28 (a) and (b).
TH
25
Figure 3.27 Characteristics of thyristor in direct
polarization.
1 .2
2
vTH [V]
i TH [A]
i TH [A]
20
15
T/2
a)
T
T
0
T /2
3 T /2 t
T
b)
Figure 3.28. The current through the thyristor - a rectangular form (a), form of sine
half-wave (b)
Voltage on thrystor when it is directly polarized (Fig. 3.27) is: vTH=VTH0+rTiTH,
where VTH0=1.2V, and rTH=0.8/25=32mΩ. In a general case power losses on
thyristor in the period T is equal to:
3 Regenerative Switches
191
T
pTH =
1
iTH (t )vTH (t )dt
T 0
∫
(3.84)
Substituting the expression for the voltage on thyristor when it is directly polarised
in equation (3.55) is obtained:
T
pTH =
1
iTH (t )(VTH 0 + rTH iTH (t ))dt =
T ∫0
T
T
⎡
⎤
1
1 2
2
(t )dt ⎥= VTH 0 I TH ,sr + rTH I TH
⎢VTH 0 ∫ iTH (t )dt + rTH ∫ iTH
,eff .
T
T
0
0
⎣⎢
⎦⎥
(3.85)
If the current through the thyristor as shown in Fig. 3.28a average value of current
is ITHsr=15/2=7,5A, and effective value of current is I THeff = 15 / 2 = 10,6 A.
Substituting these values in equation (3.85) is obtained:
pTH = 7,5 ⋅ 1,2 + 0,032 ⋅ (10,6) 2 = 12,63W .
In a case when current has form of sine half-wave (Fig. 3.28 b) average value of
current through the thyristor is:
I THsr =
1
T
T /2
∫
20 sin(ωt )dt =
0
20
π
= 6,36 A.
Effective value of current through the thyristor is
I THeff =
I TH max
= 10 A.
2
Substituting these values in equation (3.85) is obtained:
pTH = 6,36 ⋅1,2 + 0,032 ⋅102 = 10,83W .
3.2.1.2 The effect of the rate of anode voltage change (dV/dt
effect)
The previous analysis of the turn-on process is valid only under the assumption
that the anode voltage changes are slow. At high rates of anode voltage variations
turning on of a thyristor will be faster. Since the collector pn junctions of
transistors Tn and Tp are reverse biased, they can be considered as a capacitor (Fig.
3.29a). If the voltage drop across the forward biased emitter junctions is neglected,
the current through this capacitor is:
i = CCB
dCCB 1
dV A
dV A
+V A
≈ CCB
,
dt
dt
2
dt
since CCB ~1/√UA .
(3.85)
Power electronics
192
Thus, the anode current is proportional to the rate of change of the anode
voltage. At high rates of dVA/dt this current may become significant. As it is
increased, the current gains αn and αp increase and the turn-on conditions will be
fulfilled at lower input voltages (3.77). In other words, the turn-on occurs at
smaller voltages compared to the static break point voltage VPMO . Therefore, the
capacitive current causes the thyristor to turn-on in accordance with the same
mechanism as that of the gate current. Fig. 3.29b shows the dependence of the
break point voltage of a thyristor on the rate of change of the anode voltage and
temperature. As the temperature increases, this dependence is more pronounced
because constants αn and αp are higher. Moreover, this effect is more pronounced
for power thyristors since capacitance CCB is proportional to the cross section S.
This phenomenon is often called dv/dt effect of dv/dt capability. In device
specifications it is defined as the maximum value of (dVA/dt)M which will not cause
the turn-on process of a tyristor. It ranges from 10V/μs up to about 100V/μs.
1500
A
+
VPM 0 [V]
T=20 ° C
Tp
1000
i
T=100 ° C
VA
CCB
n
500
1
10
K
a)
b)
dV A
dt
100
V
[ ms
]
Fig. 3.29 The high frequency thyristor model (a) and the break point voltage as function
of the rate of anode voltage change and with temperature as a parameter (b).
It is possible to increase the capability dv/dt in several different ways (Fig.
3.30). A capacitor CS between the anode and cathode (Fig. 3.30a) reduces the rate
of anode voltage increase. The anode-to-cathode voltage now increases
exponentially. In the limiting case when voltage VAA changes abruptly, it must be
satisfied that:
V AA
⎛ dV ⎞
<⎜ A ⎟ ,
Ro C S ⎝ dt ⎠ M
(3.86)
there fore the value of capacitance CS is calculated. For a given thyristor (dVA/dt) is
an item of the catalogue specifications. In order to reduce the discharge current of
CM at the beginning of thyristor conduction, resistor RS is added (dotted lines in
Fig. 3.30a).
The effect of the two protection methods of Fig. 3.30 is the same. The difference is
in that Rg in Fig.3.30b is external whereas in Fig. 3.30c this is the resistance of P2
region which is on one side short circuited by the cathode (denoted by KS in Fig.
3.30c). Through this resistor in both cases a part of the capacitive current is shunted
to the cathode. This reduces the emitter current of Tn and therefore the gain αn . A
PWM DC/DC CONVERTERS
4
There are several different circuits of D.C. (DC/DC) converters. In essence,
however, they can be classified into four groups:
• forward,
• flyback,
• push-pull, and
• Cuk converters.
As it will be shown, in each of these groups there are several types depending
on: whether the input and output are galvanically separated or not, the polarity of
the output voltage compared to that of the input voltage, the ratio of the input and
output voltages, the time of energy transfer from source to load, etc.
4.1 FORWARD CONVERTERS
The simplest version is the forward converter without galvanic input-output
separation (Fig. 4.1). Owing to the type of connection between the transistor Tr,
choke L, and load this circuit is often called the series converter. The term
“forward” indicates that the energy from the source is directly forwarded to the
load. With the transistor conducting, the energy of the source is simultaneously
transferred to the load and accumulated by the choke.
Tr
+
+
L
D
VI
-
C
RL
V0
-
CM
(PWM)
T
Fig. 4.1 The basic circuit of the forward converter.
Power electronics
230
Diode D is then off. When the transistor is off, the circuit is closed through the
turned on diode and the energy accumulated by the choke is transferred to the load.
The output voltage depends upon the ratio of the intervals when the transistor is on
or off and is lower that the input voltage. Because of such ratio of the input and
output voltages (Vo<VI), this type of converter is often called the step-down
converter.
Depending upon the value of the control signal the transistor and diode are
alternately on and off. At the input of the LC filter, if the turn on and turn-off times
of the transistor and diode are neglected, a rectangular voltage of variable duration
is established. The amplitude of these pulses is approximately equal to the input
voltage. Diode D ensures the current flow when transistor Tr is off. The role of
choke L is to pass to the output only the D.C. component which is equal to the
mean value of the voltage at the input of the filter during one cycle of the control
signal:
Vav =
τ
1
τ
VI dt ≈ VI = DVt
T ∫0
T
(4.1)
where τ is the duration and T is the cycle, and D=τ /T is duty cucle of the control
signal. Capacitor C corrects the A.C. components across the load, RL .
According to (4.1) it would appear that the variation of the output voltage is
proportional to the variation of the non-stabilized input voltage. However, the
output voltage, or a fraction of it, is fed to the control module. This module
generates the square signals for turning on and off the controlling transistor. The
variation of the output voltage of the converter modulates the duration of the pulses
τ at the output of the control module. This closed system of automatic control,
through the action of the control module, maintains the output voltage constant
irrespective of the variations of the input voltage or of the load current.
4.1.1 The analysis of the basic circuit
In this section some of the basic relations between the parameters characterizing
the operation of the converter are derived. For the purpose of this analysis several
justifiable assumptions have been made.
In the first part it will be assumed that the transistor and diode are ideal switches
(instantaneous switch-on and switch-off, the on-resistance negligible, the offresistance infinite), and that the output voltage, Vo, and current, Io, are constant.
When transistor Tr is on, the diode is off (Fig.4.2). The current through the choke
increases from minimum value ILm ( at the switch-on) to maximum value ILM (at the
switch-off of the transistor). If VI and Vo are constant, the variation of the choke
current is governed by the following differential equation:
4 PWM DC/DC Converters
231
L
Tr
D
VI
L
Tr
C
RL
V0
D
VI
a)
C
RL
V0
b)
VL
V I -V 0
T
DT
=DT
t
T-DT
iL
I LM
I Lm
c)
t
Fig. 4.2 The equivalent circuits of the forward converter during intervals 0<t<DT (a)
and DT<t<T-DT (b), and the corresponding variations of the voltage and current of the
choke (c).
diL
(4.2)
+ rL iL + Vo
dt
where rL is the active resistance of the choke. The solution of (4.2) can be
expressed as:
V − Vo
(4.3)
i L (t ) = I
1 − e −t / τ L + I Lm e −t / τ L
rL
VI = L
(
)
where τL=L/rL . It has been shown that the coefficient of efficiency would be
maximum if T/τL < 0.05, because the active resistance of the choke can then be
neglected. In the design of the choke, therefore, the care should be taken that rL is
as small as possible. In such a case, by expanding the exponential terms in (4.3) in
Maclaurin series and after justifiable approximations, it turns out that:
V − Vo
(4.4)
iL (t ) = I Lm + I
t.
L
The maximum value of the choke current is at t=τ, so:
V − Vo
τ.
I LM = I Lm + I
L
(4.5)
During τ < t <T-τ, the voltage of the control pulse is zero, so transistor Tr is off and
diode D is on (Fig. 4.2). Then, the current through the choke is:
Power electronics
232
Vo
(4.6)
t,
L
and its minimum value is:
V
(4.7)
I Lm = I LM − o (T − τ ) .
L
From (4.4) and (4.6) it can be seen that current iL(t) is a linear function of time. The
load current is equal to the average value of the current through the choke, i.e.:
I + I LM
.
(4.8)
I O = Lm
2
The variation of the current through the choke is equal to the difference between
the maximum and minimum values, i.e.:
iL (t ) = I LM −
Δ iL =
VI
TD (1 − D) ,
L
(4.9)
where D=τ/T is duty cycle of the control pulse. Obviously, the variation of iL when
the transistor is on is equal to the variations of il when the transistor is off, i.e.:
VI − Vo
V
(4.10)
τ = o (T − τ ) ,
L
L
there fore it follows that
Vo =
τVI
T
= DVI .
(4.11)
4.1.1.1 The output voltage variation
The variation of the output voltage can be determined if the variation of the
current through the filter capacitor is known
iC = iL − I O .
(4.12)
Fig. 4.3 shows the variations of the currents il and iC and the variations of the
output voltage ( voltage across the capacitance). The average value of the current
through the capacitor is zero, whereas its variation is equal to the variation of the
current through the choke, i.e. ΔiC=ΔiL . While iL>Io , the capacitor is being charged
and the output voltage increases, whereas for iL<Io , the capacitor is being
discharged and the output voltage decreases. The variation of the output voltage
has two components, the capacitive Δvc’ (Fig. 4.3d) and resistive Δvc’’ (Fig. 4.3e),
caused by the equivalent series resistance of the capacitor. The A.C. components
are, for clarity, drawn out of proportion. The resistive component, which is in
phase with current ic , can become dominant at high frequencies if the choice of the
capacitor is wrong.
4 PWM DC/DC Converters
233
Control
signal
T=1/f
a)
Tt
iL
I LM
Δi L /2
b) I 0
Δi L /2
Δi L /2
iL
t
c)
IC
Δi C/2
Δi C/2
t
Δi C= Δi L
V'C
ΔV'C
d)
e)
V 0 =DV
t
V''C
i C (t)
i C2 (t)
ΔV''C
RC Δi C/2
RC Δi C/2
t
V0
f)
≈
ΔV0
V0 = DVI
t
Fig. 4.3 The voltage and current waveforms.
This may have particularly undesirable consequences in the relay converters where
due to this voltage component a considerable shift in the nominal frequency of the
controlling transistor may occur. For this reason in the design process, in addition
to the selection of a capacitor having low series resistance, it is often required that
its capacitance is considerably higher than the optimum value corresponding to
other criteria (small weight or small volume). The variation of the output voltage is
equal to the sum of the capacitive and resistive components of the voltage across
the capacitor, i.e.:
vo ( t ) =
1
C
t
∫ iC dt + RC iC .
(4.13)
0
When the transistor is on, taking into account (4.12), it follows that:
V − Vo
ΔI
,
iC (t ) = I
t−
L
2
(4.14)
Power electronics
234
where ΔI=ΔiL , so:
VI − Vo 2 ⎛ VI − Vo Δ I ⎞ Δ I
(4.15)
−
t + ⎜ RC
RC .
⎟t −
2 LC
L
2C ⎠
2
⎝
When the transistor is off, the currents through choke L and capacitor C decrease:
Δ I Vo
iC (t ) =
− t,
2
L
and the variation of the output voltage is expressed by:
V
V
ΔI
ΔI
(4.16)
vo (t ) = − o t 2 + (
RC .
− RC o )t +
2 LC
2C
L
2
By differentiating (4.15) and (4.16) in terms of time and equating to zero, one
obtains that the output voltage is maximum and minimum at the respective instants:
vo ( t ) =
T −τ
−τC ,
2
2
where τC=CRC . The maximum and minimum are shifted to the left by τC compared
to the case when the value of RL can be neglected. The maximum variation of the
output voltage (peak-to-peak) is equal to the difference between its maximum and
minimum values:
t1 =
τ
Δvo =
− τ C and t 2 =
Vo (1 − D)
Vo
⎛τC ⎞
+
⎜ ⎟ ,
2
2
8LCf
2 LCf D ⎝ T ⎠
(4.17)
where the first member is the capacitive component Δvc’ and the second is the
resistive component Δvc’’. If the notation ξ=τc/T, then:
Δvo =
Vo (1 − D) ⎡
4ξ 2 ⎤
+
1
⎢
⎥.
8LCf 2 ⎣ D(1 − D ) ⎦
(4.18)
From the diagram of Fig. 4.4 it is obvious that for τc>0.3T the dominant influence
on the variation of the output voltage is due to the resistive component. In the
course of selecting the value of the capacitor and frequency of operation of the
controlling transistor the care should be taken that
4 PWM DC/DC Converters
235
ΔV0
V0 /(8LCf
2
ξ=
)
C
/T=const.
0.5
2
0.3
1
0.1
0.01
0.1
0.3
0.5
0.7
0.9
D
Fig. 4.4 The normalized variation of the output voltage as function of D and ξ.
τ C < 0.1 T .
(4.19)
From (4.18) it is possible to determine the value of product LC which would result
in the variation of the output voltage smaller that the permitted maximum:
LC >
Vo (1 − D ) ⎛
4ξ 2 ⎞
⎜
⎟ .
+
1
Δ Vo f 2 ⎜⎝ 1 − D ⎟⎠
(4.20)
The right hand side of (4.20) is maximum at when D =Dmin . Therefore, it is
required that:
LC >
⎞
Vo (1 − D) ⎛
4ξ 2
⎜
⎟.
1
+
2 ⎜
Dmin (1 − Dmin ) ⎟⎠
Δ Vo f ⎝
(4.21)
4.1.1.2 The quasi-static mode of the
transistor
The maximum collector-emitter voltage of the transistor in the quasi-stable state
is equal to the input voltage, i.e. VCEmax=VI . While Tr is off the collector current is
zero and when it is on, its current is equal to the current through the choke (Fig.
4.5). Therefore, the maximum collector current is equal to the maximum current
through the choke and is determined by (4.5), whereas its average value is
ICsr=IIsr=ILm+ΔiL/2,
(4.22)
where ILm and ΔiL are determined respectively by (4.7) and (4.9). The input
converter current and the collector current are equal. Since the circuit is assumed
ideal, there are no losses in the converter, so the average value of the input power is
equal to the output power, i.e.:
VIIIsr=VoIo.
(4.23)
Power electronics
236
VB
T- 6
6
t
T
I C= I I
I LM
Δi L
I Lm
I Isr =I Lm + Δi L/2
t
Fig. 4.5 The control voltage and collector current of the transistor.
From (4.23) it follows that:
IIav/Io=Vo/VI=1/D.
(4.24)
This indicates that an ideal converter behaves like a transformer whose
transformation ratio is equal to the reciprocal value of the duty cycle of the control
pulses.
From Fig. 4.5 it is noticeable that the froward DC/DC converter behaves like a
typical pulse load of the primary source involving high rates of current changes,
di/dt. This generates noise which is transferred through the primary source to other
parts of the equipment. It is for this reason that often the corresponding filters are
inserted between the primary source and the input of the DC/DC converter.
The condition of continuity of the current through the choke
The above analysis applies under condition that the current through the choke is
continuous. This condition will be met if:
IO >
ΔiL
,
2
(4.25)
or
Vo
(4.26)
T (1 − D) .
2L
From (4.26) it follows that the minimum inductance of the first choke of the output
filter which still results in a linear current through the choke is:
IO >
Lmin =
Vo T (1 − D)
.
IO
2
(4.27)
In order that the current through the choke is continuous for any value of the
supply voltage (4.27) should be calculated taking into account the minimum duty
4 PWM DC/DC Converters
237
cycle (the maximum value of the input voltage and minimum value of the output
voltage).
Example 4.1
Design a forward converter (Fig. 4.1) if: VI=48V, Vo=18V, RL=10Ω, and the
variation of the output voltage is less than 0.5%. The converter should operate in
the continuous mode.
On the basis of (4.11), the duty cycle of the control pulses is
D=VO/VI=18V/48V=0.375.
The minimum inductance for the continuous operating mode is determined by
(4.27). If it is assumed that the frequency of the control pulses is 40kHz, it follows
Lmin =
Vo
R (1 − D) 10Ω(1 − 0.375)
(1 − D) = L
=
= 78μH .
2I o f
2f
2 * 40 *10 6 Hz
Allowing the inductance be 25% higher than the minimum inductance, i.e.
L=1.25Lmin=97.5μH.
The current variation through the choke is
V
48 * (1 − 0.375) * 0.375
Δi L = I (1 − D) D =
= 2.88 A.
Lf
(97.5 * 10 −6 )(40 * 10 3 )
The average value of the current through the choke is equal to the load current, i.e.
IL=IO=VO/RL=18V/10Ω=1.8A.
The maximum and minimum choke currents are respectively:
ILm,M=IO+ΔiL/2=1.8A+2.88A/2=1.8A+1.44=3.2A,
ILm,m=IO-ΔiL/2=1.8A-2.88A/2=1.8A-1.44=0.36A.
By neglecting the ESR of the capacitor in (4.17), it follows
C>
1− D
2
8 Lf (ΔV0 / V0 )
=
1 − 0.375
8(97.5 * 10
−6
)(40 * 10 3 )(0.005)
= 100 μF .
4.1.1.3 The discontinuous mode
Depending on the fact whether the current through the choke is continuous or
discontinuous within a single cycle, one can distinguish two modes of operation of
the converter:
• continuous when the current of the choke is continuous, and
• discontinuous when the current of the choke is zero over a part of cycle T.
Power electronics
238
The boundary between these two modes is reached when the minimum current of
the choke ILm= 0. Whether a converter having specified parameters of the circuit
elements, will operate in the continuous or discontinuous mode will be dependent
on the load resistance. The limiting value of the load current IoL is obtained when
the inequality sign, >, in (4.25) and (4.26) is replaced by the equality sign, so that:
V
VT
(4.28)
I ol = o T (1 − D ) = I D (1 − D).
2L
2L
Since Iol=Vo/RLl , then, having (4.28) in mind, the load resistance for which the
converter is at the boundary between the continuous and discontinuous modes is
determined by:
RLg =
2L
.
T (1 − D)
(4.29)
The limiting load current Iol is a quadratic function of the duty cycle (Fig. 4.6). Its
maximum, taking into account (4.28), is at D= 0.5
VT
(4.30)
I Ol max = I .
8L
If the load resistance is increased above the value specified by (4.29), the converter
goes over to the discontinuous operating mode (Fig. 4.6b). During cycle D2T the
choke current is equal to zero, thus the voltage across the choke is also zero.
VB
T
iL
t
I LM
I 0g
I0
V I = Const.
D 1T
DT
I 0gmax =VI T/(8L)
VL
t
D 2T
VI -V0
A
-A
0.5
a)
1
D
t
- V0
b)
Fig. 4.6. The load current at the boundary between the continuous and discontinuous
operating modes (a) and the current and voltage of the choke in the discontinuous mode
(b).
4 PWM DC/DC Converters
239
The load current during this interval is provided by the capacitor only. Since the
average value of the voltage across the choke is zero, the surfaces above and under
the time axis are equal, i.e.
(V I-Vo)DT=VoD1T,
(4.31)
there fore it follows that
Vo
D
(4.32)
,
=
VI D + D1
where D+D1<1. The maximum current of the choke is equal to its variation ΔiL so
that
Vo
( D1T ).
L
The output current is equal to the average current through the choke, i.e.
I LM =
I LM + 0 ( D + D1 )T I LM
=
( D + D1 )
T
2
2
By combining (4.34) with (4.33), (4.32), and (4.30) it follows that:
VT
I o = I DD1 = 4 I ol max DD1 ,
2L
or
Io
D1 =
.
4 I ol max D
Io =
(4.33)
(4.34)
(4.35)
(4.36)
By introducing (4.36) in (4.32) it turns out that in the discontinuous mode
Vo
D2
= 2
VI D + I O /(4 I ol max )
(4.37)
If the input voltage is constant, then Vo will decrease with the increase of the load
current Io (Fig. 4.7) up to the boundary between the continuous and discontinuous
modes. Above this boundary (Io > Iol) the output voltage does not depend upon the
load current. The boundary between the continuous and discontinuous modes as a
function of the duty cycle D is a parabola (dotted lines in Fig. 4.7) having its
maximum at D = 0.5 (eq. 4.28).Therefore, if the load is variable, the converter may
go over from one to the other operating mode. If the transition to the discontinuous
mode is not permitted, in parallel with the load a fixed load Rp should be connected
which will at RL=R0Lmax ensure that Io > Iol . For the worst case when D = 0.5 it
should be ensured that:
Vo/(Rp||RLmax)>Iolmax=VIT/(8L).
(4.38)
Power electronics
240
V0 / VI
VI =Const.
1.0
D= 1.0
0.9
0.75
0.7
0.50
0.5
0.25
Discontinous
0.3
Continuous
mode
0.1
0
0
0.5
1.0
1.5
2.0
I 0 / I 0gmax
Fig. 4.7 The normalized output characteristics of a forward converter as functions of the
duty cycle of control pulses.
In the limiting case, when it is required that the converter operates in the
continuous mode, if the load is not connected (RLmax → ∞ ) the fixed load is
(4.39)
Rp≤Vo/Iolmax.
The presence of Rp lowers the factor of efficiency because power Vo(Vo/Rp) is a net
loss.
Example 4.2
For a forward converter specified by: VI=24V, L=200μH, C=1000μF,
f=1/T=10kHz, D=0.4, and RL=20Ω:
a) check the operating mode and determine the output voltage,
b) determine the duty cycle of the control pulses that the converter operates at the
boundary between the continuous and discontinuous modes,
c) determine the value of the fixed resistance (“idle resistance”) so that the loaded
converter operates in the continuous mode, and
d) determine the output voltage when conditions b) and c) apply.
(a) The operating mode is checked on the basis of the variations of the current
through the choke. At first it will be assumed that the current through the choke is
continuous. Then, the average value of this current is equal to the load current,
i.e.:
IL=IO=VO/RL=DVI/RL=0.4*24/20=0.48A.
On the basis of (4.9) it follows:
V
24 * 0.4(1 − 0.4)
Δi L == I D(1 − D) =
= 2.88 A
Lf
(200 * 10 −6 )(10 * 10 3 )
4 PWM DC/DC Converters
241
Since ΔiL/2=2.88/2=1.44>Io=0.48A, continuity condition (4.25) is not met.
Therefore, the current through the choke is discontinuous and the converter
operates in the discontinuous mode when the transfer characteristic is determined
by (4.37) so that
Vo
D2
,
= 2
VI D + (Vo / RL ) /(4 I og max )
where, on the basis of (4.30) Iolmax=(VIT)/(8L)=24/(8*200*10-6*10*103)=1.5A.
therefore,
Vo
0.4 2
0.16
,
=
=
2
24 0.4 + (Vo / 20) /(4 * 1.5) 0.16 + Vo / 20
there fore it follows that
Vo2 + 19.2Vo − 460.8 = 0,
or Vo=13.9V.
The waveforms of the voltage and current of the choke are shown in Fig. 2a.
(b) At the boundary between the continuous and discontinuous modes
ΔiL/2=Io=Vo/RL , so on the basis of condition (4.9), the limiting duty cycle is
Dg = 1 −
2 Lf
2 * (200 * 10 −6 ) * (10 * 103 )
=1−
= 0.8.
RL
20
The output voltage is Vo=DlVI=0.8*24=19.2V. The waveforms of the voltage
and current of the choke are shown in Fig. 2b.
(c) On the basis of (4.28) it follows that the output current at the boundary
between the continuous and discontinuous modes is
I og =
VI T
24 * 0.4 * (1 − 0.4)
D(1 − D)
= 1.44 A
2L
2 * (200 *10−6 ) * (10 *103 )
Taking into account (4.9), the limiting value of the load is
RLg =
2L
2 * (200 * 10 −6 ) * (10 * 103 ) 2 RP * RL
=
= =
,
1 − 0.4
3 RP + RL
T (1 − D)
and the “idle resistance“ is Rp=10Ω.
Power electronics
242
VL
iL
VI -V0
DT=2A
L
V I - V 0 =10.1V
I LM =
VL
40
(DT)
40
(T)
t(μs)
-0.88A
- V 0 =-13.9V
a)
VL
iL
I LM =1.92A
iL
V I - V 0 =4.8V
VL
80
(D g )
100 t(μs)
(T)
-0.88A
- V0 =-19.2V
b)
Fig. 4.8
4.1.1.4 The energy relations in the quasi-stable states
These considerations are related to the power losses in the quasi-stable states
when the transistor, or diode, are on or off, under the assumption that the condition
of continuity of the current through the choke is met.
The power losses in the transistor
The average power loss in the transistor, during one cycle, when it is on and
saturated, is determined by the following expression:
t
1 s
Pts = ∫ vce (t ) ic (t ) dt
T 0
(4.40)
The variations of the collector-emitter voltage and collector current are
approximately linear:
4 PWM DC/DC Converters
vce (t ) = Vce ( I Lm ) +
ic (t ) = I Lm +
ΔVce
t and
ts
ΔI c
t,
ts
243
(4.41)
where: ts is time interval when the transistor is in saturation, ILm is the minimum
current through the choke, ΔIC=ΔiL=ILM-ILm is the variation of the collector current,
and vce(t) is the collector-emitter voltage of the transistor upon turn-on determined
by:
⎡
⎛
β ⎞ I ⎤
Vce ( I Lm ) = ϕ t ln ⎢ N ( I Lm ) + ⎜⎜ N ( I Lm ) + N ⎟⎟ Lm ⎥ .
β I ⎠ Δ I C ⎥⎦
⎢⎣
⎝
(4.42)
ΔVce is the variation of the collector-emitter voltage when the transistor is on:
⎛
β ⎞I
N ( I LM ) + ⎜⎜ N ( I LM ) + N ⎟⎟ LM
β I ⎠ ΔI c
⎝
ΔVce = Vce ( I LM ) − Vce ( I Lm ) = ϕ ln
t
⎛
β ⎞I
N ( I Lm ) + ⎜⎜ N ( I Lm ) + N ⎟⎟ Lm
β I ⎠ ΔI c
⎝
(4.43)
where βN and βI are the coefficients of the current gain in the normal and reverse
modes of operation. Introduction of (4.41) into (4.40), upon rearrangement, gives:
ΔVce I Lm ⎤
1
⎡
⎛
⎞
⎜
⎟
.
⎢Vce (I Lm )I Lm + 2 (ΔVce I Lm + Vce ⎜⎝ I Lm ⎟⎠ ΔI ) +
3 ⎥⎦
⎣
Taking into account (4.9), the final expression is:
Pts =
ts
T
(4.44)
Pts =
⎡⎛
⎞⎤
ts
1 V ( I ) 1 ⎛ TV ⎞
ΔVce I O ⎢⎢⎜⎜ + ce Lm + ⎜⎜⎜ o ⎟⎟⎟⎛⎜⎝1 − D ⎞⎟⎠ ⎟⎟ ⎥⎥ .
⎟⎥
ΔVce 12 ⎝ LIo ⎠
⎢⎣ ⎜⎝ 2
T
⎠⎦
(4.45)
Ratio Pts/Ptsmax as a function of the duty cycle is shown in fig. 4.9a, for different
values of parameter a1=TVo/(LIo). Ptsmax is the maximum average power loss in the
transistor which occurs at D=1, which is understandable, since the transistor is
permanently on. For a1> 0.6, Pts exhibits maximum (dotted lines in Fig. 4.9a).
Under realistic conditions, however, this maximum will not occur, because the
condition for this maximum is in contradiction to the condition for the continuity of
the current through the choke.
Power electronics
244
12
0.7
Pd /(I 02 Rd )
Pts /Ptsmax
0.8
0.5
0.8
a1 =6
4
2
1
0.6
0.4
0
0.2
0.5
0.4
TV 0
=Const.
LI 0
a 1=
a1 =Const.
0.2
0.1
0.1
0.3
0.5
0
0.7
1
1.5
2
D
a)
b)
2.5
1/D
Fig. 4.9The relative average power loss as function of D in the conducting transistor (a)
and in the conducting diode (b).
It is straightforward to show that the average power loss of the turned-off
transistor within one cycle is expressed by:
Ptz = (1 − D )VI I c 0 ,
(4.46)
where ICO is the collector current with the open emitter circuit.
The power losses in the diode
The average power loss in the diode during one cycle when it is on is
determined by:
Pd =
T
T
1 2
1
id (t )Rd dt + ∫ id (t )VDt dt ,
∫
Tτ
Tτ
(4.47)
where: id (t) is diode current as function of time, Rd differential resistance of the
diode, and VD1 turn-on voltage of the diode ( for silicon diodes it is about 0.6V).
The current through the diode is approximately linear:
t
.
(4.48)
T −τ
If the power dissipated by the differential resistance of the diode is denoted by Pd1 ,
then from (4.47) and (4.48) it follows:
id (t ) = I Lm − ΔI
Pd 1 = Rd (1 − D )
⎡
I O2 ⎢1 +
⎢⎣
2
1 ⎛ ΔI ⎞ ⎤
⎜ ⎟ ⎥.
12 ⎜⎝ I O ⎟⎠ ⎥
⎦
(4.49)
4 PWM DC/DC Converters
245
It is straightforward to show that the second member in (4.47) is:
Pd 2 = VDt I O (1 − D ) .
(4.50)
With (4.9) in mind, the total average power loss in a turned-on diode is expressed
by:
2
⎡
⎤
1 ⎛ TVo ⎞
⎢
⎜
⎟
(1 − D ) 1 + ⎜ ⎟ (1 − D )2 ⎥ + I OVDt (1 − D ) .
Pd =
⎢⎣ 12 ⎝ LI O ⎠
⎥⎦
The differential diode resistance is approximately determined by:
I O2 Rd
(4.51)
Rd = ΔVd ΔI d ,
I LM + I DS
, or taking
I Lm + I DS
into account that the reverse saturation current of the diode IDS<<ILM,m :
where: ΔId = ILM-ILm and ΔVd = vd ( I LM ) − vd ( I Lm ) = m ϕ t ln
⎛I
ΔVd ≈ m ϕ t ln ⎜⎜ LM
⎝ I Lm
⎞
⎟⎟ .
⎠
(4.52)
The maximum power Pd occurs at D=Dmin . By increasing D (decreasing VI), the
power loses in an open diode decreases monotonically (Fig. 4.9b). The average
power losses during one cycle in a turned-off diode is:
Pdz = DV I I DS ,
(4.53)
where IDS is the reverse saturation current of the diode.
The power losses in the choke
If the ohmic resistance of the choke is denoted by RL , then the average power
loses in the choke while the transistor is conducting is determined by:
PL© =
τ
1
RL i L2 (t )dt ,
∫
T0
(4.54)
where:
iL (t ) = I Lm +
ΔI
τ
t.
(4.55)
By rearranging (4.54) and (4.55), one obtains:
PL'
=
⎡
DI O2 RL ⎢1 +
⎢⎣
1 ⎛ TVo
⎜
12 ⎜⎝ LI O
2
⎤
⎞
⎟⎟ (1 − D )2 ⎥ .
⎥⎦
⎠
(4.56)
Power electronics
246
The power losses in the choke while the diode is on, is determined by (4.49), with
the exception that Rd should be replaced by RL , i.e.:
2
⎤
⎡
1 ⎛ T Vo ⎞
⎟⎟ (1 − D) 2 ⎥ .
= I O RL (1 − D) ⎢1 + ⎜⎜
⎥⎦
⎢⎣ 12 ⎝ LI O ⎠
The total power loses in the choke is PL=PL’+PL’’, i.e.:
PL''
⎡
1 ⎛ TV
PL = I O RL ⎢1 + ⎜⎜ o
⎢⎣ 12 ⎝ LI O
2
⎤
⎞
⎟⎟ (1 − D )2 ⎥ .
⎥⎦
⎠
(4.57)
(4.58)
The power losses in the capacitor
The average power loss during one cycle in the series resistance of the capacitor
of the output filter is determined by:
τ
T
1
1
PC = ∫ iC21 (t ) RC dt + ∫ iC2 2 (t ) RC dt ,
T 0
Tτ
(4.59)
where ic1(t) and ic2(t) are the respective variations of the capacitor current (Fig. 4.3)
when the control pulse is present and when the control pulse is not present. Since
ΔI ⎛ 2t ⎞
⎜ − 1⎟ ,
2 ⎝τ
⎠
the first member in (4.59) is:
iC1 (t ) =
Δ I2
.
12
When the control pulse is not present:
PC' = DRC
t ⎞
ΔI ⎛
⎜1 −
⎟,
2 ⎝ t −τ ⎠
so the second member in (4.59) is determined by:
iC 2 (t ) =
ΔI 2
.
12
The total power loses in RL is the sum of PC’ and PC’’, i.e.:
PC'' = RC (1 − D )
(4.60)
(4.61)
(4.62)
2
R ⎡T
⎤
PC = C ⎢ Vo (1 − D )⎥ .
12 ⎣ L
⎦
(4.63)
4 PWM DC/DC Converters
247
4.1.1.5 The dynamic losses of the transistor and diode
The previous section dealt with the analysis of the power losses in the quasistable states. It has been assumed that the transistor and diode were the ideal
switching elements (instantaneous turn-on and turn-off). In practice, however, the
situation is different. The turn-on and turn-off times of the transistor and diode can
not be neglected, particularly at higher frequencies. During the transition cycle the
transistor is in the active region and the dissipation is the highest. The question
may be asked what is the contribution of dynamic losses compared to the total
losses in the semiconductors (active) elements? It is clear that that the dynamic
losses compared to the total losses decrease proportionally to the descrease of the
frequency. However, the minimum frequency is limited by other requirements
(ripple in the output voltage, weight, volume of converter, etc.).
Particular attention should be paid to the problem that may arise if the speeds of
the transistor and diode are of the same order. These problems manifest themselves
during the turn-on process of the transistor, because it is then that the transistor
could be overloaded. As long as the diode is not on, the collector load of the
transistor is very high (small impedance), so the amplitude of the current pulses
increases (current shifts). These current pulses are transferred to the converter
output and they increase the ripple of the output voltage. For this reason the diode
should be much faster than the transistor, or the turn-on process of the transistor
should be slowed down.
In general, the driving stage of the switching transistor introduces its own delay
because the base current is not an abrupt but an exponential function. Therefore, in
the considerations which follow it will be taken into account that the base current
rises exponentially, determined by time constant τb .
The transition phenomena in the semiconductor elements will be analyzed by
applying the charge control method which allows a unique determination of turnon/ turn-off and delay times of the transistor and diode and the variations of the
currents during these intervals.
Turning on the transistor and turning off the diode
The variation of the current through the choke during the transient process is
negligibly small. The amplitude of the overshoots of the collector current (Fig.
4.10) depends on the selected transistor and diode.
The variation of the base current of the controlling transistor during the turn-on
process is:
(
)
ib (t ) = I b 1 − e −t /τ b ,
(4.64)
Power electronics
248
where: τb – time constant of the base circuit, and Ib – constant base current. The
collector current can be determined by applying the equation of charge continuity
within the base region (Chapter 2). Since the initial condition is Q(0)= 0, then:
τb
⎡
⎤
−t
−t
⎢
⎥
1
τ
ic (t ) = βI b ⎢1 −
eτ c + c eτ b ⎥ ,
τ
⎢ 1− τb
⎥
1− b
⎢⎣
⎥⎦
τc
τc
(4.65)
where: β is the common emitter current gain of the transistor and τc=τβ=1/(2πfβ),
and fβ is the cut off frequency of the common emitter current gain. Upon
application of the reverse bias, the diode is still conducting for some time. Namely,
until the excess minority carriers surrounding the pn junction are completely swept
away, the diode will be in the state of conduction. The current through it is:
id (t ) = I Lm − ic (t ) ,
(4.66)
where ILm is the minimum current through the choke.
I CM
i C (t)
I Lm
I LM
t
Fig. 4.10 The waveform of collector current.
It is of interest to determine the storage time of the diode (the time of
discharge), because during that time the diode has a very small resistance and
makes a high load for the transistor. The fall time of the diode current in this case
can be neglected. By applying the charge control method the delay time can be
uniquely determined. Namely, the solution of the continuity equation gives the
variation of the charge in the vicinity of the pn junction of the diode:
Q(t ) = e
−t
τd
−t
⎧⎪τ
⎫⎪
τ
⎨∫ id (t )e d dt + Q(0) ⎬ ,
⎪⎩ 0
⎪⎭
(4.67)
where: id(t) – the variation of the current through the diode, Q(0) – the initial
charge in the diode, τd – the time constant of the diode. Since Q(0)= τdILm and
taking into account (4.66) and (4.65), the solution of (4.67) is obtained in the form:
(
)
⎡
τ c2
Q(t ) = I1τ d − βI bτ d ⎢1 − e −t /τ b +
e −t /τ c − e −t /τ d +
(τ c − τ b ) ⋅ (τ c − τ d )
⎣
+
τ b2
(τ b − τ c ) ⋅ (τ b − τ d )
(e
−t / τ b
− e −t / τ d
)
⎤
⎥.
⎦
(4.68)
4 PWM DC/DC Converters
249
At the end of the storage time, the excess charge in the vicinity of the pn junction is
zero, i.e.:
(4.69)
Q (t r ) = 0 .
From (4.69) and (4.68), after rearrangement, it follows:
1
= 1 − K1e −tr /τ c − K 2 e −tr /τ c + K 3e −tr /τ b ,
(4.70)
N
where:
βI
N = b ,– the coefficient of saturation of the transistor after turn-on,
I1
K1 =
τ d2
,
(τ c − τ d )(τ b − τ d )
K2 =
τ c2
, and
(τ c − τ b )(τ C − τ d )
K3 =
τ b2
.
(τ c − τ b )(τ b − τ d )
(4.71)
Owing to a mathematical inconsistency in certain relations between time constants
while solving (4.67), there are restrictions to the validiry of equation (4.70). Of
practical interest are two extreme cases:
1. When τb ≈ 0, then:
(
)
ic (t ) = βI b 1 − e − t / τ c .
(4.72)
2. If τc ≈ 0 (τc<<τb), it follows that:
(
)
ic (t ) = βI b 1 − e −t /τ b .
(4.73)
In the first case (τb ≈ 0) it follows:
− tr
τd
τc
1
e τd −
e
=1+
N
τc −τd
τc −τd
− tr
τc
,
(4.74)
and in the second (τc<<τb):
τd
1
=1+
e −tr
τb −τd
N
τd
−
τb
τb −τd
e −tr
τd
.
(4.75)
The graphical solution of equations (4.70), (4.74), and (4.75) for different ratios
of the time constants, τd/τc and τb/τc , is shown in Figs. 4.11a and 4.11b. It is
obvious that the storage time decreases with increasing of the coefficient of
transistor saturation and with decreasing of the time constant of the base current.
Fig. 4.12 shows the dependence of the storage time on the ratio of the time
Power electronics
250
tr /
d
constants of the diode and transistor (τd/τc) with the coefficient of saturation of the
transistor taken as a parameter.
Of particular interest is to establish how the amplitude of the current pulses
depends on the ratio of the time constants of the diode and transistor. In the case
when τd>τc and τb ≈ 0 the overshoots of the transistor current could be very high.
Namely, it could then be assumed that the transistor is turned on instantaneously,
so the current through the transistor, while the diode is still conducting, is equal to
βIb (Fig. 4.13).
4
d
tr /
d / c =0.9
3.5
3
b / c =3.5
2.5
2.5
1.5
2
1.5
0.5
0.0
1
0.5
0
1
2
3
4
5
6
7
8
9
N
10
12
11
10
9
8
7
6
5
4
3
2
1
1
d / c =0.1
b / c =0.8
0.6
0.4
0.2
0.0
2
3
4
5
6
7
8
9
10
N
Fig. 4.11 The rise time as a function of the coefficient of transistor saturation.
When the storage time ts is determined, it is then straightforward to determine
the current overshoots for each specific case. Therefore, the maximum collector
current is:
τ /τ
⎡
⎤
1
I m = βI b ⎢1 −
e −t r / τ c + b c e −t r / τ b ⎥ .
(4.76)
1
−
τ
/
τ
1
−
τ
/
τ
⎣
⎦
b
c
b
c
Figs. 4.14a and b show a graphical representation of the dependence of the ratio
ICM/ILm on the transistor saturation coefficient for different ratios of the time
constants td/tc and tb/tc .
The dependence of the amplitude of the current pulses on the time constants is
shown in Fig. 4.15. It can be seen that the amplitude of collector current increases
with increasing of the saturation coefficient (the transistor is turned on faster) and
with increasing of the time constant τd (tr increases). However, by increasing the
time constant of the base current, ICM decreases. Therefore, in the design of a
converter a diode having as small time constant τd as possible should be selected,
and if necessary, the turn-on process of the transistor should be slowed down by
increasing τb .
4 PWM DC/DC Converters
251
c
i C (t)
2
ts /
βI b
I LM
I Lm
N=2
t
1
i d (t)
N=5
ts
t
0
0.1
1
10
d/
c
Fig. 4.12 The storage time as function of
Fig. 4.13 The waveforms of the
collector and diode currents.
τd/τc with the saturation factor as a parameter.
1.6
3
d / c =0.9
b / c =0
1.5
0.5
1.4
1.5
2.5
0.4
0.8
1.2
1.5
1
b / c =0
1.3
3.5
2
d / c =0.1
I CM /I Lm
3.5
I CM /I Lm
4
1.1
1
2
3
4
5
6
7
8
9
1
10
1
2
3
4
5
6
N
7
8
9
10
N
a)
b)
5
4
b >> c
3
b
2
=
c
b
>>
I CM /I Lm
Fig. 4.14 The maximum collector current as a function of the saturation factor N with
the ratio of the time constants taken as a parameter.
c
1
0
1
2
3
4
b/ d
Fig. 4.15 ICM as function of the ratio of the time constants.
Power electronics
252
Turning-off the transistor
If the transistor is turned off by a negative base current –Ib2 and with initial
condition Q(0)=τcICM/β , the application of the charge control method gives the
collector current:
ic (t ) = ( I LM + βI b 2 )e
−t
τc
− βI b 2 ,
(4.77)
where ICM is the maximum current of the choke of the output filter. The turn-off
time of the transistor can be determined from condition ic(t)= 0, so:
⎛
1 ⎞
⎟,
t f = τ c ln⎜⎜1 +
N 2 ⎟⎠
⎝
(4.77a)
where 1/N2=(ILM/βIb2). If the negative base current is not provided (N2=0), the turnoff time can be determined from condition ic(tf)=0.1ILM , there fore, taking into
account (4.77), it follows that tf =2.3τc .
The power losses
The power losses in the semiconductor elements during the transient processes
consist of the losses during the storage time of the diode and the losses during the
transistor turn-off process while the diode is conducting. Fig. 4.16 shows the
waveforms of the transistor and diode voltages and currents obtained with
integrated circuit PIC625/626 by firm UNITRODE at 50kHz. The full lines show
the variations of the currents, and the dotted lines the variations of the voltages.
During the turn-on and turn-off processes of the transistor it may be assumed that
that the collector-emitter voltage is approximately equal to the input voltage.
i C VCE
I CM
VCE (t)
i C (t)
I Lm
tr
tt
t
T-
id
I LM
Vd
I Lm
Vd(t)
i d (t)
t
Fig. 4.16 The voltage and current waveforms for PIC 625/626.
4 PWM DC/DC Converters
253
The power losses in the transistor during turn-on are defined by:
t
Ptr =
VI r
ic (t )dt .
T ∫0
(4.78)
By considering (4.65) and (4.78), it follows:
(
)
(
)
VI N ( I Lm ) I Lm ⎧
τ c 1 − e − tr / τ c τ b 1 − e − tr / τ b ⎫
−
(4.79)
⎨t r −
⎬ .
T
1 −τb /τ c
1 −τ c /τb ⎭
⎩
Fig. 4.16a gives a graphical presentation of the relative dependence of the dynamic
power losses in the transistor during its turn-on on the ratio τb/τd , for different
ratios τd/τc . The power losses in the transistor during turn-off are defined by:
Ptr =
tf
Ptf ≈
VI
ic (t )dt .
T ∫0
(4.80)
where ic(t) and tf are expressed by (4.77) and (4.78) respectively. The solution of
(4.80), taking into account (4.78), tuns out to be:
Ptf =
VI N 2 I LM
T
(
⎡
−t f
⎢τ c 1 − e
⎢⎣
τc
)− ⎛⎜⎜1 − N1 ⎞⎟⎟t
⎤
⎥ .
2 ⎠ ⎥
⎦
⎝
(4.81)
f
If instead of tf in (4.81) one introduces (4.77a), then:
Ptf =
VI I LM τ c
T
⎡
⎛
1 ⎞⎤
⎟⎥ .
⎢1 − N 2 ln⎜⎜1 +
N 2 ⎟⎠⎥⎦
⎢⎣
⎝
(4.82)
By adding (4.79) and (4.82) one obtains the dynamic losses in the transistor during
its turn-on and turn-off.
>>
c
)
d
2
1.5
d
=
c
1
0.5
0
1
2
3
4
0.5
0.2
0.1
d >> c
0
1
c
2.5
Ptr /(VI I Lm f
Ptr /(V I I Lm f
d
)
3
5
6
0
1
2
3
4
5
b/ d
a)
6
7
8
9
10
N2
b)
Fig. 4.17The dynamic losses in the transistor during turn-on (a) and during turn-off (b).
From the dependence of the relative power loses in the transistor during turn-off
/on factor N2 (Fig. 4.17b) it is noticeable that increasing of N2 decreases the power
Power electronics
254
of losses, thus one should try to make N2>1. Since the turn-off time of power
transistors is quite long, it is necessary to provide a negative base current in order
to speed up the turn-off process.
The dynamic losses in the diode can be determined in a way similar to the one
applied to the transistor. During the storage time the variation of the voltage across
the diode can be neglected so it could be assumed that Vd=VDt and:
t
Pdd' =
VDt r
id (t )dt ,
T ∫0
(4.83)
where the diode current is expressed by (4.66). From (4.83), upon rearrangement,
one obtains that the average power of dissipation in the diode within one cycle
during the storage time is:
V
(4.84)
Pdd' = VDt I Lm f t r − Dt Ptr ,
VI
where Ptr is expressed by (4.79). The average power losses in the diode within one
cycle during the transistor turn-off process are defined by:
t
Pdd'' =
VD f
id (t )dt .
T ∫0
(4.85)
Now, the diode current is:
id (t ) = I LM − ic (t ) ,
(4.86)
where the collector current of the transistor ic(y) is given by (4.77). Upon
rearrangement:
V
(4.87)
Pdd'' = VD I LM f t f − D Ptf ,
VI
where Ptf is determined by (4.82). The total power of dynamic losses is determined
by (4.84) and (4.87). Since VDt ≈VD :
V
(4.88)
Pdd = VD f ( I Lm t r + I LM t f ) − D ( Ptr + Ptf ) .
VI
4.1.1.6 The parameter optimization
The calculation of optimum parameters is one of the most important, and at the
same time the most complex, tasks in the design of any system, thus in the design
of DC/DC converters. It comprises the exact description of the processes, power
relations in all circuits and elements, selection of criterion function, and the
corresponding optimization algorithm. The mathematical models of the circuits and
4 PWM DC/DC Converters
255
elements contain nonlinear functions; therefore the optimization can only be
performed with the aid of a computer.
The optimization criteria depend on the goals, technical requirements, and
output parameters. The mot frequent technical requirements for converters are:
maximum variation of the input voltage, output voltage stabilization, output power,
electrical and thermal regimes. The goal functions are usually: minimum weight,
volume, price and maximum factor of efficiency. Consequently, the optimization
can be performed by parts. The problem of optimization as a whole can be solved
through the application of specific subprograms for optimization of individual goal
functions. Basically, the most complex and at the same time the most important
problem in the design of converters is the optimization of the factor of efficiency. It
is clear that the thermal regime, particularly the regimes of the semiconductor
elements, is dependent on the power losses. Closely related are the cooling
problems and also the volume and weight of the cooling system whose
participation in the overall measures of the converter is very significant.
Consequently, by determining the maximum factor of efficiency the solution is
obtained not only for the problem of minimum losses but also for the problem of
minimum weight and volume.
On the basis of the analysis of power losses it can be concluded that the total
losses are dependent on three independent parameters: the saturation coefficient of
the transistor (N ), the frequency of the controlling transistor (f ), and the time
constant of the base current (τb). These are the parameters that a designer has to
determine when, in accordance with the specific technical requirements, selecting
the corresponding transistor and diode. Therefore, the task of designing a minimum
loss converter (maximum coefficient of efficiency) is reduced to the search for
optimum parameters N, f, and τb . It should be noted that the listed parameters have
limitations which are automatically introduced into the process of searching for the
optimum values.
There are a number of optimization methods for nonlinear functions of several
variables: the gradient method, method of second derivatives, and method of direct
search. For practical reasons here is the most suitable method of direct search.
4.2 GALVANICALLY ISOLATED FORWARD CONVERTER
The second version is the forward converter having galvanically isolated input
and output (Fig. 4.18). In this version after transistor Tr is turned on, the energy
from the primary circuit is transferred directly to the secondary. Simultaneously,
through diode D1 (D2 is off) this energy is accumulated in the choke and fed to the
load. While Tr is off, the energy from the choke is fed to the load via diode D2.
During this interval the core of the transformer is demagnetized through the third
Power electronics
256
winding which is by diode D3 connected to the primary source. In this process one
part of the energy is returned to the input.
The third winding has to be closely coupled with the primary winding in order
to avoid voltage spikes while Tr is turning off. Usually these two windings have the
same number of turns. Then, the collector voltage of Tr while off approaches 2VI .
The presentation of the voltage and current waveforms of Fig. 4.18b implies
that the transformer and the switching elements (transistor and diodes) are ideal,
and that the variation of the output voltage is negligibly small. The current through
the choke while Tr is conducting is given by:
VI
-V o
t,
(4.89)
i L (t) = I Lm + n
L0
and while Tr is off:
Vo ,
(4.90)
t
L0
where ILm and ILM are the minimum and maximum currents through choke Lo
respectively. By equating the increase and decrease of current iL the output voltage
is obtained as:
i L (t) = I LM −
VI ,
(4.91)
n
where D=T1/T is the duty cycle of the control pulses (the ratio of the interval of
conduction of Tr and the total cycle T=T1 +T2), and n is the ration of the primary
and secondary number of turns. Thus, the output voltage does not depend on the
load current but only on the duty cycle of the control pulses (VI and n are
constants).
The previous analysis has been made under the assumption that the current
through the output choke was continuous. It is possible; however, that while the
transistor is off the current drops to zero. Since filtering of the output voltage
would then be much more difficult, this mode is considered unsuitable and to be
avoided. If the discontinuity of the current through choke Lo is to be avoided, the
load current has to be higher than the average value of the ripple of current iL , i.e.:
Vo= D
I0 >
Δ i L I LM - I Lm
.
=
2
2
(4.92)
4 PWM DC/DC Converters
257
D1
L0
iL
D2
C
V0
RL
iC
VI
i D3
D3
Tr
VB
a)
VB
2VI
VI
V CE
iC
i D3
DT
iL
T
VI /n - V 0
L0
-
I0
I
V0
I
DT
LM
L0
Lm
T
b)
Fig. 4.18 The forward converter having input and output separated (a) and the voltage
and current waveforms (b) in the continuous mode.
Since ILM=iL(DT), from (4.89) and (4.91) the boundary between the continuous and
discontinuous operating modes is:
I0 >
V I T D(1 - D ) = I
og .
2n L0
(4.93)
Fig. 4.19 shows the normalized output characteristics of the converter for
different values of the duty cycle. In the discontinuous operating mode (to the left
of the dotted line) the output voltage is dependent on the load current. For this
reason the discontinuous mode should be avoided. This is accomplished by
connecting to the output a constant load (zero or intrinsic load) similarly to the
converter not having the galvanic separation between the input and output.
Power electronics
258
The collector current of the transistor linearly grows and consists of the
magnetization current of the primary winding and the current of the output winding
referred to as the primary circuit, i.e.
ic =
iL + V I ⋅t .
n L1
(4.94)
The collector current reaches maximum at the end of transistor conduction (t=DT),
so:
I LM + n V o T .
(4.95)
I Cmax =
n
L1
The magnetization current is shown cross-hatched in Fig. 4.18b. Most of the time it
can be neglected, so ICmax ≈ ICM/n .
Vn =
nV 0
=D
VI
D=0.6
0.5
0.5
Discontinuous
Continuous mode
0.4
0.2
0
0.1
0.2
I n=
nI 0 L 0
VI T
Fig. 4.19 The normalized output voltage as function of the load current and duty cycle.
After the transistor is off, the demagnetization diode D3 conducts and ensures
the flow of the current discharging from the core of the transformer. The voltage of
the third winding, approximately equal to –VI , is referred to as the primary
winding. Owing to this the collector voltage is higher than VI . Since the coredischarging winding usually has the same number of turns as the primary, the
maximum collector voltage is:
(4.96)
V CEmax = 2 V I .
Then, the magnetization and demagnetization times are equal so (4.96) applies
during interval DT (Fig. 4.18b). This also means that the maximum ratio pulse/ (no
pulse) have to be less that 0.5.
The required volume of the transformer core can be calculated by the following
equation:
V=
μ 0 μ e I 2mag L1
2
Bmax
,
(4.97)
CONTROL MODULES
5
The control modules (CM) of the pulse voltage stabilizers close the automatic
control loop between the input (pulse amplifier and power transistor) and output
(output LC filter) parts of the stabilizer which maintains the load voltage constant
within a pre-assigned accuracy. Control is accomplished by converting the error
signal to a pulse sequence which drives a pulse amplifier.
There are several different structures of control modules. In principle, however,
they can all be divided in two groups. The first group consists of the CM having a
relay transfer characteristic. Depending upon the value of the input signal the
output stage of the control module is either on or off. Stabilizers having this type of
CM are called relay or two-state stabilizers. E.g this group is classified in to pulse
DC/DC converters having linear microelectronic stabilizers. The second group
consists of control modules generating sequences of pulses of variable duty
cycles. Duty cycle is error-signal-dependent with the frequency remaining
constant – Pulse Width Modulation (PWM) or the frequency is variable with the
pulse width remaining constant – Frequency Pulse Modulation (FPM) (in some
cases both types of modulation are carried out simultaneously).
In a relay voltage stabilizer the output voltage is compared with a stable voltage
reference. The comparison is continuous and the state at the output of the control
module changes when the error signal (the difference between the output and
reference voltages) reaches a level that is equal to the value of the voltage
hysteresis of the CM relay characteristic. In a pulse-width modulation stabilizer the
error signal changes the state of the CM at discrete time intervals. Thus it could be
said that the dynamic properties of the relay stabilizers are superior to those of the
pulse-width modulation stabilizers. However, the advantage of the relay stabilizers
as regards the continuity of the comparison does not show because the dynamic
characteristics of all pulse stabilizers are mostly determined by the characteristics
of the output LC filter. On the other hand, the relay stabilizers suffer from a series
of shortcomings. First of all, the frequency of control pulses is dependent on the
load current and input voltage variations. This leads to considerably more rigorous
requirements for the output filter design. Also, the variable component of the
output voltage contains considerably more harmonic components which are often
undesirable. This also applies to the frequency pulse modulation stabilizers. The
pulse-width modulation stabilizers operate at a constant frequency or its variation
Power electronics
324
is very small. This is exactly the reason that in practice a CM based on pulse-width
modulation is more commonly employed.
The control modules involving current programming where the ratio signal/pause is
determined by the time required that the current through the switch reaches certain
value (current threshold) are becoming increasingly interesting. The current threshold
is determined by the control signal of the control module. The CM involving current
programming is characterized by the precisely defined current through the switch,
overload protection, even distribution of the load when operating in parallel and
superior control dynamics. Two techniques of current programming are in use:
constant frequency and constant pause but variable frequency.
Control modules employing a constant frequency and a variable duty cycle are the
most widespread today. These are, therefore, the circuits based on the pulse-width
modulation (PWM). Consequently in this chapter these circuits will be analyzed.
5.1 BASIC PRINCIPLES AND CHARACTERISTICS OF
PWM CONTROL MODULES
The basic block-scheme of a pulse-width modulator (PWM), shown in Fig. 5.1,
consists of two comparators A and B (B involves a hysteresis – Schmitt trigger),
two current generators, electronic switch Sw, and timing capacitor C. The current
generator switch Sw, capacitor C, and comparator B constitute a generator of
triangular voltage. The triangular voltage form V2 (Fig. 5.1b) is generated through
the process of charging and discharging of capacitor C by constant currents I1 and
I2 . Namely, if the output of comparator B is at a low voltage level, switch Sw is in
position (1). Then the capacitor is charged by current I1 and voltage V2 grows:
V1
IZLAZ
A
+VDD
V2
V2 V1
VTH
V20
VTL
V1
V2
2VM
t
VB
[T
(1)
I1
Pr
2
C
I2
a)
T
t
VA
b)
t
Fig. 5.1 The basic block-scheme of a PWM (a) and the voltage waveforms (b).
V 2 (t) = V TL +
1
I1t .
C
5 Control Modules
325
When at the output of comparator B the voltage level is high, the generator of
current I2 is on and voltage V2 is:
1
I2t .
C
VTH and VTL are the respective high and low threshold voltages of the Schmitt
trigger (ST). The state of its output changes at the instant when V2 equals VTH or
VTL , and the cycle of generator oscillation is:
V 2 (t) = V TH -
⎛1 1⎞
T = C ⎜⎜ + ⎟⎟V H ,
(5.1)
⎝ I1 I 2 ⎠
where VH is the width of the voltage hysteresis of ST. The amplitude VM and D.C.
component V20 of the triangular voltage are defined by:
VH ,
V TH + V TL
.
(5.2)
V 20 =
2
2
D.C. component V20 is equal to the center of the hysteresis of the ST, i.e. V20 = Vch .
VM =
D
1
0.5
VM
VM
V20
V1
Fig. 5.2 The static characteristic of PWM.
Pulse-width modulation is accomplished by feeding to inputs 1 and 2 of
comparator A the triangular voltage V2 and a fraction of the output voltage:
(5.3)
V 1 = k0V o ,
where 0<k0<1. If V1 >V2 , at the output of comparator A there will be low voltage
level, but if V1<V2 , the output will be at high voltage level (Fig. 51). Obviously, by
varying voltage V1 the time intervals of the signal and pause at the output of
comparator A will vary. The frequency will be constant and equal to the frequency
of the triangular voltage. By using time diagrams of voltages V1 and V2 (Fig. 5.1) it
can be shown that the time interval of the signal within one cycle T, neglecting the
variation of V1 , is determined by:
V − V1
+
τ = V 20 V M V 1 T = TH
T.
2V M
VH
(5.4)
The static characteristic of PWM is the dependence on duty cycle D of the control
pulses on variation of the output voltage of the stabilizer (Fig.5.2). PWM is
Power electronics
326
realized in the linear region of the static characteristic. For V1<V2o – VM , D= 1 and
for V1>V2o +VM , D= 0 the system of automatic control is interrupted and the
control transistor of the DC/DC converter will remain in either the on or off state.
5.1.1 The analysis of the circuit
The instability of the output voltage of the stabilizer as a function of the circuit
parameters will be analyzed first. In order that the output voltage remains
unchanged within the pre-assigned limit ΔVo when the input voltage is changed by
ΔVI , it is necessary that the duty cycle is changed by ΔD. With (5.11) in view:
+ ΔV o V o
ΔD = V o
,
(5.5)
V I + ΔV I V I
where VI and Vo are the nominal values of the input and output voltages
respectively. On the other hand, a change of Vo will induce a change of VI :
ΔV 1 = k 0 ΔV o .
(5.6)
The change of the duty cycle is proportional to the change of input voltage VI and
slope of the static characteristic of the control module, i.e.:
ΔD =
dD
ΔV 1 .
dV1
(5.7)
By differentiating (5.4) in terms of VI and introducing (5.7), one obtains:
ΔD = - k 0 ΔV o .
2V M
(5.8)
By equating (5.5) and (5.8), taking into account that always Vo>>ΔVo , the
instability of the output voltage is obtained as:
δo=
ΔV o
Vo
=
2V M δ I
,
k 0 V I (1 + δ I )
(5.9)
where δI=ΔVI /VI is the instability of the input voltage. The coefficient of voltage
stabilization is defined as:
Kn =
δ I = V I (1 + δ I ) .
k0
2V M
δo
(5.10)
The output resistance of the stabilizer depends on the coefficient of stabilization
and is determined by:
Ro =
R L V o Δ I cav = 2ΔI cav Vo V .
2 M
K n V I Δ I L k o (1 + δ I ) VI
(5.11)
5 Control Modules
327
From (5.10) and (5.11) it is seen that the coefficient of stabilization and output
resistance are dependent on amplitude VM of the auxiliary signal of the control
module. The coefficient of stabilization is inversely and the output resistance is
directly proportional to amplitude VM . Therefore, the amplitude of the triangular
voltage should be as small as possible. However, it is certain that there exists a low
limit below which the pulse-width modulation will not be accomplished. E.g. if
VM= 0, then V2=koVo (Fig. 5.3) and relay stabilization is accomplished where
frequency fr of the control transistor is known in advance and is dependent on the
parameters of the output LC filter, input voltage VI , and load current IL . Allowing
the frequency of the triangular voltage to be several times higher than fr . Then,
when VM increases it is possible that the operating frequency of the stabilizer fs falls
between f and fr , i.e. fr<fs<f (Fig. 5.3c). In that case, as can be seen in Fig. 5.3c, the
change of the load current or of the input voltage leads to a step change of the
operating frequency of the stabilizer, thus to an instability of the operation. Further
increase of the amplitude of the triangular voltage leads to an operating mode
where fr=f (Fig. 5.3d). Pulse-width modulation is accomplished. The principle of
pulse-width modulation will be realized if at instants to , t2 , and t4 , when the state at
the output of the control module is changed, the following condition is fulfilled:
dV
dV2
> 1 .
dt
dt
(5.12)
By differentiating (5.15) in terms of t and upon rearrangement it follows:
dV1
D + 2ξ
= 4 k0 f
ΔV o ,
dt t=τ
D + 4 ξ 2 (1 - D)
(5.13)
V 2 (t)
V 1 (t)
c)
i L (t)
K0V0
a)
T
I2
I1
t0
I0
t
2VM
d)
b)
t2 t3 t4
V 2 (t)
V 1 (t)
t
V 1 (t)
V 2 (t)
t1
K0V0
K0V0
T
t0
t1
t2
t3
t4
t
T
t0 t1 t2 t3 t4
t
Fig. 5.3 The voltage waveforms for different amplitudes of the auxiliary voltage.
Power electronics
328
where the change of the output voltage ΔVo is given by (5.16). By means of the
time diagram of Fig. 5.1b it can be shown that:
2V M
t ,
(5.14)
aT
where 0.5< a <1 is the coefficient of asymmetry of the triangular voltage. From
(5.14) one obtains:
V 2 (t) = V TL +
dV2 2V M
=
f .
dt
a
(5.15)
By combining (5.12), (5.13), and (5.15) it follows:
V M > 2a k 0
D + 2ξ
ΔV o .
D + 4 ξ 2 (1 - D )
(5.16)
Condition (5.12) have to be fulfilled for all values of the duty cycle
(Dmin<D<Dmax). Since the right hand side of (5.16) is maximal when the duty cycle
is minimum, the minimum amplitude of the triangular voltage will be dependent on
Dmin . From (5.16) it is also seen that VM depends on the coefficient of asymmetry
of the triangular voltage and that it is minimal for a= 0.5 and maximal for a= 1.
The dependence of the error of amplitude VM , according to (5.16), with respect
to a purely capacitive change of the output voltage (ξ = 0), on constant ξ with duty
cycle D as parameter is expressed as:
-Δ
2ξ
ΔV M = V M V c =
.1
ΔV c
D + 2ξ
E.g. for D= 0.2 the error is from 50% to 90%. Inequality (5.16) allows the selection
of optimum amplitude of the triangular voltage for any ξ. The usual practice is that
ξ is not greater than 0.1. E.g. for ξ = 0.1, Dmin= 0.2 and a symmetrical triangular
voltage, it follows that:
(5.17)
V M > 1.6 k 0 Δ V o .
5.1.2 The simple PWM
From (5.17) it can be seen that the amplitude of the triangular voltage should be
of the same order of magnitude as the maximum variation of the output voltage of
the stabilizer. This variation, depending on the various technical requirements, is
usually within the limits of several hundreds mV. If the permissible variation of the
output voltage is higher than several tens mV, one can use the simple circuit of Fig.
5.4a as PWM, where resistor R replaces the current generators. The output of the
Schmitt trigger is inverted. The input resistance of ST has to be much higher than
5 Control Modules
329
R. The ST with a resistance and a capacitance constitutes a stable generator with
the cycle of oscillation:
( - )
T = RC ln V OH V TL V TH .
(V OH - V TH )V TL
VOH is the voltage of logical one at the output of ST, whereas the voltage of logical
zero is neglected. Since the capacitor is charged and discharged through resistance
R, the variation of V2(t) is exponential (Fig. 5.4b). Owing to this the static
characteristic of the control module will be nonlinear. It will be almost linear if the
voltage hysteresis is much smaller than the lower threshold, i.e.:
V2 (t)
V1
R
A
V2
C
VTH
V20
VTL
B
t1
t2
t
a)
b)
Fig. 5.4 The basic block-scheme of a simple PWM (a) the waveform of the auxiliary
voltage (b).
V H = V TH - V TL << V TL .
(5.18)
Then, the variation of voltage V2 compared to its D.C. component is negligibly
small, so the current through resistance R is constant and its direction depends on
the voltage at the output of ST. When the voltage at this output is high, the current
charging the capacitor is:
V OH - V 20 ,
R
where V2o=(VTH +VTL)/2. Then:
I1 ≈
I1 t
.
C
From the above equation and condition V2(t1)=VTH one obtains:
t1 = RC V TH V TL = RC V H
.
V OH - V 20
V OH - V 20
V 2 (t) = V TL +
Now the voltage at the output of ST is low and the capacitor is charged in the
opposite direction by the current:
V 20 − VOL V 20
≈
,
R
R
where the low voltage level is VOL ≈ 0. Therefore:
I2 ≈
Power electronics
330
V 20 t .
RC
The next change of state at the output of ST will occur at V2(t2)=VTL , so that:
V TH - V TL = RC V H .
t 2 = RC
V 220
V 20
Cycle time T=t1+t2 is thus:
V 2 (t) = V TH -
T = RC
VH
.
V 20 (1 − V 20 V OH )
(5.19)
In order to obtain a symmetric triangular voltage, currents I1 and I2 have to be
equal, where it follows that the D.C. component should be equal to one half of the
high voltage level:
V OH .
(5.20)
2
Quite often, however, a saw tooth voltage (a=1) is used as the auxiliary voltage.
Then the stability of the frequency is higher. The basic block-scheme of the saw
tooth voltage generator of Fig. 5.5 contains a non-inverting Schmitt trigger. The
additional element is transistor Tr which enables discharge of capacitor C.
V 20 =
+V CC
Auxiliary
voltage
I
V TH
V TL
ST
C
T1
T2
Tr
Fig. 5.5 The basic block-scheme of the saw tooth voltage generator.
When condition (5.18) is fulfilled, the current generator can be replaced by a
resistor. The input resistance of ST has to be very high. Allowing the output of ST
be low. Tr is then off and C is being charged:
1
It .
C
From Vc(T1)=VTH and (5.21) it follows:
Vc (t) = VTL +
(5.21)
VH .
(5.22)
I
Now the output of ST is high and Tr is on and in the active region. Capacitor C is
being discharged, so:
T1 = C
5 Control Modules
331
1
(β I B - I )t ,
(5.23)
C
where b is the current gain of transistor Tr . This quasi-stable interval ends at
Vc(T2)=VTL :
V c (t) = V TH -
T2 = C
VH .
β IB - I
(5.24)
If the generator is to be saw tooth, it has to be T1>>T2 , thus βIB>>I. Then:
T2 ≈ C
VH
β IB
,
(5.25)
and the cycle time of the auxiliary voltage is T=T1+T2 ≈ T1 . Here too, the D.C.
component of the auxiliary voltage is equal to the center of the hysteresis.
Example 5.1
Determine the base current of transistor Tr in circuit shown in Figure 5.5,
so that it is T1/T2=100. Transistor current gain β is 100.
From (Eq. 5.22) and (Eq. 5.24) follows:
/ -1=100, so IB=1.01I.
5.1.2.1 The auxiliary voltage generators containing operational
amplifiers
The basic element of an auxiliary voltage generator is a Schmitt trigger. It has to
be characterized by a high input and low output resistances. Since the amplitude
(peak-to-peak variation) and D.C. component of the auxiliary voltage are equal to
the histeresis voltage and center of the histeresis voltage respectively, VH and VCH
have to be very stable and adjustable over a wide range. These requirements are of
a very high degree fulfilled by the ST using operational amplifiers. The basic
circuit of the generator is a standard free running multivibrator based on an
operational amplifier (Fig. 5.6). The operational amplifier together with resistors R1
and R2 constitutes a Schmitt trigger. The thresholds of the ST are determined by
equating the voltages at the inverting and non-inverting inputs. The transfer
characteristic has the shape of a hysteresis since the voltage at the + input depends
on the output voltage and the regenerative process is provided by the positive
feedback through resistor R2 .
Power electronics
332
V1 V2
VTH
R
+V CC
OPA
+
3
-V CC
1
C
2
R1
R2
V2
V1
t
VTL
V3
+V S
T1
T2
ST
t
-V S
a)
b)
Fig. 5.6 The free running multivibrator containing an operational amplifier (a) and the
voltage waveforms (b) (V2 is denoted by dotted line).
When the input V1 of the ST is low, the output is high so that:
+
V2 =
R1
+
V s = V TH ,
R1 + R 2
(5.26)
where Vs+ the positive output saturation voltage of the operational amplifier. For an
operational amplifier based on bipolar transistors Vs+ by 1 to 3V lower than the
supply voltage Vcc . When the increasing voltage V1 reaches the value of V2+, the
positive feedback loop is closed through R2 and the state at the output changes.
Therefore, V2+ is the upper threshold of the ST (V2+=VTH). Then the output of the
ST becomes equal to the negative saturation voltage of the operational amplifier: V3
= -Vs- and:
V2− = -
R1
V s = V TL .
R1 + R 2
(5.27)
When V1 is decreasing, the change of the output of ST (re establishment of the high
voltage level) will occur when V1=V2 . Therefore, the lower threshold, VTL , is
determined by (5.27). If the voltage supply of the operational amplifier is
symmetric, it is customary that Vs+=|Vs-|=Vs , so that the thresholds are symmetric
with respect to zero. In other words, the center of the hysteresis is VCH= 0.
A free running multivibrator is, thus, made of an inverting a ST and the timing
elements R and C. The voltage waveforms are shown in Fig. 5.6b. As in Fig. 5.4,
the voltage across the capacitor varies between VTL and VTH . Allowing the output of
ST be high, i.e. V3=Vs+. Then:
v1 (t) = V +s - (V +s - V TL ) e -t RC .
From condition v1(T1)=VTH and (5.28) it follows:
(5.28)
5 Control Modules
333
+
T 1 = RC ln
V s - V TL .
+
V s - V TH
(5.29)
Now V3= -Vs- and:
v1 (t) = - V s + (V s + V TH ) e
-
-
−t RC
.
(5.30)
This quasi-stable interval ends when v1(T2)=VTL , so that:
T 2 = RC ln
V s + V TH
V s + V TL
(5.31)
If Vs+=|Vs-| and by introducing VTH from (5.26) and VTL from (5.27) one obtains that
the quasi-stable interval is equal, i.e. T1=T2 (symmetric multivibrator), so the cycle
of oscillation is:
⎛
R ⎞
T = 2RC ln⎜⎜ 1 + 2 1 ⎟⎟ .
R2 ⎠
⎝
(5.32)
Therefore, the cycle depends on the time constant RC and resistance ratio R1/R2 .
This means that the sensitivity of the cycle to temperature changes and supply
voltage variations is very small.
The calculation procedure is very simple. Resistance ratio R1/R2 is determined
on the basis of the pre-assigned value of the hysteresis:
V H = V TH - V TL = 2
R1
Vs .
R1 + R 2
(5.33)
Since the input resistance of the operational amplifier is high, R1+R2 may take
values from several hundreds Ω to several MΩ. Timing resistance R may be varied
within the same limits. Capacitor C may take any value between hundred pF and
ten μF. The choice of these elements is shown by the following example. Allowing
Vcc=12V (then usually Vs+ ≈ 10V), VH= 1V and f= 1kHz. From (5.33) R2/R1 =19.
This means that one can choose R1= 1kΩ, R2= 19kΩ. The medium values of R1 and
R2 are the optimum choice. Namely, if one can choose, resistance exceeding 1MΩ
is not recommended because then the thresholds are influenced by the polarization
currents of the operational amplifier. Therefore, R1= 10kΩ, R2= 190kΩ. Then T=
0.2RC. A standard value of C is chosen. Allowing C= 100nF. Then R= T/(0.2C)=
50kΩ.
It should be emphasized that free running multivibrators containing operational
amplifiers usually operate at low frequencies. Namely, the maximum frequency is
limited by the large signal cut-off frequency of the operational amplifier. E.g. for
the general purpose operational amplifier 741 this frequency is 10kHz.
Power electronics
334
1
C
100nF
R(50kΩ)
+V CC
OPA
+
-V CC
R 2 (190kΩ)
R1
10kΩ
V1
+V S
-V S
5.2V
6.2V
6.2
5.2
t
R0
10kΩ
+V CC (12V)
Fig. 5.7 An asymmetric free running multivibrator containing an operational amplifier.
The D.C. component of the signal from the auxiliary generator (Fig. 5.6) is zero
(V2o=VCH= 0). However, it is usually required that V2o ≠ 0. Then the circuit of Fig.
5.7 is used. Here, resistance Ro is added. In this way an ST having VCH ≠ 0 is
obtained. If Ro is connected to +VCC (Fig. 5.7) then VCH > 0, if it is connected to –
VCC , VCH < 0. It is straightforward to show that with Ro added, the ST thresholds
are:
V TH = V CH +
V TL = V CH -
R1
+
Vs ,
R1 + R2 (1 + R1 R0 )
R1
Vs ,
(
)
+
1
+
R1 R2
R1 R0
(5.34)
(5.35)
where:
V CH =
R2
V CC
R0 + R2 (1 + R0 R1)
(5.36)
is the center of the hysteresis.
The quasi-stable intervals are now:
+
⎤
⎡
V s +V s
R0
T 1 = RC ln ⎢1 +
⎥ ,
+
R2 (1 + R0 R1 )V s − V CC ⎦
⎣
(5.37)
+
⎡
⎤
V s +V s
R0
.
T 2 = RC ln ⎢1 +
-⎥
R2 V CC + (1 + R0 R1 )V s ⎦
⎣
(5.38)
If it is assumed that Vs+= |Vs-| ≈ VCC , one obtains:
⎛
R1 ⎞
T 1 ≈ RC ln⎜⎜ 1 + 2 ⎟⎟ ,
R2 ⎠
⎝
(5.39)
⎛
⎞
1
R0
⎟⎟ .
T 2 ≈ RC ln⎜⎜ 1 + 2
R2 2 + R0 R1 ⎠
⎝
(5.40)
5 Control Modules
335
Therefore, Ro does not influence T1 . With the circuit elements of Fig.5.7: VCH=
5.7V, VTH= 6.2V, VTL= 5.2V, VH= 1V, the intervals are T1= 0.5s, and T2 = 0.17s.
This means that the multivibrator of Fig.5.7 is asymmetric.
In this recent practice single supply operational amplifiers are often in use.
Then usually Vs-=VCES ≈ 0. The upper threshold remains the same (5.34) whereas
the lower is determined by (5.36). If Vs+=VCC , the quasi-stable intervals are:
⎛
R1 ⎞
⎟⎟ ,
T 1 ≈ RC ln⎜⎜1+
R2 ⎠
⎝
(5.41)
⎛
R0 ⎞
⎟⎟ .
T 2 ≈ RC ln⎜⎜1+
R2 ⎠
⎝
(5.42)
Owing to the exponential variation of the voltage across the capacitor, the transfer
characteristic of the PWM having a simple generator of the auxiliary voltage is
nonlinear. Moreover, many control modules of PWM require an error amplifier.
Then, the amplitude of the auxiliary voltage is multiplied by the amplifier gain and
grows to several volts. Here the auxiliary voltage generators having constant
discharge current of the timing capacitor are used. An example of such generators
containing two operational amplifiers is shown in Fig. 5.8. Amplifier OPA1 and
resistors R1, R2 , and Rp constitute a non-inverting ST, and OPA2 with R and C a
Miller integrator (resistor R shown by dotted line is of no functional significance,
but it is used to reduce the influence of the input polarization current of the
operational amplifier). The thresholds are determined by:
V TH =
R1 + ⎛⎜ 1 + R1 ⎞⎟
Vs ⎜
⎟V REF ,
R2
R2 ⎠
⎝
(5.43)
R1 + ⎛⎜ 1 + R1 ⎞⎟
Vs ⎜
⎟V REF ,
R2
R2 ⎠
⎝
(5.44)
V TL = where:
V REF = (1 - 2x )V CC ,
1< x < 0 .
The hysteresis voltage, which is equal to the peak-to-peak variation of the auxiliary
voltage, is determined by:
R1 =
(5.45)
Vs VM
R2
and does not depend upon the tap position of potentiometer Rp . Potentiometer Rp
serves for the determination of the hysteresis center, i.e. of the D.C. component of
the triangular voltage:
V H = V TH - V TL = 2
⎛
R1 ⎞
V CH = V 20 = ⎜⎜ 1 + ⎟⎟(1 - 2x )V CC .
R2 ⎠
⎝
(5.46)
Power electronics
336
When V1-= -Vs , the current through R is I=Vs/R . Since the input current of the
operational amplifier is negligible, current I is charging the capacitor and:
v2 (t) = V TL +
Vs t
.
RC
(5.47)
VCC
+V S
RP
XRP
VR
-V CC
-V S
OPA1
+
-V S
VTH
R
1
R2
R1
V 1 V2
C
OPA2
-
1
V1
VTL
t
R
ST
V2
MI
-V S
a)
b)
Fig. 5.8 The generator of triangular voltage containing two operational amplifiers (a)
and voltage waveforms (b).
The output voltage of the Miller integrator linearly grows during T1 . From
v2(T1)=VTH and (5.47) it follows:
VH .
(5.48)
Vs
After T1 the output of ST is high (V1=+Vs), the direction of the current through the
timing resistor is altered (I+=Vs/R) and the capacitor is discharged by this current.
Thus:
T 1 = RC
Vs t
.
RC
From v2(T2)=VTL and (5.49) one obtains:
v2 (t) = V TH -
(5.49)
VH
.
(5.50)
Vs
Therefore the generator is symmetric and the cycle, taking into account (5.48) and
(5.50), is:
T 2 = RC
T = 4RC R1
(5.51)
R2
The calculation procedure is very simple. On the basis of a pre-assigned value of
the amplitude of the triangular voltage from (5.45) ratio R1/R2 is calculated. For R1
and R2 the values between ten kΩ and several hundreds kΩ are recommended.
Resistance R could take values from kΩ up to MΩ, and capacitor C from hundred
pF up to ten μF.
5 Control Modules
337
Example 5.2
Symmetrical triangular voltage generator is realized on the basis of circuits
shown in Figures 5.9 and 5.11. Its voltage is changed from 2V to 6V. Next
should be determined:
a) Reference voltage VREF and resistance R1 if R2=2kΩ.
b) Capacitance C, if I=32μF, and frequency of generator is f=40kHz.
a) Triangular voltage varies between the thresholds of Schmidt trigger, so
that VTL=2V and VTH=2V. From (Eq. 5.58) follows VREF=6V, and based on
(Eq. 5.59) is obtained R1=2R2=4kΩ.
b) From (Eq. 5.54) follows:
32 · 10
2 6 2 · 40 · 10
2
100
.
5.1.2.2 The auxiliary voltage generators in the integrated
circuit form
Fig. 5.9 shows a basic scheme of a generator of the symmetric triangular
voltage containing one current generator. This approach is employed when the
generator is materialized as a constituent part of a monolithic (integrated) circuit.
Thanks to the current mirror constituted by transistors Tr1 and Tr2 the capacitor is
charged and discharged by current I of the generator. Namely, when the output is
low, Tr3 is cut off. Owing to this Tr1 and Tr2 are off. Diode D is conducting and C is
being charged by current I. It is understood, of course, that the input current of the
ST is negligibly small. Then:
vc (t) = V TL +
I
t.
C
(5.52)
When the output of the ST is high, Tr3 is saturated. Tr1 and Tr2 are on and diode D is
off. The currents of transistors Tr1 and Tr2 for this half-cycle are marked in Fig. 5.9.
It is understood that the characteristics of the transistors are identical. Then:
β
I.
IC2 =
β+ 2
Since D is off, capacitor C is being discharged by current Ic2 . For β>>2, Ic2 ≈ I
and:
Power electronics
338
vc (t) = V TH -
I
t.
C
(5.53)
The cycle of oscillation is:
T = 2C
VH
.
I
(5.54)
+V CC
VTH
I
VTL
D
βI B
I C2
T r1
IB
IB
T r2
C
1
ST
T r3
Fig.5.9 The basic scheme of the generator of the symmetric triangular voltage.
One of the possible versions of the current generator is shown in Fig. 5.10. IE is
the polarization current of the transistor. If the emitter junction voltages of Tr1 and
Tr2 are equal, the voltage drop across R is VCC –Vc . Since the base current of Tr2 can
be neglected, current I is equal to the current through R, i.e.:
I=
V CC - V x
.
R
(5.55)
By introducing (5.55) in (5.54) the frequency of the generator:
f =
1 V CC ⎛ V x ⎞
1
⎜1 =
⎟
T 2RC V H ⎜⎝ V CC ⎟⎠
(5.56)
Is a linear function of control voltage Vx .
+V CC
VX
R
T r1
T r2
IE
T r3
I
Fig. 5.10 The constant current source.
The stability of the frequency and amplitude of the triangular voltage are
dependent on the thresholds of the ST. In addition to a high stability, the possibility
5 Control Modules
339
for a simple threshold control with negligibly small variations from circuit to
circuit should exist. All this can be accomplished by using the basic scheme of ST
shown in Fig. 5.11. The differential comparators K1 and K2 have the respective
thresholds:
V T 1 = V REF ,
VT2 =
R2
V REF .
R1 + R 2
(5.57)
VREF is the output of the reference voltage source which is common for the whole
integrated circuit of which the ST is only a fraction. Thanks to the RS latch, the
transfer characteristic at outputs Q and Q is that of the hysteresis form.
V REF
+
Vi
K1
Q
V TH
R1
+
S
K2
Q
V TL
R
R2
Fig. 5.11 The basic scheme of an integrated Schmitt trigger.
Allowing the input to rise from 0 to VCC . For Vi= 0, at the outputs of K1 and K2
are S=1 and R= 0. Therefore Q= 0. At Vi=VT2< VT1 , R=1, but the state at the output
of the RS latch does not change because S=R=1. Only when Vi=VT1 , S= 0 and the
output Q becomes high. When the input decreases from VCC to 0, since VT1>VT2 the
output of K2 changes first and becomes high at Vi=VT1 . Since both inputs of the
latch are now high, i.e. S=R, the state of the output remains unchanged (Q=1).
Only when Vi=VT2 , R= 0, and the latch is erased (Q= 0). Therefore, in the course of
a positive variation of the input voltage output Q becomes high when Vi=VTH=VT1,
whereas for a negative variation Q becomes low when Vi=VTL=VT2 . Thus, the
thresholds of the ST are given by:
(5.58)
V TH = V REF ,
R1
(5.59)
V REF .
R1 + R2
It should be emphasized that the RS latch can be realized by applying NOR logic
circuitry. Then, compared to Fig.5.11 the inputs of K1 and K2 should be changed.
Namely, comparator K1 should be non-inverting (Vi to “+” and VREF to “-“ input),
whereas K2 is inverting.
V TL =
Power electronics
340
5.2 VOLTAGE CONTROLLED PWM
The pulse-width controller (PWM) is in the feedback loop between the output
and input of a DC/DC converter. The feedback loop maintains the constant
designed output irrespective of the input voltage or load variations. The x control is
realized in such a way that a variation of the input signal of the feedback loop, or
of the PWM, changes the width of the control pulse applied to the switch at a
constant frequency. Depending on the character of the PWM input signal, voltage
or current, one deals with:
• voltage control or
• current control.
The block diagram of a voltage controlled forward DC/DC converter is shown in Fig.
5.12. Since the variations of the output voltage are very small (smaller than 100mV)
the control signal is taken from the output of the error amplifier EA so that
V1 = Vc = Av (k oVo − VREF ),
(5.60)
where Av is the voltage gain of the error amplifier, VREF is temperature and voltage
compensated reference voltage, and
ko =
R2
.
R1 + R2
(5.61)
A sample of the output voltage variation is taken from the voltage divider R1, R2 , it
is compared with the reference voltage, and amplified by the error amplifier.
Amplification Av is calculated to ensure that within the permitted range of the
variations of output voltage Vo , control voltage VC remains within limits
VTL < Vc < VTH ,
(5.62)
where VTH and VTL are the threshold voltages of the Schmitt trigger of the auxiliary oscillator.
Since for the forward DC/DC converter Vo=DVI=(τ/T)VI , from (5.4) it follows:
Vo =
AV VREFVI / VH
1 + AV k oVI / VH
⎛
V
⎜⎜1 + TH
⎝ AV VREF
⎞
⎟⎟.
⎠
(5.63)
In practice it is always VI >VH , ko<1 and Av >>1.The ratio of the upper threshold
VTH of the Schmitt trigger and the reference voltage VREF may be arbitrary, but for
the majority of PWM integrated circuits 0.5<VTH/VREF <2. Bearing this in mind, it
follows that: AvkoVI/VH >>1 and 1>>VTH/(AvVREF) and:
Vo ≈
VREF ⎛ R1 ⎞
= ⎜⎜1 + ⎟⎟VREF .
ko
⎝ R2 ⎠
(5.64)
5 Control Modules
341
Lf
M
R1
VI
Cf
D
R L V0
R2
PWM
comparator
DT
Error
V C amplifier
EA
VREF
V TH
T
VH
V TL
T
PWM
C
Auxiliary
oscillator
Fig. 5.12 The block diagram of a voltage controlled forward converter.
Therefore, the output voltage does not depend either on the load current or on the
input voltage of the converter, but it depends only on the reference voltage VREF
and resistance ratio R1/R2 .
Example 5.3
If VREF=4V and R1+R2=1kΩ, determine the R1 and R2 so that the output
voltage is 5V.
From (Eq. 5.64) follows :
R1/R2=VO/VREF-1=0.2, so R2=433Ω and R1=567Ω .
5.3 CURRENT CONTROLLED PWM
In addition to the voltage control, current control of PWM DC/DC converters is
also used. In essence here there are two feedback loops: voltage and current (Fig.
5.13a). The voltage loop acts through the error amplifier to the PWM comparator.
The elements of this loop determine the level of the output voltage Vo . The other
feedback loop is current-based. It consists of a small (ten to several hundreds mΩ)
resistor Rf used as a current sense and the voltage amplifier A. With respect to the
voltage PWM control, the amplifier A and resistor Rf are the equivalent of the
generator of auxiliary signals. Consequently, the auxiliary signal is defined as:
V2=ARf iL .
Power electronics
342
Since the changes of current iL are approximately linear, this auxiliary signal is also
of a triangular form. An RS latch set by the pulses from a constant frequency
(f=1/T) oscillator of rectangular pulses and reset by the output of the PWM
comparator is introduced in order to ensure constant frequency of control pulses.
At the output of the RS latch the pulses of cycle T and width DT, dependent on the
output current Io are obtained.
+
Lf
M
Rf
iL
VI
R1
Cf
D
R L V0
R2
Amplifier
PWM
comp. A i L R f
A
i L Rf
Q
LATCH
S
R
error
amplifier
EA
VC
VREF
Oscillator
PWM
a)
T
S
iL
V2 = A Rf i L
t
(V C )
I LM
I0
Δi L
I Lm
t
R
Q
t
DT
t
b)
Fig.5.13 The block diagram of a current controlled forward converter (a) and the
characteristic waveforms (b).
The principle of operation is illustrated by the waveforms of the current through
the coil and characteristic voltages (Fig. 5.13b). A pulse at the S input of the RS
latch sets its output to the high level, i.e. Q=1. Transistor M is now on and diode D
is off. With the assumption that the output voltage is constant, the current through
choke Lf will be linear
5 Control Modules
iL (t ) = I Lm +
VI − Vo
t = I c + m1t ,
Lf
343
(5.65)
where:
m1 =
di1 VI − Vo
=
dt
Lf
(5.66)
is the slope of the increase of current iL and ILm=Ic is the minimum current through
the choke equal to the minimum control current Ic . As long as V2 < VC the output of
the PWM comparator is low. When these two voltages become equal, i.e.:
V2=ARfILM=ARfIc=Vc,
(5.67)
the output of the PWM comparator becomes high and resets the RS latch. Since
Q= 0, transistor M is off and diode D is on. The current through the choke
decreases:
V
i L (t ) = I c − o t = I c − m2 t ,
(5.68)
Lf
where
m2 =
di L Vo
=
dt
Lf
(5.69)
is the decreasing slope of current iL and
I c = I LM =
Vc
,
( AR f )
(5.70)
Is the maximum or the control current of the choke. Current iL will continue
decreasing until the next setting pulse. The output current is equal to the mean
value of the maximum choke current, i.e.:
I LM + I Lm
Δi
= IC − L .
2
2
Taking into account (5.58), (5.70), and (5.71) it can be written that:
V
1 Vo
Io = c −
(1 − D)T ,
AR f 2 L f
Io =
(5.71)
(5.72)
where D is the duty cycle of the control pulses. Therefore, the output current
depends on control voltage Vc . The feedback system controls the output current so
the output could be looked at as a source of controlled current.
The output voltage of the forward DC/DC converter is:
Vo=DVI=IoRL
(5.73)
The second terms in (5.71) and (5.72) are usually negligible, so by combining
(5.73), (5.72), and (5.60) one obtains:
Power electronics
344
Vo ≈
VREF ⎛
R ⎞
= ⎜⎜1 + 1 ⎟⎟VREF .
ko
R2 ⎠
⎝
(5.74)
The result of this brief analysis, expressed by (5.72) and (5.74) shows that in the
current controlled converters the current feedback controls the output current and
the voltage feedback controls the output voltage. The output current and the
maximum current through the switch are limited by the current loop and no
additional current protection is required. This is one of the advantages of current
controlled over the voltage controlled converters. It can be shown that the output
circuit of a current controlled converter is a first order system containing one pole.
The maximum phase shift between the control voltage and the output is -90o. The
circuit of the feedback loop is very stable and allows a simple compensation of the
error amplifier. The response to the variation of the input voltage and load current
is very fast
A shortcoming of the basic current controlled PWM is highly sensitivity to
noise at duty cycles in excess to 0.5. For this reason additional compensation is
introduced.
5.3.1 The problem of stability
The duty cycle depends on the ratio of slopes of the positive and negative
changes of the choke current, i.e. on the ratio of the input and output voltages. If
m2>m1 , then on the basis of (5.66) and (5.69), Vo>VI /2 or D=Vo/VI >0.5. When the
duty cycle is exactly 0.5, the converter of Fig. 5.13 is unstable. The instability may
be caused by the noise from different sources.
Allowing, as a consequence of the noise change ΔI1 of the choke current occurs
(Fig.5.14). The width of the pulse will be reduced by ΔT1 at a constant frequency.
When m2<m1, or D< 0.5, the change ΔI1 at the beginning of each subsequent cycle
will be somewhat suppressed and within several cycles it will be completely
eliminated (Fig. 5.14a). However, for D>0.5 the disturbance ΔI1 is amplified in
each subsequent cycle so that ΔI 2 >ΔI 1, ΔI 3 >ΔI 2, ΔI 4 >ΔI3 . The width of the pulse
DT reduces by ΔT1 within the first, by ΔT2 >ΔT 1 within the second etc. (Fig.5.14b).
This may bring the oscillations of current iL (Fig. 5.14b) and discontinuation of the
PWM control.
The change within the first cycle will now be analyzed. A positive disturbance
ΔI1 at the beginning will cause shortening of the pulse by ΔT1 because the
condition iL=IC will be met sooner. Since current iL is linear (eq. 5.65), the
differentials can be replaced by increments, and on the basis of (5.66)
di L ΔI 1
=
= m1 .
dt ΔT1
(5.75)
5 Control Modules
345
ΔT1
iL
IC
ΔT2
ΔT3
ΔI 1
ΔI 3
ΔI 2
ΔI 1> ΔI 2> ΔI 3> Δ→
I4
D < 0.5
a)
DT
ΔI 4
0
T
ΔT 1
iL
ΔT1 > ΔT 2 > ΔT3 → 0
2T
ΔT 2 > Δ T 1
IC
ΔI 1
3T
t
ΔT 3 > ΔT 2
ΔI 3> ΔI 2
ΔI 2> ΔI 1
ΔI 4> ΔI 3
ΔT1
D>0.5
ΔI 4> ΔI 3> ΔI 2> ΔI 1
DT
T
2T
3T
t
b)
Fig. 5.14 The influence of noise ΔI1 on current iL through the choke for D<0.5 (a) and
D>0.5 (b).
At the end of the first cycle (t=T) the change of the choke current will amount
diL ΔI 2
=
= m2 .
dt ΔT1
By combining (5.76) and (5.75) one obtains:
m
ΔI 2 = 2 ΔI1 .
m1
(5.76)
(5.77)
The system will be stable if the disturbance is attenuated, i.e. if ΔI2<ΔI1, or
m2
< 1.
m1
(5.78)
The positive and negative changes of the choke current of a stable system are equal
to where it turns out that
m1DT=m2(1-D)T.
(5.79)
On the basis of (5.79) condition (5.78) can be written in the following form:
m2
D
=
< 1.
(5.80)
m1 1 − D
where it follows that the system will be stable if
D<0.5 .
(5.81)
Power electronics
346
5.3.2 The compensated PWM
The problem of instability is solved by introducing a compensation signal Vk
which is added to the control voltage (Fig. 5.15). The compensation signal is a
negative saw tooth voltage generated by an oscillator in synchronism with the
pulses setting the latch. In this way a linearly decreasing control signal is obtained
at the input of the PWM comparator
⎛ dv ⎞
⎛ dv ⎞
vc = vc' + vk = AR f iL − ⎜ k ⎟t = Vc − ⎜ k ⎟t
⎝ dt ⎠
⎝ dt ⎠
(5.82)
or
ic=Ic-mct,
(5.83)
where mc=(dvk/dt)/(ARf) is the slope of the control current change.
The characteristic waveforms for D > 0.5 are shown in Fig. 5.15. Disturbance
ΔI1 will be suppressed within several cycles. Of course, several conditions have to
be satisfied.
From condition iL(DT-ΔT1)=ic(DT-ΔT1) and bearing in mind (5.65) and (5.83) it
turns out that:
ΔI1
ΔT1 =
.
(5.84)
m1 + mc
On the other hand, ΔI2 is by mcΔT1 lower compared to the case of the undisturbed
control signal, i.e.:
ΔI2=m2ΔT1 - mcΔT1
By combining (5.84) and (5.85) one obtains
ΔI 2 m2 − mc
=
.
ΔI1 m1 + mc
The system will be stable if ΔI2<ΔI1 thus the stability condition is:
m 2 − mc
< 1,
m1 + mc
(5.85)
(5.86)
(5.87)
or
mc>(m2 –m1)/2
For the worst case, when m1= 0, the stability condition reduces to:
(5.88)
m2 Vo
=
.
(5.89)
2 2L
With mc>m2/2 the converter will operate with good stability for any value of the
duty cycle within the range 0<D<1.
mc >
5 Control Modules
347
The preceding analysis of control and stability is valid for the forward DC/DC
converters. The mode of control of other converters is the same and the solution for
the stability problem is very similar.
Lf
M
Rf
+
R1
VI
Cf
D
R L V0
R2
S
t
Q
LATCH S
R
t
Oscillator
PWM
Comp.
VC
Amplifier
V'C
A
Σ
Error
amplifier
+
EA
VREF
PWM
S
iL
t
IC
ΔT1
i C =I C -m C t
ΔI 1
ΔI 1> ΔI 2> ΔI 3
ΔI 2 <Δ I 3
ΔI 3 <Δ I 2
t
R
t
Q
DT
T
t
Fig. 5.15 A compensated PWM (a) and the characteristic waveforms (b).
In addition to the advantages already mentioned of the current-control compared
to the voltage-control of DC/DC converters the simple and reliable paralleling of
the outputs should also be mentioned. The parallel operation is employed when a
load current higher than the output current of a single converter is required. The
parallel operation of current controlled converters can be accomplished by using
Power electronics
348
only one error amplifier (Fig. 5.16). Control voltage Vc is common. Independent
adjustment of parameters G1, G2 , and G3 in each of the converters ensure a correct
distribution of the load current.
I 01
error
amplifier
V REF
EA
VC
Current
controlled
converter
GV
CCC1 1 C
R1
RL V0
C0
R2
I 02
CCC2
G 2VC
I 03
CCC3
G 3VC
Fig. 5.16 Parallel connection of three current controlled DC/DC converters.
5.4 IC CONTROL MODULES
At present the realization of control modules in the form of integrated circuits is
simplified considerably. Since 1975 production has been realized of several well
recognized families of the monolithic integrated circuits performing pulse-width
modulation which, with addition of several discrete components, achieve very
reliable control of DC/DC converters. These circuits differ mutually in the number
of functions they can perform. As a standard, however, they all comprise PWM
comparator, auxiliary voltage generator (triangular or saw tooth), error amplifier,
reference voltage source, and one or two outputs. Individually, some include a
pulse diode, some current and/or voltage protection, duty cycle limitation, “soft
start”, the possibility of shutdown, etc.
Fig. 5.17 shows a block diagram of a control module comprising the elements
met in the majority of the monolithic circuits of this type. The aim is to use the
model of a hypothetical control module in order to explain the functions of
individual sub-modules and the mode of using the corresponding input terminals.
The model is universal and covers all significant sub-modules and functions of
present-day integrated circuits performing the control functions. On the basis of
5 Control Modules
349
this it is expected that each designer will very quickly be able to understand the
possibilities of any IC control module.
Current
limitation
CS
Oscillator
+
- Error
CS
IN
+
-
N.IN
PWM
comparator
amplifier Error
signal
Compensat.
COMP.
K
Deade time
comparatpr
+
-
Deade time
control
CDT
+
-
Reference
voltage
source
V REF
Outpout mode OMC
Internal
supply
Channel A
Q
T1
T FF
Q1
O
Channel B
DT
T2
R
SHD
Tr
Q2
I
Shutdown
a)
Error signal (VSG )
V TH
OSC
CDT
V TH
OMC
DT
K
T=K+DT
Q
Q
G
Q1
DT
Q2
DT
DT
VGS> VTH
Q1=Q 2 =0
Drive
discontined
Two-phase outpots, OMC=1,
Q Q=0
1⋅
b)
Single-phase outpot
OMC=0
Q1 =Q2
Fig. 5.17 General block diagram of a PWM control module (a) and the voltage
waveforms (b).
PWM comparator and oscillator (auxiliary signal generator) are the basic parts
of a pulse-width modulator. They have been described in the preceding paragraphs.
350
Power electronics
Phase shifter. When two output channels are used individually, like in the pushpull and bridge converters, the output pulses have to be phase shifted so that the
power pulse transistors would not be on simultaneously. A phase shifter consists of
a T flip-flop and two NOR logic circuits. When OMC =1, AND circuits are enabled
to pass outputs Q and Q . T flip-flop divides by two the PWM frequency. The
NILI circuits are enabled by outputs Q and Q . During the output pulse at the
PWM comparator when Q= 1 ( Q = 0), the upper NOR circuit is disabled (Q1= 0 –
Tr1 off), and the lower is enabled and transistor Tr2 will be on until T= 0. Within the
next cycle the situation is reversed. Therefore, the cycle of the pulses at outputs
channels A and B is TA=TB= 2To , and their widths are equal to the duration of the
modulated pulses at the output of the OR circuit, i.e. τA,B=τ (see Fig. 5.17b). Since
τA,B=To , the maximum duty cycle per channel is Dmax= 50%.
Output Mode Control (OMC). Outputs Q1 and Q2 could be of the same phase
(Q1=Q2 ) as it is required by the converters having only one switching transistor.
The output mode (single- or two-phase) is selected through OMC input. If OMC=
0, AND circuits are disabled and they “isolate” the flip-flop from the NOR circuits.
The NOR circuits are then acting within the inverter having common input T so that
Q1=Q2 =T, and the cycle is TA=TB=To (Fig. 5.17b). In principle the maximum duty
cycle can be Dmax= 100%. In this mode the emitters and collectors of transistors Tr1
and Tr2 are connected in parallel. This doubles the output current.
Dead-Time Comparator (DTC) limits the maximum duty cycle so that always
Dmax<100%. In the single-phase mode it limits the minimum off time of transistors
Tr1 and Tr2 to a value which is higher than the maximum off time of the switching
transistors of the pulse voltage converters. It is usually assumed that tDT=4%To
meaning that the maximum duty cycle is Dmax=96%. In the two-phase mode DTC
determines the maximum phase shift. This is necessary in order to avoid, for
example, that the power switching transistors in a push-pull circuit are on
simultaneously. Dead time tDT is adjusted by voltage VDT at the “+” input of DTC.
This voltage has to be within limits:
VTL < VDT < VTH ,
(5.90)
where VTL and VTH are the minimum and maximum saw tooth (triangular) voltages
of the oscillator. If I is the current charging timing capacitor Ct of the oscillator,
then:
t DT = Ct V DT V TL .
(5.91)
I
For tDT/T= 0.04, from (5.22) and (5.91) one obtains:
VDT = VTL + 0.04 VH .
(5.92)
Voltage VDT is fed to DTC input from the output of the reference voltage generator
via a resistive divider. New generation ICs, however, have a built-in VDT source as
the voltage offset of the dead time comparator. This voltage determines the
5 Control Modules
351
minimum dead time (maximum duty cycle) and the additional control
(amplification) is accomplished by the external elements at DTC input (usually a
resistive divider supplied by VREF).
Error amplifier (EA) serves to amplify the output voltage variation. Depending
on the specific application (type of the pulse converter) EA can be inverting or noninverting. In the inverting connection (Fig. 5.18) a part of the output voltage is fed
to the + input of the amplifier. The impedances Z1 and Z2 in the feedback loop
define the gain and stability of the amplifier. Z1 and Z2 are usually of resistivecapacitive type.
V0
R1
IC CM
+
EA
-
IC CM
Z 2 Z1
R2
+
EA
-
xVREF (0<x<1)
Z 2 Z1
yV0 (0<y<1)
COMP.
Fig. 5.18 The possible connections of the error amplifier.
The currents of power converters are very high. Their pulse character is the source
of both inductive and conductive disturbances. For this reason it is often required
that the output part of the converter is galvanically separated from the control part.
Without this it would be difficult to realize a stable feedback system including the
control module. The galvanic separation is accomplished either by a transformer or
by an opto-coupler. In the case of an opto-coupler, care should be taken of the
breakdown voltages of the diode and transistor of the opto-coupler and of the
thermal instability of the photo-current. The opto-coupler operates in the linear
mode. Fig. 5.19 shows an example of galvanic separation by an opto-coupler. The
temperature stabilization is realized by the current generator comprising transistror
Tr1, Zener diode Z1, and resistor R3 . The transistor also serves as an amplifier. The
low-pass filter R1-C1 increases the stability. Potentiometer Ro serves for adjusting
the quiescent operating point in order to obtain an optimum intensity of the diode
light.
A simpler but more expensive solution (Fig. 5.20) includes feeding of the
photo-diode by a special shunt controller TL431 (Fig. 5.21). The controller
comprises an internal 2.5V voltage reference. It could be supplied by a 5V source
and the output voltage can be programmed externally up to 36V. Its temperature
coefficient is very small (50ppm/oC). Resistor R6 and capacitor C2 (Fig. 5.20) allow
frequency compensation.
Power electronics
352
R1
+
OC1
V0
R2
C1
IC CM
+
EA
-
Tr
D1
RL
C3
R3
Z1
C3
R0
-
Fig. 5.19 The separation by an opto-coupler.
Current Limit (CL).Over-current protection is accomplished by a CL
comparator connected as shown in Fig. 5.22. The threshold voltage of the
comparator, Vt , is typically between 100 and 200 mV. Allowing Ip be the
maximum permitted current of the pulse transistor Tr1 . With RsIp<Vt the output of
the comparator is passive. If RsIp>Vt the output of comparator CL is changed and
via PWM comparator it blocks the output stage of the control module (T1 and T2 in
Fig. 5.17a). Resistance Rs which initiates the protection action is therefore:
Rs=Vt /Ip .
+
C0
R4
R5
IC CM
OC1
Z Lcomp
R1
C2
R6
+
R2
C1
R3
A1
TL431
Fig. 5.20 The galvanic separation having LED driven by shunt controller TL431.
DC/AC CONVERTERS
- INVERTERS
6
DC/AC converters are used in situations when the primary source is D.C.
(battery, D.C motor-generator, solar cells, etc.) and the loads require an A.C.
supply. Since a D.C. source is inverted to an A.C. source of energy, DC/AC
converters are often called the inverters. This is not quite correct since the inverter
is only one, although basic, part of a DC/AC converter (Fig. 6.1). The inverter
alone can not meet the relatively strict technical requirements such as: the accuracy
of maintaining the output voltage or current, low harmonic content, high
coefficient of efficiency, small size. For this reason the DC/AC converters consist
of the following functional blocks:
• D.C. current or voltage source,
• control module,
• inverter,
• output filter, and
• current or voltage regulator.
The control module provides driving signals for the switching elements
(transistors or thyristors) of the inverter. It consists of an oscillator of mono-phase
pulses and a generator of multi-phase pulses.
DC SOURCE
V=V
i
DC
OSCILLATOR
GENERATOR OF
MULTI-PHASE
PULSES
OUTPUT
FILTER
INVERTER
CONTROL MODULE
CURRENT
OR VOLTAGE
REGULATOR
Fig. 6.1 The block diagram of a DC/AC converter.
o
AC
Power electronics
378
In fact, the generator of multi-phase pulses is made of logic circuits which at their
outputs give square pulses shifted by certain phase angle π/n (n is the number of
phases of the converter).
The basic function of the converter is to convert a D.C voltage to a sequence of
A.C square pulses. For this reason between the load and the inverter an output filter
is inserted with the task of extracting the fundamental harmonic from the sequence
of the square pulses so that the voltage across the load would differ as little as
possible from the sinusoidal form.
The current and voltage regulator maintains a pre-assigned value of the A.C.
output voltage and limits the output current to avoid overloading the converter.
6.1 SINGLE-PHASE VOLTAGE INVERTERS
The bridge voltage inverter (Fig. 6.2) is the basic circuit of DC/AC converters.
The DC power source operates in the voltage generator mode. If the inverter is fed
from a rectifier, in parallel with its input a sufficiently large capacitor Cg is
connected in order to filter out higher harmonics of the voltage. On the other hand,
capacitor Cg enables conduction of the D.C. source in the opposite direction which
is necessary when the load contains reactive components. The voltage inverters
create across the load a voltage +VDC (Fig. 6.2b). This is accomplished by the
operation of two pairs of switches (S1, S2) and (S3, S4). While one pair is on, the
other is off.
ii
+V DC
+
S1
V DC
i0
g
+ V0 load
T/2
T/2
S3
t
-V DC
S 2 VDC /RL
IM
S4
V0
i0
i+
i-
a)
t
-I M
- V DC /R L
b)
Fig. 6.2 The basic scheme of an inverter (a) and the timing diagram of the voltage and
load current (b).
Assuming that the switches are ideal, when first pair (S1, S2) is on, point A is on the
+ and point B is on the – pole of the power source and vo=VAB=VDC . In the second
6 DC/AC Converters - Inverters
379
half-cycle the pair (S3, S4) is on, point A is on the (–) pole and point B is on the (+)
pole of the power source so that vo=-VDC. The switches (S1, S4), or (S3, S2), must
not be on simultaneously because the D.C power source would be short circuited.
If the load was resistive, current io would also have the form of square pulses
having amplitudes +VDC /RL while S1 and S2 are on and –VDC /RL while S3 and S4 are
on (dotted lines in Fig. 6.2b). In practice, however, the load is usually resistiveinductive or mainly inductive. For this reason Fig. 6.2b shows the form of the
current corresponding to an inductive load. In this case the load current in one halfcycle has both positive and negative values. This means that the switches have to
be able to conduct in both directions.
For the switches use is made of transistors (bipolar or MOS) or thyristors. The
two-directional conduction of the switches is provided by the anti-parallel
connection of a thyristor/transistor and a diode (Fig. 6.3). Fig. 6.3 shows an
inverter based on bipolar transistors and the output filter for extracting the
fundamental harmonic. Transformer T separates galvanically the inverter from the
load and output filter. Thus the equivalent load of the inverter is mainly inductive.
i DC
+
VB1
T1
i C1
V DC
i D1
i C4
VB4
D1
D3
+ V0 -
T3
i D3
i C3
i C2
i0
T4
V B3
D4
D2
i D4
i D2
V B2
T2
L1
Vac
1
L2
C2
Fig. 6.3 A voltage inverter based on bipolar transistors.
Allowing the equivalent load of the inverter is a series connection of a resistor R
and an inductor L, with the condition ωL>>R. Then the load current is determined
by the differential equation where saturation voltages VCES of the transistors
conducting in saturation are neglected.
dio
+ Rio = VDC ,
(6.1)
dt
The initial conditions depend upon the interval of observation. Within interval 0 < t
< T/2 the load current increases from its minimum to its maximum value, whereas
within interval T/2 < t < T current io decreases from its maximum to its minimum
value. Since the pulses are symmetric, the absolute values of the maximum, IM , and
minimum, Im , current are equal, i.e. Im=-IM so the initial conditions are:
L
Power electronics
380
io(0)=-IM, io(T/2)=IM
(6.2)
After solving equation (6.1) and combining the solution with (6.2), it turns out that:
⎧ VDC ⎛
V ⎞
− ⎜ I M + DC ⎟e −t / τ ,
⎪⎪
R ⎝
R ⎠
io = ⎨
V
V
⎪− DC + ⎛⎜ I M + DC ⎞⎟e −t / τ ,
⎪⎩ R ⎝
R ⎠
0≤t≤T/2,
a)
T/2≤t≤T
b)
(6.3)
where the time constant is τ=L/R . Therefore, in interval 0 < t < T/2 the load current
increases, whereas in interval T/2 < t < T it decreases. Since io(T/2) = IM , from (6.3)
it follows:
IM =
VDC 1 − e −T (2τ )
.
R 1 + e −T (2τ )
(6.4)
E.g. if: VDC = 10V, L=1mH, R= 0.4Ω, and f= 100Hz, then from (6.4) IM= 19mA. If
the load was purely resistive R= 0.4Ω, the maximum current would amount IM=VDC
/R= 25A.
The current waveforms are shown in Fig. 6.4. Each half-cycle T/2 consists of
two intervals. E.g. in interval 0 < t < t1 diodes D1 and D2 are conducting, whereas in
t1 < t < T/2 diodes D1 and D2 are off and transistors T1 and T2 are on. From
condition io(t1)= 0, and equation (6.3a) it follows that:
⎛ I R⎞
t1 = τln⎜⎜1 + M ⎟⎟.
VDC ⎠
⎝
(6.5)
This time is equal to t2 , the time when the load current is conducted by D3 and D4 .
The thermal losses in resistor R are determined by I 2rms , where the root mean
square value of the load current is:
T
I rms
1 2
2
io (t )dt =
=
∫
T0
T
T /2
∫
0
2
⎡VDC ⎛
VDC ⎞ −t /τ ⎤
⎢ R − ⎜ I M + R ⎟e ⎥ dt .
⎠
⎝
⎣
⎦
(6.6)
The average currents of transistors and diodes are determined by (6.7) and (6.8)
respectively:
I Cav =
1
T
T /2
∫ io (t )dt =
0
VDC ⎛ T
V ⎞ τ −(T / 2 ) / τ
⎞1 ⎛
− e −t1 / τ ),
⎜ − t1 ⎟ + ⎜ I M + DC ⎟ (e
R ⎝2
R ⎠T
⎠T ⎝
(6.7)
t
I Dav =
V t ⎛
V ⎞τ
1 1
io (t )dt = − DC 1 + ⎜ I M + DC ⎟ (1 − e −t1 /τ ).
∫
T0
R T ⎝
R ⎠T
(6.8)
6 DC/AC Converters - Inverters
+VDC
381
V0
t
-V DC
i0
IM
t1
t2
t
-I M
IM
IM
IM
C1
i C2
i C3= i C4
t
i D1 = i D2
t
i D3= i D4
t
i DC
t
IM
IM
t
-I M
Fig. 6.4 The waveforms of the voltage across the load and currents through: load,
transistors, diodes, and power supply.
Example 6.1
A single-phase inverter based on thyristors is having a purely inductive load
L=1mH. Draw the timing diagrams and calculate the average values of the
currents through thyristors and diodes if VDC=10V and f=50Hz. The thyristors and
diodes are considered ideal.
Power electronics
382
When thyristors Th1 and Th2 are on, the voltage across the load is vo=+VDC ,
and when Th3 and Th4 are on then vo=-VDC . For this reason the current through
the coil will be linear since Ldio/dt is equal either +VDC or –VDC . Taking into
account the initial conditions it follows:
VDC
⎧
⎪− I M + L t ,
io (t ) = ⎨
V
⎪ I M − DC t ,
L
⎩
0<t<T/2,
T/2<t<T.
+VDC
V0
T/2
T/2
t
-V DC
i0
IM
i A1 = i A2
i D1 = i D2
IM
IM
i DC
i A1
D1
i A3
i D1
D3
Th 3
1
V DC
i A4
D4
i0
Th 4
L
Th 2
t
i A3 = i A4
t
iD
IM
i D1 = i D2
i D3 = i D4
i DC
i A2
i D4
i A3 = i A4
iA
i A1 = i A2
i D3
+ V0 -
i D3 = i D4
t
IM
D2
i D2
t
IM
Fig. 6.5
Within interval 0<t<T/2 diodes Di and D2 are on up to t1, or io(t1)=0 wherefrom
it follows:
t1 =
V
L IM T
= , since io (T / 2) = I M = DC T = 25 A.
VDC
4
4L
Therefore, the diodes and thyristors are conducting during intervals lasting T/4,
thus their average values are equal and amount to:
I Aav = I Dav =
1 ⎛1T
IM
⎜
T ⎝2 4
⎞ IM
= 3.125 A.
⎟=
⎠ 8
The waveforms of voltage vo and of the characteristic currents are shown in the
figure.
6 DC/AC Converters - Inverters
383
So far only bridge inverters have been considered. The half-bridge inverters
(Fig. 6.6) which are also in use consist of two switches and two capacitors.
M1
C
V DC
+
V /2
- DC
+ V0 -
1
load
C
i0
+
V /2
- DC
D2
M2
Fig. 6.6 A half-bridge inverter.
The capacitors have the same capacitance and each one takes one half of the D.C.
voltage (VDC /2). The transistors are alternatively on and off. Since the voltages
across the capacitors are always VDC /2, the voltage across the load is either +VDC or
–VDC .
6.1.1 The pulse controlled output voltage
The control pulses should be phase-shifted in such a way that the switches give
zero voltage across the load at the start and at the end of each half-cycle (Fig. 6.7).
Thus one obtains:
⎧+ VDC ,
⎪
vo (t ) = ⎨− VDC ,
⎪ 0,
⎩
α≤ωτ≤π−α,
π+α≤ωτ≤2π−α,
0≤ωτ≤α, π−α≤ωτ≤π+α, 2π−α≤ωτ≤2π.
(6.9)
This is necessary for two reasons. In this way the simultaneous conduction of S1
and S4 or of S2 and S3 is avoided. Practically this would be possible during
transition when for example S1 is turning on and S4 is turning off and vice versa.
During that time the D.C. power source would be short circuited. In order to avoid
that, the control pulses have to be phase-shifted at least for the maximum duration
of the transition process. The sequence of turning on the switches should prevent
the formation of a low ohmic loop in parallel with the D.C. power source. This is
related to the problem of non-overlapping (overlapping) which will be considered
in more detail in the chapter dealing with real driving.
In this chapter the phase-shifted control pulses are of interest from another point
of view. Namely, through the angle of the phase-shift it is possible to control the
voltage of the fundamental harmonic. The mean square value of the voltage in Fig.
6.7 is determined by:
Power electronics
384
Vrms =
1
π
π −ε
∫V
α
2
DC
d (ωt ) = VDC 1 −
2α
π
.
(6.10)
S1
Open
S2
S3
S4
Clo sed
swi tches
V0
S2
S4
0
S1
S2
V DC
S1
S3
0
S1
S3
- V DC
S2
S4
0
a)
V0
V DC
α
α
0
α
π
α
2π ωt
- V DC
b)
Fig. 6.7 The real states of the switches and the corresponding waveform of the output
voltage of the inverter of Fig. 6.2
The Fourier series of this signal is:
∞
vo (t ) = ∑ Vn sin[(2k − 1)ωt ]
(6.11)
k =1
and it contains odd harmonics. If the odd harmonics are denoted by n=2k-1 taking
into acount the symmetry of the square pulses the amplitudes are:
Vn =
2
π
π −α
∫VDC sin(nωt )d (ωt ) =
α
4VDC
cos(nα ).
nπ
(6.12)
Therefore, the amplitude of each harmonic is a function of the angle α which
corresponds to the zero voltage across the load. It is important to emphasize that by
the corresponding choice of α individual harmonics can be eliminated. Namely, if
α=90°/n,
(6.13)
6 DC/AC Converters - Inverters
385
n-the harmonic will be eliminated. If α=30o, then V3= 0, meaning that the third
harmonic is eliminated. Then the amplitude of the fundamental harmonic is
V1=(4VDC/π)cos(30o)=1.1VDC . The fifth harmonic is eliminated if α=90o/5=18o, and
the amplitude of the first harmonic will be V1=1.2VDC .
By reducing individual harmonics the total harmonic distortion can be reduced
(see example 6.2).
Example 6.2
The load of inverter of Fig. 6.2 is inductive-resistive with L=25mH and
R=10Ω . If VDC=100V and f=50Hz determine the total harmonic distortions of the
voltage and current at
a) α=0
b) α=30o .
and
The amplitudes of the harmonics of the Fourier series of the load current are
determined by:
V
Vn
4 *100 /( nπ ) * cos(nα )
In = n =
=
,
Zn
10 2 + [n(2π * 50) * 0.025]2
R 2 + (nωL) 2
because the amplitudes of the harmonics of the voltage across the load are given by
(6.12). The individual values of Vn and In are given in Table 1.
Table 6.1
n
fn(Hz)
Zn(Ω)
1
3
5
7
9
50
150
250
350
450
12.71
25.59
40.52
55.88
71.39
α=0
127.3
42.4
25.5
18.2
14.1
Vn (V)
α=30°
110.2
0
22.1
15.7
0
In (A)
1
3
5
7
9
50
150
250
350
450
The total harmonic voltage distortion is determined by
THDv =
2
Vrms
− V1,2rms
V1,2rms
a) Vrms = VDC, V1,rms =
.
V1
2
=
4VDC
2π
= 90.07V ,
100 2 − 90.07 2 43.43
=
= 0.482 = 48.2%.
90.07
90.07
b) On the basis of (6.10), the rms value of the voltage across the load for α=30o
THDv =
is
Power electronics
386
Vrms = 100 1 −
2 * 30
= 81.6V ,
180
⎛ 4V
⎞
V1,rms = ⎜ DC cos α ⎟ / 2 = 110 / 2 = 77.92V ,
⎝ π
⎠
81.6 2 − 77.92 2 24.23
=
= 0.311 = 31.1%.
77.92
77.92
THDv =
The total harmonic current distortion is determined by (1.26), so on the basis of
Table 1:
a)
∞
THDI =
∑I
n=2
2
2
nrms
I 1rms
2
2
2
⎛ 1.65 ⎞ ⎛ 0.63 ⎞ ⎛ 0.32 ⎞ ⎛ 0.2 ⎞
⎜
⎟ +⎜
⎟ +⎜
⎟ +⎜
⎟
⎝ 2 ⎠ ⎝ 2 ⎠ ⎝ 2 ⎠ ⎝ 2⎠
=
= 0.18 = 18%,
10.01 / 2
2
2
⎛ 0.54 ⎞ ⎛ 0.28 ⎞
⎟
⎜
⎟ +⎜
⎝ 2 ⎠ ⎝ 2 ⎠
= 0.07 = 7%.
b) THDI =
8.67 / 2
6.2 PULSE-WIDTH MODULATION INVERTERS
It has been shown in Chapter 4 that the ratio of the output and input voltages of
DC/DC converters is directly proportional to the duty cycle of the control pulses of
a constant frequency and a variable duration. Pulse-width modulation is used in
inverters for the purpose of regulating the amplitude and frequency of the output
voltage. In the inverter circuits it is even more complex because it is required that
at the inverter output one obtains approximately sinusiodal (quasi-sinusoidal)
voltage of a pre-assigned frequency (usually 50 or 60Hz).
The pulse-width-modulated (PWM) inverters use a harmonic control
(modulating) signal, whereas the carrier signal is, as in DC/DC converters,
triangular. A PWM module consists of:
• a sinusiodal oscillator of frequency f1 (normally 50 or 60Hz) which generates
the control signal,
• a generator of triangular voltage (carrier signal) whose frequency fs is several
times higher than f1 ,
• a comparator having complementary outputs.
6 DC/AC Converters - Inverters
VC
387
= f (V1 / V1 )
+V DC
T1 =1/f 1
T1 = 1/f 1
Single-phase
inverter
t
Vsin
V0
load
Vs
Ts
t
Ts = 1/f s
Control module
-
Fig. 6.8 The block diagram of a single-phase PWM inverter
The pulse frequency at the comparator output is equal to the frequency of the
carrier signal fs , and the duration of the pluses depends upon the ratio of the
instantaneous values of the voltages of the control and carrier signals. Since these
pulses control the states of the invertor switches, the switches will also operate at
frequency fs modulated by the ratio of turn-on and turn-off times. Consequently, it
follows that:
⎧+ V ,
vo = ⎨ DC
⎩− VDC ,
Vc>Vt (S1 and S2 turned on)
Vc<Vt (S3 and S4 turned on)
(6.14)
which is illustrated in Fig. 6.8. Since the output voltage varies between +VDC and –
VDC , these PWM are bipolar modulators. Because the frequency of the carrier
signal is much higher than the frequency of the sinusiodal control signal, i.e. fs >>f1
, it may be considered that the control voltage Vc during cycle Ts is approximately
constant (Fig. 6.9). Then, based on Fig. 6.9, the average value of the output voltage
is:
Voav =
T −t
Ts +t1
⎤
1 ⎡s 1
⎢ ∫ − VDC dt + ∫ VDC dt ⎥.
Ts ⎢ t1
⎥⎦
Ts −t1
⎣
(6.15)
Because in interval 0 < t < Ts : Vtr= -VtM +(4VtM /Ts)t , from condition Vtr(t1 ) = Vc it
follows that:
t1 =
1
Ts
⎛
V
⎜⎜1 + c
⎝ VtM
⎞
⎟⎟.
⎠
From (6.15) and (6.16) it follows:
(6.16)
Power electronics
388
Voav =
Vc
VDC .
VtM
(6.17)
If
Vc=VcMsin(ωt),
then:
V
Voav = cM VDC sin(ωt ) = maVDC sin(ωt ),
VtM
(6.18)
(6.19)
where
ma =
VcM
VtM
(6.20)
is the factor of amplitude modulation which is equal to the ratio of the sinusiodal
control signal and the triangular carrier signal. On the basis of (6.19) one can draw
a very important conclusion that the average value of the output voltage is a
sinusiodal function having the frequency of the control signals f1 (dotted line in
Fig. 6.18b) and amplitude
(6.21)
VoM= maVDC≤VDC,
because the amplitude modulation factor ma <1.
In addition to the factor of amplitude modulation a definition is also made of the
factor of frequency modulation as the ratio of the frequencies of the carrier and
control signals, i.e.
mf =
fs
.
f1
(6.22)
Even though mf >>1, the control signal is not constant within one cycle Ts . For this
reason the output voltage will contain higher harmonics, whereas (6.19) gives its
fundamental harmonic. The higher harmonics appear around the carrier frequency
(Fig. 6.8c) and its integer multiples, more precisely around harmonics mf , 2mf , 3mf
, ... E. g. if mf =15, there will exist harmonics 15,17,13, ... , 31, 33, 29, etc.
Table 6.2 presents the normalized Fourier coefficients for individual harmonics
as functions of the factor of amplitude modulation. It should be noted that the
coefficients in Table 6.1 are almost independent of mf if mf >9. The rms values of
individual harmonics can be calculated by (6.23):
(Vorms ) h =
VDC
2
mh ,
where mh are the normalized Fourier coefficients.
(6.23)
6 DC/AC Converters - Inverters
389
v cont
v tr
t
1
fs
a)
vA 0 , fund amental harmonic =(V Ao )1
V0
2
0
-
V0
2
t
t= 0
v cont < v tr
T A - : on , T A + : off
v cont > v tr
T A + : on , T A - : off
b)
(V A o) h
V d /2
1.2
1.0
0.8
0.6
0.4
0.2
0.0
m a = 0.8 , m f = 15
1
mf
2m f
(m f + 2)
3m f
(2m f + 1)
Harmonic o f f
(3m f + 2)
1
c)
Fig. 6.9 The voltage waveforms (a and b) and frequency spectrum of the inverter based
on bipolar PWM.
Power electronics
390
Table 6.2 The normalized harmonics of bipolar PWM [51]
mh
Harmonic
1 (fundamental)
mf
mf±2
mf±4
2mf±1
2mf±3
2mf±5
3mf
3mf±2
3mf±4
3mf±6
0.2
0.4
0.6
0.8
1.0
0.2
1.242
0.016
0.4
1.15
0.061
0.6
1.006
0.131
0.8
0.818
0.220
0.190
0.326
0.024
0.370
0.071
0.335
0.044
0.123
0.139
0.012
0.083
0.203
0.047
0.314
0.139
0.013
0.171
0.176
0.104
0.016
1.0
0.601
0.318
0.018
0.181
0.212
0.033
0.113
0.062
0.157
0.044
From the table 6.2 it can be noted that the amplitudes of some harmonics may
be higher than the amplitude of the fundamental harmonic. The extenuating
circumstance is that the higher harmonics are at considerably higher frequencies
and can readily be filtered out. This is a significant advantage of the inverters based
on PWM. The higher the carrier frequency the less difficult the problem of filtering
is. The maximum frequency fs is limited by the dynamic losses in the
semiconductor switches. Thus fsmax of the inverters based on bipolar transistors is
from ten to several tens kHz, whereas for MOS transistors it is about hundred kHz.
Example 6.3
A bridge PWM inverter should provide an alternative voltage of frequency
f=50Hz across an R-L load (R=10Ω , L=20mH). The amplitude modulation factor
is ma=0.8, frequency modulation factor is mf=21. The input D.C voltage is
VDC=100V. It is required to determine:
a) the amplitudes of the fundamental harmonics of the output voltage and load
current,
b) THD of the load current, and
c) power dissipation in the resistive component of the load.
a) According to (6.19) the amplitude of the fundamental harmonic is:
Vo1=maVDC=0.8*100=80V.
The amplitudes of the harmonics of the load current are:
6 DC/AC Converters - Inverters
I=
Voh
=
Zh
Voh
2
R + (hωL) 2
391
,
(6.24)
and of the fundamental harmonic it is:
I o1 =
80V
10 2 + (1* 2 * π * 50 * 0.02) 2
= 6.39 A.
b) Since mf=21, the fist higher harmonics are h=21, h=19, and h=23. On the
basis of Table 6.1 it follows:
Vo21=0.818*100=81.8V,
V19= Vo23=0.22*100=22V.
The currents of these harmonics are determined by (6.24). The power dissipated
by individual harmonics in the resistive component of the load is determined by:
2
⎛I ⎞
Ph = I oh2 ,rms R = ⎜ oh ⎟ R.
⎝ 2⎠
The calculated values of the voltage and current harmonic amplidutes and
powers are presented in Table 6.3.
Table 6.3
h
1
19
21
23
fh(Hz)
50
950
1050
1150
Voh(V)
80.0
22.0
81.8
22.0
Zoh(Ω)
11.81
119.8
132.3
144.8
Ioh(A)
6.78
0.18
0.62
0.15
Iohrms(A)
4.79
0.13
0.44
0.11
Ph(W)
229.4
0.2
1.9
0.1
THD of the load current is determined by (1.26) and:
THDI =
(0.13) 2 + (0.44) 2 + (0.11) 2
= 0.098 = 9.8%.
4.79
c) The dissipation in resistor R is:
P = ∑ Pn = 229.4 + 0.2 + 1.9 + 0.1 = 231.6W .
6.2.1 The Unipolar PWM
The output voltage of the inverters based on PWM, described in the preceding
sections, varies between +VDC and –VDC . For this reason these inverters are called
the bipolar PWM inverters, or thee inverters based on bipolar PWM. Compared to
them, the output voltage of the unipolar PWM inverters varies between 0 and +VDC
Power electronics
392
or between 0 and – VDC . Here the switches in branches A and B (Fig. 6.10) do not
change the states simultaneously like they do in the inverters based on bipolar
PWM. The arms A and B of the bridge are separately controlled by comparing in
turns the triangular voltage of the carrier with the positive (Vc) and negative (-Vc)
control voltages. For positive control voltage it follows:
Ts
V0
DC
VC
VtM
Ts
t1
-V tM
Ts - t1
Ts + t 1
V0av
t
v tr
-V DC
Fig. 6.10 The basic block diagram of the single-phase inverter based on unipolar PWM.
Vc>Vtr: S1 on., S4 off, VAN= + VDC,
(6.25)
Vc<Vtr: S4 on, S1 off, VAN=0.
From the comparison of –Vc and the triangular signal (Fig. 6.11) it follows:
(6.26)
-Vc>Vtr: S3 on, S2 off, VBN= + VDC
-Vc<Vtr: S2 on, S3 off, VBN=0.
The voltage levels from equations (6.24) and (6.25) are represented in Figs. 6.11b
and 6.11c. The output voltage (Fig. 6.11d) is the voltage difference between points
A and B, i.e.:
(6.27)
Vo=VAN -VBN.
In accordance with the preceding equations Table 6.4 shows the states of the
switches and the levels of characteristic voltages. When both switches in the upper
or lower half of the bridge are on, the output voltage is zero. The load current flows
in the loop S1- D3 or S3 - D1 or S4 –D2 or S2 – D4 , depending upon direction of io .
Within these intervals current idc of the primary source is zero.
The output voltage (Fig. 6.11d) consists of the bipolar package of the pulse-width
modulated square pulses. Within one cycle of the control voltage these pulses vary
between 0 and +VDC , whereas in the next cycle between 0 and –VDC . Thanks to this
the first harmonics appear around the frequency 2mf f1, and the second around 4mf f1
(Fig. 6.11e). Therefore, compared to the bipolar PWM , the frequencies of
harmonics have doubled which is a significant advantage of the unipolar PWM.
The parameters of the fundamental harmonic are the same as for the bipolar PWM.
The amplitude is VoM1=maVDC and the frequency is equal to the control signal
frequency f1 .
6 DC/AC Converters - Inverters
v tr
393
vc
t
T B+
on
(-v c
)
a)
T A+
on
-v c > -vtr
v c > v tr
v AN
V0
0
t
b)
v BN
V0
0
t
c)
v0
V0
m a VDC
v0
(= V AN -V BN )
0
t
- m a V DC
-V 0
d)
(V 0 )h
V0
1.0
0.8
0.6
0.4
0.2
0.0
m a = 0.8, m f = 15
1
mf
2m f
(2m f -1)
e)
(2m f + 1)
3m f
4m f
harmonic of f
h
1
Fig. 6.11 The waveforms (a,b,c, and d) and frequency spectrum of a single-phase inverter
based on unipolar PWM.
Power electronics
394
Table 6.4 The states of the switches and voltage levels of a single-phase inverter based on
unipolar PWM.
Closed switches
S1, S2
S4, S3
S1, S3
S2, S4
Vtr
VC
VAN
VDC
0
VDC
0
VC
VBN
0
VDC
VDC
0
Vo=VAN-VBN
VDC
- VDC
0
0
Vtr
t
a)
V AN
+V DC
0
b)
V BN
t
+VDC
0
c)
V 0 = V AN - V BN
+VDC
V 01
0
-V DC
t
t
d)
Fig. 6.12 The waveforms of a PWM inverter having two high-frequency and two lowfrequency switches.
In addition to doubly higher harmonics, the variation of the voltage across the
load of the unipolar PWM is one half of the one of the bipolar PWM which reduces
6 DC/AC Converters - Inverters
395
the stress imposed on components during transients. It should be emphasized that
the modulation factor mf of the unipolar PWM is even, whereas that of the bipolar
PWM it is an odd number. Table 6.5 shows the normalized Fourier coefficients Vh
/VDC of the unipolar PWM.
All switches of the described procedure of unipolar PWM operate at the
frequency of the carrier signal and, thus, have to be high-frequency switches.
Another type of unipolar PWM which is in use, uses two low-frequency switches
(operating at the control frequency) and two high-frequency switches. The state of
switches S1 and S4 (the left hand side of the bridge) depend on Upon the ratio of Vc
and Vtr, whereas the states of switches S2 and S3 depend on whether the control
signal is positive or negative (Table 6.6).
Table 6.5 The normalized Fourier coefficients Vh/VDC of an inverter based on unipolar
PWM as functions of the amplitude modulation factor ma [34].
ma
Harmonic
1
0.9 0.8
h=1
1.00 0.90 0.80
0.18 0.25 0.31
h=2mf±1
0.21 0.18 0.14
h=2mf±3
0.7
0.70
0.35
0.10
0.6
0.60
0.37
0.07
0.5
0.50
0.36
0.04
0.4
0.40
0.33
0.02
0.3
0.30
0.27
0.01
0.2
0.20
0.19
0.00
0.1
0.10
0.10
0.00
Table 6.6 Turn-on conditions of the switches.
Closed switch
S1
S2
S3
S4
Condition
Vc>Vtr
Vc>0
Vc<0
Vc<Vtr
The characteristic voltage waveforms are shown in Fig. 6.12. These inverters
posses lower dynamic losses caused by the transient processes in the
semiconductor switches.
6.3 THREE-PHASE INVERTERS
Sometimes it is required to convert a D.C. voltage to a three-phase A.C.
voltage. The supply and control of induction motors are typical examples. The
basic circuit diagram of the three-phase inverter (Fig. 6.13) consists of three pairs
of bilateral switches (switch Si diode Di ) and the phase loads in this case in the star
connection. The pairs of switches in each arm (S1, S4), (S3, S6), and (S2, S5) are
complimentary, i.e. when one is closed, the other is open.
Power electronics
396
S1
+
V DC
-
1
S3
D3
S5
D5
IA
A
B
S4
D4
C
S6
D6
S2
D2
N
Fig. 6.13 The basic circuit diagram of a three-phase voltage inverter.
The state of the switches change in T/6= 60o phase steps (Fig. 6.14a), which
provides the line and phase voltages as shown in Fig. 6.14b and c. Since within one
cycle all six switches close and open once, these inverters are called the six-step
inverters.
The frequency of the fundamental harmonic of the output voltage is that of the
switches. The third harmonic and its integer multipliers as well as all even
harmonics are suppressed. This means that the present harmonics are:
n=6k±1, k=1, 2,...
(6.28)
If the load is an ungrounded star, the Fourier coefficients of the line and phase
voltages are:
Vh, L− L =
4VDC
⎛ nπ
cos⎜
nπ
⎝ 6
Vh , L − N =
2VDC
3nπ
⎞
⎟,
⎠
⎡
⎛ nπ ⎞
⎛ 2π
⎢2 + cos⎜ 3 ⎟ − cos⎜ n 3
⎝
⎠
⎝
⎣
(6.29)
⎞⎤
⎟⎥ .
⎠⎦
(6.30)
PWM is also applicable to three-phase inverters. The advantages are the same as
for the single-phase inverters. Thus, the frequency of the fundamental harmonic of
each phase is equal to the frequency of the sinusoidal control voltage. The
amplitude of this harmonic can be controlled by the ratio of the control and carrier
signals. The higher harmonics appear at the carrier signal frequency and the integer
multipliers of this frequency which facilitates filtering of the output voltage. Each
pair of the switches (S1, S4), (S3, S6), and (S2, S5) requires one control (reference)
signal. These three control voltages are phase shifted by 120o (Fig. 6.15). The
conditions when the switches are closed are given in Table 6.7.
The higher harmonics will be reduced if the modulation factor is an odd multiple of
3, i.e. if the frequency of the carrier signal is 3, 9, 15, 21, 27, ... times higher than
the control signal frequency.
AC/DC CONVERTERS - RECTIFIERS
7
An AC/DC converter usually interconnects the primary source and DC/DC
controller (Fig. 7.1). In supply systems where a high stability of the DC voltage is
not necessary, the application of DC/DC controllers is not required. The AC/DC
converter usually consists of:
• transformer,
• rectifier,
• filter, and
• control block of the rectifier.
The transformer adjusts the primary AC source to the input of the rectifier and
separates galvanically the primary source (usually the mains network) from the
load. The rectifier converts (rectifies) the AC. energy to DC. In that sense it is the
basic assembly of an AC/DC converter and because of that many people imply that
the rectifier is a complete AC/DC converter. A rectifier comprises diodes and/or
thyristors. The voltage and current at the output of a rectifier are subjected to
considerable pulsations and for that reason their filtering is necessary. The filters
are usually very simple and comprise of a capacitor and/or a choke.
AC/ DC CONVERTER
Primary
AC source
Rectifier
V
Filter
V
DC /DC
Controller
Control
block
Fig. 7.1. The block diagram of an AC/DC converter.
The control block of the rectifier controls the angle of the thyristor conduction
and in this way controls the output voltage and current. In this situation one talks of
controlled rectifiers. The controlled rectifier consist of a thyristors. A diode
rectifier is not controlled. Then, the rectifier does not have a control block. In some
Power electronics
414
cases a transformer is not required. When the primary A.C. voltage is directly fed
to the input of the rectifier it is, as a rule, then a controlled rectifier.
The subject of this chapter is rectifiers. They can be divided on the basis of the
mode of their connection to the A.C. network, or on the basis of the mode of using
the energy from the A.C. source, or on the basis of the character of the output
voltage and the degree of its control. With respect to the mode of using the energy
from the A.C. source rectifiers can be one-sided (half-wave) or two-sided (fullwave).
7.1 HALF-WAVE SINGLE-PHASE RECTIFIERS
The simplest rectifier comprises only one diode (Fig. 7.2). The diode conducts
only during the positive half-cycle of the secondary voltage. If the voltage drop
across the diode is neglected, the voltage across the load will be equal to the
secondary voltage, i.e.:
(7.1)
vo = vs = VSM sin(ωt ), 2kπ ≤ ωt ≤ (2k + 1)π , k = 0,1,2,...
where VSM is the amplitude of vs. During the negative half-cycle the diode is
blocked and vo= 0. Therefore across the load one obtains a sequence of pulses
(positive half-cycles) (Fig. 7.2b) which ought to be averaged and for that purpose
filters are used at the output of the rectifier. The D.C. component of the output
voltage are determined by:
Voav =
V
1 π
VSM sin(ωt )d (ωt ) = SM ,
∫
π
2π 0
(7.2)
Where as the root mean square value of the voltage, VS , is:
Vrms =
1 π
V
[VSM sin(ωt )]2 d (ωt ) = SM .
∫
2π 0
2
(7.3)
D
0
V
VS
R L V0
VSM =√2 Vrms
V0
t
VS
a)
V 0av ≈ 0.45 Vrms
b)
Fig. 7.2. The half-wave rectifier (a) and its output voltage (b).
Thus the D.C. component is:
Voav = ( 2 / π )Vrms ≈ 0.45Vrms .
7 AC/DC Converters – rectifiers
415
The relatively small value of the D.C. component and the connection of the
transformer to the load only during one half-cycle point are a poor use of the
energy source. The average value of the current is not zero which has an adverse
influence on the transformer characteristics. In addition, the output voltage ripple is
quite high. Due to all these reasons a half-wave rectifier is very seldom used.
7.2 FULL-WAVE RECTIFIERS
Two-sided rectifiers rectify both half-cycles. For this reason very often they are
called full-wave rectifiers. Two types can be distinguished: rectifiers having a
center-tapped secondary winding and two-sided rectifiers having a diode (thyristor)
bridge (Graetz bridge).
A single-phase full-wave rectifier having a center-tapped secondary winding
has two diodes (Fig. 7.3a). When the input voltage is positive D1 is conducting and
D2 is blocked. During negative half-cycle D2 is conducting and D1 is blocked. The
direction of the current in both cases is the same so that the negative half-cycle
appears on the positive side at the output (Fig. 7.3b). During each of the half-cycles
the current flows only through one half of the secondary winding, consequently the
secondary winding has to contain a double number of turns.
The maximum reverse voltage across the diode is twice the amplitude of the
secondary voltage. Therefore the breakdown voltage of the diode has to be:
BVD>2VSM.
(7.4)
i L positive
half-cycle i negative
L
half-cycle
D1
+
V s -V D
+
R L V0
VS
V
V0
V 0M
iL
V 0av ≈ 0.45 VSrms
t
+
VS
VS
δ
D2
V 0 = Vs -V D
t
b)
Fig. 7.3. The single-phase full-wave rectifier having center-tapped secondary (a) and its
output voltage (b).
The maximum permitted current through the diode has to be higher than the
maximum expected load current.
In reality the voltage across a conducting diode is greater than zero and,
depending upon the load current, it amounts from 0.7 to 1V. Voltage VD of the
Power electronics
416
diode can justifiably be neglected only if Voav >>VD . At small voltages the
influence of VD should be taken into account. The output voltage is zero during
δ/ω, where δ is the angle when both diodes are blocked (Fig. 7.3b).
The second type of the full-wave rectifier is a Graetz bridge rectifier (Fig. 7.4a).
It consists of four diodes in a bridge circuit. During each half-cycle one pair of the
diodes is conducting (during positive D1 and D2 , during negative D3 and D7). Here
too the load current in both half-cycles flows in the same direction so the output
voltage is of the same polarity. The D.C. component of full-wave rectifiers is
twice the current of the half-wave rectifiers, i.e.:
Voav =
2
π
VSM = 0.9Vsrms .
(7.5)
In addition, the ripple is considerably smaller. The diodes of the Graetz bridge
ought to have a maximum current higher than the maximum load current and the
breakdown voltage BVD higher than the amplitude of the secondary voltage. i.e.:
BVD>VSM.
(7.6)
i+
D1
iV
D4
D1
D2
D3
VS
i+
i-
RL
a)
D3
VS
RL
D4
V0
D2
b)
V0
V0M = √2 V0rms
V 0av≈ 0.9 V0rms
D 1 , D 2 on
D 3 , 4 off
D 3 , D 4 on
D 1 , D 2 off
t
c)
Fig. 7.4. A Graetz (bridge) full-wave rectifier (a), an alternative representation (b), and
the waveform (c).
By comparing full-wave rectifiers it may be concluded that a Graetz bridge,
although has two more diodes, has the advantage because it make use of the
transformer having one half the number of turns in the secondary and of the diodes
having one half the breakdown voltage. Of course the need for four diodes is a
disadvantage of the Graetz bridge, but not from the point of view of the used-up
7 AC/DC Converters – rectifiers
417
material but because of the doubled voltage across the diodes and the doubled
dissipation in them. This is particularly inconvenient at small D.C. voltages, when
the voltage drop across the diodes can not be neglected. Because of that the
efficiency factor is considerably reduced.
It should be emphasized that the manufacturers offer the Graetz bridge as an
element in a single case. Also, as a single element is manufactured the diode pairs
for the other type of the full-wave rectifier.
iD1
V
D3
i + V 01 +V
0
01
RL
t
VS
V02
i-
VS
D4
D2
i+
RL
V 02
a)
t
- V0
b)
Fig. 7.5. The double full-wave single-phase rectifier (a) and the waveforms of the output
voltages V01 and V02 (b).
By altering the directions of the diodes a negative voltage rectifier is obtained.
Some electronic systems (e.g. the systems containing linear electronic circuits)
require positive and negative voltages with respect to the ground. The rectifiers of
such power supplies are designed using one Graetz bridge and a transformer having
the center-tapped secondary winding (Fig. 7.5a). Now, both halves of the
secondary are active throughout the cycle. E.g. during the positive half-cycle by the
upper part of the secondary and diode D1 load RL is supplied by current i+ . At the
same time by the lower part of the secondary and diode D2 load RL is supplied by
current i+ . During the negative half-cycle diodes D3 and D4 provide the flow of
current i- through load RL which flows in the same direction as current i+ . The
waveforms of the output voltages are shown in Fig. 7.5b.
7.2.1 The commutation of the currents
The commutation of the currents (taking over of the current by one group of
diodes from the other group of diodes) in ideal rectifiers occurs instantly. In reality,
however, this is not possible owing to the inductances in the commutation loop.
These inductances in the commutation loop are mainly the sums of the inductances
of the commutation network referred to the secondary side of the network and the
stray inductances of the windings. The commutation time is usually expressed in
terms of an angle called the angle of commutation or angle of coverage.
Power electronics
418
A real secondary circuit of a transformer can be represented by a series of
connection to a generator vs and an inductance LS (Fig. 7.6a). Allowing a Graetz
bridge to operate in the constant output current mode. Then for an ideal rectifier
(LS = 0) the current of the primary source would be is =+Io during the positive and is
=-Io during the negative half-cycle (Fig.7.6e). In reality, however, inductance LS
resists any change and at the beginning of conduction of one pair of the diodes the
other pair will for a while stay turned on. This happens at the beginning of each
half-cycle. Then all four diodes are conducting, the output voltage is vo = 0 (Fig.
7.6c), and inductance LS takes over the voltage (Fig. 7.6d).
D1
LS
D3
+
V0
D1
D3
+
V0
I0
LS
A
S
ik
iS
I0
iS
B
D4
D2
D4
+
VS
-
ik
I0
B
D2
-
a)
b)
V0
γ
V 0av=V 0av
2ω L S
π I0
ωt
c)
L S= 0
VL
ωt
d)
IS
L S =0
ωt
L S =0
e)
Fig. 7.6. A real drive of a Graetz bridge in the constant output current mode (a), constant
current at the beginning of the positive half-cycle and the waveforms of the output
voltage (c), voltage across inductance (d), and source current (e).
The relationships at the beginning of the positive half-cycle will be considered.
For ωt>0 diodes D1 and D2 are conducting. Due to the action of LS diodes D3 and
7 AC/DC Converters – rectifiers
419
D4 did not turn off immediately. During their conduction there are three current
loops (Fig. 7.6b). If diodes were ideal (VD = 0) the following would hold
di
(7.7)
vL = Ls s = vs = VSM sin(ωt ).
dt
The current of the turned on diodes D1 and D2 is iD1=iD2=ik , where as the current of
the turned off diodes D3 and D4 iD3=iD4=Io-ik . The line current is determined by:
is=-Io+2ik
(7.8)
The commutation process will go on until current through diodes D1 and D2
becomes Io , when diodes D3 and D4 are turned off.
Therefore, the process of taking over of the current by the diodes, as a
consequence of the real drive of the rectifier circuit, has an important influence on
rectifier characteristics. The waveforms of the voltage and current change and
higher harmonics appear in the rectified voltage and load current. The average
value of the rectified voltage decreases and is determined by:
Voav =
1
π
π
∫VSM sin(ωt )d (ωt) =
γ
γ
π
⎤
1⎡
⎢∫ VSM sin(ωt )d (ωt ) − ∫ VSM sin(ωt )d (ωt )⎥.
π ⎣⎢ 0
0
⎦⎥
(7.9)
The solution of (7.9) gives:
2VSM
VSM
(1 − cos γ ),
π
π
where γ is the angle of commutation. Taking (7.7) into account it follows:
Voav =
−
γ
γ
0
0
∫ VSM sin(ωt )d (ωt ) = ∫ LS
(7.10)
I
0
dis
d (ωt ) =ωLS ∫ dis = 2ωLS I o .
dt
−I0
(7.11)
By combining (7.11) with the second member of (7.10) one obtains:
cos γ = 1 −
2ωLs
Io ,
VSM
and the average value of the output voltage is:
2ωLs
2ωLs
Voav = 0.9Vsrms −
I o = Voav LS = 0 −
Io.
(7.12)
(7.13)
π
π
Now allowing the Graetz bridge to operate in the constant output voltage mode
(Fig. 7.7a). This situation is very close to reality when the rectifier is loaded by a
large capacitor. The equivalent circuit of the rectifier is represented in Fig. 7.7b.
Diodes D1 and D2 start conducting at an angle θb when |vs| reaches Vo (Fig. 7.7c),
i.e.:
Vo = VSM sin ϑb .
(7.14)
Power electronics
420
Current io reach its maximum at ωt=θp when the voltage across the inductance
becomes negative, or when condition |vs|=Vo is met again. Owing to the symmetry
of the half-cycle:
θp=π -θb.
(7.15)
Because of the action of LS diodes D1 and D2 will stay turned off for a while until
the areas A and B (Fig. 7.7d) become equal. While the current flows through the
diodes:
v L = Ls
di
= VSM sin(ωt ) − Vo .
dt
(7.16)
By integrating (7.16) one obtains:
i o (ωt ) =
1
ωL s
ωt
∫ [V SM sin(ωt ) − Vo ]d (ωt ),
(7.17)
Θb
where θb< ωt<θf . Angle θf when io is zero again is determined from condition:
D1
D3
LS
LS
A
VS
+
-
is
V0
+
-
VS
V0
B
D4
b)
D2
a)
VS
V0
i0
I 0av
0
θ b θ p θ f π π +θ b
ωt
c)
VL
ωt
d)
A
B
Fig. 7.7 Graetz bridge in the constant output voltage mode (a), the equivalent circuit (b),
and the corresponding waveforms (c and d).
7 AC/DC Converters – rectifiers
Θf
Θf
Θb
Θb
∫ vL (ωt )d (ωt ) = ∫ [VSM sin (ωt ) − Vo ]d (ωt ) = 0,
421
(7.18)
which corresponds to equating surfaces A and B (Fig. 7.7d). The average value of
the output current is:
Io =
1
π
Θf
∫ io (ωt )d (ωt ).
(7.19)
Θb
7.3 OUTPUT FILTERS
The output voltage of a rectifier varies over a very wide range, from practically
zero to the maximum of the secondary voltage. For this reason at the output of a
rectifier use is made of filters which reduce the harmonic currents through the
load and the ripple of the output voltage. In practice mainly two types of filters are
used: the capacitive filter for small currents and L filter for large load currents.
7.3.1 The capacitive filter
The load to be supplied is usually resistive. The capacitive filter consists of only
one capacitor of high capacitance connected in parallel with the load (Fig. 7.8a). It
supports the output voltage across the load and supplies the current at small values
of the rectified secondary voltage. The peak-to-peak variation of the output voltage
is considerably smaller than its average value. The diode pairs are conducting only
at small intervals within a half-cycle when the rectified secondary voltage is higher
than the voltage across the capacitor. Then vo=vs . During the remaining part of the
half-cycle the diodes are off and the capacitor discharges exponentially through
load RL. By using the notation of Fig. 7.8b, the output voltage can be written in the
following form:
and
π+α<ωt<π+β
⎧ |VSM sin(ωt)|, a<ωt<β
⎪ (conducting D and D ) (conducting D and D )
(7.20)
V(ωt ) = ⎨
1
2
3
4
⎪ (VSM sinβ)e-(ωt-β)/(ωRLC), otherwise (all diodes are off).
⎩
Angle β at which diodes stop conducting can be determined by equating the slopes
of functions (7.20):
d
[VSM sin(ωt )] = V SM cos(ωt )
d (ωt )
and
(7.21)
Power electronics
422
⎛
d
1 ⎞ −(ωt − β )/ (ωRLC )
⎟⎟e
[(VSM sin β )e −(ωt − β )/ (ωRLC ) ] = (VSM sin β )⎜⎜ −
. (7.22)
d (ωt )
⎝ ωRL C ⎠
id
D1
I0
D3
A
V
C
VS
RL
V0
B
D4
V0
D2
a)
DV 0
M
V 0av
V0
Vm
VS
α
i
id
π
2
β
I0
π + α 3π π + β
2
ωt
ωt
b)
Fig. 7.8. Single phase Graetz rectifier with a capacitive filter (a) and the voltage and
current waveforms (b)
At ωt=β these slopes are equal, where from it follows:
VSM cos β =
VSM sin β
.
− ωRLC
From (7.23) β is:
β=tan-1(-ωRLC)= -tan-1(ωRLC)+π .
In practice time constant RLC is quite large so:
β≈π/2, VSMsinβ=VSM .
(7.23)
(7.24)
(7.25)
In other words, the capacitor provides load current during π/2+kπ <ωt
<(k+1)π+α ; k=1,2,... Angle α can be determined from condition:
7 AC/DC Converters – rectifiers
VSM sin(π + α ) = (VSM sin β )e −(ωt − β ) / (ωRL C ).
423
(7.26)
Since β=π/2, then:
sin(π + α ) = e −(π / 2 +α ) / (ωRL C ).
(7.27)
The minimum value of the output voltage is determined by:
Vom ≈ VSM e − (π / 2 +α ) / (ωRL C ).
(7.28)
Usually ωRLC >>π so α ≈π/2 and:
Vom ≈ VSM e −π / (ωRL C ) = VSM sin α .
(7.29)
The peak-to-peak variation of the output voltage is determined by:
ΔVo = VSM − Vom ≈ VSM (1 − e −π / (ωRL C ) ).
(7.30)
Taking into account that ωRLC >>π,
e−π / (ωRL C ) ≈ 1 −
π
,
ωRLC
(7.31)
the variation of the output voltage is:
ΔVo ≈ VSM
π
ωRLC
=
VSM
.
2 fRLC
(7.32)
It should be emphasized that (7.30) is a rough estimate of the variation of Vo
basically because of the rough estimate of angle α at which diodes start
conducting. Usually α <π/2.
Example 7.1
Fullwave rectifier (Figure 7.8a) with capacitive filter has: Vseff=220V, f=50Hz,
R=220Ω and C=100μF.
a) Determine an expression for the load current.
b) Determine the average value of load current.
c) Calculate the maximum change of load voltage.
d) Draw waveforms of load voltage and current through the capacitor.
a) Voltage on the load can be calculated following the expression 7.20. Angle β
at which diodes stop conducting can be determined by equating the slopes of
functions (7.20). Solving equation (7.21)is obtained:
β = π − arctg (ωRC ) = 1,71 rad .
Power electronics
424
The angle α is determined from the condition that the capacitor begins to recharge
(7.26). Solving equation (7.26) is obtained α=0,76. Load current is equal to vp/R,
so expression for load current can be written as follows :
⎧⎪ 1,41 sin (ωt )[ A], 0,8 ≤ ωt ≤ 1,71
−ωt −1.71
i p (ωt ) = ⎨
−
⎪⎩1,4e 6.91 [ A], 1,71 ≤ ωt ≤ π + 0,8
b) Average value of load current is:
I psr
− ωt −1, 71
1, 71
π + 0 ,8
⎤
−
1 ⎡⎢
6 ,91
⎥ = 1,22 A.
=
+
1
.
41
sin(
ω
t
)
d
(
ω
t
)
1
,
4
e
d
(
ω
t
)
∫
π ⎢ 0∫,8
⎥
1, 71
⎣
⎦
c) The maximum change in voltage on the load is determined as the difference
between maximum and minimum values of voltage on the load:
ΔV p = V p max − V p min = VSM − VSM sin α = 87,9V .
d)
400V
300V
200V
100V
0V
0s
5ms
v(2,3)
10ms
15ms
20ms
25ms
30ms
35ms
40ms
45ms
50ms
55ms
60ms
65ms
70ms
75ms
80ms
85ms
90ms
95ms
100ms
75ms
80ms
85ms
90ms
95ms
100ms
Time
Figure 7.9 Voltage on the capacitor.
10A
8A
6A
4A
2A
0A
0s
5ms
10ms
15ms
20ms
25ms
30ms
35ms
40ms
45ms
50ms
55ms
60ms
65ms
70ms
I(c1)
Time
Figure 7.10 Current throug the capacitor.
7 AC/DC Converters – rectifiers
425
7.3.2 The L filter
For supplying large load currents use is made of the L filters consisting of a
series inductance L and a parallel capacitance C (Fig. 7.11a). The action of this
filter distinctly depends on the load current. When this current is small, the filter
behaves as if it was capacitive since the influence of the choke can be neglected
owing to the small accumulated energy (LI2/2). Then the current through the diodes
flows only in a fraction of the half-cycle, in the vicinity of the maximum value of
the mains voltage (Fig. 7.11b), when the input voltage of the filter is higher than
the output voltage. By increasing the load current the energy of the choke increases
and also increases the angle of conduction of the diodes owing to the counterelectromotive force supporting the existing current through the choke.
a)
L
+
iL
D1
I0
D3
iL
A
a
Vi
VS
C
B
D4
V0
i
RL
b
b)
V0
Vi
ωt
V0
V 0av
D2
a)
c)
ωt
Fig. 7.11 Single phase Graetz bridge with an L filter (a) and the characteristic waveforms
in the modes of discontinuous (b) and continuous choke current (c).
In this process the output voltage decreases with increasing the load current. This
operating mode is called the mode of the discontinuous choke current. The current
through the choke will flow throughout the whole cycle (the continuous mode) if
the load current is higher than certain critical value Iok . Then the angle of diode
conduction is 180, i.e. the diodes are conducting alternately throughout the whole
half-cycle. In this mode (Io>Iok) the average value of the output voltage does not
depend on the load current (Fig. 7.12). Then the L filter can be analyzed in the
steady state harmonic mode driven by a full-wave rectified sine function whose
Fourier series is:
2V
4V
4V
(7.33)
Vi = SM − SM cos(2ωt ) − SM cos(4ωt ) + ...
3π
15π
π
Power electronics
426
In order that the higher harmonics can be neglected it is necessary that the
impedance of the capacitor at these frequencies is much less compared to the
impedance of the choke, i.e.:
XC=1/2ωC<< XL =2ωL,
(7.34)
This condition is usually satisfied since the capacitance C and inductance L are
quite large. By neglecting the harmonics higher than the second it is obtained that
the output voltage is the sum of the average value and the second harmonic (Fig.
7.11c). The average value is:
V
(7.35)
Vosr = 2 SM ,
π
and the amplitude of the second harmonic across the load, since I/(2ωC)<<RL , is:
1
4V
VSM
.
Vo 2ω ≈ 2ωC SM =
(7.36)
2ωL 3π
3πω 2 LC
av
I 0K
I0
Fig. 7.12. The regulation characteristics of the L filter.
The ripple factor:
FT =
Vo 2ω
1
=
Vosr 6ω 2 LC
(7.38)
in this mode load current is not dependant.
The critical load current is determined from the condition of continuity of the
current through the choke. In this case the D.C. load current, Io=Voav/RL , should be
higher or equal to the amplitude of the second harmonic of the choke current IL2ω .
If the impedance of the capacitor is much lower than the load resistance, i.e.
I/(2ωC)<<RL then:
2VSM
(7.38)
= I0K .
3πωL
From the consideration of the condition of continuity Io>Iok , it turns out that it will
be met if:
I L 2ω =
RL ≤3ωL.
(7.39)
In the design of the L filter one starts from the maximum load resistance RLmax .
For this value, on the basis of (7.39), the critical inductance is determined:
7 AC/DC Converters – rectifiers
427
LK= RLmax/(3ω).
(7.40)
The capacitance is determined on the basis of the relation I/(ωC)<<Lkω . In case
that the load resistance varies over a wide range, in parallel if the output is a fixed
load connected and the critical inductance is calculated according to this value.
7.4 VOLTAGE DOUBLERS
The circuit for doubling a D.C. voltage consists of two half-wave rectifiers
connected to the same secondary but with reverse connected diodes and with two
series capacitors. (Fig. 7.13).
D1
+
VS
C1
+
-
V
R L V 0 =2V Srms√2
C2
+
-
V0 =VC1 + VC2
VC1
VC2
VS
ωt
D2
b)
Fig. 7.13. The voltage doubler (a) and voltage waveforms (b).
During the positive half-cycle capacitor C1 is charged through diode D1 and during
the negative half-cycle capacitor C2 is charged through diode D2 . The voltages
across these capacitors add the maximum voltage across the load is VOM=2(Vsrms
√2). The capacitances are equal and are quite large. Fig. 7.13b shows the voltage
waveforms across the capacitor and across the output. Even though the mains
voltage is rectified like by a full-wave rectifier, each of the capacitor discharges as
in a half-wave rectifier. For this reason the ripple is quite high and it increases with
the reduction of the load resistance. Therefore this circuit is used only at small load
currents.
7.5 THREE PHASE RECTIFIERS
In industrial applications, where three phase A.C. voltages are available, it is
recommendable to use three phase rectifiers. At the output of this type of rectifier
compared to the single phase rectifiers, the D.C component is higher, the ripple of
the output voltage is lower, and the output power is higher. Three phase rectifiers
Power electronics
428
have favorable features for equipment and installations requiring high power,
where very high D.C currents and relatively high voltages are required. Most
frequently are full-wave bridge rectifiers (Fig. 7.14). As in single phase rectifiers, a
simple capacitive filter is used at the output.
D1
D3
ia
A
B
ib
D1
D3
D5
- +
a
D5
a
+
+
V Pn
I0
- +
C
b
ic
RL
V0 n
n
b
D2
- +
c
C
D4
D6
c
D2
D6
0
VNn
- -
D4
a)
b)
Fig. 7.14. The three phase bridge rectifier (a) and its ideal equivalent circuit (b).
In order to facilitate understanding, a real rectifier circuit (Fig. 7.14a) is
simplified by assuming an idealized drive and by replacing a real load by a current
generator (Fig. 7.14b). Due to neglecting the series inductances of the driving
generators (Fig. 7.14b), the output current Io flows through one diode of the upper
group and one diode of the lower group of diodes. In the upper group the diode
having the anode at the highest potential will conduct. The other two are reverse
biased, thus they are off. In the lower group only the diode having the cathode at
the lowest potential will conduct.. The output voltage is equal to the difference of
the voltages at points P and N compared to the neutral point n, i.e.:
Vo= VPn- VNn.
(7.41)
Since one diode of the upper group and one diode of the lower group are always
conducting, voltages VPn and VNn are equal to one of the A.C. voltages Van , Vbn or
Vcn (Fig. 7.15a). Since the negative members of these voltages are rectified, the
output voltage consists of the six segments of the line voltage during one cycle
(Fig. 7.15b). For this reason these rectifiers are often called the six-pulse rectifiers.
The output voltage during one cycle practically consists of six sinusoidal peaks
(Fig. 7.15b) thus its ripple is small and the average value is close to the amplitude
of the line voltages. Each diode conducts during 120o. They conduct in pairs (6,1),
(1,2), (2,3), (3,4), (4,5), (5,6), and (6,1). The phase currents are determined by:
ia=id1-id4, ib=id3-id6, ic=id5-id2
(7.42)
and are represented in Fig. 7.15c.Thus, e.g. the current of phase a is:
Io D1 conducting,
ia = -Io D4 conducting,
(7.43)
0 D1 and D4 conducting.
7 AC/DC Converters – rectifiers
429
The maximum reverse voltage of a diode is equal to the amplitude of the line
voltage. The output voltage is cyclic with the cycle π/3. The corresponding Fourier
series is:
vo (t ) = V0 +
∞
∑
Vn
n = 6,12,18
cos(nω0t + π ),
(7.44)
where the average value is:
V0 =
1 2π / 3
3V
VLLM sin(ωt )d (ωt ) = LLM = 0.955VLLM .
∫
π /3 π /3
π
(7.45)
Therefore the average value of the output voltage is approximately equal to the
amplitude of the line voltage, VLLM . The amplitudes of the harmonics are:
Vn =
6VLLM
, n = 6,12,18,...
π ( n 2 − 1)
(7.46)
The harmonics of the output voltage are at frequencies 6kω, k=1,2,3,..., because the
cycle of the output voltage is 1/6 of the cycle of the input voltage. This is also an
advantage of a three phase rectifier compared to a single phase rectifier. The A.C.
components are at higher frequencies and are of smaller amplitudes, so they can be
filtered out more readily. Owing to their bipolar shape the currents have odd
harmonics 5, 7, 11, 13, 17, 23, ..., because those involving integer factor 3 are zero.
The amplitude of the first harmonic is:
I s1 =
1
6 I = 0.78 I ,
0
0
π
Where as the amplitudes of the higher harmonics are
I n = I s1 / n, n = 5,7,11,13,...
(7.47)
(7.48)
As it has already been stressed at the beginning, the preceding analysis dealt
with a simplified circuit of the rectifier (Fig. 7.14b). The analysis of a real rectifier
circuit ought to take into account the series inductance of the line drive and the
influence of the filter capacitor. Owing to the series inductance, like in a single
phase rectifier, the current commutation is not instantaneous. This leads to a certain
reduction of the output voltage. The filter capacitor at the output supports the
output voltage so that the rectifier operates closer to the constant output voltage
mode than to the constant current mode. Because of that, the diodes will not
conduct 120o each but only while the line voltage is higher than the voltage across
the capacitor. The effect is similar to that in single phase rectifiers.
Power electronics
430
v Pn
v an
v bn
v cn
ωt
a)
v Nn
ωt=0
v0
b)
V0av
√2 V LL = VLLM
A
ωt
- π 0 π
6
6
ia
120 °
0
120 °
D4
D1
60 °
D4
D1
120 °
ωt
120 °
ib
c)
D6
D6
0
ωt
D3
D3
ic
D2
D2
ωt
0
D5
D5
D5
Fig. 7.15. The waveforms of the voltages and currents of a three phase rectifier operating
in the constant load current mode.
Example 7.2
For the battery carger with three-phase rectifier (Fig. 7.16):
a) Draw waveforms of line to
line input voltages, load
voltage
and
frequency
characetristics
of
load
D5
D1
current.
io
Lp
220μH
D3
3x380V
50Hz
vo
Figure 7.16. Three-phase
battery charger.
D4
D2
D6
RB
5Ω
VB
110V
7 AC/DC Converters – rectifiers
431
b) Using PSPICE software package and Fourier analysis of circuits from Fig. 7.97
determine the values of the 0-and sixth harmonic of current through the load.
a)
600V
400V
200V
0V
-200V
-400V
-600V
50ms
v(a,b)
52ms
v(b,c)
54ms
v(c,a)
56ms
v(1,0)
58ms
60ms
62ms
64ms
66ms
68ms
70ms
72ms
74ms
76ms
78ms
80ms
Time
Figure 7.17 The waveforms of line to line input voltages and load voltage for the rectifier
from Figure 7.97
100A
80A
60A
40A
20A
0A
0Hz
0.1KHz
0.2KHz
0.3KHz
0.4KHz
0.5KHz
0.6KHz
0.7KHz
0.8KHz
0.9KHz
1.0KHz
1.1KHz
1.2KHz
1.3KHz
1.4KHz
1.5KHz
1.6KHz
1.7KHz
1.8KHz
1.9KHz
I(r)
Frequency
Figure 7.18 Frequency characteristics of load current for the rectifier from Figure 7.97.
b) FOURIER COMPONENTS OF TRANSIENT RESPONSE I(r)
DC COMPONENT = 8.026711E+01
HARMONIC
NO (HZ)
1
2
3
4
5
FREQUENCY
COMPONENT
5.000E+01
1.000E+02
1.500E+02
2.000E+02
2.500E+02
FOURIER
COMPONENT
3.962E-01
7.468E-01
1.925E-01
7.949E-01
1.850E-01
NORMALIZED
(DEG)
PHASE
NORMALIZED
PHASE (DEG)
1.000E+00
1.885E+00
4.860E-01
2.006E+00
4.669E-01
9.910E+01
-6.934E+01
6.163E+01
1.032E+02
1.232E+01
0.000E+00
-2.675E+02
-2.357E+02
-2.932E+02
-4.832E+02
Power electronics
432
6
7
8
9
10
11
12
13
14
3.000E+02
3.500E+02
4.000E+02
4.500E+02
5.000E+02
5.500E+02
6.000E+02
6.500E+02
7.000E+02
4.913E+00
3.585E-01
3.179E-01
1.411E-01
2.639E-01
6.559E-02
8.898E-01
1.317E-01
3.288E-01
1.240E+01
9.049E-01
8.025E-01
3.561E-01
6.662E-01
1.656E-01
2.246E+00
3.324E-01
8.299E-01
8.827E+01
1.293E+01
1.406E+02
5.046E+01
5.142E+01
-5.347E+01
-1.151E+02
-7.653E+01
-1.054E+02
-5.063E+02
-6.808E+02
-6.522E+02
-8.414E+02
-1.042E+03
-1.144E+03
-1.304E+03
-1.365E+03
-1.493E+03
On the basis of Fourier analysis is obtained that the values of the 0-and 6-th
harmonic: I0= 80.26A and I6=12.4A.
7.6 PHASE CONTROLLED RECTIFIERS
In phase controlled rectifiers thyristors are used instead of diodes. The average
value of the output voltage is controlled by controlling the start of thyristor
conduction. This will be considered in the example of a half-wave thyristor
rectifier (Fig. 7.19).
V0
Th
i0
+
VS
Vg
RL
V0
α
π
2π
2π +α
i0
a)
ωt
Vg
b)
ωt
Fig. 7.19 A half-wave thyristor rectifier (a) and the voltage and current waveforms (b).
The waveforms of this circuit, assuming that the thyristor was ideal, are shown
in Fig. 7.19b. The thyrisror starts conducting when a short pulse is fed to its gate.
Since then the input voltage is transferred to the load. The thyristor turns off when
the input voltage becomes negative. Therefore, the output voltage during one cycle
is:
(7.49)
⎧ VSM sin(ωt), α<ωt<π
VO (ωt ) = ⎨
⎩ 0, π<ωt<2π+α
Since the load is resistive, current io follows the variation of vo .
If the load is inductive-resistive (Fig. 7.19a), the thyristor will not turn off at the
voltage zero crossing, but will continue conducting until current io becomes zero.
(Fig. 7.19b). Owing to that the output contains a negative component. The delayed
7 AC/DC Converters – rectifiers
433
turning off of the thyristor is the consequence of the phase shift of current io
introduced by inductance L. The angle is calculated from condition io(β)= 0.
Th
Vs
i0
V0
+
Ig
V0
i0 R
VL
R
VS
VL
a
V0
L
β
ωt
Vg
Vs
ωt
b)
Fig. 7.20 A half-wave thyristor rectifier loaded by inductance and capacitance (a) and
the corresponding voltage waveforms (b).
Gener.
sowth.
voltage
Vsin.
V ts
REF
-
Vg
C
+
Comp.
VK
B
R
Vcon.
Vt
Diferenc.
a)
Vsin.
t
α
ω
Vts
VtsM
Vcon.
t
Vts
Vt
t
Vg
b)
t
Fig. 7.21. A generator of triggering pulses for driving the thyristor (a) and the
corresponding voltage waveforms (b).
By varying angle α the average value of the output voltage can be controlled
from zero to the maximum value which is obtained for α=0. In order to accomplish
that, there must be a generator of synchronization pulses for triggering of the
thyristor in such a way that angle α can be varied from 0 to 180o (0<α <π). A block
Power electronics
434
diagram of such generator is shown in Fig.7.16a. It consists of a source of the
mains synchronization voltage vsin, a generator of a saw tooth voltage vts , a
comparator, and a differentiator. Voltage vsin synchronizes the saw tooth voltage
with the zero crossing of the sin function. When the saw tooth voltage is equal to
the control voltage, i.e. when vts=vsin , the output of the comparator becomes
positive. At the output of buffer B a short pulse is generated. Its duration depends
on time constant RC. Since buffer B is synchronized with vsin , pulse vg will appear
only during the positive half-cycle.
Since vts=(VtsMω/π)t, from condition vts(α/ω)=Vcon., it follows that
α=π(Vcon /Vtsm)=180°(Vcon./Vtsm),
(7.50)
where VtsM is the amplitude of the saw tooth voltage. Therefore, by varying the
control voltage within limits 0 <Vcon.<VtsM angle α can be controlled within limits
0 <α<π.
There are several types of integrated circuits, such as TCA780, developed for the
triggering of thyristors and control of angle α according to (7.50).
7.6.1 The full-wave thyristor rectifiers
Two types of the full-wave thyristor rectifiers are used. Allowing the load of the
rectifier to have having a center-tapped secondary be purely resistive (Fig. 7.22).
Triggering pulses Vg1 and Vg2 are phase shifted by π so that thyristor Th1 is
triggered at angles 2kπ+α , and thyristor Th2 at (2k+1)π+ α, k=1, 2, 3, ... Such a
generator can be made if the circuit in Fig. 7.16a is added to another differentiator
synchronized with the negative half-cycle of Vsin . At its output one will obtain
pulses Vg2 for triggering Th2 .
Before any thyristor is turned on the output voltage is zero, and when one of the
thyristors is on, then vo=|vs| (Fig. 7.22b). The average value of the output voltage is
determined by:
Voav =
1
π
V sin(ωt )d (ωt ) =
π ∫ SM
α
VSM
π
(1 + cos α ).
(7.51)
Since α can be controlled within the limits 0 < α < π and in these limits –1<
cosα <1, it follows that:
0≤ Voav ≤ VSM/π.
(7.52)
The average value of the load current is Ioav=Voav/RL , and its root mean square
value is:
I orms =
V
1 π ⎡VSM
⎤
sin(ωt ) ⎥ d (ωt ) = SM
∫
⎢
π α⎣ π
R
⎦
1 α sin( 2α )
−
+
.
2 2π
4π
(7.53)
7 AC/DC Converters – rectifiers
435
Th 1
+
V g1
VS
V
-
- V0 +
+
RL
0
V 0av
VS
-
Th 2
α
π+α
2π+α
ωt
V g2
a)
b)
Fig. 7.22. A full-wave single phase thyristor rectifier with a center-tapped secondary (a)
and the waveform of the output voltage (b).
Allowing the load of the thyristor bridge rectifier is the R-L type (Fig. 7.23b). With
this load, two operating modes are possible:
• discontinuous and
• continuous.
i0
α
β
π+α
ωt
0
Th 1
Th 3
b)
π
2π
L
i0
V0
VS
α
R
Th 4
ωt
Th 2
π
π+α
ωt
V0
c)
a)
π
2π
ωt
Fig. 7.23 A thyristor single phase bridge rectifier with an R-L load (a) and the output
current and voltage in the discontinuous (b) and continuous mode (c).
In the first mode, the load current does not flow during the whole of the cycle
(Fig. 7.23b), and in the second it is continuous (Fig. 7.23c). Owing to the reactive
component of the load the conducting pair of thyristors remains on after the
polarity of the input voltage has changed. They will be conducting until the current
through them drops to zero. If this happens before the second thyristor pair is
triggered, the operating regime is discontinuous. If the conducting pair of thyristors
Power electronics
436
are still conducting at the moment of triggering of the second pair, the current
through the load will be continuous (Fig. 7.23c).
In the first case the load current is non-zero during α < ωt< β and it amounts to:
io (ωt ) =
VSM
[sin(ωt − Θ) − e − (ωt −α ) / (ωτ ) sin(α − Θ)], α ≤ ωt ≤ β
ZL
(7.54)
where: Z L = R 2 + (ωR ) 2 , Θ = tan −1 (ωτ ) and τ = L / R.
During the positive half-cycle of the input voltage while α < ωt < β thyristors
Th1 and Th2 are conducting whereas the other pair Th3 and Th4 are off. The pair
Th1 and Th2 is turned off at instant β/ω. Thyristors Th3 and Th4 are turned on at
instant (π+α)ω , so that at time interval β/ω < t < (π+α)/ω all thyristors are off and
the load current is zero. Thus, the discontinuous mode will exist if
β<π+α.
(7.55)
The boundary between the continuous and discontinuous modes is when β=π+α ,
i.e. if
(7.56)
io(π+α)>0.
On the basis of (7.54) and (7.56) it follows
sin(π + α − Θ) − e − (π +α −α ) / (ωτ ) sin(α − Θ) ≥ 0.
(7.57)
Since sin(π+α-θ)=sin(θ-α), (7.57) reduces to
(1 − e
−π / (ωτ )
)sin(ϑ − α ) ≥ 1,
(7.58)
wherefrom it follows:
α≤θ=tan-1(ωL/R).
(7.59)
Therefore, the continuous mode will be sustained if condition (7.59) is satisfied.
The D.C. component (average value) of the output voltage for the continuous mode
is determined by:
Voav =
1 π +α
2VSM
cosα .
∫ VSM sin(ωt )d (ωt ) =
π
α
π
(7.60)
Example 7.3
For the rectifier of Fig.7.24 determine the average value of the voltage across
the load, average load current, and average values of the thyristor and diode
currents if the load is:
a) resistance R,
b) series connection of resistance R and inductance L.
It is known that VSM=311V, f=50Hz, R=10Ω, ωL>R, and α=π/3.
7 AC/DC Converters – rectifiers
437
T1
T3
D
S
T4
ZL
VO
T2
Fig. 7.24
a) The load is resistor R.
The average value of the voltage across the load is:
Voav =
1
π
π
∫ VSM sin(ωt )d (ωt ) =
α
VSM
π
(1 + cos α ) = 311 (1 + 0.5) = 148.5V .
π
The average value of the load current is:
Ioav=Voav/R=14.85V.
For a purely resistive load there is no current through diode, Idav=0.
The average value of the thyristor current is one half the load current:
b) The load is a series R-L circuit.
The average values of the load voltage and load current are the same as in case
(a). Since the load is inductive, the current through the load is continuous and
diode D conducts when all thyristors in the bridge are off.
The average value of the current through the diode is Idav= α/π*Io=4.95A, and
the average value of the current through a thyristor is also Itav=(π−α)/π*Io=4.95A.
Example 7.4
Determine the average value of load current for the rectifier of Fig.7.25 and
draw the waveforms of the load current and load voltage.
It is known that vs(ωt)=311sin(ωt)V, f=50Hz, R=10Ω, Ls=10mH, ωL>R, and
α=π/3.
Power electronics
438
LS
T1
T3
IO
S
T4
VO
T2
Fig. 7.25
Let us consider the instant of turning on of thyristors Th1 and Th2 , if thyristors
Th3 and Th4 were conducting before then. Due to the inductivity of the source, the
source current will be lagging behind the source voltage, so some time thyristors
Th3 and Th4 are turned on while the thyristors Th1 and Th2 take over the load
current. If the angle of commutation is denoted by γ, the average value of the load
current is
I oav =
π +α
V
1
V sin(ωt )d (ωt ) = SM [cos(α + γ ) + cos α ].
πR α∫+γ SM
πR
During the commutation process all four thyristors are conducting so that the
voltage across inductance Ls is equal to the source voltage vs , i.e.:
vLs = vs for α≤ωt≤α+γ.
The current through inductance Ls can be determined following the equation
(7.11):
iLs (ωt ) =
ωt
1
V sin(ωt )d (ωt ) − I oav .
ωLs α∫ SM
(7.61)
The commutation will be completed when the current through inductance Ls is
equal to the load current, i.e.
iLs (α + γ ) = I oav =
VSM
[cos α − cos(α + γ )] − I oav .
ωLs
(7.62)
From (7.62) the angle of commutation is:
cosα − cos(α + γ ) =
2ωLs I oav
2ωLs I oav
⇒ cos(α + γ ) = cosα −
.
VSM
VSM
From (7.62) and (7.63) the average load current is:
(7.63)
7 AC/DC Converters – rectifiers
I oav =
439
2VSM ⎡
2ωLs I oav
ωLs I oav ⎤ 2VSM
cos α −
,
⎢cos α −
⎥=
VSM ⎦
πR ⎣
πR
πR
and
I oav =
2VSM cos α
2 * 311* 0.5
=
= 8.25 A.
πR + 2ωLs 10π + 4π * 50 * 0.01
300V
200V
100V
-0V
-100V
-200V
-300V
30ms
31ms
v(2,4)
32ms
33ms
34ms
35ms
36ms
37ms
38ms
39ms
40ms
41ms
42ms
43ms
44ms
45ms
46ms
47ms
48ms
49ms
50ms
46ms
47ms
48ms
49ms
50ms
Time
Fig 7.26. The waveform of the load voltage.
12A
10A
8A
6A
4A
2A
30ms
31ms
I(l1)
32ms
33ms
34ms
35ms
36ms
37ms
38ms
39ms
40ms
41ms
42ms
43ms
44ms
45ms
Time
Fig. 7.27. The waveform of the load current.
7.6.2 The three phase thyristor bridge rectifiers
The topology of the thyristor bridge rectifier is the same as that of the
corresponding diode rectifier. The difference in the principle of operation is that
the diodes are conducting when forward biased and the thyristors will conduct if
together with the forward bias a triggering pulse is present in the gate circuit. This
is the way of controlling the angle of conduction and consequently the average
Power electronics
440
value of the output voltage. If the angle of triggering is α, the output voltage
waveform is as shown in Fig. 7.28b and its average value is determined by:
Voav =
1 2π / 3+α
3V
VLLM sin(ωt )d (ωt ) = LLM cosα .
∫
π / 3 π / 3 +α
π
(7.64)
Compared to Voav of the three phase diode rectifier (7.45) factor cosα is present
here. If the angle of triggering is greater than π/3 (α >π/3), the rectifier will operate
in the discontinuous mode of the load current. Then, the average value of the
output voltage is determined by:
Voav =
π
1
3V
VLLM sin(ωt )d (ωt ) = LLM [1 + cos(π / 3 + α )].
∫
π / 3 π / 3 +α
π
(7.65)
On the basis of (7.65) it follows that the D.C. component of the output voltage will
be zero at αo=2π/3=120o.
+
i sa
Th 1
Th 3
Th 5
a
A
i sb
b
B
ZL
i sc
c
C
Th 4
0
V0
α
Th 6
Th 2
a)
V0av
ωt
b)
Fig. 7.28 A three phase thyristor bridge rectifier (a) and the output voltage waveforms for
a resistive load (b).
7 AC/DC Converters – rectifiers
441
Example 7.5
For the battery charger realized with three-phase thyristor bridge rectifier (Figure
7.29) :
a) Determine the change in angle of triggering the thyristors so the load
current is held constant during charging the battery s (for the minimum
battery voltage, the angle of thyristor triggering is α=45°).
b) Draw the waveform of load voltage if angle of thyristor triggering is α=45°.
io
TH1
TH 5
TH 3
3x380V
50Hz
vo
TH4
TH 2
TH6
Lp
220μH
R
20 Ω
VB
55* (1.8 2.4)V
Fig.7.29 Battery charger with three-phase thyristor bridge rectifier.
a) Average value of battery charging current is:
I osr =
Vosr − Vbat
.
R
If the voltage of battery cell at the beginning of charging is 1.8V, and the angle of
thyristor triggering is α=45°, then average charging current is equal to:
I osr =
(3VLLM / π ) * cos(π / 4) − (1,8 * 55)
= 13,23 A .
20
When the batteries are full, the cell voltage is 2.4V. To ensure same charging
current, the thyristor triggering angle is equal to:
⎛ R * I osr + (55 * 2,4) ⎞
⎟ = 0.623rad ≈ 36D.
a = arccos⎜⎜
⎟
3
V
/
π
LLM
⎝
⎠
Change in the angle of triggering the thyristors during the battery charging is:
Δα=45°-36°=9°.
b)
Power electronics
442
600V
400V
200V
0V
-200V
-400V
-600V
50ms
v(a,b)
52ms
v(b,c)
54ms
v(c,a)
56ms
v(1,0)
58ms
60ms
62ms
64ms
66ms
68ms
70ms
72ms
74ms
76ms
78ms
80ms
Time
Fig. 7.30 Line to line input voltages and load voltage for the rectifier form Figure 7.29.
7.7 TWELVE–PULSE RECTIFIERS
In cases when the primary power source is three-phase and higher DC output
voltage is required multi-pulse rectifiers are used. Twelve-pulse rectifiers have
found practical applications. This rectifier consists of 2 serial connected six-pulse
three-phase rectifier.
One six-pulse rectifier is supplied through a Y-Y
transformer, and the other through Y-D transformer (Figure 7.31). So, the two
rectifier output voltages have phase shift of π/6.
A B C
Th11
Th31
iO
Th51
iS1
vO1
Y-Y
feedback
Th41
Th61
Th21
Load
Th12
Th32
Th52
iS2
vO2
Y-Δ
feedback
Th42
Th62
Th22
Fig. 7.31 Twelve-pulses thyristor rectifier.
vO
AC/AC CONVERTERS
8
AC/AC converters connect an A.C. supply to an A.C. load and thereby control
the current, voltage, and rms power of the load. In essence, they convert the A.C.
voltage/current of one level to the A.C. voltage/current of another level or the A.C.
voltage of one frequency to the A.C. voltage of another frequency. Therefore they
are classified as:
• AC/AC voltage converters, and
• AC/AC frequency converters.
They can be single-phase or poly-phase (mostly three-phase).
AC/AC voltage converters control the rms value of the load voltage at a
constant frequency. Usually they are used for controlling the power for heaters or
for starting AC motors.
AC/AC frequency converters change the frequency of the voltage/current of the
load compared to the frequency of the source. They could be direct or indirect
(having a D.C. internal stage). They are mainly used for controlling the speed of
A.C. motors or for induction of heating.
The main switching elements of the A.C –A.C. converters are thyristors and
triaks.
8.1 SINGLE-PHASE AC-AC VOLTAGE CONVERTERS
A single-phase voltage converter consists of a pair of anti-parallel (inverseparallel) thyristors Th1 and Th2 and control module CM (Fig. 8.1a). Instead of
thyristors Th1 and Th2 one triak TC may be used (Fig. 8.1b).
Thyristor Th1 is conducting during a part of the positive cycle, and thyristor Th2
during the same part of the negative cycle of the input voltage. In principle, the
angle of conduction, α , may be controlled within limits: 0 <α <π. Within each
cycle the load current exists when one of the thyristors is on, i.e. for: α < ωt < π
and π+α < ωt < 2π . In general, the angles of conduction of the thyristors do not
have to be the same. The rms value of the load voltage or load current is controlled
Power electronics
476
by varying the angle of conduction α of thyristors Th1 and Th2. For this reason this
principle of control is known as the phase method of converting an A.C. voltage.
V g1
CM
V g2
V g2
V g1
Vi
TH 1
t
i0
Vi
V0
0
Vi
+
TH 2
V th
α π
ZL
α π
Vg
V0
Vi
π+ α
2π
ωt
2π
ωt
2π
ωt
Vi
a)
TC
t
i0
i0
π+ α
Vi
ZL
α π
b)
π+ α
c)
Fig. 8.1 The single-phase voltage converters (a and b) and the voltage and current
waveforms for a working (resistive) load (c).
The general conditions and characteristics of these converters can be
summarized as follows:
• The thyristors must not be on simultaneously. One is conducting during a
part of the positive, and the other during a part of the negative half-cycle of
the input voltage. The conducting thyristor is switched off at zero crossing of
the current during the change of its direction.
• The load voltage is equal to the input voltage during conduction of one of
the thyristors, whereas while both thyristors are off the load voltage is equal
to zero.
• The average values of the source and load currents are zero when the angles
of conduction of the thyristors are equal.
• The voltages across the thyristors are equal to zero while one of the
thyristors is conducting, whereas while they are off the voltages across them,
Vth , are equal to the input voltage.
• The average value of the current of each thyristor is greater than zero
because the thyristor conducts only in one direction. If the angles of
conduction of the thyristors are the same, then the rms value of the current of
each of them is 1/√2 times the rms value of the load current.
12 AC/AC Converters
477
Control module, CM, generates short pulses which trigger the thyristors via their
gates. CM is synchronized so that a triggering pulse comes to the gate of thyristor
Th1 during the positive and to the gate of thyristor Th2 during the negative halfcycle of the input voltage. Thus, the control module determines the angles of
conduction of the thyristors. When they are equal, one talks of symmetrical control.
Working load
In the case of a purely working (resistive) load the output voltage vo and current
io are in phase (Fig. 8.1c). If the input voltage is a harmonic function of time vi=VM
sin(ωt), the output voltage during one cycle is:
⎧⎪V sin(ωt ), α < ωτ < π , α + π < ωτ < 2π
(8.1)
vo (ωt ) = ⎨ M
0, otherwise.
⎪⎩
Since the control is symmetric, the average values of the source and load currents
are equal to zero. The average values of the thyristor currents are:
ITh , av =
V
1 π VM
sin(ωt )d (ωt ) = M (1 + cos α ),
∫
2π α RL
2πRL
(8.2)
where RL is load resistance.
Since the waveforms of the output voltage during the positive and negative halfcycles are symmetric, its rms value is:
Vo , rms =
1π
[VM sin(ωt )] d (ωt ) =
π∫
2
VM
α
2
1−
α sin( 2α )
+
.
π
2π
(8.3)
The dependence of the rms value of the output voltage on the angle of conduction
is the control characteristic of an AC-AC voltage converter (Fig.8.2). For α= 0, the
load voltage is a sin function equal to the rms value of the source voltage (Vo,rms
=VM /√2). If α=180o, both thyristors are permanently off and the output voltage is
equal to zero.
The rms values of the load and source currents are equal:
I o ,rms = I I ,rms =
Vo ,rms
RL
.
(8.4)
With (1.38) in view, the load power factor is:
PF =
Vo2,rms
VM
/ RL
V I , rms (Vo , rms / R L )
=
2
1−
α sin( 2α )
+
π
2π
VM / 2
= 1−
α sin( 2α )
+
.
π
2π
(8.5)
Power electronics
478
1.0
V 0rms
V 0rms
0.8
M
0.6
0.4
0.2
0°
40 °
80 °
12 0 °
16 0 ° 18 0 °
Fig. 8.2 The normalized control characteristic of a phase AC-AC voltage converter.
Since each of the thyristors is conducting one half of the symmetric load
current, the rms value of the thyristor current is:
I o , rms
.
(8.6)
2
The inverter currents are not sinusoidal but complex periodic functions of time. In
view of (1.22), (8.2), and (8.6) the form factor is:
I Th , rms =
k=
ITh , rms
ITh , av
α sin(2α )
+
2π .
π
1 + cos α
1−
=
(8.7)
Example 8.1
An AC-AC voltage converter made of two thyristors in anti-parallel connection
(Fig. 8.1a) and driven by a harmonic 220V, 50Hz voltage is loaded by resistor
RL=2.2Ω . The holding voltage of the thyristors is VH=1V and the resistance while
conducting rd=5mΩ . If the required power of the load (heater) is PL=11kW,
determine:
a) angle of conduction of the thyristors,
b) load power factor.
c) power of dissipation in one of the thyristors, and
d) form factor of the thyristor current.
a) The rms value of the load voltage is determined by:
Vo,rms=
(8.3):
220
2
=√11 · 10 · 2.2=155.56V=220V/√2, so taking into
= 220 1 −
α
sin( 2α )
+s
,
π
2π
account
12 AC/AC Converters
479
wherefrom it turns out that α=π/2.
b) From (8.5) it follows that for α=π/2 the power factor is: PF=√0.5=0.707.
c) The power of dissipation in one of the thyristors is determined by:
PD=VH ITh,av+rd I 2Th,rms , and in view of (8.2), (1.30), and (8.4):
PD = VH
2VI ,rms
2πRL
(1 + cos α ) + rd
(
2VI ,rms
2 RL2
) ⎛⎜1 − α + sin(2α ) ⎞⎟ = 35W .
2
π
⎝
2π
⎠
d) From (8.7) it follows that the form factor of the thyristor current is:
π / 2 sin(2α )
+
1/ 2
2π
π
=
= 0.35.
1 + cos(π / 2)
2
1−
k=
Predominantly inductive load
A predominantly inductive load implies an R-L load (Fig. 8.3) where the
influence of the inductance is predominant. The inductance brings in changes in the
character of the load current and voltage. Compared to a purely resistive load,
where the current and voltage are in phase, here the inductance slows down the
variations of the load current (Fig. 8.3b). For this reason there exists a phase delay
of the load current compared to the phase of the load voltage. In other words,
current io flows through the load and the corresponding thyristor after the source
voltage has crossed zero, reaching zero value at an angle ωt=β in the next halfcycle of the input voltage, VI (Fig. 8.3b). Owing to this the angle of thyristor
conduction is increased to β-α , and the output voltage exhibits both positive and
negative abrupt changes during one half-cycle. (Fig. 8.3b).
Allowing a positive triggering pulse be applied to the gate of thyristor Th1 at
ωt=α. Then Th1 turns on. By neglecting the voltage drop across Th1 one may write:
di (t )
vi = VM sin(ωt ) = Rio (t ) + L o .
(8.8)
dt
The solution of (8.8) is:
[
]
⎧ VM
sin(ωt − Θ) − sin(α − Θ)e (α −ωt ) / (ωτ )
⎪
, α < ωτ < β ,
io (t ) = ⎨ Z
⎪⎩0
, otherwise.
(8.9)
where:
Z = R 2 + (ωL) 2 , Θ = tan −1 (ωL / R) and τ = L / R.
(8.10)
Power electronics
480
Angle ωt=β, at which the load current crosses zero is determined from condition:
V
(8.11)
io ( β ) = M sin( β − Θ) − sin(α − Θ)e(α − β ) / (ωτ ) = 0.
Z
The rms value of the load voltage is determined by:
[
Vo , rms =
1
]
β
V sin
π∫ M
2
2
(ωt )d (ωt ) =
α
VM
2
1⎡
1
1
⎤
β − α + sin(2α ) − sin(2γ )⎥ .
⎢
π⎣
2
2
⎦
(8.12)
This voltage has the highest value if angle α is such that the corresponding
thyristor is turned on when the other is turned off. This angle is called the critical
control angle:
αc = γ = β − π .
(8.13)
V g1
V g2
Vi
i0
TH 1
V0
V th
Vi
t
Vi
t
i0
π+ α
α π β 2π
ωt
β π+ α
2π
ωt
R
TH 2
Vi
0
L
α π
a)
V th
β π+ α
α π
ωt
c)
Fig. 8.3 A single-phase AC-AC converter having an R-L load (a) and the corresponding
voltage and current waveforms (b).
At α=αc , the angle of conduction of each thyristor is 180o, thus the variations
of the current and voltage are continuous and sinusoidal, so the rms value of the
output voltage is Vo,rms=VM /√2. The same mode also exists for 0 < α < αc . If α < αc
, the triggering pulse has to be sufficiently wide so that it is present at instant β/ω
when the other thyristor is turned off, i.e. Δt > (αc-α)/ω , where Δt is the width of
the triggering pulse. If, however, Δt < (αc-α)/ω , the triggering pulse of the other
thyristor ends before the currents stops flowing through the conducting thyristor.
Consequently, this thyristor remains turned off, i.e. it’s turning on is jumped over.
At α < αc the rms value is equal to the rms value od the source, i.e. Vo,rms=VM /√2.
12 AC/AC Converters
481
For this reason the range α < αc is called the uncontrolled range of the converter
where the variation of α does not influence the variations of the rms values of the
load voltage and current.
Example 8.2
For the single-phase AC-AC converter having an R-L load (Fig. 8.3a) it is
known that: R=1.73Ω , L=3.185mH, and that the source voltage is harmonic with
Vrms=220V and f=50Hz. One should determine:
a) the critical conduction angle, αc ,
b) the turning off angle, β, and power factor at α=π/4.
a) In view of (8.11) and (8.13), it follows:
α c = arctg (ωL / R) = π / 6.
b) The turning off angle, β, of the thyristor is a function of the angle of
conduction control, α , and it is determined from (8.11), i.e.:
sin( β − Θ) − sin(α − Θ)e(α − β ) /(ωL / R ) = 0,
β −α
+ ln[sin(β − Θ)] = ln[sin(α − Θ)], forα=π/4, β=210 o
ωL / R
or from:
In order to determine the load power factor, it is necessary to determine the rms
value of the load voltage or current. The rms value of the current is;
I o , rms =
1
β
io (ωt ) d (ωt ) ,
π∫
2
α
and, taking into account (8.9):
I o2, rms
I M2
=
π
β
∫ [sin(ωt − Θ) − sin(α − Θ)e
α
2
(α −ωt ) /(ωL / R )
] d (ωt ) = Iπ
2
M
( I1 − I 2 − I 3 ),
β
I 2 = 2 ∫ sin(ωt − Θ) − sin(α − Θ)e (α −ωt ) /(ωL / R ) d (ωt )
α
=
2(ωL / R) sin(α − Θ)
β
1 + (ωL / R )
2
I1 = ∫ sin 2 (ωt )d (ωt ) =
α
(sin α − sin e (α − β ) /(ωL / R ) ) and
β −α
2
1
− cos( β + α − 2Θ) sin( β − α ),
2
Power electronics
482
β
I 3 = ∫ sin 2 (α − Θ)e 2 (α −ωt ) /(ωL / R ) =
ωL / R
2
α
sin 2 (α − Θ)[1 − e 2 (α − β ) /(ωL / R ) ].
Since α=π/4 and β=210 o, then: I1=1.56A, I2=0.184A, and I3=0.02A. The rms
value of the load current is:
I o , eff =
2Veff
1
R 2 + (ωL) 2
π
( I1 − I 2 + I 3 ) = 103.8.
The load power factor is:
I o , eff RL 103.8 ⋅1.73
=
= 0.82.
PF =
220
Veff
8.1.1 The time proportional control
In the time proportional control of the AC-AC converters the thyristors are on
for a number of cycles and are off for another number of cycles. The same circuits
as those of the phase control (Figs. 8.1a and 8.3a) are used. The difference is in that
in the phase control one thyristor conducts during a part of one half-cycle and the
other thyristor conducts during a part of the other half-cycle. In the time
proportional control during time Ton the thyristors are conducting during full halfcycles of the A.C. voltage and during time Toff they are off so the load current and
voltage are equal to zero. During time Ton at each zero crossing of the A.C. voltage
the thyristors are synchronously turned on and off so the load current retains the
same form. On the other hand, during Toff the triggering pulses are not applied, and
the anti-parallel thyristors are off and the load is separated from the A.C. source.
The advantage of time proportional control compared to phase control is in that
the thyristors are conducting during full half-cycle of the voltage. In this way any
abrupt changes of the voltage and current which arise when the switching is not at
voltage zero crossing are avoided.
The shortcoming of this method is that the energy from the mains is taken in
pulses. The average power of the load is controlled by varying the ratio of the
conduction, Ton, and non-conduction, Tof , times of thyristors Th1and Th2 . Namely:
PL ,av =
Ton
PLM ,
Ton + Toff
(8.14)
where PLM=V2I,rms/RL is the maximum load power with no control applied (Toff=0).
12 AC/AC Converters
483
V g1
V g2
th
t
t
Vi
Vi
V th
ωt
V0
T 0n
T 0ff
ωt
Fig. 8.4 The principle of the time proportional control.
If the interval Ton+Toff is kept constant, and the conduction time of the thyristors,
Ton , is varied, the pulse-width method of control is carried out. For this reason the
time proportional control is often called the pulse-width control of A.C. voltage.
Example 8.3
To control thyristors in circuit shown in Fig. 8.1a TPC technique is used. If
thyristors are turned on for m=25 periods of input voltage an turned off for n=75
periods determine:
a) the rms value of output voltage,
b) the power factor, and
c) the average and rms values of thyristor current.
It is known: Vseff=220V, fs=50Hz and RL=10Ω.
a)
Vo , rms =
m 1
m+n π
π
∫ (VSM sin (ωt )) d (ωt ) =
2
0
= Vseff γ = 110V , γ =
VSM
2
m
=
m+n .
m
m+n
b)
I oeff =
VOUTeff
R
2
R = 121 ⋅ 10 = 1210W ,
= 11A, PR = I oeff
S = I seff Vseff = I oeff Vseff = 2420W , PF =
PR
= γ = 0,5.
S
Power electronics
484
c)
I Thsr =
I Theff =
π
m 1 VSM
sin (ωt )d (ωt ) = 2,47 A,
m + n 2π ∫0 R
I oeff
2
= 7,77 A.
8.2 THREE-PHASE CONVERTERS
Three-phase converters may be looked at as a combination of three single-phase
converters. The load can be either in a star (Fig. 8.5a) or in a triangle connection.
The currents through the phase loads are controlled by the turn-on angle, α , of
each thyristor. The instantaneous value of the voltage of each phase of the load
depends upon which of the thyristors are on and that, again, depends on the turn-on
angle of the thyristors. If 0<α <π/3 two or three phases are always conducting, if
π/3<α <2π/3 one or two phases are always conducting, and if 2π/3<α <π only one
phase can be conducting.
When all three thyristors are conducting (one per each phase), all three phases
of the load are connected to the mains. The voltage of each load phase is equal to
the corresponding phase voltage. E.g. if thyristors Th1 , Th4 , and Th6 are conducting,
then: van=vRN , vbn=vSN , and vcn=vTN . If two thyristors are on, the line voltages of
these phases are shared between the connected loads.
The current through the neutral conductor depends upon the combination of the
conducting phases (thyristors):
• If all three phases are conducting, the current through the neutral conductor
is equal to zero.
• If two phases are conducting, then the current through the neutral conductor
is equal to the current which would flow through the non-conducting phase,
if it was conducting.
• In case when only one phase is conducting, the current through the neutral
conductor is equal to the current of that phase.
When the turn-on angle is between limits; π/3<α <π/2, only two thyristors are
conducting at any time. If a=75o, the states of the thyristors are the following (Fig.
8.5c). Immediately before α=75o, Th4 and Th5 are conducting and van= 0. Th1 is
turned on at α=75o. Thyristor Th4 continues to be on and Th5 is turned off because
voltage vTN is negative. Then vAN=vRS /2. At α=135o, Th6 is turned on and Th4 is
turned off and vAN=vRT /2. At α=195o, Th3 is turned on and Th1 is turned off and
van=0.
12 AC/AC Converters
485
R
S
T
N
1
TH 2
a
TH 3
TH 4
b
TH 5
TH 6
c
R
R
R
n
a)
v
an
v RS
2
v RN
v RT
2
v an
30 °
90 ° 150 ° 180 °
ωt
b)
v an
v RS v
RN v RT
2
2
v
75 ° 135 °
(α)
195 °
an
ωt
c)
Fig. 8.5 A three-phase AC-AC voltage converter having resistive load Y-connected (a),
the load voltage van for: α=30 o (b) and α=75 o (b).
1.0
V anrms
V anrms
M
0.8
0.6
0.4
0.2
0
0° 20 ° 40 ° 60 ° 80 ° 10 0° 12 0 °14 0 °
Fig. 8.6 The normalized rms value of the output voltage of a three-phase AC-AC
converter having resistive load as function of the turn-on angle.
Power electronics
486
For the operation of the converter in the region 60o < α < 90o it is characteristic
that turning on of one pair of the thyristors turns off the other pair of thyristors and
the load voltage is equal to zero or to one half of the line voltage.
The rms value of the output voltage varies from the maximum value, at α= 0,
which corresponds to a direct connection between the load and source, to zero, at
α=150o (Fig. 8.6). For α>150o there is no interval when any of the thyristors is
forward biased while the triggering pulse is applied to its gate. Therefore, the
output voltage is zero.
Example 8.4
Three-phase AC/AC converter shown in Figure 8.5a) has resistive load R=20Ω.
Converter is supplied by three-phase voltage, 380V rms, 50Hz.
a) Draw the waveforms of voltage at the resistor R (a-phase load) for
α=π/6, α=π/2 and α=2π/3.
b) Determine the thyristor stress if α=π/2.
a)
400V
200V
0V
-200V
-400V
0s
5ms
10ms
15ms
20ms
25ms
30ms
35ms
40ms
45ms
50ms
v(4,n)
Time
Fig.8.7 A-phase load voltage for α=π/6.
300V
200V
100V
-0V
-100V
-200V
-300V
0s
5ms
10ms
15ms
20ms
25ms
30ms
35ms
40ms
v(4,n)
Time
Figure 8.8 A-phase load voltage for α=π/2.
45ms
50ms
12 AC/AC Converters
487
8.3 FREQUENCY CONVERTERS
The frequency converters can be:
• indirect, and
• direct (cycle-converters).
In the indirect frequency converters the input voltage of frequency f1 is
converted to a D.C. voltage first and then the D.C voltage is converted to an A.C.
voltage whose frequency is f2><f1 . Therefore, these converters consist of AC/CD
(rectifier) and DC/AC (inverter) converters (Fig. 8.9). CF is the filter capacitor. Via
the control input of the inverter the frequency and rms value of the output voltage
are controlled. Frequency f2 can be controlled over a wide range so that it can be
either lower or higher than the source frequency. Any of the inverter types
described in Chapter 9 can be used.
+
-
+
DC
V I sin ( ω1 t)
V0 s in ( ω2 t)
CF
DC
AC
-
Co ntrol
Fig. 8.9 The basic block diagram of an indirect frequency converter.
The basic shortcoming of the indirect frequency converters is the double energy
conversion. This increases the size and reduces the coefficient of efficiency.
8.3.1 The direct frequency converters
In direct frequency converters the A.C. source is directly converted to an A.C.
response whose frequency is, as a rule, lower than the source frequency. The basic
block diagram of the simplest converter of this type (Fig. 8.10a) is the same as that
of the phase voltage converter using anti-parallel thyristors (Fig. 8.1a). The
difference is in the control module (CM), or in the sequence of thyristor triggering.
Here the control module during n voltage cycles of the source frequency f1
generates the triggering pulses only for thyristor Th1 , and then through the same
number of cycles feeds the triggering pulses to the gate of Th2 . The A.C. load
voltage consists of n+1 positive and the same number of negative half-cycles of the
input voltage.
The half-cycle of the load voltage is:
T2
T T
= nT1 + 1 = 1 (2n + 1),
2
2 2
(8.15)
Power electronics
488
CM
TH 1
Vi
TH 2
T 1 /2
V0
ωt
Vi
V0
R V0
b)
T 1 /2
ωt
Vi
T 2 /2
c)
Fig. 8.10 A simple direct frequency converter (a) and output voltage Vo for thyristor
control angles: α=0 (b) and α>0 (c).
There fore it follows that the output voltage frequency is:
f1
f2 =
.
(8.16)
2n + 1
The filter at the output eliminates higher harmonics. The rms value of the output
voltage is controlled by varying the control angle of the thyristors (Fig. 8.10c).
The simplest direct converter (Fig.8.10a) is based on the half-wave rectification
of the input voltage. However, the use of more complex circuits based on the fullwave rectification (Fig. 8.11a) is more common. Switches S1 to S4 are bidirectional. In one half-cycle only the positive full-wave rectification is performed,
where as in the other half-cycle only the negative full-wave rectification is
performed (Fig. 8.11b). The voltage at the input of the filter contains three positive
half-cycles obtained through the rectification of the input voltage by means of
turning on the switches sequentially per half-cycle: (S1, S4), (S2, S3), and (S1, S4). In
the other half-cycle three negative half-cycles are generated by the same sequence
of turning on the switches which are now conducting in the opposite direction. The
output voltage is the envelope of the voltage at the input of the filter. For this
reason these converters are often called direct envelope frequency converters. The
frequency of the output voltage in the presented example (Fig. 8.11) is three times
lower than the input voltage frequency. The rms value of the output voltage can be
controlled by varying the control angle of the switches (thyristors and triaks).
12 AC/AC Converters
489
S2
1
+
+
v i =V I s in( ω 1 t)
vf
-
Fil ter
v 0 =V 0 s in( ω 2 t)
-
S4
S3
a)
vi
ωt
2 π / ω1
vf
b)
S 1,4 S 2,3
S 1,4 S 1,4
S 2,3
v0
ωt
c)
6 π / ω1
ωt
c)
Fig. 8.11 The basic circuit diagram of a direct envelope frequency converter (a) and
voltage waveforms of the: input (b), non-filtered (c), and filtered output voltage (d).
There are two modes of control. In the previously described envelope converter
(Fig. 8.11c) the control angle, α , within one cycle is the same for all thyristors. In
the second mode of control the angle of control, within each half-cycle, varies for
each pair of thyristors, from a minimum to a maximum and again to the minimum
value (Fig. 8.12b).These converters are called phase controlled frequency
converters. The output voltage of these converters is closer to the sine function.
Consequently the filters of the phase converters are simpler and smaller in size than
those of the envelope converters. The direct envelope converters of a three-phase
voltage of frequency f1 and single-phase converters of frequency f2<f1 are often
called cycle-converters (Fig. 8.13). Their output voltages are closer to the sine
function because the number of pulses within one cycle is higher.
The cycle-converters of Fig.8.13 have two groups of thyristors. Group A
conducts positive and group B conducts negative peaks of the phase voltages (Fig.
8.14).
Power electronics
490
vi
ωt
vf
v0
f
v0
ωt
v0
ωt
Fig. 8.12 The voltage waveforms of a phase controlled frequency converter.
R
S
T
1
TH 2
TH 3
TH 4
TH 5
TH 6
+
V0
RL
-
EA
EB
G1
G2
G3
G4
G5
G6
Co ntro l module
Fig. 8.13 The circuit diagram of a cycle-converter.
During the first half-cycle, via input EA of the control module the cathode group
(A) of the thyristors is enabled. Th1, Th2 , Th3 , and Th1 are turned on sequentially. In
the next half-cycle the anode group (B) of the thyristors is enabled to conduct the
negative peaks of the phase voltages. The number of peaks, n, of the positive and
negative voltages depends on the width of the enable pulses EA and EB. The
frequency of the load voltage of the three-phase converter is determined by:
3
f2 =
f1.
(8.17)
2n + 1
The rms value of the output voltage is controlled by the control angle α . Increasing
this angle lowers the rms value of the output voltage and the output voltage
becomes more irregular and enriched by higher harmonics.
12 AC/AC Converters
491
v0
T
S
R
ωt
G1,G2,
G3
G4,G5,
G6
G1
G2 G3 G1
G1
G4
G2 G3 G1
G5 G6 G4
ωt
EA
ωt
EB
ωt
ωt
Fig. 8.14 The load voltage waveforms of a three-phase cycle-converter and control pulses
of the thyristor groups for zero control angle.
In some applications of cycle-converters there appears the need for three-phase
outputs. This can be accomplished by six-thyristor converters (Fig. 8.15). The
control of the thyristor groups should be synchronized with the phase voltages. The
control angle is equal for all phases.
The frequency of the single-phase load voltage of a cycle-converter may be three
times higher than that of the three-phase source. The cycle-converter having
enforced commutation are used for this purpose (Fig. 8.16). The thyristors are
controlled in such a way that during one cycle of the source voltage one part of the
positive and one part of the negative half-cycle is transferred to the load (Fig.
8.16b). At any time during this transfer only one thyristor can be on. If the control
angle is defined from the instant when the positive/negative voltages of two phases
are equal until the instant when the corresponding thyristor is turned on for
transferring a part of the positive/negative half-cycle of the third phase, then:
π
5π
,
2
6
where ωtg is the angle of the reliable turn-off of the thyristor.
+ ωt g ≤ α ≤
(8.18)
Power electronics
492
v an
R
S
v'an
T
R
S
T
R
ia
v an
0
ωt
i 'a
v bn
R
R
S
T
R
S
v'bn
T
R
ib
S
v bn
T
0
ωt
i 'b
b)
ic
v cn
Fig. 8.15 A cycle-converter having three-phase input and output (a) and the waveforms
of the load voltage and current of phases a and b (b).
Mostly ωtg<<π/2 (usually ωtg<5o), and α is calculated from the instant of the
enforced commutation. The conducting thyristor is turned off at the instant when
its current is about to change direction.
12 AC/AC Converters
493
-
Th 1
Th 2
+ vb -
Th 3
Th 4
+ vc -
Th 5
Th 6
+
a
R
S
T
+
V0
V0
RL
a)
α
ω tg
va
vb
va
vc
vb
vc
ωt
α
ω tg
b)
Fig. 8.16 A cycle-converter having enforced commutation (a) and the load voltage
waveforms of a purely resistive load (b).
Example 8.5
Line-commutated frequency tripler shown in Figure 8.16a), has R-L load and
frequency of three-phase AC source equal to 50 Hz. Thyristors turn-off time is
100μs. For the transformer type Y-Y whose transmission ratio is n, determine
power factor. Normalized average value of thyristor current IN in a function of
thyristor triggering angle α for different angles φ, and relations between the angle
of thyristor conduction γ and the angel of triggering α for different φ are shown in
Figure 8.17a) and 8.17b) respectively.
In a given circuit only one thyristor leads at one moment. Existence of interval
tq in which two phases are short-circuited across two thyristors with zero current
enables proper function of the circuit. In this converter input frequency is
multiplied with the factor which is a function of the number of input phases m and
an integer (optional). In this case the output frequency is three times greater than
the input. When much higher output frequency is required as result a "poorer"
input power factor, as well as lower utilization of semiconductor components will
be obtain. Each input phase with associated pair of thyristors can be considered as
single-phase AC controller that supplies the load in one part of the period.
Power electroonics
494
I a)
b)
Figgure 8.17. Norm
malized average value of thyristor current IN in a function
f
of thyrisstor
t
triggering
angle α for different angles
a
φ a), relatiions between the angle of thyristoor
uction γ and the angel of triggeriing α for differen
nt φ b).
condu
T waveforms of load voltagee is shown in Figure
The
F
8.16b). Maximum
M
allow
wable
anggle of conduction for thyristors in tripler from Figure 8.16a) is
i :
(88.19)
γ max = π / 3 − ω S t q [rad ] ,
wheere tq is thyristoor turn-off time.. The interval with
w zero curren
nt must exist, soo the
next inequality tq ≥ toff is satisfiedd during the eacch commutation.
Required valuee for angle a can be determiine d from the diagram show
R
wn in
Figgure 8.17b) (usinng only the subsset of diagramss which lies belo
ow the line γ=γmax
m )).
Thee intersection off lines and curvee give the approoximate value of the angle φ :
,
(88.20)
wheere ωs is frequeency of power source
s
and it determines
d
loweer limit for anglle α.
o
Uppper limit for anggle α is 180 forr all types of loaad.
I IN is the norm
If
malized averagee value of thyriistor current, an
nd IRN is normalized
rmss value of thyrisstor current, these currents caan be read from
m the diagram (Fig.
(
8.177a) for any vallue of angle α. Rms value off load current for
fo tripler show
wn in
Figgure 8.16a) is:
(
)
I eff = 3 2 I RN I BASE [A] .
(88.21)
Basse load current is:
I BASE =
2V
[A]
Z
andd impedance moodulus
(88.22)
RESONANT CONVERTERS
9
DC/DC converters based on pulse-width modulation (PWM) suffer from two
serious drawbacks. In the course of turning on and off of the power switches, very
fast voltage dv/dt and current di/dt changes occur. These changes, which may be in
excess of 108 V/s or A/s, cause the appearance of electromagnetic interference
(EMI) which may exceed the permitted level of conductive interference in the
power lines. On the other hand, during each change of state of a switch there is
increased power dissipation owing to the simultaneous existence of the voltage
across and current through the switch. Typical changes of the current and voltage
of a switch are shown in Fig. 9.1a. Due to a reactive character of the load in all
topologies of DC/DC converters the voltage change lags behind the current change
or vice versa. Therefore, it could happen that the maximum current through the
switch is established in the course of its closing and that the voltage across it is still
the same as when it was open. A typical example of this is MOS transistor
switches. Until the voltage across the switch drops to zero the switch will dissipate
considerable power. A similar phenomenon occurs during the opening of the
switch. All this causes the operating point to move closer to the boundary of the
safe operating area (SOA) (Fig. 9.1b). The total power of dissipation in the switch
is equal to the mean value within one cycle. If it is assumed that the variations of
the current and voltage during transients are linear, then:
Pd =
1T
vidt ∼ I ONVOFF (ton + toff ) f ,
T ∫0
(9.1)
where: ION is the current in the closed state, VOFF is the voltage in the open state,
ton and toff are the closing and opening times respectively, and f is frequency of the
switch. Therefore, the power of dissipation is directly proportional to the frequency
and duration of the transient process ton+toff . If the frequency is sufficiently high
that the cycle is close to ton+toff , the dissipation will be excessive (PD ≈ IONVOFF).
This not only degrades the coefficient of efficiency but also may cause a
catastrophic failure of the switch.
Consequently, the limiting factor for increasing the frequency is the dynamic
losses in the switches. On the other hand, in order to reduce the dimensions and
increase the power density of power converters, it is necessary to increase the
frequency because this leads to smaller dimensions of the capacitors and magnetic
components.
Power electronics
514
v
i
i
VON
VOFF
ION
SOA
ION
turning- on
t
turning- off
pd
VON
t
toff
ton
VOFF
v
Fig. 9.1 Typical changes during transient processes in the conventional switching
circuits.
The answer to the requirement, how to increase both the frequency and the
coefficient of efficiency, is sought through the reduction of dynamic power losses.
A solution can be accomplished if zero voltage and/or current are provided during
commutation, as shown in Fig. 9.2. If either voltage or current is approximately
zero during transient, the dynamic losses will be negligible irrespective of the
operating frequency of the switch. The trajectory of the operating point (Fig. 9.2b)
is close to the coordinate axis away from the SOA boundaries. The values of
changes dv/dt and di/dt are considerably smaller and so is the EMI.
The converter topologies providing the above conditions are called resonant
converters, because they use resonant circuits for shaping the forms of the voltage
and current. If the commutation of a switch occurs at zero voltage across it, then
these are Zero Voltage Switching (ZVS) converters and if the commutation is at
zero current, then these are Zero Current Switching (ZCS) converters.
v
i
i
VON
ION
VOFF
SOA
ION
t
turning- on
pd
turning- off
t
VON
VOFF
v
Fig. 9.2 The changes when the switch commutation is at zero voltage and zero current.
Since the voltages and currents of the oscillatory circuits are harmonic, the
commutation of switches is synchronous with the voltage and/or current zerocrossing. The rises of the currents or voltages of the switch are gradual so the
stresses caused by EMI are not generated. For this reason these converters are often
called the soft commutation converters.
10 Resonant converters
515
There are various criteria for the classification of resonant converters. Globally,
however, they can be classified in four groups:
• resonant converters of class D,
• resonant converters of class E,
• converters based on resonant switches, and
• PWM soft commutation converters.
9.1 RESONANT CIRCUITS
Since resonant circuits are a constituent part of all resonant converters, a brief
remainder of the basic characteristics of these circuits is due. There are two types
of resonant circuits: series and parallel. An unloaded series resonant circuit is
shown in Fig. 9.3. The initial conditions at t=to are ILo and VCo and are denoted by
figure in the square brackets.
The state of the circuit can be described by these equations:
Lr
diL
+ vC = VDC ,
dt
(9.2)
dvC
.
dt
The solutions of these equations for t>to are:
iL = C r
iL (t ) = I L 0 cos ω (t − t0 ) +
VDC − VC 0
sin ω (t − t0 )
Z0
vC (t ) = VDC − (VDC − VC 0 ) cos[ω0 (t − t0 )] + Z 0 I L 0 sin[ω0 (t − t0 )],
(9.3)
(9.4)
(9.5)
where:
ω0 = 2πf 0 =
1
,
Lr Cr
(9.6)
is the resonant circular frequency and
Z 0 = Lr / Cr
(9.7)
is the characteristic impedance. The normalized waveforms of the voltage vc and
current iL with respect to VDC and VDC /Zo respectively, are shown in Fig. 9.3b.
Power electronics
516
iL
1.0
0.75
i L [I L0 ]
vC
iL
0.5
Lr
V DC +
-
vC
Cr
+
v C [V C0]
-
0
180 °
360 °
ωt
- 0.5
a)
I L0 = 0.5, VC0 = 0.75
b)
Fig. 9.3 The unloaded series resonant circuit (a) and normalized variations of il and Vc
(b), with initial conditions ILo = 0.5 and VCo = 0.75.
Allowing the resonant circuit to be loaded by the current generator Io in parallel
with a capacitor (Fig. 9.4). Current Io is constant. By using (9.2) and bearing in
mind that now:
dv
(9.8)
iL = I 0 + C r C ,
dt
it turns out that:
iL (t ) = I 0 + ( I L 0 − I 0 ) cos[ω0 (t − t0 )] +
VDC − VC 0
sin[ω0 (t − t0 )],
Z0
vC (t ) = VDC − (VDC − VC 0 ) cos[ω0 (t − t0 )] + Z0 ( I L0 − I L ) sin[ω0 (t − t0 )].
In the special case of VCo= 0 and ILo= Io :
V
iL (t ) = I 0 + DC sin[ω0 (t − t0 )],
Z0
vC (t ) = VDC − {1 − cos[ω0 (t − t0 )]}.
(9.9)
(9.10)
(9.11)
(9.12)
In addition to the characteristic impedance Zo and circular frequency ωo , the
third essential parameter of an oscillatory circuit is the quality factor:
Q=
ω0 Lr
R
=
Z
1
= 0,
ω0 C r R R
(9.13)
where R is the series resistance. The frequency characteristic of a series resonant
circuit (Fig. 9.5) consists of its impedance and the phase shift between the current
and voltage as a function of frequency. At the resonant frequency the impedance is
purely resistive. For high Q factors the sensitivity of the impedance to frequency
variations around ωo is very high. It can be considered that to the left of frequency
ωo- Δω /2 the character of the oscillatory circuit can be considered mainly
capacitive, and to the right of frequency ωo + Δω /2 mainly inductive.
10 Resonant converters
517
2.0
vC
iL
1.0
i L [ IL0 ]
+
VDC
Lr
0.5
+
iC
Cr
VC [VC0 ]
-
I0
-
0
180 °
360 °
ωt
- 0.5
a)
b)
Fig. 9.4 A loaded series resonant circuit (a) and the waveforms for Vco=0 and ILo=0.5 (b).
Z( ω )
Q3
Lr
Q2
Q1
Cr
Q3 > Q2 > Q1
R
R
90 °
ω
ΔΘ = Θ i -Θ v 0
Δω
ω
R
Z( ω)
ω0
ω
- 90 °
Cr
Z
Lr
Fig. 9.5 The frequency characteristic of a series resonant circuit.
Irrespective of Q factor, for ω < ω ο the capacitive influence is dominant,
whereas for ω > ωo the inductive influence prevails.
A parallel oscillatory circuit fed by a constant current IDC is shown in Fig. 9.6. It
is straightforward to show that:
iL (t ) = I DC + ( I L 0 − I DC ) cos[ω0 (t − t0 )] +
VC 0
sin[ω0 (t − t0 )],
Z0
vC (t ) = Z 0 ( I DC − I LO ) sin[ω0 (t − t0 )] + VC 0 [cos ω0 (t − t0 )].
(9.14)
(9.15)
Power electronics
518
Zp
+
i L [I L0 ]
+
I DC
Lr
VC [ VC0 ]
-
-
Q
ω0
ωs
ω0
ωs
Δθ= θv - θ i
I =IL θ i
90 °
+
V =VLθ v
Lr
Cr
R
0
-
- 90 °
Zp
a)
b)
Fig. 9.6 A parallel resonant circuit (a) and its frequency characteristic (b).
If the parallel resistance is R, the Q factor is determined by:
Q = ω0 RCr =
R
R
=
.
ω0 Lr Z 0
(9.16)
In an ideal case (R → ∞) impedance Zp at circular frequency ωo is infinitely large
and it is very sensitive to the variations of ω around ωo (Fig. 9.6b). To the left of ωo
the impedance is mainly of inductive, and to the right of ωo is mainly of capacitive
character.
9.2 RESONANT CONVERTERS OF CLASS D
Resonant DC/DC converters of class D consist of a DC/AC converter (inverter),
a rectifier, and a filter (Fig. 9.7). The load of the inverter, which may be a halfbridge (Fig. 9.7a) or a full-bridge (Fig. 9.7b) circuit, is a resonant circuit. The
advantages and disadvantages of the one topology compared to the other has
already been explained in Chapter 4. The peculiarity of the half-bridge resonant
inverters is that in some connections, like the series resonant converter, the
capacitive divider may carry out the function of the resonant capacitor under
condition that Cd=Cr /2. In the other half-bridge connections capacitors Cd are large
and behave like voltage dividers.
10 Resonant converters
M1
519
D1
Resonant
circuit
iLr
VDC
n:1
Cd
VODC
Filter and
load
iD
M2
D 2 vDS
Cd
Inverter
M1
D1 M3
D3
n:1
Resonant
circuit
VDC
M2
D2 M 4
Filter and
load
VODC
D4
Inverter
Fig. 9.7 The basic circuit diagram of a DC/DC converter of class D.
The resonant circuits are driven by square voltage pulses which are formed in
the process of turning on and off of a transistor. The operating mode of the inverter
depends upon the ratio of the operating frequency of the switch and the resonant
frequency of the oscillatory circuit. The least dynamic losses in transistors are in
the discontinuous mode of the current of the resonant coil which arises when f >fo .
The characteristic waveforms of the switch and coil currents are shown in Fig. 9.8.
Since the current through the coil lags behind the voltage across it, at the instant the
transistor is turned on its anti-parallel diode will conduct. For this reason the
transistor is turned on when the voltage across it is zero, thus its dynamic losses are
negligible.
If an MOS transistor is used as the switch, the topology of the resonant
converter should ensure that it is turned on at zero voltage across it because of the
parasitic capacitance between the drain and source which, for power MOS
transistors, is of the order of several hundreds pF if not more. When an MOS
transistor is turning on, the voltage across it will exist until the parasitic
capacitance is discharged. The current through it ID=Kn(VGS – Vm) is larger than the
load current (Fig. 9.9b) and this causes a considerable dissipation by the transistor,
approximately
Power electronics
520
vDS
VDC
T=1/f
t
iLr
t
iD
t
tv
D on
M on
Fig. 9.8 The waveforms at f<fo .
PD=1/2CDS(VDSOFF-VDSON)2f.
(9.17)
Therefore, it is very important that an MOS transistor is turned on when the voltage
across it is zero (very small). Then VDSOFF=VDSON ≈ 0 and PD ≈ 0.
The voltage at the output of the oscillatory circuit is via a transformer fed to the
input of a rectifier. The rectified voltage is filtered and at the output one obtains its
D.C. component.
Usually the output voltage of these converters is controlled by varying the
switching frequency, i.e. by frequency modulation (FM). If the load or input
voltage variations are large, the required range of the frequency variation is wide.
Owing to the frequency dependence of the magnetic elements and output filter, the
characteristics of the converter may deviate considerably from the designed
optimum. On the other hand, for distributed power supplies there is no possibility
10 Resonant converters
521
of synchronization because the loads are different, so the converters operate at
different frequencies. This generates a wide spectrum of interference. In order to
avoid this problem, the practice recently is to use a control circuitry operating at a
constant frequency but with a variable phase shift of the pulses driving the
transistors in the bridge.
Fig. 9.9 A standard MOS switch (a) and the trajectory of the operating point during the
turn-on process of the transistor (b), when the resonant principle is not applied.
Depending on the position of the load with respect to the elements of the resonant
circuit, the converters of class D may be divided in three basic groups:
• series resonant converters,
• parallel resonant converters, and
• series-parallel (hybrid) converters.
9.2.1 The series resonant converters
The load of this type of converter is connected in series with the oscillatory
circuit. The half bridge topology without a matching transformer (Fig. 9.10) will be
considered. The A.C current is rectified by a full wave rectifier so that current iL
flows through load RL . The capacitor of the output filter is large it may be
considered that the output voltage is a D.C. voltage containing negligible high
frequency components.
The input capacitors are sufficiently large that they may be considered like a
voltage source +VDC /2. Therefore, the voltage between points A and B varies from
–VDC /2 to +VDC /2. When M1 is on, then VAB=+VDC /2, whereas while M2 is on
VAB=-VDC /2. The constant output voltage Vo is reflected back between points B and
B’.
Power electronics
522
V0
M1
D1
iL
+
VDC
2 -
D M1
C
VC
+ -
Lr
VDC
D3
B'
Cr
C0
B
RL
B
+
VDC
2 -
C
M2
D M2
D4
D2
a)
A
B'
Lr
Cr
+
+ VDC
2
- V0
B
b)
B
Fig. 9.10 A half-bridge resonant DC/DC converter (a) and its equivalent circuit (b).
Voltage VBB’ is +Vo or –Vo depending which pair of diodes in the rectifier are
conducting. If the series resistance of the resonant circuit is neglected, the
equivalent circuit of the converter becomes a simple circuit (Fig. 9.10b). The
polarities of the voltage generators VAB and VBB’ are dependent on the direction of
the current through the coil. E.g. when the current through the coil is iL>0, it will
then flow through M1 if it is on and VAB=VDC /2. If, however, M1 is off, the positive
current iL will flow through diode DM2 and VAB=-VDC /2. The situation is similar
during the cycle when M2 or DM1 are on. Therefore, it follows that:
⎧
M1 on VAB=+VDC/2, VB'B=+Vo
⎪
⎨
⎪
iL>0
DM2 VAB=-VDC/2, VB'B=+Vo
(9.18)
⎩
M2 on VAB=-VDC/2, VB'B=- Vo
iL<0:
DM1 on VAB=+VDC/2, VB'B=- Vo
(9.19)
The polarity of VB’B is dependent on the direction of current iL .
Current iL may be continuous or discontinuous, so one may speak of the
continuous or discontinuous mode of converter operation. The mode of operation is
dependent on the ratio of the resonant frequency and the operating frequency of
the switches, f.
⎧
⎪
⎨
⎪
⎩
10 Resonant converters
523
The discontinuous mode (ω<ωo/2)
On the basis of (9.18) and (9.19) and the equivalent circuit of the converter (Fig.
9.10b), the equivalent circuits within the characteristic time intervals have been
drawn (Fig. 9.11b). Allowing at the beginning of the cycle, at ωoto transistor M1 be
on and allowing current iL to start increasing from zero. The initial voltage across
capacitor is Vco =-2Vo .
After the first half cycle of the coil current, at ωot1 M1 is turned off and a
negative current iL starts flowing via DM1 since M2 is off. After current iL has fallen
to zero again at ωot2 , it remains at zero because all transistors and diodes are off.
A
Cr
Lr
B'
+
V0
-
VDC
iL = +
2
Cr
Lr
A
B'
VDC
iL = 2
B
V0
B
one cycle
VC
VDC
2V0
iL
ω 0 t1
ω 0 t2
turned on
ω 0 t0 ω 0 t3
M1
D M1
M2
D M2
ωt
interruption
VC0
(= -2V0 )
interruption
0
180° 180°
A
Lr
Cr
VDC
iL = 2
B
B'
A
V0
Lr
Cr
VDC
i =+
2 L
B'
V0
B
Fig. 9.11 The waveforms and equivalent circuits in the discontinuous mode.
This state remains unchanged until transistor M2 is turned on, at ωot3. The coil
current is interrupted over the interval ωo(t3-t2) when the voltage across capacitor
Cr is constant and amouts VCO= 2Vo . Since VCO <VDC /2+Vo , it follows that Vo <
VDC /2. By turning on transistor M2 at ωot3, negative current iL will flow through it.
This half cycle is complementary to the previous, but now M2 is on first and then
DM2 is on, current iL is negative at first and then becomes positive. It ends by the
interval of current discontinuity when all transistors and diodes are off.
Power electronics
524
In this mode the transistors are turned off at zero current and zero voltage (the
anti-parallel diode is on), and they are turned on at zero current, but not at zero
voltage, which increases the dynamic losses at turn-on. For this reason this mode is
used in low frequency applications and with thyristors as the switches.
The continuous mode (ωo/2<ω<ωο)
The waveforms of current iL and voltage vc for this mode are shown in Fig. 9.12.
Transistor M1 is turned on at ωoto . Both the current and the voltage are non-zero
which increases the losses at turn-on. The transistors are turned off at the current
zero crossing (M1 at ωot1, M2 at ωot3). The diodes do not conduct throughout the
half cycle similarly to the discontinuous mode. The diode current is taken over by
the transistor of the other arm when turned on. E.g. at ωot2 the current of diode DM1
is taken over by transistor M2 .
A
Lr
Cr
B'
VDC
iL = +
2
Lr
A
Cr
VDC
iL = 2
V0
B
B'
V0
B
one cyrcle
iL
VC
ω0 t 0
ω0 t 3
turned on
A
ωt
ω0 t 2
ω0 t 1
M 1 DM1
M2
D M2
Cr
B'
A
Lr
VDC
iL = 2
V0
Lr
Cr
VDC
iL = +
2
B'
V0
Fig. 9.12 The waveforms of the continuous mode at ωο/2<ω< ωο .
Because of the presence of the current and voltage at the turn-on of transistors,
the MOS transistors are not suitable as the switches in this mode. This mode is also
used in low frequency applications and with thyristors as the switches.
10 Resonant converters
525
The continuous mode at ω > ωo
In this mode the transistors are turned on at zero current and zero voltage, and they
are turned off at non-zero current. The characteristic waveforms are shown in Fig. 9.13.
At ωot1 transistor M1 is turned off and its current is taken over by diode DM2 .
Cr
Lr
V DC
iL = 2
Lr
Cr
V DC
iL = 2
V0
V0
one circle
VC
iL
ω0 t0
D M1
Lr
M1 D M1 M2 D M1
Cr
V DC
iL = +
2
ωt
ω0 t1 ω0 t2
Lr
V0
Cr
V DC
iL = +
2
V0
Fig. 9.13 The continuous mode at ω>ωo .
Owing to the high voltage across the resonant circuit, which in this interval is
VAB=VDC /2 – Vo , the diode current comes quickly to zero crossing, at ωot2 (Fig.
9.13).
As soon as diode DM2 is turned on, the conduction of transistor M2 is enabled so
that it takes over current iL as soon as it becomes negative. Since diode DM2 is on at
the instant of turning on of transistor M2 , it is turned on at zero current and zero
voltage. Therefore, the turn-on losses are negligible. Since M2 takes over a negative
current, the turn-off time of diode DM2 is not critical. Practically, its turn-off time
can be as long as the interval of conduction of M2 . Therefore, the diodes can be of
a medium speed. At the commutation frequencies of the order of several hundreds
Power electronics
526
kHz the function of anti-parallel diodes can be taken over by the internal diodes
drain-substrate of the MOS transistors.
In one sense a drawback of the continuous mode at ω> ωo is that the transistors
are not turned off at zero current and zero voltage conditions. This drawback is not
significant if the switches are MOS transistors because they have the intrinsic
capacitance drain-source CDS , which does not allow a fast rise of voltage VDS .
Therefore, CDS behaves as a non-dissipative snubber circuit. If capacitance CDS is
small, between the drain and source an external capacitance CS whose value
depends on the commutation current is connected (Fig. 9.14).
M1
D1
Lr
VDC
Cs
Cr
Cs
D3
M3
D4
M4
vo
n:1
M2
D2
Cs
Cs
Io
Vo
Cf
Ro
Fig. 9.14 A bridge series resonant DC/DC converter having a transformer coupling and
non-dissipative snubber capacitors.
Series resonant converters, having a, transformer coupling between the inverter
and rectifier are often used (Fig. 9.14). The use of a transformer allows a better
load matching and galvanic separation of the input and output. By the
transformation ratio n one can set the designed ratio of the input and output
voltages. In the series connection with the transformer resonant capacitor Cr blocks
the D.C. component of the primary current of the transformer, preventing in this
way the pre-magnetization current and core saturation.
The resonant circuit behaves as a filter which suppresses the higher harmonics
and passes only the fundamental harmonic. Since it passes only harmonic current,
the input voltage can be represented by its fundamental harmonic only. Therefore,
the analysis of the resonant converters is well approximated by the circuit analysis
methods involving harmonic currents. A realistic equivalent circuit of the converter
of Fig. 9.10 is shown in Fig. 9.15a, where R is the equivalent load resistance. Since
the input and output are the sequences of symmetric bipolar square pulses +VDC /2
and +Vo respectively, the amplitudes of the fundamental harmonics are:
10 Resonant converters
VI 1M =
VO1M =
4(VDC / 2)
π
2VO
π
=
527
2VDC
π
(9.20)
,
(9.21)
.
The output current is the full wave rectified current iL. Its mean value is the
output current Io . If current iL is approximated by a harmonic current of amplitude
IL1 , the mean value is:
2I
I O = L1
(9.22)
π
The equivalent output resistance can be expressed as the ratio of the voltage and
current at the output of the resonant circuit, i.e.:
4V / π
8 V
8
V
= 2 O = 2 RL .
Re = O1M = O
(9.23)
πI O / 2 π I O π
I L1
The frequency characteristic of the converter is the ratio of the output and input
voltages as function of frequency. A simple analysis of the circuit (Fig. 9.15a)
shows that
VO =
VDC
Re
=
(
2 Re + j X L − X C )
VDC / 2
⎛ X − XC
1 + ⎜⎜ L
Re
⎝
⎞
⎟⎟
⎠
2
,
X L = ωLr , X C = 1 / ωCr .
If the Q factor of the converter is defined with respect to the load R , i.e.:
ω Lr
1
=
,
Q=
RL
ωCr Rr
then (9.24) can be written in the form:
VO
1
=
.
2
VDC / 2
1 + (QLS π / 8) 2 [(ω 2 / ω0 ) 2 − 1]2
(9.24)
(9.25)
(9.26)
(9.27)
Therefore, the frequency characteristic is also dependent on the quality factor,
QLS (Fig. 9.15b). The sensitivity of the characteristic reduces with the reduction of
QLS . In the limiting case of an unloaded converter (RL→ ∞) the output voltage is
independent of frequency and equal to VDC /2. Consequently, the output voltage of
a loaded series resonant converter is set to the designed value by selecting the
commutation frequency of the switches in the range ω>ωo .
Power electronics
528
VI =Va
(VDC / 2 ) /π
A
Lr
Cr
v 0 =V b'
B'
VDC / 2
4V0 /π
V0
VI =Va
R e V0
B
B
Q LS = 0
0.5
V0
VDC / 2
0.4
Q LS = 1
0.3
Q LS = 2
0.2
Q LS = 3
Q LS = 4
0.1
0
0.6
0.8
1.0
1.2
ω / ω 0 = f /f 0
1.4
Fig. 9.15 The equivalent circuit of the series resonant converter (a) and its normalized
frequency characteristic with Q factor as a parameter (b).
Example 9.1
Determine the output voltage of the series resonant DC/DC converter of Fig.
9.10 if: VDC=100V, Lr=30μH, Cr=0.08μF, RL=10Ω, and f=120kHz.
The resonant frequency of the oscillatory circuit is:
f0 =
1
1
=
= 102.7 kHz.
−
2π Lr Cr 2π 30 ⋅10 6 ⋅ 0.08 ⋅10− 6
The commutation frequency is higher than the resonant freuqncy, thus the
converter operates in the continuous mode at f>fo .
The equivalent resistance of the equivalent circuit is Re=(8/π2)RL=8.11Ω . The
Q factor is QLS=ωoLr/RL=2π⋅(102.7⋅103)⋅(30⋅10-6)/10=1.94.
The normalized commutation frequency is: f /fo=120kHz/102.7kHz=1.17.
On the basis of (9.27) it follows:
10 Resonant converters
VO =
529
100V / 2
1 + (1.94π 2 / 8) 2 (1.17 2 − 1) 2
= 40.1V .
9.2.2 The parallel resonant converters
In this type of converter the load is connected in parallel with the resonant
capacitor (Fig. 9.16). A transformer coupling is desirable but not mandatory. The
inductance of the coil of the output filter Lo is quite high so, taking into account
that the commutation frequency is high, practically only the D.C component of the
output current can get through. Therefore, it may be considered that the current in
the transformer secondary is +Io, and its direction is dependent on the conducting
pair of diodes in the rectifier. On the side of the primary this current is +Io/n (Fig.
9.16b), where n is the transformation ratio of the transformer. Voltage VAB at the
input of the resonant circuit is +VDC , and its polarity is dependent on the
conducting pair of switches in the inverter bridge. E.g. if M1 and M4 are
conducting, then VAB=+VDC , if M2 and M3 are conducting, VAB=-VDC .
The simplified equivalent circuit of the converter (Fig. 9.16b) may well be
useful in the analysis of the variations of current iL and voltage Vc of the oscillatory
circuit which influence the state of the individual pairs of switches Mi , DMi
(i=1,2,3,4) in the inverter bridge. In this analysis equations (9.9) and (9.10) are to
be used.
As with series resonant converters, several modes of operation are possible. One
discontinuous and two continuous modes are characteristic. The discontinuous
mode exists at low commutation frequencies approximately up to ωo/2. Within a
certain time interval both the coil current iL and voltage across the resonant
capacitor Vc are equal to zero. During this interval one of the transistor pairs is
turned on, thus the turn-on losses are negligible. Turning off occurs at the change
of current direction, or at the current zero crossing.
The output voltage is controlled by controlling the duration of the interval of
zero coil current and zero voltage across Cr .
The two continuous modes of operation are different: one is below and the other
is above the resonant frequency. In the mode below ωo (ωo/2< ω< ωo) there are no
losses at turning off since the current is zero. However, the transistors are turned on
at a non-zero current iL which is being taken over from the diode of the other arm
of the bridge. Therefore the diode has to be very fast.
Power electronics
530
I0
M1
Lr
M3
DM3
D1
A
DM1
B'
Lr
VDC
D3
n:1
Cr
C0
R L V0
B
DM4
D4
DM2
M2
D2
M4
a)
IL
A
VDC
B'
Lr
+
- VDC
+
- I 0 /n
Cr
B
b)
B
Fig. 9.16 A parallel resonant bridge converter.
The continuous current iL and voltage Vc will also exist above the resonant
frequency (ω>ωo). The difference compared to the preceding continuous mode is
that here there are no losses at turning on because it happens naturally at the
current zero crossing. However, the turning off is forced. The losses during the
process of turning off can be reduced considerably by applying a non-dissipative
protection capacitor in parallel with every switch (as in the series converters Fig.
9.14).
In the analysis of the parallel converter it will be assumed that the voltage
across the resonant capacitor is harmonic. The input voltage of the converter and
the input current of the diode rectifier will be represented by their first harmonics.
The equivalent circuit is shown in Fig. 9.17a. The amplitude of the first harmonic
of the output voltage, referred to the primary side of the transformer, is:
Vb = n(πVO / 2).
(9.28)
The primary current is a sequence of symmetric bipolar pulses +Io such that the
amplitude of the first harmonic is:
I b = 4 I O /(nπ ).
(9.29)
The equivalent resistance RL is:
10 Resonant converters
Re =
531
Vb n 2π 2
=
RL ,
Ib
8
va
VDC
(9.30)
a
4V DC /π
V0
b
Lr
πnV0 /2
V0
Re
Cr
t
t
- VDC
a)
V0 / VDC
8.6
4.8
4.0
3.2
2.4
1.6
0.8
0
0.2
0.4
0.6
Discontinuous
mode
0.8
1.0
1.2
ω / ω 0 = f /f 0
1.4
Coninuous
mode
b)
Fig. 9.17 The equivalent A.C. circuit of a parallel resonant DC/DC converter (a) and its
normalized frequency characteristic (b) for n=1.
where RL=Vo /Io . Since the amplitude of the fundamental harmonic of the input
signal is Va=4VDC /π, from the analysis of the simple circuit of Fig. 9.17a it follows:
VO =
8VDC
2
⎛ X ⎞ ⎛X ⎞
n2π 2 ⎜⎜1 − L ⎟⎟ + ⎜⎜ L ⎟⎟
⎝ X C ⎠ ⎝ Re ⎠
2
=
8VDC
2
⎛ ω ⎞ ⎛
⎞
8
⎟
n2π 2 ⎜⎜1 − ⎟⎟ − ⎜⎜ 2 2
⎟
⎝ ω0 ⎠ ⎝ n π QLP ⎠
2
2
,
(9.31)
where: QLP=RL /(ωoLr) is the quality factor and ωo=1/√(LrCr) is the circular
frequency of the oscillatory circuit. The normalized frequency characteristic is
shown in Fig. 9.17b.
In the range of the discontinuous mode (ω<ωo/2) the output voltage does not
depend on the Q factor, which means that it does not depend on the load, and is a
linear function of frequency. The converter in this region behaves like an ideal
Power electronics
532
voltage source. In the range of the continuous mode, in addition to the frequency,
the output voltage is also load dependent. Its value can be higher or lower than the
input voltage VDC which was not the case with the series resonant converters.
Example 9.2
Determine the output voltage of a parallel resonant converter with no
transformer coupling if: VDC=100V, Lr=8μH, Cr=0.32μF, RL=10Ω, and f=120kHz.
The resonant frequency of the oscillatory circuit is ωo=1/
and ω/ωo=2π⋅120/625=1.21. The Q factor is QLP=RL/(ωoLr)=2.
On the basis of (9.31) it follows:
8 ⋅100V
Vo =
(
)
2 2
π 2 1 − 1.21
⎛ 8 ⎞
+⎜ 2 ⎟
⎝ 2π ⎠
2
=625⋅1031/s,
= 121.4V
9.2.3 The series-parallel resonant converter
In this type of resonant converters the capacitor of the oscillatory circuit is split
in to two parts. One is connected in series with the coil, and the other is in parallel
with the load. Therefore, the oscillatory circuit together with the load constitutes a
series-parallel combination. These type of converters are often called hybrid
converters.
In the half bridge connections of the series-parallel resonant converters the
capacitors of the capacitive divider are often used as the series capacitors of the
oscillatory circuit (Fig. 9.18). Capacitors Cs and Cp can be of the same value. I can
be shown that this is the optimum choice at high load resistances.
The analysis procedure is the same as for the previous two types of converters.
The equivalent A.C. circuit is shown in Fig. 9.19a. On the basis of this circuit one
obtains:
VO
4
,
(9.32)
=
VDC
⎡ C ⎛ ω 2 ⎞2
⎤
⎛ ω ω0 ⎞
⎟⎥
nπ 2 ⎢1 + P ⎜⎜1 − 2 ⎟⎟ + QS2 ⎜⎜
+
ω0 ω ⎟⎠⎥
⎢ C S ⎝ ω0 ⎠
⎝
⎣
⎦
where:
Q=
ω0 Lr
Re
=
8 ω0 Lr
8
= 2 2 QLS .
π n RL
π n
2 2
(9.33)
10 Resonant converters
533
M1
VDC
D1
vo
Lr
Cp
A
B
M2
Cs
2
B
'
Cs
n:1
D2
2
Io
Lo
Vo
Co
RL
Fig. 9.18 A series-parallel resonant DC/DC converter.
The normalized frequency characteristic, with Q as a parameter, is shown in Fig.
9.19b.
The dependence of the output voltage on frequency exists even for an open
output.
By choosing Qs to be between 4 and 5 high efficiency is retained even at small
loads because the current of the oscillatory circuit reduces. Parallel capacitor Cp
can be connected at the secondary side of the transformer for the purpose of
matching, if it is used. The stray inductance of the transformer is then included in
the resonant inductance.
Example 9.3
Determine the output voltage of a series-parallel resonant DC-DC converter
from Figure 9.18 if: VDC=100V, Lr=50μH, Cr=CP= 0.1μF, RL=10Ω, n=1.2 and
f=75kHz.
The resonant frequency of the oscillatory circuit is ωo
and ω/ωο=2π⋅f/ωο=1.0537.
The Q of the circuit is determined from 9.33:
1.2587.
On the basis of (9.32) it follows:
Vo =
4 ⋅100V
1.2 ⋅ π
2
(1 − 1.0537 )
2 2
+ 1.2587 (1.0537 − 0.949)
2
2
= 111V
447210 1/
Power electronics
534
Cs
Lr
2Vb
va
vo
π
VDC
t
va
Cp
Re
π nV
O
vo
2
Vo
t
Vo
Vb
Cs=Cp
Qs=1
2
3
4
5
ω
ωo
Fig. 9.19 The equivalent circuit of a hybrid resonant converter (a) and its frequency
characteristic for n=1 (b).
9.3 SERIES RESONANT CONVERTERS BASED ON GTO
THYRISTORS
The elementary connection of a series-resonant converter based on the GTO
thyristor as the switch is shown in Fig. 9.20. In order to achieve the resonance,
inductance Ls should be at least one order of magnitude larger that L1 and
capacitance Co should be at least twice the value of capacitance C1 .
10 Resonant converters
535
a
LS
i0
i1
L1
V DC
C0 V 0
C1
V1
CM
b
Fig. 9.20 The basic circuit of the series-resonant converter based on GTO thyristors.
The operating mode of the converter is very complex. A complete analysis is
possible only with the aid of a computer. For this reason a brief analysis will be
given of an unloaded converter in two limiting cases: short and long intervals of
conduction of the GTO thyristor. The analysis is simplified and aims at showing
only the qualitative relations in the circuit.
The characteristic wave forms for the case of short conduction of the thyristor
are shown in Fig. 9.21a. While the GTO thyristor is off, current i1 oscillates around
zero at the resonant frequency:
1
,Ct = C1C o
C1+ Co
L1 C t
ωo =
V1
(9.34)
V1
VD C
MVD C
0
VIn
0
t
I off
I1
I1
VD C
Z1
0
V0
0
t
t
VD CC 1
C0
C +C 0
VD C 1
C0
0
V0
t
GTO
V1m
C1
C0
VD C
0
I0
t
V 0 - VD C
ωL 0
VD C
0
a)
VD C
t
MV D C
Z1
t
GTO
b)
Fig. 9.21 The waveforms of the unloaded converter for short (a) and long conduction of
the GTO thyristor (b).
The maximum value of this current is determined by:
Power electronics
536
I 1m =
V DC
Ct
= V DC
,
Z1
L1
and its instantaneous value is:
i 1 (t) = I 1m sin ωot .
(9.35)
(9.36)
The existence of the oscillations in the circuit implies that within each cycle
voltage V1 drops to zero (minimum value). Its instantaneous value is approximately
expressed by:
(9.37)
V 1(t) = V DC (1 - cos ωot ) ,
Therefore it follows that the maximum value is V1m=2VDC . Therefore, this voltage
oscillates between 0 and 2VDC , and its mean value is equal to the input voltage,
VDC. The maximum value of the output voltage depends on the capacitance ratio
C1/Co and approximately amounts:
⎛
C1 ⎞
V oM = V DC ⎜⎜ 1 + ⎟⎟ ,
Co ⎠
⎝
Where as its maximum variation is:
(9.38)
Δ V oM = V oM - V DC = V DC C 1 .
(9.39)
Co
Turning on of the GTO thyristor is synchronized with the zero crossing of current
i1 . Then capacitor C1 is very quickly discharged. Since the conduction time is very
short and coincides with the minimum of voltage V1 , the conduction of the GTO
thyristor does not influence the waveforms.
The waveforms in the case of a long conduction of the GTO thyristor are shown
in Fig. 9.21b [53]. While the GTO thyristor is on, C1 discharges, so V1= 0. Now the
maximum of the oscillating current is:
I 1M = M
V DC
,
Z1
(9.40)
where:
2
⎛ I off Z 1 ⎞
⎟⎟ + 1 ,
M = ⎜⎜
⎝ V DC ⎠
(9.41)
and Ioff is the current through L1 due to current Io . The maximum value of the
voltage across C1 is determined by:
(9.42)
V 1M = V DC (1 + M ) ,
and the corresponding variation is:
Δ V 1M = MVs .
(9.43)
10 Resonant converters
537
a
a
CS
a
CS
-
+
C0
CS
C0
R0
R0
C0
b
R0
+
b
b
a)
b)
c)
Fig. 9.22 The circuits for rectifying the A.C. voltage.
It follows from (9.42) that the maximum multiplication factor is:
M max =
V TM
-1,
V DC
(9.44)
D
C0
R0 V0
LS
L1
V DC
C0
C1
CM
Fig. 9.23 A direct series resonant converter containing a separation transformer.
where VTM=V1M is the maximum permitted voltage across the thyristor. E.g. if
VDC= 300V, VTM=1200V, then Mmax=3. This means that the maximum value of the
current through L1 has grown three times when the conduction interval of the GTO
thyristor was increased to the maximum permitted value determined by the
maximum voltage across the GTO thyristor.
As already shown (Fig. 9.21) the output voltage of an unloaded converter is
harmonic. In order to obtain a D.C. voltage across the load this voltage should be
rectified. For this purpose one can use the standard techniques of half wave or full
wave rectifiers. Three such circuits are shown in Fig. 9.22. Depending on the
directions of the diodes, the output voltage can be positive (Fig. 9.22a) or negative
(Fig.9.22b).
Power electronics
538
It is, however, often required to realize galvanic separation of the load. This
may be accomplished by a separation transformer whose primary is the choke Ls
(Fig. 9.23). With the opposite direction of winding of the secondary, one would
obtain an indirect series resonant converter.
9.4 CLASS E RESONANT CONVERTERS
The basic circuit is the class E resonant inverter (Fig. 9.24). It consists of a
switch, parallel capacitor C1 , series resonant circuit Lr , Cr , input choke Lf , and
output load RL . Instead of the MOS transistor, the switch may be a bipolar
transistor or a thyristor. By turning the switch on and off the oscillation conditions
are created for the oscillatory circuit which results in an almost harmonic current
through the load. In addition to the very simple topology, the efficiency of this
inverter is very high, up to 96%. Therefore, it is correct to say that the inverter in
Fig. 9.24 is among the most efficient inverters developed so far.
The inductance of the input choke should be sufficiently high so that the
variations of the current through it are negligible. Then the input with VDC and Lf
can be considered a current source IDC . While the resonant circuit LrCr gives a
harmonic current through the load, capacitor C1 provides optimum conditions for
the change of state of the switch from the point of view of the minimum dynamic
losses.
Lf
Ib
Cr
iD
vo
iC1
M
VDC
Lr io
C1
RL
vGSD
Fig. 9.24 The basic circuit of the class E inverters.
A class E resonant inverter operates at a frequency some what higher than the
resonant frequency ωo=1/√(LrCr). When the transistor is on, it makes a short circuit
for capacitor C1 (Fig. 9.25b), so VDS = 0 and iDS =iDC –io . Since C1 is discharged,
zero voltage conditions for turning off of the transistor are ensured. Until the
current through transistor drops to zero the variation of the voltage across C1 is
small and the dynamic losses during the turn-off are negligible.
The equivalent circuit of the converter while the transistor is off is shown in
Fig. 9.25c. The current through capacitor C1 is:
dV
(9.45)
iC1 = I DC + i0 = C1 DS .
dt
10 Resonant converters
539
V GS
I DC
t0
t0
t
T= 1 / f
i0
I DSM
i DS =I DC + i 0
M on
M off
t
i C1 =I DC + i 0
t
VC1
V C1 =V DS
a)
Cr
I DC
i DS
Lr
i0
M
RL
b)
I DC
VC 1 C r
Lr
i C1
i0
t
RL
M
c)
Fig. 9.25 The waveform of the class E inverter at the optimum operating conditions (a)
and the equivalent circuits when the transistor is on (b) and when it is off (c).
At the instant the transistor is turned on, it takes over the current of capacitor C1.
Consequently, the zero voltage and zero current conditions during the turn-on are
obtained if:
(9.46)
VDS (t0 ) = VDS (t0 ) = 0
dVDS / dt
t0
= dVC1 / dt
t0
,
(9.47)
because at dv/dt = 0 the current through C1 is equal to zero. The beginning of the
cycle of conduction of transistor M is denoted by to . Conditions (9.46) and (9.47)
are the conditions for optimum operation of the class E inverters when the dynamic
losses are negligible. The optimum conditions, at the duty cycle of the pulses
controlling the transistor D= 0.5, may be expressed in the following way:
Power electronics
540
RL =
C1 =
2
2
VDC
8 VDC
≈
0
.
5768
,
PO
4 + π 2 PO
8
π (4 + π ) RLω
2
≈
(9.48)
0.1836
,
RLω
(9.49)
Lr = QRL / ω ,
Cr =
(9.50)
1
⎛
π (π − 4) ⎞
⎜Q −
⎟ RLω
⎜
⎟
16
⎝
⎠
2
≈
1
,
(Q − 1.1525)RLω
(9.51)
where: Po is the input power and Q is the quality factor of the resonant circuit Lr ,
Cr , and RL . The minimum inductance of the choke, which ensures that the ripple of
the input current is less than 10%, when the above conditions are still valid, is:
L f min =
2(π 2 / 4 + 1) RL
≈ 7 RL f .
f
(9.52)
The optimum mode of operation, therefore, is dependent on the load. There exist
matching techniques which reduce this dependence. It should be emphasized that
the optimum conditions are different for D≠0.5. The nearly harmonic form of the
output current is obtained if the Q factor is greater than 7 (Q > 7). The output
voltage is changed by a small variation of the frequency. By increasing the
commutation frequency, if f > fo = 1/(2π√(LrCr)), the output current and voltage are
reduced.
i DS
t
M on
M off
i C1
D on
t
iD
V C1
t
t
Fig. 9.26 The waveforms of the class E resonant inverter in the sub-optimum mode.
10 Resonant converters
541
Except in optimum conditions, the class E inverter may also operate in suboptimum or non-optimum conditions, which arise when the load is variable. If
RL<RLopt (9.48), the voltage across capacitor will reach zero value with a negative
slope (dv/dt< 0) so that its current is iC1=C1dvC /dt < 0. Therefore, the first optimum
mode condition (9.46) is met, but the second (9.47) is not. However, then the antiparallel diode will turn on and keep a zero voltage across the switch (Fig. 9.26).
The transistor will turn on again at VDS= 0. The function of this diode can be
carried out by the internal pn junction substrate-drain of the MOS transistor. This is
the sub-optimum mode.
The non-optimum mode arises when RL>RLopt . Then, none of the two optimum
mode conditions is met. The transistor will be turned on at a positive voltage (VDS >
0) which will increase the dynamic losses. This mode should be avoided.
The advantages of an class E resonant inverters is the circuit simplicity (singletransistor structure), high efficiency (up to 96%), and an almost harmonic load
current resulting in negligible EMI. The operating frequency may be several MHz.
It is limited by the input capacitance of the MOS transistor and is approximately: fM
≈ 0.2/(2πCDSSRL). By applying the corresponding matching circuit the optimum or
sub-optimum mode of operation can be accomplished for an arbitrary load.
The drawback of a class E inverters is, quite high amplitudes of the current and
voltage of the switch which may, amount to several times the corresponding input
D.C. values VDC and IDC . Consequently, their application is restricted to the circuits
having low voltage values of the primary source VDC .
Adding a rectifier to the output of the class E inverter results in a resonant
DC/DC converter. The rectifier could be a standard half-wave or full-wave
rectifier. The rectifier of the DC/DC converter in Fig. 9.27 is also a class E. The
switching losses in its diodes are minimized because they change the state at small
voltage variations dv/dt. Therefore the inverters in Fig. 9.27 are called E2 DC/DC
converters.
Lf
Cr
D2
Lr
Vo
VDC
M
C1
D1
Fig. 9.27 The resonant E2 converter.
Cf
R
Power electronics
542
9.5 DC/DC CONVERTERS BASED ON RESONANT
SWITCHES
A resonant switch consists of a switching element (transistor or thyristor) and
an oscillatory circuit. The oscillatory circuit shapes the current and voltage of the
switch so that the commutation (turning on/off) is carried out at zero voltage. The
resonant switches performing zero current commutation (Fig. 9.28) are called Zero
Current Switches (ZCS) and those performing zero voltage commutation (Fig.
9.29) are called Zero Voltage Switches (ZVS).
The resonant LC circuit of a ZCS switch, consisting of coil Lr and capacitor Cr ,
shapes the current through the switching element. Resonant coil Lr resists fast
current changes in the switching transistor keeping the current, during the switchon process, to a nearly zero value until the voltage across Pr becomes negligibly
small. While Pr is closed the current flowing through it is, due to the resonant
circuit, of resonant character i.e. contains current zero-crossing. This enables
turning off the switch at zero current.
The resonant capacitor Cr of ZVS switches (Fig. 9.29) is short circuited while Pr
is closed. Therefore, during opening of Pr it will keep the voltage across Pr
approximately to zero until the current through Pr drops to a negligible value.
While Pr is open, the oscillations of the voltage in the oscillatory circuit involve
voltage zero-crossing. If this zero crossing is synchronized with the drive of the
switch, turning on is completed at zero voltage.
The switching element is a bipolar or MOS transistor together with an antiparallel diode (two-quadrant current switch) or with a series diode (two-quadrant
voltage switch). The functions of these diodes will be explained by the specific
examples of DC/DC converters.
Sw
Pr
Lr
Sw
Pr
Cr
Lr
Cr
Fig. 9.28 The ZCS resonant switches.
The topologies of DC/DC converters are obtained by replacing the switching
elements of PWM converters, described in chapter 5, with resonant switches. In
this way two basic groups of converters based on the resonant switches are
obtained:
INTRODUCTION TO MULTILEVEL
CONVERTERS
10
10.1 BASIC CHARACTERISTICS OF MULTILEVEL
CONVERTERS
Multilevel converters have found an important place as high power converters.
Also, they are widely used in the renewable energy sources where multilevel
converters appear as link between renewable sources, such as wind, fuel cells,
photovoltaic modules from one side and high power load from another side. Power
converters for high power AC motors, systems for reactive power compensation,
FACTS (Flexible Alternative Current Transmission Systems) devices, inverters in
tracking vehicles have become typical applications where multilevel converters are
used.
Main advantages of multilevel converters compared to traditional topologies are
[62]:
- less harmonic distortion,
- lower voltage stress on semiconductor components,
- lower EMI,
- higher efficiency,
- the possibility of converter realization without magnetic material components
(transformers, inductors, ..)
In addition to presented advantages multilevel converters have disadvantages such
as:
- the need to use a larger number of semiconductor components,
- realization of voltage balance on the capacitors in a various converter
topologies,
- some multilevel inverter topology require power supplying from mutually
isolated DC sources
General trend in power electronics is increasing the switching frequency in power
converters. Increasing the switching frequency is made from 2 basic reasons. First
is harmonic distortion reducing (simple filtration) and second is size reduction of
passive components. On the other hand increasing the switching frequency leads to
higher switching losses, which is specifically expressed in the switches that are
used at higher voltage levels. In order to reduce the voltage stress of switches, it is
Power electronics
580
possible instead one use series connection two or more switches, which divides
applied voltage to number of series connected switches. The inverter branch, where
the switch is replaced with two series connected switches is shown in Figure 10.1
[49].
a)
b)
Figure 10.1. Series connected switches.
This connection of switches sets a number of problems related to control of
switches that should be addressed:
a) Static and dynamic voltage sharing on the switches. From the standpoint of
the dynamic voltage balance it is necessary that both switches commutate
at the same instant. Otherwise, the switch that turned off faster would have
to sustain all voltage.
b) Total dv/dt, which is generated during the commutation of series connected
switches is equal to the sum of dv/dt generated by every switch. Thus a
significant dv/dt can have unwanted effect to low-voltage circuits, and it is
necessary to apply additional protection measures from EMI.
c) From the viewpoint of voltage control a number of switches does not give
freedom in the selection of voltage levels, because the series connected
switches must behave like one switch. The voltage at point A is VDC or 0,
and harmonic that appears at the switching frequency has a significant
value. komutacija ima značajnu vrijednost.
d) Increasing the number of series connected switch does not solve the
problem, what more dv/dt effect becomes more expressed and complicates
control of series connected switches.
The ideea is use the elements for balanced distribution of voltage stress on
switches instead of simultaneous turning on and turning off series connected
10 Introduction to multilevel inverters
581
switches. A branch of inverter bridge bridge with a capacitive voltage divider and
coupling diodes is shown in Figure 10.2. Depending on the state of switch, number
of voltage levels in point A is increased by one. If internal switches are turned on
(depending on cureent direction current it can be SA2 or S’A2), and external switches
SA1 i S’A1 then VA=VDC/2. Point A in the dependance of the state of switches can be
in one of three voltage levels 0, VDC/2 and VDC. Every time when VA=VDC/2, electric
current flows through a capacitor. If current is bilateral and equally flows through
the both capacitors, the voltage balance is maintained and the voltage on the
capacitors is approximately VDC/2. However, if current is is unilateral there is a
voltage imbalance and the voltages on capacitors are not at the desired value.
The maintenance of voltage balance on capacitive voltage dividers is one of the
requirements that must be met through an appropriate converter control. By
applying appropriate control techniques for the topology shown in Figure 10.2 only
one pair of switches is on for every half-period. Voltage VA changes between 0 and
VDC/2 during one half of the period, and between VDC/2 and VDC during the other
half of the period. With this control strategy, change of output voltage is achieved
by one pair of switches for one half-period and by other pair of switches for other
half-period. In this way harmonic spectrum of output voltage is improved.
Fig. 10.2 Three-level converter leg with capacitive voltage divider and clampingdiodes.
Power electronics
582
Figure 10.3 Three-level converter leg with the flying capacitor.
a)
c)
b)
d)
Slika 10.4. Permissible states of switches in three-level converter leg with the flying
capacitor .
10 Introduction to multilevel inverters
583
Similar result can be achieved if instead of capacitive voltage divider only one
“flying” capacitor is used (Figure 10.3). In this topology it is not necessary to use
clamping diodes. At the same time two inner or two outer switches should not be
turned on. Capacitor is short circuited (two inner switches are turned on), or
appearance of voltage imbalance on capacitor and high current through the closed
switches (two outer switches are turned on). Permissible states of switches for the
converter topology in Figure 10.3 are shown in Figure 10.4. For the circuit shown
in Figure 10.3 voltage balance is automatically set to value of VDC/2. Also, two
upper switches (SA1, S’A1) and two lower switches (SA2, S’A2) are not turned on and
turned off at the same time, so the maximum dv/dt of converter leg shown in Figure
10.3 equal to dv/dt of one switch.
By analogous approach four-level converter leg with clamping diodes (Figure
10.5a) and flying capacitor (Figure 10.5b) can be realized. In this case the output
voltage levels are: 0, VDC/3, 2VDC/3 and VDC.
a)
b)
Fig. 10.5. Four-level converter leg with capacitive voltage divider and clamping diodes
a) flying capacitors b).
The reasons for introduction and implementation of multilevel converters are
desribed in section 10.1. Further description of these converters follows in this
chapter. Multilevel conversion is used in different types of conversion, AC/DC,
DC/AC, DC/DC and AC/AC. so these types of multilevel converters are
distinguished.
584
Power electronics
10.2 MULTILEVEL DC-DC CONVERTERS
Multilevel DC/DC converters are used in converters where the input is DC
voltage and on the output a higher DC voltage is required which can not be
achieved with standard DC/DC boost converter. It is known, due to system
constraints, the maximum ratio between the output and input voltages is around 5
(Vo/Vi=5).
An important application of these converters are renewable energy sources. On
the other hand, the participation of renewable energy sources in total produced
electrical energy is increasing.
Fig. 10.6 Multilevel boost DC-DC converter [Rosas-Coro, Ramirez,Garcia-Vite].
These converters are commonly used as an interface between primary lowvoltaeg DC sources, such as photovoltaic modules, fuel cells, batteries or
superconducting magnetic energy storage (SMES) and high voltage multilevel
inverter which is used as drive converter for high-power AC motors, or connection
to electrical grid [9]. In this application multilevel DC-DC converter is used for
balance of DC voltages at the mutilevel inverter input and in this way complex
control of multilevel inverter for this reason is avoided.
10 Introduction to multilevel inverters
585
Another challenge is transformer-less realization of multilevel DC-DC converter
with significant ratio between the output and input voltage. Multilevel boost DCDC converter is shown in Figure 10.6 [62]. The basis of this converter makes
transformer-less conventional boost DC/DC converter, while the increase of output
voltage is realized by increasing the number of voltage levels at the output. The
output voltage depends on the number of output voltage levels (n) and it is equal to
nVo1 (VO=nVo1) (Figure 10.6).
Operating principle of the converter from Figure 10.6 can be explained through
example of four-level boost DC-DC converter (Figure 10.7). For simplicity we will
assume that duty factor of switch S is equal to 0.5. There are two intervals in one
working period of converter shown in Figure 10.6.
1.Time interval: nT<t<nT+DT, n=0,1,2,..
In this time interval, switch S is turned on. The negative electrode of capacitors
C4 and C5 are at the same voltage potential. Inductor L is connected to VI and
accumulate energy from primary source. Also, in this time interval is made voltage
balancing between the capacitors in the circuit. If voltage on capacitor C5 (vC5) is
higher then voltage on capacitor C4 (vC4) diode D5 is turned on and C5 clamps C4’s
voltage across diode D5 and switch S. Also, if voltage vC5+vC3is higher then
vC4+vC2 diode D2 is turned on and capacitors C5 and C3 clamp capacitors C2 and C4
through the diode D2 and switch S (Figure 10.7 a).
2. Time interval: nT+DT<t<(n+1)T
The switch S is turned off. Accumulated energy in inductor L is delivered to
output capacitors. Diode D5 is turned on and across source VS and inductor L
capacitor C5. If voltage VI+vL+vC4 (vL is voltage at the inductance L) is higher tthen
voltage vC5+vC3 diode D3 is turned on and capacitor C3 is charged. Analogously, if
voltage VI+vL+vC4+vC2 is higher then vC5+vC3+vC1 D1 is turned on and C1 is
charged. Turning on the diodes D5, D3 i D1 is synchronously.
Compared to conventional transformer-less boost topology of DC-DC
converter, this multilevel topology, besides obtaining a higher output voltage,
provides some other benefits. The conventional boost DC-DC converter due to
system limitations, primarily losses in the inductance L, has the ratio VO/VI limited
to 5. Also, when higher ratio VO/VI is required converter comes out quasilinear
region and goes into non-linear region. In mutilevel converter shown in
Figure 10.6 quasilinear region is extended to higher values of duty factor D,
and desired value of output voltage VO can be achieved under optimum
converter operation with duty factor of 0.5. The dependance of voltage ratio
VO/VI from duty factor for different values of rL/Ro is shown in Figure 10.9.
Resistance rL is parasitic resistance of inductance L and Ro is load resistance
(Figure 10.6).
Power electronics
586
3vo1
D1
+
C1
vc2
D2
+
C2
2vo1
D3
+
vc3 =vo1
C3
vc4
D4
+
C4
vo1
D5
VI
+
vc1 =vo1
+
C5
L
vc5 =vo1
S
a)
b)
Fig. 10.7. Four-level boost DC-DC converter for switch-on state a) and for switched-off
state b)
16
rl/Ro=0.001
14
12
rl/Ro=0.002
Vo / Vi
10
8
rl/Ro=0.005
6
rl/Ro=0.01
4
2
0
0
0.1
0.2
0.3
0.4
0.5
0.6
Duty factor D
0.7
0.8
0.9
1
Fig. 10.8 The dependance of volatage ratio VO/VI from duty factor for differant values of
rL/Ro.
10 Introduction to multilevel inverters
587
Based on the known conditions that the average value of voltage on inductance
L is equal to 0, one can write:
1
0
(10.1)
The first member of equation (10.1) is valid when the switch S is turned on
(nT<t<nT+DT), and second when switch S is turned off (nT+DT<t<(n+1)T). From
(10.1) it can be written:
1
1
(10.2)
Current IL is the average value of current through the inductance L and it can be
determined from the condition of equality input and output power
.
(10.3)
Incorporating (10.3) in (10.2) is obtained:
(10.4)
.
Currents through the semiconductor components in the lower levels of converter
are higher than currents in the upper levels of converter what is one of drawbacks
this topology. This is one of characteristics for this type of multilevel converters,
and various modifications of basic topology is used in order to realize balance of
currents through the switches.
Example 10.1
10.1 Four level DC-DC converter of Figure 10.7 has VI=12V, RO=10Ω, rL=0.2Ω
and D=0.4. Determine:
a) the output voltage, and
b) the average value of inductor current.
a) The output voltage can be determined following the Expression 10.4:
1
1
42.35 .
b) The average value of current iL can be determined from the condition of
equality input and output power and according to Equation 10.3 is obtained:
1
28.23 .
588
Power electronics
Multilevel DC/DC converters are also used as the interface between the DC
source and multilevel inverter in order to achieve uniform voltage distribution on
the input capacitors of inverter. Four-level two-quadrant DC/DC converter is
shown in Figure 10.9 [9]. This converter can operates as a boost or buck depending
on whether the power flows from DC source to inverter or vice versa.
In many applications power flow is unidirectional, from the DC source to the
load, so simpler converter topology, then those shown in Fig. 10.9, can be used
(Fig. 10.10). Five different states of switches in the converter from Figure 10.10
are shown in Figure 10.11. States 0 and 4 (Figure 10.11a and 10.11e) are the
typical for conventional boost DC-DC converter. Capacitor C2 is mostly empty.
For the case shown in Figure 10.11 when the induction motor load capacitor C2
tends to discharge so the state 1 is inserted in the switching sequence to increase
voltage on the capacitor C2 (Figure 1.11 b).
Figure 10.9 Four-level two-quadrant boost multilevel DC-DC converter which connects
DC source and multilevel inverter.
A secondary goal of this converters is to balance the voltages on the upper and
lower capacitor and it is done in the state 2 (Figure 1.11c) and the state 3 (Figure
1.11d). State 2, or state 3 is inserted after the state 1 for transition from state 0 to
state 4, or before the state 1 for transistion from 4 to 0. Applied switching
sequence during one period is shown in Figure 1.12. One period in the work of
DC-DC converter shown in Figure 10.10 makes control sequences that correspond
to converter transition from state 0 to 4 and vice versa from state 4 to 0. The
10 Introduction to multilevel inverters
589
assumption is that in the period T state 0 applied in the interval d1T, state 1 in the
interval d2T, state 2, or 3 in the interval d3T and state 4 in the interval 1
. Interval d2T is increased or decreased depending on how much
the voltage on the capacitor C2 should increase. Interval d3T is shorter and it is used
to maintain the voltage balance between upper and lower capacitors. State 2, or 3
will be active depending on whether it is necessary to increase voltage vC1, or vC3. If
it is necessary to increase the voltage vC1, state 2 would be active.
Fig. 10.10. Four-level one-quadrant boost multilevel DC-DC converter which connects
DC source and multilevel inverter.
a)
b)
Power electronics
590
c)
d)
e)
Figure 10.11. Possible switching states of the four-level one-quadrant DC-DC converter
from Figure 10.10.
Fig. 10.12 Switching sequence for four-level DC-DC converter from Fig. 10.10 [9].
10 Introduction to multilevel inverters
591
For multilevel DC-DC converter, as in conventional two-level converter, is
necessary to determine expressions for the output voltage Vo, the average value of
current through the inductance L, ripple of current iL(ΔiL) and the time intervals d1,
d2 and d3 in which different states of converter are applied. For this purpose, we
assume that the inverter is loaded with resistant load, resistors R1, R2 and R3
(Figure 10.13).
Assuming that:
1. In steady state voltage on the capacitors is equal and its value is VO/3, ie
vC1=vC2=vC3=VO/3, where VO is converter output voltage.
2. Duration of switching states does not depend on the direction of switching
sequences, ie whether is converter transition from state 0 to state 4, or vice
versa. In other words, during one period state 1 lasts for a switching
sequence 0-1-2/3-4 and the same time for a switching sequence 4-2/3-1-0.
The same is for other converter states. The relationship between output and
input voltage of DC-DC converter from Figure 10.15 can be determined
from the assumption that the average value of voltage on inductance L
during the period T is equal to 0 (VL=0), so is worth:
1
1
0
.
(10.5)
The average value of current iL (IL)) can be determined from the condition that
input and output power are equal. Neglecting the losses in the converter, and
assuming that the average current through the capacitor during the period T equal
to 0 is obtained:
(10.6)
To determine ripple current, it is necessary to calculate the change of current for
every converter state. The switching sequence 0-1-2/3-4 will be observed. Let the
I1 is current through the inductance L after the state 0, the current I2 at the end of
state 1, the current I3 at the end of state 2/3 and I4 current at the end of state 4, or
half a period. Based on foregoing, we can write expressions for currents I1, I2, I3
and I4.
2
Power electronics
592
1
(10.7)
Figure 10.13Four-level one-quadrant converter with resistance load.
During the second half of the period, change of current iL is the same, except
that the applied switching sequence is 4-2/3-1-0 (Fig. 10.14). The maximum
change of current iL is equal to:
(10.8)
2
, ,
∆
Determining d1 , d2 and d3 is made on the basis of known value of voltage VI and
the required value for output voltage VO. The value of d3 is selected to be small and
constant, because in this interval is maintained voltage balance on the capacitors C1
and C3.
and 1
In the time intervals
1
state 1 is active and center capacitor is charged. In this state change in voltage on
the capacitor C2 is is higher then on the capacitors C1 and C3. If e2 is error of
, where
is reference value of voltage
voltage vc2,
/3 , for determining value of d2 a linear PI controller can be used which input is
e2, and output d2. Value d1 can be determined on the basis of output voltage, if
values of VI, d2 and d3 are known (eq. 10.5).
10 Introduction to multilevel inverters
593
Fig. 10.14 Graph of current iL during one period [9].
The topologies and control of multilevel converters are subjects of extensively
research and only some basic topology of multilevel converters and their
characteristics are described in this section
Example 10.2
Four level one quadrant DC-DC converter of Figure 10.13 has the following
parameters VI=48V, R1= R2= R3=5Ω and L=100μH. Applied switching sequence
is 0-1-2-4 when d1=0.25, d2=0.1 and d3=0.02. Determine:
a) the output voltage, and
b) the average value of current through the inductor L.
a) Output voltage (Equation 10.5) is equal to:
71 .
2
3
3
b) Following the Expression 10.6 the average value of inductor L current is:
1
·
0.2
0.2
0.2
7 .
10.3 MULTILEVEL INVERTERS
Among multilevel converters, multilevel DC-AC converters have an important
place. There are many AC consumers as AC motors in the controlled electric drives
which power is more then MW and supply voltage is several kV and more.
Power electronics
594
Another important area of application these converters is renewable energy
sources, where these converters are used for connection wind genertors
photovoltaic modules, fuel cells, etc., to electrical grid.
Besides the previously mentioned (section 10.1), multilevel inverters have
several adventages over a conventional two-level inverters [40]:
- Less voltage stress on switches, also dv/dt stress can reduce the and therefore
electromagnetic compatibility problems can be reduced ;
- Input current has lower harmonic distorstion;
- Multilevel inverters can operate at fundamental frequency but also at higher
switching frequencies when PWM technique is applied.
There are many topologies of multilevel inverters, but four different major
converter structures have the widest use:
- cascaded H-bridges converter with seperate dc sources,
- diode clamped multilevel inverters,
- flying capacitor, and
- hybrid topology.
For control of multilevel inverters different modulation techniques are used,
sinusoidal pulse with modulation, selective harmonic elimination, space vector
modulation and the others. These techniques are modified for use in multilevel
inverters.
10.3.1 Cascaded H-bridge inverters
Cascaded multilevel H-bridge inverters consist of a number of cascade
connected H-bridge single phase inverter which is supplied from separate dc
sources. Cascaded m-level H-bridge inverter is shown in Figure 10.15. It consists
from p single–phase inverters, and this nuber is determined by inverter level
m=2p+1. Depending on the state of the switches three voltage levels can be
obtained at the output of each inverter +VDC (S1k and S2k are turned on), 0 (S1k and
S3k , or S2k and S4k are turned on) and –VDC (S3k and S4k are turned on), k=1,2,..,p.
Output voltage is equal to sum of single–phase inverter output voltages
..
. In waveforms of 11-level inverter output voltage and
output voltages of each cascade-connected single-phase inverters are shown in Fig.
10.16.
The output voltage of each single-phase inverter can be expressed as follows:
,
0, 0
,
, , 2
2
2 (10.9)
10 Introduction to multilevel inverters
Fig. 10.15. Cascaded H-bridge p-level inverter.
595
Power electronics
596
vo1
VDC
θ1
-VDC
vo2
VDC
θ1
θ1
θ1
t
θ2
-VDC
vo3
VDC
θ2
θ2
θ2
t
θ3
-VDC
vo4
VDC
θ3
θ3
θ3
t
θ4
-VDC
vo5
VDC
θ4
θ4
θ4
t
θ5
-VDC
θ5
θ5
θ5
t
5VDC
4VDC
3VDC
2VDC
VDC
-VDC
t
-2VDC
-3VDC
-4VDC
-5VDC
Fig. 10.16 Waveforms of 11-level inverter output voltage and output voltages of each
cascade-connected single-phase inverters.
This voltage is
and following expression can
be obtained:
∑ , , ,..
..
(10.10)
Harmonics that have a dominant influence on the total harmonic distortion of
output voltage (5,7,11,13) can be eliminated by appropriate choice of the angle θk
(10.10). Also, multilevel inverter output voltage is closer to a sinusoidal form and
has less harmonic distortion than conventional single-phase two-level bridge
inverter. Because the single-phase H-bridge inverters are produced as particular
modular units, desired topology of multilevel inverter is obtained by cascade
10 Introduction to multilevel inverters
597
connecting of these units. On the other hand, every single-phase H-bridge requires
a separate DC power supply. This limits the application of this inverter topology
for those where a number of separate DC sources is sufficient
Multilevel inverter for power supplying three-phase AC motor, or battery
charger is shown in Fig. 10.17 [71]. Multilevel inverter is a three-phase and each
phase has a 5 single-phase bridge inverters which are supplied from separate DC
48V sources.
Motor
to
battery
charger
48V
+
H bridge
inverter
+
H bridge
inverter
+
H bridge
inverter
Control Switch
Charge Drive
+
H bridge
inverter
+
H bridge
inverter
+
H bridge
inverter
+
H bridge
inverter
+
H bridge
inverter
+
H bridge
inverter
+
H bridge
inverter
+
H bridge
inverter
+
H bridge
inverter
+
H bridge
inverter
+
H bridge
inverter
+
H bridge
inverter
Fig. 10.17 Three-phase cascade 11-level H-bridge inverter for power supplying threephase AC motor, or battery charger.
Example 10.3
Cascaded 11-level H-bridge inverter of Figure 10.15 has separate DC sources
which voltages are same and equal to 24V. Control angles of switches are: θ1=15°,
Power electronics
598
θ2=30°, θ3=45°, θ4=60° and θ5=75°. Determine the amplitude of output voltage
fundamental harmonic.
According to Expression 10.10 the amplitude output voltage fundamental
harmonicis equal to:
·
15°
30°
45°
60°
75°
100.1 .
Another topology of multilevel cascade inverter is with transformer and uses
standard three-phase, two-level inverter modules (Figure 10.18) [11]. In order for
the converter voltage to be added up, the outputs of inverter modules need to be
synchronized with the separation of 120° between each phase. Phasor diagram of
multilevel inverter from Figure 10.18 is shown in Figure 10.19. Phase voltages at
the output of inverter modules are: ak, bk i ck (k=1,2,3). An isolated transformers is
used to provide voltage boost. These isolating transformers with a 1:1 ratio
generate voltages
,
and
from the output voltages of AC inverter
,
and
respectively (Figure 10.19).
modules
Fig. 10.18 Three-phase multilevel inverter with isolated transformers [11].
In this way the required value of line voltages AB, BC and CA are obtained. The
advantages of the proposed multilevel inverter shown in Figure 10.20. are as
follows:
- Due to modular design, switching components in inverter modules have
lower voltage stress. Also, this inverter design allows its easy maintenance.
- Less dv/dt effect;
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