Embedded Microcomputer Systems
Lecture 8.1
Recap from last time
 RTOS
 Debugging/verification
Lab 4 Application of RTOS
 Input sound
 Calculate FFT
 Display amplitude versus frequency on the oLED
Objectives
 Designing analog circuits to run on single supply
 Analog circuit design using op amps
 Instrumentation amps
 Noise measurements and reduction
 Electret microphones
Convert to single supply, Vpow = 3.3V
1) Design with +Vs -Vs
2) Assume ADC range is 0 to Vmax
3) Add an analog reference, Vref = ½ Vmax
4) Map
-Vs
to
digital ground (ADC Vmin)
Analog ground
to
Vref reference voltage
+Vs
to
Vpow supply
From an analog signal perspective, it behaves like a ±Vref supply
From the digital signal perspective, everything is 0 to Vpow
Example 1
R3
Iy
Ix
Vin I in
R1
+Vs
Vy
Vout = -
Vx
I2
0.1F
0.1F
R2
-Vs
R3 =
by Jonathan W. Valvano
R2
V
R1 in
R1 * R2
R1 + R2
Embedded Microcomputer Systems
Lecture 8.2
Regular design Vout = -5Vin
R1 = 10k
R2 = 50k
R3 = 8.3k
Example 2
Regular design Vout =2Vin
Example 3
Vout =2Vin-1.23V
by Jonathan W. Valvano
Embedded Microcomputer Systems
Lecture 8.3
Noninverting amplifier with an effective -0.62 V to +2.1 V analog signal range.
Note: LM4041CILPR shunt reference can be adjusted for various offsets
The voltage at pin3 is Vin
Due to feedback, the voltage at pin 2 is Vin
Current across R1 is (Vref-Vin)/R1
Current across R2 is (Vin-Vout)/R2
These two currents are equal (Vref -Vin)/R1=(Vin-Vout)/R2
Solve
(1.23-Vin)*R2/R1 = (Vin-Vout)
Vout = Vin - (Vref -Vin)*R2/R1
Vout = (1+R2/R1)Vin - Vref *R2/R1
Vout = 2Vin – 1.23
Example 4
Single supply design Vout = 5(Vin-1.23)
Use rail to rail op amp
R1 = 10k
R2 = 50k
V2 = Vin, V1=1.23
by Jonathan W. Valvano
Embedded Microcomputer Systems
R1
Lecture 8.4
R2
V2
Vout =
R1
R2
(V 2- V 1 )
R1
R2
V1
11.2.7. Linear Mode Op Amp Circuits (EE445L review)
This design example works with any analog circuit in the form
Vout = A1V1 + A2V2 +…+AnVn + B
designed with one op amp as shown in the following figure.
V
1
V
2
V
n
V
g
reference
chip
{
{
positive
gains
V
ref
negative
gains
op amp
Vout
Rf
Boiler plate circuit model for linear circuit design.
The first step is to choose a reference voltage
Common Error: If you use resistor divider from the +12V or +5V supply to
create a voltage constant, then the power supply ripple will be added
directly to your analog signal.
The second step is to rewrite the design equation in terms of the reference
voltage, Vref.
Vout = A1V1 + A2V2 +…+AnVn + ArefVref
by Jonathan W. Valvano
Embedded Microcomputer Systems
Lecture 8.5
The third step is to add a ground input to the equation. Ground is zero volts
(Vg=0), but it is necessary to add this ground so that the sum of all the gains is
equal to one.
Vout = A1V1 + A2V2 +…+AnVn + ArefVref + AgVg
Choose Ag such that
A1 + A2 +…+An + Aref + Ag = 1
In other words, let
Ag = 1 – ( A1 + A2 +…+An + Aref )
The fourth step is to choose a feedback resistor, Rf, in the range of 10 k to
1M. The larger the gains, the larger the value of Rf must be. Then calculate input
resistors to create the desired gains. In particular,
|A1| = Rf/R1
|A2| = Rf/R2
|An| = Rf/Rn
|Aref| = Rf/Rref
|Ag| = Rf/Rg
so R1 = Rf/|A1|
so R2 = Rf/|A2|
so Rn = Rf/|An|
so Rref = Rf/|Aref|
so Rg = Rf/|Ag|
The last step is to build the circuit. If the gain is positive, then the input
resistor is connected to the positive terminal of the op amp. Conversely, if the gain
is negative, then the input resistor is connected to the negative terminal of the op
amp.
For example, we will design the following analog circuit
Vout = 5V1 - 3V2 + 2V3 – 10
The first step is to choose a reference voltage. The REF02 +5.00V voltage
reference will be used.
The second step is to rewrite the design equation in terms of the reference
voltage.
Vout = 5V1 - 3V2 + 2V3 - 2Vref
The third step is to add a ground input to the equation so that the sum of all
the gains is equal to one.
by Jonathan W. Valvano
Embedded Microcomputer Systems
Lecture 8.6
Vout = 5V1 - 3V2 + 2V3 - 2Vref - Vg
The fourth step is to choose a feedback resistor, Rf =150 k. The value is a
multiple of the least common multiple of the gains: 5,3,2,1. Then calculate input
resistors to create the desired gains.
= 150 k/5 = 30 k
R1 = Rf/|A1|
R2 = Rf/|A2|
= 150 k/3 = 50 k
R3 = Rf/|A3|
= 150 k/2 = 75 k
Rref = Rf/|Aref|
= 150 k/2 = 75 k
Rg = Rf/|Ag|
= 150 k/1 = 150 k
The last step is to build the circuit.
30k
V
1
75k
V
3
V
2
REF02
op amp
Vout
50k
V
ref
75k
150k
V
g
150k
Rf
A linear op amp circuit.
Instrumentation Amp
necessary condition (this must be true)
amplify a differential voltage, shown below as V1-V2
sufficient condition (one or more of this made be true)
large gain (above 100),
a high input impedance, and
a good common mode rejection ratio.
by Jonathan W. Valvano
Embedded Microcomputer Systems
Lecture 8.7
Integrated instrumentation amplifier.
AD627/INA122 are low-power single supply rail-to-rail instrumentation amps,
Vout = Gain*(V1-V2) + Vpin5
Gain = 5+(200k/RG)
Vout = Vpin5 when V1 equals V2
In EE445L Lab 7, we grounded pin 5, Vpin5 = 0
Vout = Gain *( V1 – V2)
With an EKG, we connect pin 5, Vref = Vpin5
EKG data acquisition system.
Normal II-lead electrocardiogram.
graphical display of EKG is a qualitative data acquisition system.
measurement of heart rate is quantitative
parameters of an EKG amplifier include:
 high input impedance (larger than 1 M),
 high gain, 2500, ±1 mV to ±2.5 V
 0.05 to 100 Hz band-pass filter and
 good common mode rejection ratio.
by Jonathan W. Valvano
Embedded Microcomputer Systems
Lecture 8.8
Instrumentation amp as preamp stage
 good CMRR,
 high input impedance,
 gain of 10.
A 0.05 Hz passive high pass filter
 created by R2 and C2.
 low-leakage capacitor for C2 is critical
 polypropylene or polystyrene would be best,
 low-leakage ceramic is acceptable.
2-pole Butterworth LPF.
 153 Hz cutoff is greater than 100Hz
 implemented with standard components
Standard EKG amp
preamp gain=48 0.05 Hz HPF
gain = 48
C3 +3.3V
0.1uF
0.1uF
4.7k
7
1M 3
R1
R2
2F 1M
C2
1
V1
8
C7
0.015uF
V2
3
1
5
4
OPA2350
8
C4
1M
3.3F
R4
AD627AN
1M
2
R8
R9
1k
5
U2a
4
49k
R5
R6
V3
0.015uF
C5
6
U1
2
C8
+3.3V
R3
C1
2F
153 Hz LPF
R7 47k
7
49k
C6
0.015uF
U2b
6
+1.233V
3.3 V
R10
5.1 k
LM4041CILP
U3
Single supply rail-to-rail parts
Electromagnetic field induction
by Jonathan W. Valvano
Embedded Microcomputer Systems
Lecture 8.9
Motor
Magnetic field
Vm= KBS
Our
instrument
Im
S
I1
Vs
V1
Vs
Mutual inductance
V1
AC
power
Magnetic field noise pickup can be modeled as a transformer.
Motor
Electric field
Our
instrument
Id
I1
V1
Vs
Vs
Stray capacitance
V1
AC
power
Electric field noise pickup can be modeled as a stray capacitance.
Observation: Sometimes the source of EM fields originate from inside the
instrument box, such as high frequency digital clocks and switching power
supplies.
Techniques to measure noise.
classify the type of noise
broadband (i.e., all frequencies, like white noise)
certain specific frequencies (e.g., 60 Hz EM field)
quantify the magnitude of the noise.
Digital voltmeter (DVM) in AC mode.
calibrated voltmeter is most accurate quantitative method to measure noise.
by Jonathan W. Valvano
Embedded Microcomputer Systems
Lecture 8.10
Analog oscilloscope.
approximate the RMS noise amplitude by dividing the peak-to-peak noise by 8.
line-trigger to see if the noise is 60 Hz
Voltage
White or 1/f noise
Voltage
Periodic noise
Peaktopeak
Peaktopeak
Time
Time
Quantifying noise my measuring peak-to-peak amplitude.
Spectrum analyzer.
1000
Voltage
Noise
100
60Hz noise
1/f noise
bandwidth limits
white noise
10
1
1
10
100
1k
Frequency (Hz)
10k
100k
Classifying noise my measuring the amplitude versus frequency with a spectrum
analyzer.
Techniques to reduce noise.
1) reducing noise from the source
enclose noisy sources in a grounded metal box
filter noisy signals
limit the rise/fall times of noisy signals.
limiting the dI/dt in the coil.
Noisy
Less noisy
by Jonathan W. Valvano
Embedded Microcomputer Systems
Lecture 8.11
Limiting rise/fall times can reduce radiated noise.
2) limiting the coupling between the noise source and your instrument.
Maximize the distance from source to instrument
Cables with noisy signals should be twisted together,
Cables should also be shielded.
For high frequency signals, use coaxial
Reduce the length of a cable
Place the delicate electronics in a grounded case
Optical or transformer isolation circuits
Transducer
Twisted wires
Instrument
Z
in
R
out
Shielded cable
Instrument
Twisted wires
Instrument
Zin
R
out
Shielded cable
Proper cabling can reduce noise when connecting a remote transducer or when
connecting two instruments.
3) reduce noise at the receiver.
bandwidth should be as small as possible.
add frequency-reject digital filters
use power supply decoupling capacitors on each
twisted wires then Id1 should equal Id2.
V1-V2 = Rs1 Id1 - Rs2 Id2.
by Jonathan W. Valvano
Embedded Microcomputer Systems
Lecture 8.12
Id1
Amp
R s1
Vs
V1
R s2
V2
R diff R in1
R in2
Rm
Vm
Id2
FCapacitively coupled displacement currents.
Henry Ott, Noise Reduction Techniques in Electronic Systems, Wiley, 1988 or
Ralph Morrison, Grounding and Shielding Techniques, Wiley, 1998.
Integrated Circuits for High Performance Electret Microphones
By Arie Van Rhijn http://www.national.com/nationaledge/dec02/article.html
Section 5.2 Microphones
Current Electret Condenser Microphones
Fig 1. Typical cross section of an ECM with JFET buffer and Phantom Biasing
by Jonathan W. Valvano
Embedded Microcomputer Systems
Lecture 8.13
Connector
Caspule
Diaphragm
Vcc
JFET
Electret
PCB
2k
Signal/bias
R1
Output
Signal/bias
C
Gnd
Leads
Gnd
Thickness
JFET
Diameter
Electret
Backplate
+3.3V
R1
10k
V1
Electret
C1
1F
X7R
R2
R3
22k
V2
R4
22k
1k
C2
Microcontroller
OPA2350
V3
+
-
R5
1k
4.7F
tant
R6
100k
C3
220pF
X7R
Figure 5.6. An electret microphone can be used to record sound.
by Jonathan W. Valvano
ADC