Lecture #18

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I. Transistor Amplifiers
A. Amplifier Terminology:
Input
sources
Intrinsic
Amplifier
V+
Load
Voltage Input
Supply
Current
ISUP
RS
vs
+
−
VBIAS
+
−
vIN = VBIAS + vs
Current Input
is
iOUT = id
ISUP
RS
iIN = IBIAS + is
iD
Input
Active
Device
iD = f(input)
+
vOUT
RL
−
IBIAS
V−
• Total input voltage = VBIAS + vs = vIN
• Total input current = IBIAS + is = iIN
• Source resistance RS is only associated with small signal sources
• Total output voltage = vOUT = VOUT + vout
• Total output current = iOUT = IOUT + iout
• Choose ID = ISUP ----> DC output current, IOUT = 0, VOUT = 0
• iout = iD - ISUP = id
• vout = -iout RL = id RL
EECS 6.012 Spring 1998
Lecture 18
B. The Four Small-Signal Amplifiers
RS
vs
Rout
+
vin
+
−
−
Rin
+
−
Avvin
+
vout
−
RL
Voltage Amplifier
(a)
iin
is
iout
RS
Aiiin
Rin
Rout
RL
Current(b)
Amplifier
iout
RS
vs
+
vin
−
+
−
Gmvin
Rin
RL
Rout
Transconductance
Amplifier
(c)
iin
is
RS
Rout
Rin
+
−
Rmiin
RL
+
vout
−
Transresistance Amplifier
(d)
EECS 6.012 Spring 1998
Lecture 18
C. Method to Calculate 2-Port Small Signal Models
vt
+
+
−
vout
−
(a) Av
iout
it
(b) Ai
vt
iout
+
−
(c) Gm
+
vout
it
−
+
vt
−
it
(d) Rm
RL
it
vt
+
−
(e) Rin
+
vt
−
it
RS
(f) Rout
it
+ v
− t
EECS 6.012 Spring 1998
Lecture 18
D. Effect of Source and Load Resistances
• Voltage Amplifier
RS
Rout
+
vs
+
−
vin
_
+
Rin
v
 R in 
out
----------- =  ---------------------- 
v
 R in + R S 
s
+
−
A
Avvin
v
vout
_
RL
R


L
 -------------------------- 
 R L + R out 
• Transconductance Amplifier
iout
RS
+
vs
+
−
vin
_
Rin
Gmvin
Rout
RL
R
R
i
in
out
out
---------- = --------------------- G -------------------------m R +R
R +R
v
in
s
L
out
s
EECS 6.012 Spring 1998
Lecture 18
II. Common-Emitter Amplifier
A. Topology
VCC
VCC
RC
+
RS
vs
+
−
VBIAS
+
−
RC
iOUT = IOUT + iout
VOUT = VOUT + vout
+
VOUT
RL
VBIAS
+
−
−
−
(b)
(a)
B. Biasing the CE Amplifier
• Graphical approach: plot IC as a function of the DC base-emitter
voltage VBIAS (note: normally plot vs. base current, so we must
return to Ebers-Moll):
 V BE ⁄ V th

 V BC ⁄ V th

I C = α F I ES  e
– 1  – I CS  e
– 1
I C = α F I ES e
V BE ⁄ V th
= α F I ES e
V BIAS ⁄ V th
( forward active )
EECS 6.012 Spring 1998
Lecture 18
• We can plot the forward active current for VCE = VOUT > VCE(sat)
• Note that the range of variation for VBIAS is only 600 mV - 660 mV
IC
(mA)
0.66
1.0
VBIAS
(V)
0.5
4
0.64
3
0.62
2
0.6
1
0
1
2
3
4
VCE = VOUT
(V)
5
(a)
VOUT
HighGain
Region
5V 1
2
3
4
0.62 V
VBIAS
(b)
EECS 6.012 Spring 1998
Lecture 18
C. Limitations of a Resistive Load
• In order to maximize the output swing, set VOUT = VCC / 2. The load
resistor value is coupled with the collector current, through the load
line equation:
V CC – V OUT V CC
I C = -------------------------------- ≈ ----------2R C
RC
• The transconductance is therefore
g m = I C ⁄ V th = V CC ⁄ ( 2R C V th )
• The small-signal voltage gain is (for ro >> RC):
– V CC
A v ≈ – g m R C = -------------2V th
• To increase the gain, the only option is to increase the supply voltage
which wastes power
EECS 6.012 Spring 1998
Lecture 18
II. Common-Emitter Amplifier - Current Source Supply
A.Current Source Supplies
iSUP
+
+
vSUP
vSUP
iSUP
−
roc
ISUP
−
(a)
iSUP
1
roc
ISUP
roc
vSUP
(b)
(c)
• Large-signal model:
iSUP = 0 for VSUP < 0
iSUP = ISUP + vSUP/roc for VSUP > 0
• Small-signal model: ISUP=0 & VSUP=0
isup=vsup/roc
EECS 6.012 Spring 1998
Lecture 18
B. Large Signal Analysis - CE Amplifier
VCC
VCC
iSUP
ISUP
iOUT = IOUT + iout
RS
vs
+
−
VBIAS
+
−
+
+
VOUT
RL
vOUT = VOUT + vout
+
−
VBIAS
−
−
(b)
(a)
IC
(mA)
0.66 V
1.0
VBIAS
VOUT
0.5
0.64 V
3
4
2
0.62 V
0
1
1
2
3
(a)
4
5
VCC
1
HighGain
Region
2
3
0.6 V
VOUT
(V)
4
0.625
VBIAS
(b)
• The range of input bias voltage, VBIAS for which the current source
and the transistor are in their constant-current regions is extremely
small. We will address this issue later.
• Load line for current source supply (idealized characteristics)
EECS 6.012 Spring 1998
Lecture 18
C. Small-Signal Model for Current Source Supply
• Voltage gain: (unloaded)
iout
+
v
_
r
gmv
ro
roc
+
vout
−
v out
A v = ---------- = – g m  r o r oc 


v in
• For a well-designed current source, roc >> ro and so the commonemitter amplifier gain reduces to:
VA
 IC   V A
A v ≅ – g m r o = –  --------   -------  = – -------V th
 V th   I C 
• Final expression depends on device dimensions and parameters (e.g.,
base width and the ratio of base doping to collector doping)
• Compare voltage gain with resistor to current source supply
V CC
 I C   V CC 
A v ≅ – g m R C = –  --------   -----------  = – ----------2V th
 V th   2I C 
EECS 6.012 Spring 1998
Lecture 18
III. Common-Emitter/Current Source Supply-Current Input
A. Topology
V+
V+
iSUP
ISUP
iOUT = IOUT + iout
IOUT
+
is
RS
vOUT = VOUT + vout
IBIAS
RL
IBIAS
−
V−
V−
(a)
(b)
B. Graphical Analysis
IC
(mA)
IOUT
10 µA
1.0
6 µA
0.5
ISUP
8 µA
3
IBIAS
0
4 µA
2
3
ISUP
βF
βF
IBIAS
2
2 µA
0
1
2
−ISUP 1
1
3
4
(a)
5
VCE
(V)
(b)
• iout is the output (IOUT = 0) when ISUP = βF IBIAS
EECS 6.012 Spring 1998
Lecture 18
IV. Two-Port Parameters for the C.E. Amplifier
Circuit Parameters
Device Parameters
AV
Gm Ai Rin
-gm(ro||roc) gm βo
Rout
rπ
ro||roc
ISUP↑
−
↑
−
↓
↓
βF ↑
−
−
↑
↑
−
VA ↑
↑
−
−
−
↑
Arrows indicate how to increase circuit parameter
values.
EECS 6.012 Spring 1998
Lecture 18
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